1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* Copyright(c) 2018-2019 Realtek Corporation 3 */ 4 5 #include "main.h" 6 #include "fw.h" 7 #include "tx.h" 8 #include "reg.h" 9 #include "debug.h" 10 11 static void rtw_fw_c2h_cmd_handle_ext(struct rtw_dev *rtwdev, 12 struct sk_buff *skb) 13 { 14 struct rtw_c2h_cmd *c2h; 15 u8 sub_cmd_id; 16 17 c2h = get_c2h_from_skb(skb); 18 sub_cmd_id = c2h->payload[0]; 19 20 switch (sub_cmd_id) { 21 case C2H_CCX_RPT: 22 rtw_tx_report_handle(rtwdev, skb); 23 break; 24 default: 25 break; 26 } 27 } 28 29 void rtw_fw_c2h_cmd_handle(struct rtw_dev *rtwdev, struct sk_buff *skb) 30 { 31 struct rtw_c2h_cmd *c2h; 32 u32 pkt_offset; 33 u8 len; 34 35 pkt_offset = *((u32 *)skb->cb); 36 c2h = (struct rtw_c2h_cmd *)(skb->data + pkt_offset); 37 len = skb->len - pkt_offset - 2; 38 39 rtw_dbg(rtwdev, RTW_DBG_FW, "recv C2H, id=0x%02x, seq=0x%02x, len=%d\n", 40 c2h->id, c2h->seq, len); 41 42 switch (c2h->id) { 43 case C2H_HALMAC: 44 rtw_fw_c2h_cmd_handle_ext(rtwdev, skb); 45 break; 46 default: 47 break; 48 } 49 } 50 51 static void rtw_fw_send_h2c_command(struct rtw_dev *rtwdev, 52 u8 *h2c) 53 { 54 u8 box; 55 u8 box_state; 56 u32 box_reg, box_ex_reg; 57 u32 h2c_wait; 58 int idx; 59 60 rtw_dbg(rtwdev, RTW_DBG_FW, 61 "send H2C content %02x%02x%02x%02x %02x%02x%02x%02x\n", 62 h2c[3], h2c[2], h2c[1], h2c[0], 63 h2c[7], h2c[6], h2c[5], h2c[4]); 64 65 spin_lock(&rtwdev->h2c.lock); 66 67 box = rtwdev->h2c.last_box_num; 68 switch (box) { 69 case 0: 70 box_reg = REG_HMEBOX0; 71 box_ex_reg = REG_HMEBOX0_EX; 72 break; 73 case 1: 74 box_reg = REG_HMEBOX1; 75 box_ex_reg = REG_HMEBOX1_EX; 76 break; 77 case 2: 78 box_reg = REG_HMEBOX2; 79 box_ex_reg = REG_HMEBOX2_EX; 80 break; 81 case 3: 82 box_reg = REG_HMEBOX3; 83 box_ex_reg = REG_HMEBOX3_EX; 84 break; 85 default: 86 WARN(1, "invalid h2c mail box number\n"); 87 goto out; 88 } 89 90 h2c_wait = 20; 91 do { 92 box_state = rtw_read8(rtwdev, REG_HMETFR); 93 } while ((box_state >> box) & 0x1 && --h2c_wait > 0); 94 95 if (!h2c_wait) { 96 rtw_err(rtwdev, "failed to send h2c command\n"); 97 goto out; 98 } 99 100 for (idx = 0; idx < 4; idx++) 101 rtw_write8(rtwdev, box_reg + idx, h2c[idx]); 102 for (idx = 0; idx < 4; idx++) 103 rtw_write8(rtwdev, box_ex_reg + idx, h2c[idx + 4]); 104 105 if (++rtwdev->h2c.last_box_num >= 4) 106 rtwdev->h2c.last_box_num = 0; 107 108 out: 109 spin_unlock(&rtwdev->h2c.lock); 110 } 111 112 static void rtw_fw_send_h2c_packet(struct rtw_dev *rtwdev, u8 *h2c_pkt) 113 { 114 int ret; 115 116 spin_lock(&rtwdev->h2c.lock); 117 118 FW_OFFLOAD_H2C_SET_SEQ_NUM(h2c_pkt, rtwdev->h2c.seq); 119 ret = rtw_hci_write_data_h2c(rtwdev, h2c_pkt, H2C_PKT_SIZE); 120 if (ret) 121 rtw_err(rtwdev, "failed to send h2c packet\n"); 122 rtwdev->h2c.seq++; 123 124 spin_unlock(&rtwdev->h2c.lock); 125 } 126 127 void 128 rtw_fw_send_general_info(struct rtw_dev *rtwdev) 129 { 130 struct rtw_fifo_conf *fifo = &rtwdev->fifo; 131 u8 h2c_pkt[H2C_PKT_SIZE] = {0}; 132 u16 total_size = H2C_PKT_HDR_SIZE + 4; 133 134 rtw_h2c_pkt_set_header(h2c_pkt, H2C_PKT_GENERAL_INFO); 135 136 SET_PKT_H2C_TOTAL_LEN(h2c_pkt, total_size); 137 138 GENERAL_INFO_SET_FW_TX_BOUNDARY(h2c_pkt, 139 fifo->rsvd_fw_txbuf_addr - 140 fifo->rsvd_boundary); 141 142 rtw_fw_send_h2c_packet(rtwdev, h2c_pkt); 143 } 144 145 void 146 rtw_fw_send_phydm_info(struct rtw_dev *rtwdev) 147 { 148 struct rtw_hal *hal = &rtwdev->hal; 149 struct rtw_efuse *efuse = &rtwdev->efuse; 150 u8 h2c_pkt[H2C_PKT_SIZE] = {0}; 151 u16 total_size = H2C_PKT_HDR_SIZE + 8; 152 u8 fw_rf_type = 0; 153 154 if (hal->rf_type == RF_1T1R) 155 fw_rf_type = FW_RF_1T1R; 156 else if (hal->rf_type == RF_2T2R) 157 fw_rf_type = FW_RF_2T2R; 158 159 rtw_h2c_pkt_set_header(h2c_pkt, H2C_PKT_PHYDM_INFO); 160 161 SET_PKT_H2C_TOTAL_LEN(h2c_pkt, total_size); 162 PHYDM_INFO_SET_REF_TYPE(h2c_pkt, efuse->rfe_option); 163 PHYDM_INFO_SET_RF_TYPE(h2c_pkt, fw_rf_type); 164 PHYDM_INFO_SET_CUT_VER(h2c_pkt, hal->cut_version); 165 PHYDM_INFO_SET_RX_ANT_STATUS(h2c_pkt, hal->antenna_tx); 166 PHYDM_INFO_SET_TX_ANT_STATUS(h2c_pkt, hal->antenna_rx); 167 168 rtw_fw_send_h2c_packet(rtwdev, h2c_pkt); 169 } 170 171 void rtw_fw_do_iqk(struct rtw_dev *rtwdev, struct rtw_iqk_para *para) 172 { 173 u8 h2c_pkt[H2C_PKT_SIZE] = {0}; 174 u16 total_size = H2C_PKT_HDR_SIZE + 1; 175 176 rtw_h2c_pkt_set_header(h2c_pkt, H2C_PKT_IQK); 177 SET_PKT_H2C_TOTAL_LEN(h2c_pkt, total_size); 178 IQK_SET_CLEAR(h2c_pkt, para->clear); 179 IQK_SET_SEGMENT_IQK(h2c_pkt, para->segment_iqk); 180 181 rtw_fw_send_h2c_packet(rtwdev, h2c_pkt); 182 } 183 184 void rtw_fw_send_rssi_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si) 185 { 186 u8 h2c_pkt[H2C_PKT_SIZE] = {0}; 187 u8 rssi = ewma_rssi_read(&si->avg_rssi); 188 bool stbc_en = si->stbc_en ? true : false; 189 190 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_RSSI_MONITOR); 191 192 SET_RSSI_INFO_MACID(h2c_pkt, si->mac_id); 193 SET_RSSI_INFO_RSSI(h2c_pkt, rssi); 194 SET_RSSI_INFO_STBC(h2c_pkt, stbc_en); 195 196 rtw_fw_send_h2c_command(rtwdev, h2c_pkt); 197 } 198 199 void rtw_fw_send_ra_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si) 200 { 201 u8 h2c_pkt[H2C_PKT_SIZE] = {0}; 202 bool no_update = si->updated; 203 bool disable_pt = true; 204 205 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_RA_INFO); 206 207 SET_RA_INFO_MACID(h2c_pkt, si->mac_id); 208 SET_RA_INFO_RATE_ID(h2c_pkt, si->rate_id); 209 SET_RA_INFO_INIT_RA_LVL(h2c_pkt, si->init_ra_lv); 210 SET_RA_INFO_SGI_EN(h2c_pkt, si->sgi_enable); 211 SET_RA_INFO_BW_MODE(h2c_pkt, si->bw_mode); 212 SET_RA_INFO_LDPC(h2c_pkt, si->ldpc_en); 213 SET_RA_INFO_NO_UPDATE(h2c_pkt, no_update); 214 SET_RA_INFO_VHT_EN(h2c_pkt, si->vht_enable); 215 SET_RA_INFO_DIS_PT(h2c_pkt, disable_pt); 216 SET_RA_INFO_RA_MASK0(h2c_pkt, (si->ra_mask & 0xff)); 217 SET_RA_INFO_RA_MASK1(h2c_pkt, (si->ra_mask & 0xff00) >> 8); 218 SET_RA_INFO_RA_MASK2(h2c_pkt, (si->ra_mask & 0xff0000) >> 16); 219 SET_RA_INFO_RA_MASK3(h2c_pkt, (si->ra_mask & 0xff000000) >> 24); 220 221 si->init_ra_lv = 0; 222 si->updated = true; 223 224 rtw_fw_send_h2c_command(rtwdev, h2c_pkt); 225 } 226 227 void rtw_fw_media_status_report(struct rtw_dev *rtwdev, u8 mac_id, bool connect) 228 { 229 u8 h2c_pkt[H2C_PKT_SIZE] = {0}; 230 231 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_MEDIA_STATUS_RPT); 232 MEDIA_STATUS_RPT_SET_OP_MODE(h2c_pkt, connect); 233 MEDIA_STATUS_RPT_SET_MACID(h2c_pkt, mac_id); 234 235 rtw_fw_send_h2c_command(rtwdev, h2c_pkt); 236 } 237 238 void rtw_fw_set_pwr_mode(struct rtw_dev *rtwdev) 239 { 240 struct rtw_lps_conf *conf = &rtwdev->lps_conf; 241 u8 h2c_pkt[H2C_PKT_SIZE] = {0}; 242 243 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_SET_PWR_MODE); 244 245 SET_PWR_MODE_SET_MODE(h2c_pkt, conf->mode); 246 SET_PWR_MODE_SET_RLBM(h2c_pkt, conf->rlbm); 247 SET_PWR_MODE_SET_SMART_PS(h2c_pkt, conf->smart_ps); 248 SET_PWR_MODE_SET_AWAKE_INTERVAL(h2c_pkt, conf->awake_interval); 249 SET_PWR_MODE_SET_PORT_ID(h2c_pkt, conf->port_id); 250 SET_PWR_MODE_SET_PWR_STATE(h2c_pkt, conf->state); 251 252 rtw_fw_send_h2c_command(rtwdev, h2c_pkt); 253 } 254 255 static u8 rtw_get_rsvd_page_location(struct rtw_dev *rtwdev, 256 enum rtw_rsvd_packet_type type) 257 { 258 struct rtw_rsvd_page *rsvd_pkt; 259 u8 location = 0; 260 261 list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, list) { 262 if (type == rsvd_pkt->type) 263 location = rsvd_pkt->page; 264 } 265 266 return location; 267 } 268 269 void rtw_send_rsvd_page_h2c(struct rtw_dev *rtwdev) 270 { 271 u8 h2c_pkt[H2C_PKT_SIZE] = {0}; 272 u8 location = 0; 273 274 SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_RSVD_PAGE); 275 276 location = rtw_get_rsvd_page_location(rtwdev, RSVD_PROBE_RESP); 277 *(h2c_pkt + 1) = location; 278 rtw_dbg(rtwdev, RTW_DBG_FW, "RSVD_PROBE_RESP loc: %d\n", location); 279 280 location = rtw_get_rsvd_page_location(rtwdev, RSVD_PS_POLL); 281 *(h2c_pkt + 2) = location; 282 rtw_dbg(rtwdev, RTW_DBG_FW, "RSVD_PS_POLL loc: %d\n", location); 283 284 location = rtw_get_rsvd_page_location(rtwdev, RSVD_NULL); 285 *(h2c_pkt + 3) = location; 286 rtw_dbg(rtwdev, RTW_DBG_FW, "RSVD_NULL loc: %d\n", location); 287 288 location = rtw_get_rsvd_page_location(rtwdev, RSVD_QOS_NULL); 289 *(h2c_pkt + 4) = location; 290 rtw_dbg(rtwdev, RTW_DBG_FW, "RSVD_QOS_NULL loc: %d\n", location); 291 292 rtw_fw_send_h2c_command(rtwdev, h2c_pkt); 293 } 294 295 static struct sk_buff * 296 rtw_beacon_get(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 297 { 298 struct sk_buff *skb_new; 299 300 if (vif->type != NL80211_IFTYPE_AP && 301 vif->type != NL80211_IFTYPE_ADHOC && 302 !ieee80211_vif_is_mesh(vif)) { 303 skb_new = alloc_skb(1, GFP_KERNEL); 304 if (!skb_new) 305 return NULL; 306 skb_put(skb_new, 1); 307 } else { 308 skb_new = ieee80211_beacon_get(hw, vif); 309 } 310 311 return skb_new; 312 } 313 314 static struct sk_buff *rtw_get_rsvd_page_skb(struct ieee80211_hw *hw, 315 struct ieee80211_vif *vif, 316 enum rtw_rsvd_packet_type type) 317 { 318 struct sk_buff *skb_new; 319 320 switch (type) { 321 case RSVD_BEACON: 322 skb_new = rtw_beacon_get(hw, vif); 323 break; 324 case RSVD_PS_POLL: 325 skb_new = ieee80211_pspoll_get(hw, vif); 326 break; 327 case RSVD_PROBE_RESP: 328 skb_new = ieee80211_proberesp_get(hw, vif); 329 break; 330 case RSVD_NULL: 331 skb_new = ieee80211_nullfunc_get(hw, vif, false); 332 break; 333 case RSVD_QOS_NULL: 334 skb_new = ieee80211_nullfunc_get(hw, vif, true); 335 break; 336 default: 337 return NULL; 338 } 339 340 if (!skb_new) 341 return NULL; 342 343 return skb_new; 344 } 345 346 static void rtw_fill_rsvd_page_desc(struct rtw_dev *rtwdev, struct sk_buff *skb) 347 { 348 struct rtw_tx_pkt_info pkt_info; 349 struct rtw_chip_info *chip = rtwdev->chip; 350 u8 *pkt_desc; 351 352 memset(&pkt_info, 0, sizeof(pkt_info)); 353 rtw_rsvd_page_pkt_info_update(rtwdev, &pkt_info, skb); 354 pkt_desc = skb_push(skb, chip->tx_pkt_desc_sz); 355 memset(pkt_desc, 0, chip->tx_pkt_desc_sz); 356 rtw_tx_fill_tx_desc(&pkt_info, skb); 357 } 358 359 static inline u8 rtw_len_to_page(unsigned int len, u8 page_size) 360 { 361 return DIV_ROUND_UP(len, page_size); 362 } 363 364 static void rtw_rsvd_page_list_to_buf(struct rtw_dev *rtwdev, u8 page_size, 365 u8 page_margin, u32 page, u8 *buf, 366 struct rtw_rsvd_page *rsvd_pkt) 367 { 368 struct sk_buff *skb = rsvd_pkt->skb; 369 370 if (rsvd_pkt->add_txdesc) 371 rtw_fill_rsvd_page_desc(rtwdev, skb); 372 373 if (page >= 1) 374 memcpy(buf + page_margin + page_size * (page - 1), 375 skb->data, skb->len); 376 else 377 memcpy(buf, skb->data, skb->len); 378 } 379 380 void rtw_add_rsvd_page(struct rtw_dev *rtwdev, enum rtw_rsvd_packet_type type, 381 bool txdesc) 382 { 383 struct rtw_rsvd_page *rsvd_pkt; 384 385 lockdep_assert_held(&rtwdev->mutex); 386 387 list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, list) { 388 if (rsvd_pkt->type == type) 389 return; 390 } 391 392 rsvd_pkt = kmalloc(sizeof(*rsvd_pkt), GFP_KERNEL); 393 if (!rsvd_pkt) 394 return; 395 396 rsvd_pkt->type = type; 397 rsvd_pkt->add_txdesc = txdesc; 398 list_add_tail(&rsvd_pkt->list, &rtwdev->rsvd_page_list); 399 } 400 401 void rtw_reset_rsvd_page(struct rtw_dev *rtwdev) 402 { 403 struct rtw_rsvd_page *rsvd_pkt, *tmp; 404 405 lockdep_assert_held(&rtwdev->mutex); 406 407 list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list, list) { 408 if (rsvd_pkt->type == RSVD_BEACON) 409 continue; 410 list_del(&rsvd_pkt->list); 411 kfree(rsvd_pkt); 412 } 413 } 414 415 int rtw_fw_write_data_rsvd_page(struct rtw_dev *rtwdev, u16 pg_addr, 416 u8 *buf, u32 size) 417 { 418 u8 bckp[2]; 419 u8 val; 420 u16 rsvd_pg_head; 421 int ret; 422 423 lockdep_assert_held(&rtwdev->mutex); 424 425 if (!size) 426 return -EINVAL; 427 428 pg_addr &= BIT_MASK_BCN_HEAD_1_V1; 429 rtw_write16(rtwdev, REG_FIFOPAGE_CTRL_2, pg_addr | BIT_BCN_VALID_V1); 430 431 val = rtw_read8(rtwdev, REG_CR + 1); 432 bckp[0] = val; 433 val |= BIT_ENSWBCN >> 8; 434 rtw_write8(rtwdev, REG_CR + 1, val); 435 436 val = rtw_read8(rtwdev, REG_FWHW_TXQ_CTRL + 2); 437 bckp[1] = val; 438 val &= ~(BIT_EN_BCNQ_DL >> 16); 439 rtw_write8(rtwdev, REG_FWHW_TXQ_CTRL + 2, val); 440 441 ret = rtw_hci_write_data_rsvd_page(rtwdev, buf, size); 442 if (ret) { 443 rtw_err(rtwdev, "failed to write data to rsvd page\n"); 444 goto restore; 445 } 446 447 if (!check_hw_ready(rtwdev, REG_FIFOPAGE_CTRL_2, BIT_BCN_VALID_V1, 1)) { 448 rtw_err(rtwdev, "error beacon valid\n"); 449 ret = -EBUSY; 450 } 451 452 restore: 453 rsvd_pg_head = rtwdev->fifo.rsvd_boundary; 454 rtw_write16(rtwdev, REG_FIFOPAGE_CTRL_2, 455 rsvd_pg_head | BIT_BCN_VALID_V1); 456 rtw_write8(rtwdev, REG_FWHW_TXQ_CTRL + 2, bckp[1]); 457 rtw_write8(rtwdev, REG_CR + 1, bckp[0]); 458 459 return ret; 460 } 461 462 static int rtw_download_drv_rsvd_page(struct rtw_dev *rtwdev, u8 *buf, u32 size) 463 { 464 u32 pg_size; 465 u32 pg_num = 0; 466 u16 pg_addr = 0; 467 468 pg_size = rtwdev->chip->page_size; 469 pg_num = size / pg_size + ((size & (pg_size - 1)) ? 1 : 0); 470 if (pg_num > rtwdev->fifo.rsvd_drv_pg_num) 471 return -ENOMEM; 472 473 pg_addr = rtwdev->fifo.rsvd_drv_addr; 474 475 return rtw_fw_write_data_rsvd_page(rtwdev, pg_addr, buf, size); 476 } 477 478 static u8 *rtw_build_rsvd_page(struct rtw_dev *rtwdev, 479 struct ieee80211_vif *vif, u32 *size) 480 { 481 struct ieee80211_hw *hw = rtwdev->hw; 482 struct rtw_chip_info *chip = rtwdev->chip; 483 struct sk_buff *iter; 484 struct rtw_rsvd_page *rsvd_pkt; 485 u32 page = 0; 486 u8 total_page = 0; 487 u8 page_size, page_margin, tx_desc_sz; 488 u8 *buf; 489 490 page_size = chip->page_size; 491 tx_desc_sz = chip->tx_pkt_desc_sz; 492 page_margin = page_size - tx_desc_sz; 493 494 list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, list) { 495 iter = rtw_get_rsvd_page_skb(hw, vif, rsvd_pkt->type); 496 if (!iter) { 497 rtw_err(rtwdev, "fail to build rsvd packet\n"); 498 goto release_skb; 499 } 500 rsvd_pkt->skb = iter; 501 rsvd_pkt->page = total_page; 502 if (rsvd_pkt->add_txdesc) 503 total_page += rtw_len_to_page(iter->len + tx_desc_sz, 504 page_size); 505 else 506 total_page += rtw_len_to_page(iter->len, page_size); 507 } 508 509 if (total_page > rtwdev->fifo.rsvd_drv_pg_num) { 510 rtw_err(rtwdev, "rsvd page over size: %d\n", total_page); 511 goto release_skb; 512 } 513 514 *size = (total_page - 1) * page_size + page_margin; 515 buf = kzalloc(*size, GFP_KERNEL); 516 if (!buf) 517 goto release_skb; 518 519 list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, list) { 520 rtw_rsvd_page_list_to_buf(rtwdev, page_size, page_margin, 521 page, buf, rsvd_pkt); 522 page += rtw_len_to_page(rsvd_pkt->skb->len, page_size); 523 } 524 list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, list) 525 kfree_skb(rsvd_pkt->skb); 526 527 return buf; 528 529 release_skb: 530 list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, list) 531 kfree_skb(rsvd_pkt->skb); 532 533 return NULL; 534 } 535 536 static int 537 rtw_download_beacon(struct rtw_dev *rtwdev, struct ieee80211_vif *vif) 538 { 539 struct ieee80211_hw *hw = rtwdev->hw; 540 struct sk_buff *skb; 541 int ret = 0; 542 543 skb = rtw_beacon_get(hw, vif); 544 if (!skb) { 545 rtw_err(rtwdev, "failed to get beacon skb\n"); 546 ret = -ENOMEM; 547 goto out; 548 } 549 550 ret = rtw_download_drv_rsvd_page(rtwdev, skb->data, skb->len); 551 if (ret) 552 rtw_err(rtwdev, "failed to download drv rsvd page\n"); 553 554 dev_kfree_skb(skb); 555 556 out: 557 return ret; 558 } 559 560 int rtw_fw_download_rsvd_page(struct rtw_dev *rtwdev, struct ieee80211_vif *vif) 561 { 562 u8 *buf; 563 u32 size; 564 int ret; 565 566 buf = rtw_build_rsvd_page(rtwdev, vif, &size); 567 if (!buf) { 568 rtw_err(rtwdev, "failed to build rsvd page pkt\n"); 569 return -ENOMEM; 570 } 571 572 ret = rtw_download_drv_rsvd_page(rtwdev, buf, size); 573 if (ret) { 574 rtw_err(rtwdev, "failed to download drv rsvd page\n"); 575 goto free; 576 } 577 578 ret = rtw_download_beacon(rtwdev, vif); 579 if (ret) { 580 rtw_err(rtwdev, "failed to download beacon\n"); 581 goto free; 582 } 583 584 free: 585 kfree(buf); 586 587 return ret; 588 } 589 590 int rtw_dump_drv_rsvd_page(struct rtw_dev *rtwdev, 591 u32 offset, u32 size, u32 *buf) 592 { 593 struct rtw_fifo_conf *fifo = &rtwdev->fifo; 594 u32 residue, i; 595 u16 start_pg; 596 u16 idx = 0; 597 u16 ctl; 598 u8 rcr; 599 600 if (size & 0x3) { 601 rtw_warn(rtwdev, "should be 4-byte aligned\n"); 602 return -EINVAL; 603 } 604 605 offset += fifo->rsvd_boundary << TX_PAGE_SIZE_SHIFT; 606 residue = offset & (FIFO_PAGE_SIZE - 1); 607 start_pg = offset >> FIFO_PAGE_SIZE_SHIFT; 608 start_pg += RSVD_PAGE_START_ADDR; 609 610 rcr = rtw_read8(rtwdev, REG_RCR + 2); 611 ctl = rtw_read16(rtwdev, REG_PKTBUF_DBG_CTRL) & 0xf000; 612 613 /* disable rx clock gate */ 614 rtw_write8(rtwdev, REG_RCR, rcr | BIT(3)); 615 616 do { 617 rtw_write16(rtwdev, REG_PKTBUF_DBG_CTRL, start_pg | ctl); 618 619 for (i = FIFO_DUMP_ADDR + residue; 620 i < FIFO_DUMP_ADDR + FIFO_PAGE_SIZE; i += 4) { 621 buf[idx++] = rtw_read32(rtwdev, i); 622 size -= 4; 623 if (size == 0) 624 goto out; 625 } 626 627 residue = 0; 628 start_pg++; 629 } while (size); 630 631 out: 632 rtw_write16(rtwdev, REG_PKTBUF_DBG_CTRL, ctl); 633 rtw_write8(rtwdev, REG_RCR + 2, rcr); 634 return 0; 635 } 636