1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /* Copyright(c) 2018-2019  Realtek Corporation.
3  */
4 
5 #ifndef __RTW_BF_H_
6 #define __RTW_BF_H_
7 
8 #define REG_TXBF_CTRL		0x042C
9 #define REG_RRSR		0x0440
10 #define REG_NDPA_OPT_CTRL	0x045F
11 
12 #define REG_ASSOCIATED_BFMER0_INFO	0x06E4
13 #define REG_ASSOCIATED_BFMER1_INFO	0x06EC
14 #define REG_TX_CSI_RPT_PARAM_BW20	0x06F4
15 #define REG_SND_PTCL_CTRL		0x0718
16 #define BIT_DIS_CHK_VHTSIGB_CRC		BIT(6)
17 #define BIT_DIS_CHK_VHTSIGA_CRC		BIT(5)
18 #define BIT_MASK_BEAMFORM		(GENMASK(4, 0) | BIT(7))
19 #define REG_MU_TX_CTL			0x14C0
20 #define REG_MU_STA_GID_VLD		0x14C4
21 #define REG_MU_STA_USER_POS_INFO	0x14C8
22 #define REG_CSI_RRSR			0x1678
23 #define REG_WMAC_MU_BF_OPTION		0x167C
24 #define REG_WMAC_MU_BF_CTL		0x1680
25 
26 #define BIT_WMAC_USE_NDPARATE			BIT(30)
27 #define BIT_WMAC_TXMU_ACKPOLICY_EN		BIT(6)
28 #define BIT_USE_NDPA_PARAMETER			BIT(30)
29 #define BIT_MU_P1_WAIT_STATE_EN			BIT(16)
30 #define BIT_EN_MU_MIMO				BIT(7)
31 
32 #define R_MU_RL				0xf
33 #define BIT_SHIFT_R_MU_RL		12
34 #define BIT_SHIFT_WMAC_TXMU_ACKPOLICY	4
35 #define BIT_SHIFT_CSI_RATE		24
36 
37 #define BIT_MASK_R_MU_RL (R_MU_RL << BIT_SHIFT_R_MU_RL)
38 #define BIT_MASK_R_MU_TABLE_VALID	0x3f
39 #define BIT_MASK_CSI_RATE_VAL		0x3F
40 #define BIT_MASK_CSI_RATE (BIT_MASK_CSI_RATE_VAL << BIT_SHIFT_CSI_RATE)
41 
42 #define BIT_RXFLTMAP0_ACTIONNOACK	BIT(14)
43 #define BIT_RXFLTMAP1_BF		(BIT(4) | BIT(5))
44 #define BIT_RXFLTMAP1_BF_REPORT_POLL	BIT(4)
45 #define BIT_RXFLTMAP4_BF_REPORT_POLL	BIT(4)
46 
47 #define RTW_NDP_RX_STANDBY_TIME	0x70
48 #define RTW_SND_CTRL_REMOVE	0x98
49 #define RTW_SND_CTRL_SOUNDING	0x9B
50 
51 enum csi_seg_len {
52 	HAL_CSI_SEG_4K = 0,
53 	HAL_CSI_SEG_8K = 1,
54 	HAL_CSI_SEG_11K = 2,
55 };
56 
57 struct cfg_mumimo_para {
58 	u8 sounding_sts[6];
59 	u16 grouping_bitmap;
60 	u8 mu_tx_en;
61 	u32 given_gid_tab[2];
62 	u32 given_user_pos[4];
63 };
64 
65 struct mu_bfer_init_para {
66 	u16 paid;
67 	u16 csi_para;
68 	u16 my_aid;
69 	enum csi_seg_len csi_length_sel;
70 	u8 bfer_address[ETH_ALEN];
71 };
72 
73 void rtw_bf_disassoc(struct rtw_dev *rtwdev, struct ieee80211_vif *vif,
74 		     struct ieee80211_bss_conf *bss_conf);
75 void rtw_bf_assoc(struct rtw_dev *rtwdev, struct ieee80211_vif *vif,
76 		  struct ieee80211_bss_conf *bss_conf);
77 void rtw_bf_init_bfer_entry_mu(struct rtw_dev *rtwdev,
78 			       struct mu_bfer_init_para *param);
79 void rtw_bf_cfg_sounding(struct rtw_dev *rtwdev, struct rtw_vif *vif,
80 			 enum rtw_trx_desc_rate rate);
81 void rtw_bf_cfg_mu_bfee(struct rtw_dev *rtwdev, struct cfg_mumimo_para *param);
82 void rtw_bf_del_bfer_entry_mu(struct rtw_dev *rtwdev);
83 void rtw_bf_del_sounding(struct rtw_dev *rtwdev);
84 void rtw_bf_enable_bfee_su(struct rtw_dev *rtwdev, struct rtw_vif *vif,
85 			   struct rtw_bfee *bfee);
86 void rtw_bf_enable_bfee_mu(struct rtw_dev *rtwdev, struct rtw_vif *vif,
87 			   struct rtw_bfee *bfee);
88 void rtw_bf_remove_bfee_su(struct rtw_dev *rtwdev, struct rtw_bfee *bfee);
89 void rtw_bf_remove_bfee_mu(struct rtw_dev *rtwdev, struct rtw_bfee *bfee);
90 void rtw_bf_set_gid_table(struct rtw_dev *rtwdev, struct ieee80211_vif *vif,
91 			  struct ieee80211_bss_conf *conf);
92 void rtw_bf_phy_init(struct rtw_dev *rtwdev);
93 void rtw_bf_cfg_csi_rate(struct rtw_dev *rtwdev, u8 rssi, u8 cur_rate,
94 			 u8 fixrate_en, u8 *new_rate);
95 static inline void rtw_chip_config_bfee(struct rtw_dev *rtwdev, struct rtw_vif *vif,
96 					struct rtw_bfee *bfee, bool enable)
97 {
98 	if (rtwdev->chip->ops->config_bfee)
99 		rtwdev->chip->ops->config_bfee(rtwdev, vif, bfee, enable);
100 }
101 
102 static inline void rtw_chip_set_gid_table(struct rtw_dev *rtwdev,
103 					  struct ieee80211_vif *vif,
104 					  struct ieee80211_bss_conf *conf)
105 {
106 	if (rtwdev->chip->ops->set_gid_table)
107 		rtwdev->chip->ops->set_gid_table(rtwdev, vif, conf);
108 }
109 
110 static inline void rtw_chip_cfg_csi_rate(struct rtw_dev *rtwdev, u8 rssi, u8 cur_rate,
111 					 u8 fixrate_en, u8 *new_rate)
112 {
113 	if (rtwdev->chip->ops->cfg_csi_rate)
114 		rtwdev->chip->ops->cfg_csi_rate(rtwdev, rssi, cur_rate,
115 						fixrate_en, new_rate);
116 }
117 #endif
118