1 /****************************************************************************** 2 * 3 * Copyright(c) 2009-2010 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * The full GNU General Public License is included in this distribution in the 15 * file called LICENSE. 16 * 17 * Contact Information: 18 * wlanfae <wlanfae@realtek.com> 19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, 20 * Hsinchu 300, Taiwan. 21 * 22 * Larry Finger <Larry.Finger@lwfinger.net> 23 * 24 *****************************************************************************/ 25 26 #ifndef __RTL8821AE_TRX_H__ 27 #define __RTL8821AE_TRX_H__ 28 29 #define TX_DESC_SIZE 40 30 #define TX_DESC_AGGR_SUBFRAME_SIZE 32 31 32 #define RX_DESC_SIZE 32 33 #define RX_DRV_INFO_SIZE_UNIT 8 34 35 #define TX_DESC_NEXT_DESC_OFFSET 40 36 #define USB_HWDESC_HEADER_LEN 40 37 #define CRCLENGTH 4 38 39 #define SET_TX_DESC_PKT_SIZE(__pdesc, __val) \ 40 SET_BITS_TO_LE_4BYTE(__pdesc, 0, 16, __val) 41 #define SET_TX_DESC_OFFSET(__pdesc, __val) \ 42 SET_BITS_TO_LE_4BYTE(__pdesc, 16, 8, __val) 43 #define SET_TX_DESC_BMC(__pdesc, __val) \ 44 SET_BITS_TO_LE_4BYTE(__pdesc, 24, 1, __val) 45 #define SET_TX_DESC_HTC(__pdesc, __val) \ 46 SET_BITS_TO_LE_4BYTE(__pdesc, 25, 1, __val) 47 #define SET_TX_DESC_LAST_SEG(__pdesc, __val) \ 48 SET_BITS_TO_LE_4BYTE(__pdesc, 26, 1, __val) 49 #define SET_TX_DESC_FIRST_SEG(__pdesc, __val) \ 50 SET_BITS_TO_LE_4BYTE(__pdesc, 27, 1, __val) 51 #define SET_TX_DESC_LINIP(__pdesc, __val) \ 52 SET_BITS_TO_LE_4BYTE(__pdesc, 28, 1, __val) 53 #define SET_TX_DESC_NO_ACM(__pdesc, __val) \ 54 SET_BITS_TO_LE_4BYTE(__pdesc, 29, 1, __val) 55 #define SET_TX_DESC_GF(__pdesc, __val) \ 56 SET_BITS_TO_LE_4BYTE(__pdesc, 30, 1, __val) 57 #define SET_TX_DESC_OWN(__pdesc, __val) \ 58 SET_BITS_TO_LE_4BYTE(__pdesc, 31, 1, __val) 59 60 #define GET_TX_DESC_PKT_SIZE(__pdesc) \ 61 LE_BITS_TO_4BYTE(__pdesc, 0, 16) 62 #define GET_TX_DESC_OFFSET(__pdesc) \ 63 LE_BITS_TO_4BYTE(__pdesc, 16, 8) 64 #define GET_TX_DESC_BMC(__pdesc) \ 65 LE_BITS_TO_4BYTE(__pdesc, 24, 1) 66 #define GET_TX_DESC_HTC(__pdesc) \ 67 LE_BITS_TO_4BYTE(__pdesc, 25, 1) 68 #define GET_TX_DESC_LAST_SEG(__pdesc) \ 69 LE_BITS_TO_4BYTE(__pdesc, 26, 1) 70 #define GET_TX_DESC_FIRST_SEG(__pdesc) \ 71 LE_BITS_TO_4BYTE(__pdesc, 27, 1) 72 #define GET_TX_DESC_LINIP(__pdesc) \ 73 LE_BITS_TO_4BYTE(__pdesc, 28, 1) 74 #define GET_TX_DESC_NO_ACM(__pdesc) \ 75 LE_BITS_TO_4BYTE(__pdesc, 29, 1) 76 #define GET_TX_DESC_GF(__pdesc) \ 77 LE_BITS_TO_4BYTE(__pdesc, 30, 1) 78 #define GET_TX_DESC_OWN(__pdesc) \ 79 LE_BITS_TO_4BYTE(__pdesc, 31, 1) 80 81 #define SET_TX_DESC_MACID(__pdesc, __val) \ 82 SET_BITS_TO_LE_4BYTE(__pdesc+4, 0, 7, __val) 83 #define SET_TX_DESC_QUEUE_SEL(__pdesc, __val) \ 84 SET_BITS_TO_LE_4BYTE(__pdesc+4, 8, 5, __val) 85 #define SET_TX_DESC_RDG_NAV_EXT(__pdesc, __val) \ 86 SET_BITS_TO_LE_4BYTE(__pdesc+4, 13, 1, __val) 87 #define SET_TX_DESC_LSIG_TXOP_EN(__pdesc, __val) \ 88 SET_BITS_TO_LE_4BYTE(__pdesc+4, 14, 1, __val) 89 #define SET_TX_DESC_PIFS(__pdesc, __val) \ 90 SET_BITS_TO_LE_4BYTE(__pdesc+4, 15, 1, __val) 91 #define SET_TX_DESC_RATE_ID(__pdesc, __val) \ 92 SET_BITS_TO_LE_4BYTE(__pdesc+4, 16, 5, __val) 93 #define SET_TX_DESC_EN_DESC_ID(__pdesc, __val) \ 94 SET_BITS_TO_LE_4BYTE(__pdesc+4, 21, 1, __val) 95 #define SET_TX_DESC_SEC_TYPE(__pdesc, __val) \ 96 SET_BITS_TO_LE_4BYTE(__pdesc+4, 22, 2, __val) 97 #define SET_TX_DESC_PKT_OFFSET(__pdesc, __val) \ 98 SET_BITS_TO_LE_4BYTE(__pdesc+4, 24, 5, __val) 99 100 #define SET_TX_DESC_PAID(__pdesc, __val) \ 101 SET_BITS_TO_LE_4BYTE(__pdesc+8, 0, 9, __val) 102 #define SET_TX_DESC_CCA_RTS(__pdesc, __val) \ 103 SET_BITS_TO_LE_4BYTE(__pdesc+8, 10, 2, __val) 104 #define SET_TX_DESC_AGG_ENABLE(__pdesc, __val) \ 105 SET_BITS_TO_LE_4BYTE(__pdesc+8, 12, 1, __val) 106 #define SET_TX_DESC_RDG_ENABLE(__pdesc, __val) \ 107 SET_BITS_TO_LE_4BYTE(__pdesc+8, 13, 1, __val) 108 #define SET_TX_DESC_BAR_RTY_TH(__pdesc, __val) \ 109 SET_BITS_TO_LE_4BYTE(__pdesc+8, 14, 2, __val) 110 #define SET_TX_DESC_AGG_BREAK(__pdesc, __val) \ 111 SET_BITS_TO_LE_4BYTE(__pdesc+8, 16, 1, __val) 112 #define SET_TX_DESC_MORE_FRAG(__pdesc, __val) \ 113 SET_BITS_TO_LE_4BYTE(__pdesc+8, 17, 1, __val) 114 #define SET_TX_DESC_RAW(__pdesc, __val) \ 115 SET_BITS_TO_LE_4BYTE(__pdesc+8, 18, 1, __val) 116 #define SET_TX_DESC_SPE_RPT(__pdesc, __val) \ 117 SET_BITS_TO_LE_4BYTE(__pdesc+8, 19, 1, __val) 118 #define SET_TX_DESC_AMPDU_DENSITY(__pdesc, __val) \ 119 SET_BITS_TO_LE_4BYTE(__pdesc+8, 20, 3, __val) 120 #define SET_TX_DESC_BT_INT(__pdesc, __val) \ 121 SET_BITS_TO_LE_4BYTE(__pdesc+8, 23, 1, __val) 122 #define SET_TX_DESC_GID(__pdesc, __val) \ 123 SET_BITS_TO_LE_4BYTE(__pdesc+8, 24, 6, __val) 124 125 #define SET_TX_DESC_WHEADER_LEN(__pdesc, __val) \ 126 SET_BITS_TO_LE_4BYTE(__pdesc+12, 0, 4, __val) 127 #define SET_TX_DESC_CHK_EN(__pdesc, __val) \ 128 SET_BITS_TO_LE_4BYTE(__pdesc+12, 4, 1, __val) 129 #define SET_TX_DESC_EARLY_MODE(__pdesc, __val) \ 130 SET_BITS_TO_LE_4BYTE(__pdesc+12, 5, 1, __val) 131 #define SET_TX_DESC_HWSEQ_SEL(__pdesc, __val) \ 132 SET_BITS_TO_LE_4BYTE(__pdesc+12, 6, 2, __val) 133 #define SET_TX_DESC_USE_RATE(__pdesc, __val) \ 134 SET_BITS_TO_LE_4BYTE(__pdesc+12, 8, 1, __val) 135 #define SET_TX_DESC_DISABLE_RTS_FB(__pdesc, __val) \ 136 SET_BITS_TO_LE_4BYTE(__pdesc+12, 9, 1, __val) 137 #define SET_TX_DESC_DISABLE_FB(__pdesc, __val) \ 138 SET_BITS_TO_LE_4BYTE(__pdesc+12, 10, 1, __val) 139 #define SET_TX_DESC_CTS2SELF(__pdesc, __val) \ 140 SET_BITS_TO_LE_4BYTE(__pdesc+12, 11, 1, __val) 141 #define SET_TX_DESC_RTS_ENABLE(__pdesc, __val) \ 142 SET_BITS_TO_LE_4BYTE(__pdesc+12, 12, 1, __val) 143 #define SET_TX_DESC_HW_RTS_ENABLE(__pdesc, __val) \ 144 SET_BITS_TO_LE_4BYTE(__pdesc+12, 13, 1, __val) 145 #define SET_TX_DESC_NAV_USE_HDR(__pdesc, __val) \ 146 SET_BITS_TO_LE_4BYTE(__pdesc+12, 15, 1, __val) 147 #define SET_TX_DESC_USE_MAX_LEN(__pdesc, __val) \ 148 SET_BITS_TO_LE_4BYTE(__pdesc+12, 16, 1, __val) 149 #define SET_TX_DESC_MAX_AGG_NUM(__pdesc, __val) \ 150 SET_BITS_TO_LE_4BYTE(__pdesc+12, 17, 5, __val) 151 #define SET_TX_DESC_NDPA(__pdesc, __val) \ 152 SET_BITS_TO_LE_4BYTE(__pdesc+12, 22, 2, __val) 153 #define SET_TX_DESC_AMPDU_MAX_TIME(__pdesc, __val) \ 154 SET_BITS_TO_LE_4BYTE(__pdesc+12, 24, 8, __val) 155 #define SET_TX_DESC_TX_ANT(__pdesc, __val) \ 156 SET_BITS_TO_LE_4BYTE(__pdesc+20, 24, 4, __val) 157 158 #define SET_TX_DESC_TX_RATE(__pdesc, __val) \ 159 SET_BITS_TO_LE_4BYTE(__pdesc+16, 0, 7, __val) 160 #define SET_TX_DESC_DATA_RATE_FB_LIMIT(__pdesc, __val) \ 161 SET_BITS_TO_LE_4BYTE(__pdesc+16, 8, 5, __val) 162 #define SET_TX_DESC_RTS_RATE_FB_LIMIT(__pdesc, __val) \ 163 SET_BITS_TO_LE_4BYTE(__pdesc+16, 13, 4, __val) 164 #define SET_TX_DESC_RETRY_LIMIT_ENABLE(__pdesc, __val) \ 165 SET_BITS_TO_LE_4BYTE(__pdesc+16, 17, 1, __val) 166 #define SET_TX_DESC_DATA_RETRY_LIMIT(__pdesc, __val) \ 167 SET_BITS_TO_LE_4BYTE(__pdesc+16, 18, 6, __val) 168 #define SET_TX_DESC_RTS_RATE(__pdesc, __val) \ 169 SET_BITS_TO_LE_4BYTE(__pdesc+16, 24, 5, __val) 170 171 #define SET_TX_DESC_TX_SUB_CARRIER(__pdesc, __val) \ 172 SET_BITS_TO_LE_4BYTE(__pdesc+20, 0, 4, __val) 173 #define SET_TX_DESC_DATA_SHORTGI(__pdesc, __val) \ 174 SET_BITS_TO_LE_1BYTE(__pdesc+20, 4, 1, __val) 175 #define SET_TX_DESC_DATA_BW(__pdesc, __val) \ 176 SET_BITS_TO_LE_4BYTE(__pdesc+20, 5, 2, __val) 177 #define SET_TX_DESC_DATA_LDPC(__pdesc, __val) \ 178 SET_BITS_TO_LE_4BYTE(__pdesc+20, 7, 1, __val) 179 #define SET_TX_DESC_DATA_STBC(__pdesc, __val) \ 180 SET_BITS_TO_LE_4BYTE(__pdesc+20, 8, 2, __val) 181 #define SET_TX_DESC_CTROL_STBC(__pdesc, __val) \ 182 SET_BITS_TO_LE_4BYTE(__pdesc+20, 10, 2, __val) 183 #define SET_TX_DESC_RTS_SHORT(__pdesc, __val) \ 184 SET_BITS_TO_LE_4BYTE(__pdesc+20, 12, 1, __val) 185 #define SET_TX_DESC_RTS_SC(__pdesc, __val) \ 186 SET_BITS_TO_LE_4BYTE(__pdesc+20, 13, 4, __val) 187 188 #define SET_TX_DESC_TX_BUFFER_SIZE(__pdesc, __val) \ 189 SET_BITS_TO_LE_4BYTE(__pdesc+28, 0, 16, __val) 190 191 #define GET_TX_DESC_TX_BUFFER_SIZE(__pdesc) \ 192 LE_BITS_TO_4BYTE(__pdesc+28, 0, 16) 193 194 #define SET_TX_DESC_HWSEQ_EN(__pdesc, __val) \ 195 SET_BITS_TO_LE_4BYTE(__pdesc+32, 15, 1, __val) 196 197 #define SET_TX_DESC_SEQ(__pdesc, __val) \ 198 SET_BITS_TO_LE_4BYTE(__pdesc+36, 12, 12, __val) 199 200 #define SET_TX_DESC_TX_BUFFER_ADDRESS(__pdesc, __val) \ 201 SET_BITS_TO_LE_4BYTE(__pdesc+40, 0, 32, __val) 202 203 #define GET_TX_DESC_TX_BUFFER_ADDRESS(__pdesc) \ 204 LE_BITS_TO_4BYTE(__pdesc+40, 0, 32) 205 206 #define SET_TX_DESC_NEXT_DESC_ADDRESS(__pdesc, __val) \ 207 SET_BITS_TO_LE_4BYTE(__pdesc+48, 0, 32, __val) 208 209 #define GET_TX_DESC_NEXT_DESC_ADDRESS(__pdesc) \ 210 LE_BITS_TO_4BYTE(__pdesc+48, 0, 32) 211 212 #define GET_RX_DESC_PKT_LEN(__pdesc) \ 213 LE_BITS_TO_4BYTE(__pdesc, 0, 14) 214 #define GET_RX_DESC_CRC32(__pdesc) \ 215 LE_BITS_TO_4BYTE(__pdesc, 14, 1) 216 #define GET_RX_DESC_ICV(__pdesc) \ 217 LE_BITS_TO_4BYTE(__pdesc, 15, 1) 218 #define GET_RX_DESC_DRV_INFO_SIZE(__pdesc) \ 219 LE_BITS_TO_4BYTE(__pdesc, 16, 4) 220 #define GET_RX_DESC_SECURITY(__pdesc) \ 221 LE_BITS_TO_4BYTE(__pdesc, 20, 3) 222 #define GET_RX_DESC_QOS(__pdesc) \ 223 LE_BITS_TO_4BYTE(__pdesc, 23, 1) 224 #define GET_RX_DESC_SHIFT(__pdesc) \ 225 LE_BITS_TO_4BYTE(__pdesc, 24, 2) 226 #define GET_RX_DESC_PHYST(__pdesc) \ 227 LE_BITS_TO_4BYTE(__pdesc, 26, 1) 228 #define GET_RX_DESC_SWDEC(__pdesc) \ 229 LE_BITS_TO_4BYTE(__pdesc, 27, 1) 230 #define GET_RX_DESC_LS(__pdesc) \ 231 LE_BITS_TO_4BYTE(__pdesc, 28, 1) 232 #define GET_RX_DESC_FS(__pdesc) \ 233 LE_BITS_TO_4BYTE(__pdesc, 29, 1) 234 #define GET_RX_DESC_EOR(__pdesc) \ 235 LE_BITS_TO_4BYTE(__pdesc, 30, 1) 236 #define GET_RX_DESC_OWN(__pdesc) \ 237 LE_BITS_TO_4BYTE(__pdesc, 31, 1) 238 239 #define SET_RX_DESC_PKT_LEN(__pdesc, __val) \ 240 SET_BITS_TO_LE_4BYTE(__pdesc, 0, 14, __val) 241 #define SET_RX_DESC_EOR(__pdesc, __val) \ 242 SET_BITS_TO_LE_4BYTE(__pdesc, 30, 1, __val) 243 #define SET_RX_DESC_OWN(__pdesc, __val) \ 244 SET_BITS_TO_LE_4BYTE(__pdesc, 31, 1, __val) 245 246 #define GET_RX_DESC_MACID(__pdesc) \ 247 LE_BITS_TO_4BYTE(__pdesc+4, 0, 7) 248 #define GET_RX_DESC_TID(__pdesc) \ 249 LE_BITS_TO_4BYTE(__pdesc+4, 8, 4) 250 #define GET_RX_DESC_AMSDU(__pdesc) \ 251 LE_BITS_TO_4BYTE(__pdesc+4, 13, 1) 252 #define GET_RX_STATUS_DESC_RXID_MATCH(__pdesc) \ 253 LE_BITS_TO_4BYTE(__pdesc+4, 14, 1) 254 #define GET_RX_DESC_PAGGR(__pdesc) \ 255 LE_BITS_TO_4BYTE(__pdesc+4, 15, 1) 256 #define GET_RX_DESC_A1_FIT(__pdesc) \ 257 LE_BITS_TO_4BYTE(__pdesc+4, 16, 4) 258 #define GET_RX_DESC_CHKERR(__pdesc) \ 259 LE_BITS_TO_4BYTE(__pdesc+4, 20, 1) 260 #define GET_RX_DESC_IPVER(__pdesc) \ 261 LE_BITS_TO_4BYTE(__pdesc+4, 21, 1) 262 #define GET_RX_STATUS_DESC_IS_TCPUDP(__pdesc) \ 263 LE_BITS_TO_4BYTE(__pdesc+4, 22, 1) 264 #define GET_RX_STATUS_DESC_CHK_VLD(__pdesc) \ 265 LE_BITS_TO_4BYTE(__pdesc+4, 23, 1) 266 #define GET_RX_DESC_PAM(__pdesc) \ 267 LE_BITS_TO_4BYTE(__pdesc+4, 24, 1) 268 #define GET_RX_DESC_PWR(__pdesc) \ 269 LE_BITS_TO_4BYTE(__pdesc+4, 25, 1) 270 #define GET_RX_DESC_MD(__pdesc) \ 271 LE_BITS_TO_4BYTE(__pdesc+4, 26, 1) 272 #define GET_RX_DESC_MF(__pdesc) \ 273 LE_BITS_TO_4BYTE(__pdesc+4, 27, 1) 274 #define GET_RX_DESC_TYPE(__pdesc) \ 275 LE_BITS_TO_4BYTE(__pdesc+4, 28, 2) 276 #define GET_RX_DESC_MC(__pdesc) \ 277 LE_BITS_TO_4BYTE(__pdesc+4, 30, 1) 278 #define GET_RX_DESC_BC(__pdesc) \ 279 LE_BITS_TO_4BYTE(__pdesc+4, 31, 1) 280 281 #define GET_RX_DESC_SEQ(__pdesc) \ 282 LE_BITS_TO_4BYTE(__pdesc+8, 0, 12) 283 #define GET_RX_DESC_FRAG(__pdesc) \ 284 LE_BITS_TO_4BYTE(__pdesc+8, 12, 4) 285 #define GET_RX_STATUS_DESC_RX_IS_QOS(__pdesc) \ 286 LE_BITS_TO_4BYTE(__pdesc+8, 16, 1) 287 #define GET_RX_STATUS_DESC_WLANHD_IV_LEN(__pdesc) \ 288 LE_BITS_TO_4BYTE(__pdesc+8, 18, 6) 289 #define GET_RX_STATUS_DESC_RPT_SEL(__pdesc) \ 290 LE_BITS_TO_4BYTE(__pdesc+8, 28, 1) 291 292 #define GET_RX_DESC_RXMCS(__pdesc) \ 293 LE_BITS_TO_4BYTE(__pdesc+12, 0, 7) 294 #define GET_RX_DESC_HTC(__pdesc) \ 295 LE_BITS_TO_4BYTE(__pdesc+12, 10, 1) 296 #define GET_RX_STATUS_DESC_EOSP(__pdesc) \ 297 LE_BITS_TO_4BYTE(__pdesc+12, 11, 1) 298 #define GET_RX_STATUS_DESC_BSSID_FIT(__pdesc) \ 299 LE_BITS_TO_4BYTE(__pdesc+12, 12, 2) 300 301 #define GET_RX_STATUS_DESC_PATTERN_MATCH(__pdesc) \ 302 LE_BITS_TO_4BYTE(__pdesc+12, 29, 1) 303 #define GET_RX_STATUS_DESC_UNICAST_MATCH(__pdesc) \ 304 LE_BITS_TO_4BYTE(__pdesc+12, 30, 1) 305 #define GET_RX_STATUS_DESC_MAGIC_MATCH(__pdesc) \ 306 LE_BITS_TO_4BYTE(__pdesc+12, 31, 1) 307 308 #define GET_RX_DESC_SPLCP(__pdesc) \ 309 LE_BITS_TO_4BYTE(__pdesc+16, 0, 1) 310 #define GET_RX_STATUS_DESC_LDPC(__pdesc) \ 311 LE_BITS_TO_4BYTE(__pdesc+16, 1, 1) 312 #define GET_RX_STATUS_DESC_STBC(__pdesc) \ 313 LE_BITS_TO_4BYTE(__pdesc+16, 2, 1) 314 #define GET_RX_DESC_BW(__pdesc) \ 315 LE_BITS_TO_4BYTE(__pdesc+16, 4, 2) 316 317 #define GET_RX_DESC_TSFL(__pdesc) \ 318 LE_BITS_TO_4BYTE(__pdesc+20, 0, 32) 319 320 #define GET_RX_DESC_BUFF_ADDR(__pdesc) \ 321 LE_BITS_TO_4BYTE(__pdesc+24, 0, 32) 322 #define GET_RX_DESC_BUFF_ADDR64(__pdesc) \ 323 LE_BITS_TO_4BYTE(__pdesc+28, 0, 32) 324 325 #define SET_RX_DESC_BUFF_ADDR(__pdesc, __val) \ 326 SET_BITS_TO_LE_4BYTE(__pdesc+24, 0, 32, __val) 327 #define SET_RX_DESC_BUFF_ADDR64(__pdesc, __val) \ 328 SET_BITS_TO_LE_4BYTE(__pdesc+28, 0, 32, __val) 329 330 /* TX report 2 format in Rx desc*/ 331 332 #define GET_RX_RPT2_DESC_PKT_LEN(__status) \ 333 LE_BITS_TO_4BYTE(__status, 0, 9) 334 #define GET_RX_RPT2_DESC_MACID_VALID_1(__status) \ 335 LE_BITS_TO_4BYTE(__status+16, 0, 32) 336 #define GET_RX_RPT2_DESC_MACID_VALID_2(__status) \ 337 LE_BITS_TO_4BYTE(__status+20, 0, 32) 338 339 #define SET_EARLYMODE_PKTNUM(__paddr, __value) \ 340 SET_BITS_TO_LE_4BYTE(__paddr, 0, 4, __value) 341 #define SET_EARLYMODE_LEN0(__paddr, __value) \ 342 SET_BITS_TO_LE_4BYTE(__paddr, 4, 12, __value) 343 #define SET_EARLYMODE_LEN1(__paddr, __value) \ 344 SET_BITS_TO_LE_4BYTE(__paddr, 16, 12, __value) 345 #define SET_EARLYMODE_LEN2_1(__paddr, __value) \ 346 SET_BITS_TO_LE_4BYTE(__paddr, 28, 4, __value) 347 #define SET_EARLYMODE_LEN2_2(__paddr, __value) \ 348 SET_BITS_TO_LE_4BYTE(__paddr+4, 0, 8, __value) 349 #define SET_EARLYMODE_LEN3(__paddr, __value) \ 350 SET_BITS_TO_LE_4BYTE(__paddr+4, 8, 12, __value) 351 #define SET_EARLYMODE_LEN4(__paddr, __value) \ 352 SET_BITS_TO_LE_4BYTE(__paddr+4, 20, 12, __value) 353 354 #define CLEAR_PCI_TX_DESC_CONTENT(__pdesc, _size) \ 355 do { \ 356 if (_size > TX_DESC_NEXT_DESC_OFFSET) \ 357 memset(__pdesc, 0, TX_DESC_NEXT_DESC_OFFSET); \ 358 else \ 359 memset(__pdesc, 0, _size); \ 360 } while (0) 361 362 #define RTL8821AE_RX_HAL_IS_CCK_RATE(rxmcs)\ 363 (rxmcs == DESC_RATE1M ||\ 364 rxmcs == DESC_RATE2M ||\ 365 rxmcs == DESC_RATE5_5M ||\ 366 rxmcs == DESC_RATE11M) 367 368 struct phy_rx_agc_info_t { 369 #ifdef __LITTLE_ENDIAN 370 u8 gain:7, trsw:1; 371 #else 372 u8 trsw:1, gain:7; 373 #endif 374 }; 375 376 struct phy_status_rpt { 377 /* DWORD 0 */ 378 u8 gain_trsw[2]; 379 #ifdef __LITTLE_ENDIAN 380 u16 chl_num:10; 381 u16 sub_chnl:4; 382 u16 r_rfmod:2; 383 #else /* _BIG_ENDIAN_ */ 384 u16 r_rfmod:2; 385 u16 sub_chnl:4; 386 u16 chl_num:10; 387 #endif 388 /* DWORD 1 */ 389 u8 pwdb_all; 390 u8 cfosho[4]; /* DW 1 byte 1 DW 2 byte 0 */ 391 392 /* DWORD 2 */ 393 char cfotail[4]; /* DW 2 byte 1 DW 3 byte 0 */ 394 395 /* DWORD 3 */ 396 char rxevm[2]; /* DW 3 byte 1 DW 3 byte 2 */ 397 char rxsnr[2]; /* DW 3 byte 3 DW 4 byte 0 */ 398 399 /* DWORD 4 */ 400 u8 pcts_msk_rpt[2]; 401 u8 pdsnr[2]; /* DW 4 byte 3 DW 5 Byte 0 */ 402 403 /* DWORD 5 */ 404 u8 csi_current[2]; 405 u8 rx_gain_c; 406 407 /* DWORD 6 */ 408 u8 rx_gain_d; 409 u8 sigevm; 410 u8 resvd_0; 411 u8 antidx_anta:3; 412 u8 antidx_antb:3; 413 u8 resvd_1:2; 414 } __packed; 415 416 struct rx_fwinfo_8821ae { 417 u8 gain_trsw[4]; 418 u8 pwdb_all; 419 u8 cfosho[4]; 420 u8 cfotail[4]; 421 char rxevm[2]; 422 char rxsnr[4]; 423 u8 pdsnr[2]; 424 u8 csi_current[2]; 425 u8 csi_target[2]; 426 u8 sigevm; 427 u8 max_ex_pwr; 428 u8 ex_intf_flag:1; 429 u8 sgi_en:1; 430 u8 rxsc:2; 431 u8 reserve:4; 432 } __packed; 433 434 struct tx_desc_8821ae { 435 u32 pktsize:16; 436 u32 offset:8; 437 u32 bmc:1; 438 u32 htc:1; 439 u32 lastseg:1; 440 u32 firstseg:1; 441 u32 linip:1; 442 u32 noacm:1; 443 u32 gf:1; 444 u32 own:1; 445 446 u32 macid:6; 447 u32 rsvd0:2; 448 u32 queuesel:5; 449 u32 rd_nav_ext:1; 450 u32 lsig_txop_en:1; 451 u32 pifs:1; 452 u32 rateid:4; 453 u32 nav_usehdr:1; 454 u32 en_descid:1; 455 u32 sectype:2; 456 u32 pktoffset:8; 457 458 u32 rts_rc:6; 459 u32 data_rc:6; 460 u32 agg_en:1; 461 u32 rdg_en:1; 462 u32 bar_retryht:2; 463 u32 agg_break:1; 464 u32 morefrag:1; 465 u32 raw:1; 466 u32 ccx:1; 467 u32 ampdudensity:3; 468 u32 bt_int:1; 469 u32 ant_sela:1; 470 u32 ant_selb:1; 471 u32 txant_cck:2; 472 u32 txant_l:2; 473 u32 txant_ht:2; 474 475 u32 nextheadpage:8; 476 u32 tailpage:8; 477 u32 seq:12; 478 u32 cpu_handle:1; 479 u32 tag1:1; 480 u32 trigger_int:1; 481 u32 hwseq_en:1; 482 483 u32 rtsrate:5; 484 u32 apdcfe:1; 485 u32 qos:1; 486 u32 hwseq_ssn:1; 487 u32 userrate:1; 488 u32 dis_rtsfb:1; 489 u32 dis_datafb:1; 490 u32 cts2self:1; 491 u32 rts_en:1; 492 u32 hwrts_en:1; 493 u32 portid:1; 494 u32 pwr_status:3; 495 u32 waitdcts:1; 496 u32 cts2ap_en:1; 497 u32 txsc:2; 498 u32 stbc:2; 499 u32 txshort:1; 500 u32 txbw:1; 501 u32 rtsshort:1; 502 u32 rtsbw:1; 503 u32 rtssc:2; 504 u32 rtsstbc:2; 505 506 u32 txrate:6; 507 u32 shortgi:1; 508 u32 ccxt:1; 509 u32 txrate_fb_lmt:5; 510 u32 rtsrate_fb_lmt:4; 511 u32 retrylmt_en:1; 512 u32 txretrylmt:6; 513 u32 usb_txaggnum:8; 514 515 u32 txagca:5; 516 u32 txagcb:5; 517 u32 usemaxlen:1; 518 u32 maxaggnum:5; 519 u32 mcsg1maxlen:4; 520 u32 mcsg2maxlen:4; 521 u32 mcsg3maxlen:4; 522 u32 mcs7sgimaxlen:4; 523 524 u32 txbuffersize:16; 525 u32 sw_offset30:8; 526 u32 sw_offset31:4; 527 u32 rsvd1:1; 528 u32 antsel_c:1; 529 u32 null_0:1; 530 u32 null_1:1; 531 532 u32 txbuffaddr; 533 u32 txbufferaddr64; 534 u32 nextdescaddress; 535 u32 nextdescaddress64; 536 537 u32 reserve_pass_pcie_mm_limit[4]; 538 } __packed; 539 540 struct rx_desc_8821ae { 541 u32 length:14; 542 u32 crc32:1; 543 u32 icverror:1; 544 u32 drv_infosize:4; 545 u32 security:3; 546 u32 qos:1; 547 u32 shift:2; 548 u32 phystatus:1; 549 u32 swdec:1; 550 u32 lastseg:1; 551 u32 firstseg:1; 552 u32 eor:1; 553 u32 own:1; 554 555 u32 macid:6; 556 u32 tid:4; 557 u32 hwrsvd:5; 558 u32 paggr:1; 559 u32 faggr:1; 560 u32 a1_fit:4; 561 u32 a2_fit:4; 562 u32 pam:1; 563 u32 pwr:1; 564 u32 moredata:1; 565 u32 morefrag:1; 566 u32 type:2; 567 u32 mc:1; 568 u32 bc:1; 569 570 u32 seq:12; 571 u32 frag:4; 572 u32 nextpktlen:14; 573 u32 nextind:1; 574 u32 rsvd:1; 575 576 u32 rxmcs:6; 577 u32 rxht:1; 578 u32 amsdu:1; 579 u32 splcp:1; 580 u32 bandwidth:1; 581 u32 htc:1; 582 u32 tcpchk_rpt:1; 583 u32 ipcchk_rpt:1; 584 u32 tcpchk_valid:1; 585 u32 hwpcerr:1; 586 u32 hwpcind:1; 587 u32 iv0:16; 588 589 u32 iv1; 590 591 u32 tsfl; 592 593 u32 bufferaddress; 594 u32 bufferaddress64; 595 596 } __packed; 597 598 void rtl8821ae_tx_fill_desc(struct ieee80211_hw *hw, 599 struct ieee80211_hdr *hdr, u8 *pdesc_tx, u8 *txbd, 600 struct ieee80211_tx_info *info, 601 struct ieee80211_sta *sta, 602 struct sk_buff *skb, 603 u8 hw_queue, struct rtl_tcb_desc *ptcb_desc); 604 bool rtl8821ae_rx_query_desc(struct ieee80211_hw *hw, 605 struct rtl_stats *status, 606 struct ieee80211_rx_status *rx_status, 607 u8 *pdesc, struct sk_buff *skb); 608 void rtl8821ae_set_desc(struct ieee80211_hw *hw, u8 *pdesc, 609 bool istx, u8 desc_name, u8 *val); 610 u32 rtl8821ae_get_desc(u8 *pdesc, bool istx, u8 desc_name); 611 bool rtl8821ae_is_tx_desc_closed(struct ieee80211_hw *hw, 612 u8 hw_queue, u16 index); 613 void rtl8821ae_tx_polling(struct ieee80211_hw *hw, u8 hw_queue); 614 void rtl8821ae_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc, 615 bool firstseg, bool lastseg, 616 struct sk_buff *skb); 617 u32 rtl8821ae_rx_command_packet(struct ieee80211_hw *hw, 618 const struct rtl_stats *status, 619 struct sk_buff *skb); 620 #endif 621