1 /******************************************************************************
2  *
3  * Copyright(c) 2009-2010  Realtek Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * The full GNU General Public License is included in this distribution in the
15  * file called LICENSE.
16  *
17  * Contact Information:
18  * wlanfae <wlanfae@realtek.com>
19  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20  * Hsinchu 300, Taiwan.
21  *
22  * Larry Finger <Larry.Finger@lwfinger.net>
23  *
24  *****************************************************************************/
25 
26 #ifndef __RTL8821AE_TRX_H__
27 #define __RTL8821AE_TRX_H__
28 
29 #define TX_DESC_SIZE					40
30 #define TX_DESC_AGGR_SUBFRAME_SIZE		32
31 
32 #define RX_DESC_SIZE					32
33 #define RX_DRV_INFO_SIZE_UNIT			8
34 
35 #define	TX_DESC_NEXT_DESC_OFFSET		40
36 #define USB_HWDESC_HEADER_LEN			40
37 #define CRCLENGTH						4
38 
39 #define SET_TX_DESC_PKT_SIZE(__pdesc, __val)		\
40 	SET_BITS_TO_LE_4BYTE(__pdesc, 0, 16, __val)
41 #define SET_TX_DESC_OFFSET(__pdesc, __val)			\
42 	SET_BITS_TO_LE_4BYTE(__pdesc, 16, 8, __val)
43 #define SET_TX_DESC_BMC(__pdesc, __val)				\
44 	SET_BITS_TO_LE_4BYTE(__pdesc, 24, 1, __val)
45 #define SET_TX_DESC_HTC(__pdesc, __val)				\
46 	SET_BITS_TO_LE_4BYTE(__pdesc, 25, 1, __val)
47 #define SET_TX_DESC_LAST_SEG(__pdesc, __val)		\
48 	SET_BITS_TO_LE_4BYTE(__pdesc, 26, 1, __val)
49 #define SET_TX_DESC_FIRST_SEG(__pdesc, __val)		\
50 	SET_BITS_TO_LE_4BYTE(__pdesc, 27, 1, __val)
51 #define SET_TX_DESC_LINIP(__pdesc, __val)			\
52 	SET_BITS_TO_LE_4BYTE(__pdesc, 28, 1, __val)
53 #define SET_TX_DESC_NO_ACM(__pdesc, __val)			\
54 	SET_BITS_TO_LE_4BYTE(__pdesc, 29, 1, __val)
55 #define SET_TX_DESC_GF(__pdesc, __val)				\
56 	SET_BITS_TO_LE_4BYTE(__pdesc, 30, 1, __val)
57 #define SET_TX_DESC_OWN(__pdesc, __val)				\
58 	SET_BITS_TO_LE_4BYTE(__pdesc, 31, 1, __val)
59 
60 #define GET_TX_DESC_PKT_SIZE(__pdesc)				\
61 	LE_BITS_TO_4BYTE(__pdesc, 0, 16)
62 #define GET_TX_DESC_OFFSET(__pdesc)					\
63 	LE_BITS_TO_4BYTE(__pdesc, 16, 8)
64 #define GET_TX_DESC_BMC(__pdesc)					\
65 	LE_BITS_TO_4BYTE(__pdesc, 24, 1)
66 #define GET_TX_DESC_HTC(__pdesc)					\
67 	LE_BITS_TO_4BYTE(__pdesc, 25, 1)
68 #define GET_TX_DESC_LAST_SEG(__pdesc)				\
69 	LE_BITS_TO_4BYTE(__pdesc, 26, 1)
70 #define GET_TX_DESC_FIRST_SEG(__pdesc)				\
71 	LE_BITS_TO_4BYTE(__pdesc, 27, 1)
72 #define GET_TX_DESC_LINIP(__pdesc)					\
73 	LE_BITS_TO_4BYTE(__pdesc, 28, 1)
74 #define GET_TX_DESC_NO_ACM(__pdesc)					\
75 	LE_BITS_TO_4BYTE(__pdesc, 29, 1)
76 #define GET_TX_DESC_GF(__pdesc)						\
77 	LE_BITS_TO_4BYTE(__pdesc, 30, 1)
78 #define GET_TX_DESC_OWN(__pdesc)					\
79 	LE_BITS_TO_4BYTE(__pdesc, 31, 1)
80 
81 #define SET_TX_DESC_MACID(__pdesc, __val)			\
82 	SET_BITS_TO_LE_4BYTE(__pdesc+4, 0, 7, __val)
83 #define SET_TX_DESC_QUEUE_SEL(__pdesc, __val)		\
84 	SET_BITS_TO_LE_4BYTE(__pdesc+4, 8, 5, __val)
85 #define SET_TX_DESC_RDG_NAV_EXT(__pdesc, __val)		\
86 	SET_BITS_TO_LE_4BYTE(__pdesc+4, 13, 1, __val)
87 #define SET_TX_DESC_LSIG_TXOP_EN(__pdesc, __val)	\
88 	SET_BITS_TO_LE_4BYTE(__pdesc+4, 14, 1, __val)
89 #define SET_TX_DESC_PIFS(__pdesc, __val)			\
90 	SET_BITS_TO_LE_4BYTE(__pdesc+4, 15, 1, __val)
91 #define SET_TX_DESC_RATE_ID(__pdesc, __val)		\
92 	SET_BITS_TO_LE_4BYTE(__pdesc+4, 16, 5, __val)
93 #define SET_TX_DESC_EN_DESC_ID(__pdesc, __val)		\
94 	SET_BITS_TO_LE_4BYTE(__pdesc+4, 21, 1, __val)
95 #define SET_TX_DESC_SEC_TYPE(__pdesc, __val)		\
96 	SET_BITS_TO_LE_4BYTE(__pdesc+4, 22, 2, __val)
97 #define SET_TX_DESC_PKT_OFFSET(__pdesc, __val)		\
98 	SET_BITS_TO_LE_4BYTE(__pdesc+4, 24, 5, __val)
99 
100 #define SET_TX_DESC_PAID(__pdesc, __val)			\
101 	SET_BITS_TO_LE_4BYTE(__pdesc+8, 0, 9, __val)
102 #define SET_TX_DESC_CCA_RTS(__pdesc, __val)		\
103 	SET_BITS_TO_LE_4BYTE(__pdesc+8, 10, 2, __val)
104 #define SET_TX_DESC_AGG_ENABLE(__pdesc, __val)	\
105 	SET_BITS_TO_LE_4BYTE(__pdesc+8, 12, 1, __val)
106 #define SET_TX_DESC_RDG_ENABLE(__pdesc, __val)	\
107 	SET_BITS_TO_LE_4BYTE(__pdesc+8, 13, 1, __val)
108 #define SET_TX_DESC_BAR_RTY_TH(__pdesc, __val)		\
109 	SET_BITS_TO_LE_4BYTE(__pdesc+8, 14, 2, __val)
110 #define SET_TX_DESC_AGG_BREAK(__pdesc, __val)		\
111 	SET_BITS_TO_LE_4BYTE(__pdesc+8, 16, 1, __val)
112 #define SET_TX_DESC_MORE_FRAG(__pdesc, __val)		\
113 	SET_BITS_TO_LE_4BYTE(__pdesc+8, 17, 1, __val)
114 #define SET_TX_DESC_RAW(__pdesc, __val)				\
115 	SET_BITS_TO_LE_4BYTE(__pdesc+8, 18, 1, __val)
116 #define SET_TX_DESC_SPE_RPT(__pdesc, __val)			\
117 	SET_BITS_TO_LE_4BYTE((__pdesc) + 8, 19, 1, __val)
118 #define SET_TX_DESC_AMPDU_DENSITY(__pdesc, __val)	\
119 	SET_BITS_TO_LE_4BYTE(__pdesc+8, 20, 3, __val)
120 #define SET_TX_DESC_BT_INT(__pdesc, __val)	\
121 	SET_BITS_TO_LE_4BYTE(__pdesc+8, 23, 1, __val)
122 #define SET_TX_DESC_GID(__pdesc, __val)			\
123 	SET_BITS_TO_LE_4BYTE(__pdesc+8, 24, 6, __val)
124 
125 #define SET_TX_DESC_WHEADER_LEN(__pdesc, __val)		\
126 	SET_BITS_TO_LE_4BYTE(__pdesc+12, 0, 4, __val)
127 #define SET_TX_DESC_CHK_EN(__pdesc, __val)		\
128 	SET_BITS_TO_LE_4BYTE(__pdesc+12, 4, 1, __val)
129 #define SET_TX_DESC_EARLY_MODE(__pdesc, __val)		\
130 	SET_BITS_TO_LE_4BYTE(__pdesc+12, 5, 1, __val)
131 #define SET_TX_DESC_HWSEQ_SEL(__pdesc, __val)		\
132 	SET_BITS_TO_LE_4BYTE(__pdesc+12, 6, 2, __val)
133 #define SET_TX_DESC_USE_RATE(__pdesc, __val)		\
134 	SET_BITS_TO_LE_4BYTE(__pdesc+12, 8, 1, __val)
135 #define SET_TX_DESC_DISABLE_RTS_FB(__pdesc, __val)		\
136 	SET_BITS_TO_LE_4BYTE(__pdesc+12, 9, 1, __val)
137 #define SET_TX_DESC_DISABLE_FB(__pdesc, __val)		\
138 	SET_BITS_TO_LE_4BYTE(__pdesc+12, 10, 1, __val)
139 #define SET_TX_DESC_CTS2SELF(__pdesc, __val)		\
140 	SET_BITS_TO_LE_4BYTE(__pdesc+12, 11, 1, __val)
141 #define SET_TX_DESC_RTS_ENABLE(__pdesc, __val)		\
142 	SET_BITS_TO_LE_4BYTE(__pdesc+12, 12, 1, __val)
143 #define SET_TX_DESC_HW_RTS_ENABLE(__pdesc, __val)		\
144 	SET_BITS_TO_LE_4BYTE(__pdesc+12, 13, 1, __val)
145 #define SET_TX_DESC_NAV_USE_HDR(__pdesc, __val)			\
146 	SET_BITS_TO_LE_4BYTE(__pdesc+12, 15, 1, __val)
147 #define SET_TX_DESC_USE_MAX_LEN(__pdesc, __val)			\
148 	SET_BITS_TO_LE_4BYTE(__pdesc+12, 16, 1, __val)
149 #define SET_TX_DESC_MAX_AGG_NUM(__pdesc, __val)			\
150 	SET_BITS_TO_LE_4BYTE(__pdesc+12, 17, 5, __val)
151 #define SET_TX_DESC_NDPA(__pdesc, __val)		\
152 	SET_BITS_TO_LE_4BYTE(__pdesc+12, 22, 2, __val)
153 #define SET_TX_DESC_AMPDU_MAX_TIME(__pdesc, __val)		\
154 	SET_BITS_TO_LE_4BYTE(__pdesc+12, 24, 8, __val)
155 #define SET_TX_DESC_TX_ANT(__pdesc, __val)		\
156 	SET_BITS_TO_LE_4BYTE(__pdesc+20, 24, 4, __val)
157 
158 #define SET_TX_DESC_TX_RATE(__pdesc, __val)		\
159 	SET_BITS_TO_LE_4BYTE(__pdesc+16, 0, 7, __val)
160 #define SET_TX_DESC_DATA_RATE_FB_LIMIT(__pdesc, __val)		\
161 	SET_BITS_TO_LE_4BYTE(__pdesc+16, 8, 5, __val)
162 #define SET_TX_DESC_RTS_RATE_FB_LIMIT(__pdesc, __val)		\
163 	SET_BITS_TO_LE_4BYTE(__pdesc+16, 13, 4, __val)
164 #define SET_TX_DESC_RETRY_LIMIT_ENABLE(__pdesc, __val)			\
165 	SET_BITS_TO_LE_4BYTE(__pdesc+16, 17, 1, __val)
166 #define SET_TX_DESC_DATA_RETRY_LIMIT(__pdesc, __val)		\
167 	SET_BITS_TO_LE_4BYTE(__pdesc+16, 18, 6, __val)
168 #define SET_TX_DESC_RTS_RATE(__pdesc, __val)		\
169 	SET_BITS_TO_LE_4BYTE(__pdesc+16, 24, 5, __val)
170 
171 #define SET_TX_DESC_TX_SUB_CARRIER(__pdesc, __val)		\
172 	SET_BITS_TO_LE_4BYTE(__pdesc+20, 0, 4, __val)
173 #define SET_TX_DESC_DATA_SHORTGI(__pdesc, __val)	\
174 	SET_BITS_TO_LE_1BYTE(__pdesc+20, 4, 1, __val)
175 #define SET_TX_DESC_DATA_BW(__pdesc, __val)		\
176 	SET_BITS_TO_LE_4BYTE(__pdesc+20, 5, 2, __val)
177 #define SET_TX_DESC_DATA_LDPC(__pdesc, __val)	\
178 	SET_BITS_TO_LE_4BYTE(__pdesc+20, 7, 1, __val)
179 #define SET_TX_DESC_DATA_STBC(__pdesc, __val)	\
180 	SET_BITS_TO_LE_4BYTE(__pdesc+20, 8, 2, __val)
181 #define SET_TX_DESC_CTROL_STBC(__pdesc, __val)	\
182 	SET_BITS_TO_LE_4BYTE(__pdesc+20, 10, 2, __val)
183 #define SET_TX_DESC_RTS_SHORT(__pdesc, __val)	\
184 	SET_BITS_TO_LE_4BYTE(__pdesc+20, 12, 1, __val)
185 #define SET_TX_DESC_RTS_SC(__pdesc, __val)	\
186 	SET_BITS_TO_LE_4BYTE(__pdesc+20, 13, 4, __val)
187 
188 #define SET_TX_DESC_SW_DEFINE(__pdesc, __val)	\
189 	SET_BITS_TO_LE_4BYTE((__pdesc) + 24, 0, 12, __val)
190 #define SET_TX_DESC_ANTSEL_A(__pdesc, __val)	\
191 	SET_BITS_TO_LE_4BYTE((__pdesc) + 24, 16, 3, __val)
192 #define SET_TX_DESC_ANTSEL_B(__pdesc, __val)	\
193 	SET_BITS_TO_LE_4BYTE((__pdesc) + 24, 19, 3, __val)
194 #define SET_TX_DESC_ANTSEL_C(__pdesc, __val)	\
195 	SET_BITS_TO_LE_4BYTE((__pdesc) + 24, 22, 3, __val)
196 #define SET_TX_DESC_ANTSEL_D(__pdesc, __val)	\
197 	SET_BITS_TO_LE_4BYTE((__pdesc) + 24, 25, 3, __val)
198 #define SET_TX_DESC_MBSSID(__pdesc, __val)	\
199 	SET_BITS_TO_LE_4BYTE(i(__pdesc) + 24, 12, 4, __val)
200 
201 #define SET_TX_DESC_TX_BUFFER_SIZE(__pdesc, __val)	\
202 	SET_BITS_TO_LE_4BYTE((__pdesc) + 28, 0, 16, __val)
203 
204 #define GET_TX_DESC_TX_BUFFER_SIZE(__pdesc)		\
205 	LE_BITS_TO_4BYTE(__pdesc+28, 0, 16)
206 
207 #define SET_TX_DESC_HWSEQ_EN(__pdesc, __val)	\
208 	SET_BITS_TO_LE_4BYTE(__pdesc+32, 15, 1, __val)
209 
210 #define SET_TX_DESC_SEQ(__pdesc, __val)		\
211 	SET_BITS_TO_LE_4BYTE(__pdesc+36, 12, 12, __val)
212 
213 #define SET_TX_DESC_TX_BUFFER_ADDRESS(__pdesc, __val)	\
214 	SET_BITS_TO_LE_4BYTE(__pdesc+40, 0, 32, __val)
215 
216 #define GET_TX_DESC_TX_BUFFER_ADDRESS(__pdesc)		\
217 	LE_BITS_TO_4BYTE(__pdesc+40, 0, 32)
218 
219 #define SET_TX_DESC_NEXT_DESC_ADDRESS(__pdesc, __val)	\
220 	SET_BITS_TO_LE_4BYTE(__pdesc+48, 0, 32, __val)
221 
222 #define GET_TX_DESC_NEXT_DESC_ADDRESS(__pdesc)		\
223 	LE_BITS_TO_4BYTE(__pdesc+48, 0, 32)
224 
225 #define GET_RX_DESC_PKT_LEN(__pdesc)			\
226 	LE_BITS_TO_4BYTE(__pdesc, 0, 14)
227 #define GET_RX_DESC_CRC32(__pdesc)				\
228 	LE_BITS_TO_4BYTE(__pdesc, 14, 1)
229 #define GET_RX_DESC_ICV(__pdesc)				\
230 	LE_BITS_TO_4BYTE(__pdesc, 15, 1)
231 #define GET_RX_DESC_DRV_INFO_SIZE(__pdesc)		\
232 	LE_BITS_TO_4BYTE(__pdesc, 16, 4)
233 #define GET_RX_DESC_SECURITY(__pdesc)			\
234 	LE_BITS_TO_4BYTE(__pdesc, 20, 3)
235 #define GET_RX_DESC_QOS(__pdesc)				\
236 	LE_BITS_TO_4BYTE(__pdesc, 23, 1)
237 #define GET_RX_DESC_SHIFT(__pdesc)				\
238 	LE_BITS_TO_4BYTE(__pdesc, 24, 2)
239 #define GET_RX_DESC_PHYST(__pdesc)				\
240 	LE_BITS_TO_4BYTE(__pdesc, 26, 1)
241 #define GET_RX_DESC_SWDEC(__pdesc)				\
242 	LE_BITS_TO_4BYTE(__pdesc, 27, 1)
243 #define GET_RX_DESC_LS(__pdesc)					\
244 	LE_BITS_TO_4BYTE(__pdesc, 28, 1)
245 #define GET_RX_DESC_FS(__pdesc)					\
246 	LE_BITS_TO_4BYTE(__pdesc, 29, 1)
247 #define GET_RX_DESC_EOR(__pdesc)				\
248 	LE_BITS_TO_4BYTE(__pdesc, 30, 1)
249 #define GET_RX_DESC_OWN(__pdesc)				\
250 	LE_BITS_TO_4BYTE(__pdesc, 31, 1)
251 
252 #define SET_RX_DESC_PKT_LEN(__pdesc, __val)	\
253 	SET_BITS_TO_LE_4BYTE(__pdesc, 0, 14, __val)
254 #define SET_RX_DESC_EOR(__pdesc, __val)			\
255 	SET_BITS_TO_LE_4BYTE(__pdesc, 30, 1, __val)
256 #define SET_RX_DESC_OWN(__pdesc, __val)			\
257 	SET_BITS_TO_LE_4BYTE(__pdesc, 31, 1, __val)
258 
259 #define GET_RX_DESC_MACID(__pdesc)				\
260 	LE_BITS_TO_4BYTE(__pdesc+4, 0, 7)
261 #define GET_RX_DESC_TID(__pdesc)				\
262 	LE_BITS_TO_4BYTE(__pdesc+4, 8, 4)
263 #define GET_RX_DESC_AMSDU(__pdesc)				\
264 	LE_BITS_TO_4BYTE(__pdesc+4, 13, 1)
265 #define GET_RX_STATUS_DESC_RXID_MATCH(__pdesc)			\
266 	LE_BITS_TO_4BYTE(__pdesc+4, 14, 1)
267 #define GET_RX_DESC_PAGGR(__pdesc)				\
268 	LE_BITS_TO_4BYTE(__pdesc+4, 15, 1)
269 #define GET_RX_DESC_A1_FIT(__pdesc)			\
270 	LE_BITS_TO_4BYTE(__pdesc+4, 16, 4)
271 #define GET_RX_DESC_CHKERR(__pdesc)			\
272 	LE_BITS_TO_4BYTE(__pdesc+4, 20, 1)
273 #define GET_RX_DESC_IPVER(__pdesc)				\
274 	LE_BITS_TO_4BYTE(__pdesc+4, 21, 1)
275 #define GET_RX_STATUS_DESC_IS_TCPUDP(__pdesc)			\
276 	LE_BITS_TO_4BYTE(__pdesc+4, 22, 1)
277 #define GET_RX_STATUS_DESC_CHK_VLD(__pdesc)			\
278 	LE_BITS_TO_4BYTE(__pdesc+4, 23, 1)
279 #define GET_RX_DESC_PAM(__pdesc)				\
280 	LE_BITS_TO_4BYTE(__pdesc+4, 24, 1)
281 #define GET_RX_DESC_PWR(__pdesc)				\
282 	LE_BITS_TO_4BYTE(__pdesc+4, 25, 1)
283 #define GET_RX_DESC_MD(__pdesc)					\
284 	LE_BITS_TO_4BYTE(__pdesc+4, 26, 1)
285 #define GET_RX_DESC_MF(__pdesc)					\
286 	LE_BITS_TO_4BYTE(__pdesc+4, 27, 1)
287 #define GET_RX_DESC_TYPE(__pdesc)				\
288 	LE_BITS_TO_4BYTE(__pdesc+4, 28, 2)
289 #define GET_RX_DESC_MC(__pdesc)					\
290 	LE_BITS_TO_4BYTE(__pdesc+4, 30, 1)
291 #define GET_RX_DESC_BC(__pdesc)					\
292 	LE_BITS_TO_4BYTE(__pdesc+4, 31, 1)
293 
294 #define GET_RX_DESC_SEQ(__pdesc)				\
295 	LE_BITS_TO_4BYTE(__pdesc+8, 0, 12)
296 #define GET_RX_DESC_FRAG(__pdesc)				\
297 	LE_BITS_TO_4BYTE(__pdesc+8, 12, 4)
298 #define GET_RX_STATUS_DESC_RX_IS_QOS(__pdesc)			\
299 	LE_BITS_TO_4BYTE(__pdesc+8, 16, 1)
300 #define GET_RX_STATUS_DESC_WLANHD_IV_LEN(__pdesc)		\
301 	LE_BITS_TO_4BYTE(__pdesc+8, 18, 6)
302 #define GET_RX_STATUS_DESC_RPT_SEL(__pdesc)			\
303 	LE_BITS_TO_4BYTE(__pdesc+8, 28, 1)
304 
305 #define GET_RX_DESC_RXMCS(__pdesc)				\
306 	LE_BITS_TO_4BYTE(__pdesc+12, 0, 7)
307 #define GET_RX_DESC_HTC(__pdesc)				\
308 	LE_BITS_TO_4BYTE(__pdesc+12, 10, 1)
309 #define GET_RX_STATUS_DESC_EOSP(__pdesc)		\
310 	LE_BITS_TO_4BYTE(__pdesc+12, 11, 1)
311 #define GET_RX_STATUS_DESC_BSSID_FIT(__pdesc)		\
312 	LE_BITS_TO_4BYTE(__pdesc+12, 12, 2)
313 
314 #define GET_RX_STATUS_DESC_PATTERN_MATCH(__pdesc)	\
315 	LE_BITS_TO_4BYTE(__pdesc+12, 29, 1)
316 #define GET_RX_STATUS_DESC_UNICAST_MATCH(__pdesc)	\
317 	LE_BITS_TO_4BYTE(__pdesc+12, 30, 1)
318 #define GET_RX_STATUS_DESC_MAGIC_MATCH(__pdesc)	\
319 	LE_BITS_TO_4BYTE(__pdesc+12, 31, 1)
320 
321 #define GET_RX_DESC_SPLCP(__pdesc)				\
322 	LE_BITS_TO_4BYTE(__pdesc+16, 0, 1)
323 #define GET_RX_STATUS_DESC_LDPC(__pdesc)				\
324 	LE_BITS_TO_4BYTE(__pdesc+16, 1, 1)
325 #define GET_RX_STATUS_DESC_STBC(__pdesc)				\
326 	LE_BITS_TO_4BYTE(__pdesc+16, 2, 1)
327 #define GET_RX_DESC_BW(__pdesc)					\
328 	LE_BITS_TO_4BYTE(__pdesc+16, 4, 2)
329 
330 #define GET_RX_DESC_TSFL(__pdesc)				\
331 	LE_BITS_TO_4BYTE(__pdesc+20, 0, 32)
332 
333 #define GET_RX_DESC_BUFF_ADDR(__pdesc)			\
334 	LE_BITS_TO_4BYTE(__pdesc+24, 0, 32)
335 #define GET_RX_DESC_BUFF_ADDR64(__pdesc)		\
336 	LE_BITS_TO_4BYTE(__pdesc+28, 0, 32)
337 
338 #define SET_RX_DESC_BUFF_ADDR(__pdesc, __val)	\
339 	SET_BITS_TO_LE_4BYTE(__pdesc+24, 0, 32, __val)
340 #define SET_RX_DESC_BUFF_ADDR64(__pdesc, __val) \
341 	SET_BITS_TO_LE_4BYTE(__pdesc+28, 0, 32, __val)
342 
343 /* TX report 2 format in Rx desc*/
344 
345 #define GET_RX_RPT2_DESC_PKT_LEN(__status)	\
346 	LE_BITS_TO_4BYTE(__status, 0, 9)
347 #define GET_RX_RPT2_DESC_MACID_VALID_1(__status)	\
348 	LE_BITS_TO_4BYTE(__status+16, 0, 32)
349 #define GET_RX_RPT2_DESC_MACID_VALID_2(__status)	\
350 	LE_BITS_TO_4BYTE(__status+20, 0, 32)
351 
352 #define SET_EARLYMODE_PKTNUM(__paddr, __value)	\
353 	SET_BITS_TO_LE_4BYTE(__paddr, 0, 4, __value)
354 #define SET_EARLYMODE_LEN0(__paddr, __value)	\
355 	SET_BITS_TO_LE_4BYTE(__paddr, 4, 12, __value)
356 #define SET_EARLYMODE_LEN1(__paddr, __value)	\
357 	SET_BITS_TO_LE_4BYTE(__paddr, 16, 12, __value)
358 #define SET_EARLYMODE_LEN2_1(__paddr, __value)	\
359 	SET_BITS_TO_LE_4BYTE(__paddr, 28, 4, __value)
360 #define SET_EARLYMODE_LEN2_2(__paddr, __value)	\
361 	SET_BITS_TO_LE_4BYTE(__paddr+4, 0, 8, __value)
362 #define SET_EARLYMODE_LEN3(__paddr, __value)	\
363 	SET_BITS_TO_LE_4BYTE(__paddr+4, 8, 12, __value)
364 #define SET_EARLYMODE_LEN4(__paddr, __value)	\
365 	SET_BITS_TO_LE_4BYTE(__paddr+4, 20, 12, __value)
366 
367 #define CLEAR_PCI_TX_DESC_CONTENT(__pdesc, _size)		\
368 do {								\
369 	if (_size > TX_DESC_NEXT_DESC_OFFSET)			\
370 		memset(__pdesc, 0, TX_DESC_NEXT_DESC_OFFSET);	\
371 	else							\
372 		memset(__pdesc, 0, _size);			\
373 } while (0)
374 
375 #define RTL8821AE_RX_HAL_IS_CCK_RATE(rxmcs)\
376 	(rxmcs == DESC_RATE1M ||\
377 	 rxmcs == DESC_RATE2M ||\
378 	 rxmcs == DESC_RATE5_5M ||\
379 	 rxmcs == DESC_RATE11M)
380 
381 struct phy_rx_agc_info_t {
382 	#ifdef __LITTLE_ENDIAN
383 		u8	gain:7, trsw:1;
384 	#else
385 		u8	trsw:1, gain:7;
386 	#endif
387 };
388 
389 struct phy_status_rpt {
390 	/* DWORD 0 */
391 	u8 gain_trsw[2];
392 #ifdef __LITTLE_ENDIAN
393 	u16 chl_num:10;
394 	u16 sub_chnl:4;
395 	u16 r_rfmod:2;
396 #else	/* _BIG_ENDIAN_ */
397 	u16 r_rfmod:2;
398 	u16 sub_chnl:4;
399 	u16 chl_num:10;
400 #endif
401 	/* DWORD 1 */
402 	u8 pwdb_all;
403 	u8 cfosho[4];	/* DW 1 byte 1 DW 2 byte 0 */
404 
405 	/* DWORD 2 */
406 	s8 cfotail[4];	/* DW 2 byte 1 DW 3 byte 0 */
407 
408 	/* DWORD 3 */
409 	s8 rxevm[2];	/* DW 3 byte 1 DW 3 byte 2 */
410 	s8 rxsnr[2];	/* DW 3 byte 3 DW 4 byte 0 */
411 
412 	/* DWORD 4 */
413 	u8 pcts_msk_rpt[2];
414 	u8 pdsnr[2];	/* DW 4 byte 3 DW 5 Byte 0 */
415 
416 	/* DWORD 5 */
417 	u8 csi_current[2];
418 	u8 rx_gain_c;
419 
420 	/* DWORD 6 */
421 	u8 rx_gain_d;
422 	u8 sigevm;
423 	u8 resvd_0;
424 	u8 antidx_anta:3;
425 	u8 antidx_antb:3;
426 	u8 resvd_1:2;
427 } __packed;
428 
429 struct rx_fwinfo_8821ae {
430 	u8 gain_trsw[4];
431 	u8 pwdb_all;
432 	u8 cfosho[4];
433 	u8 cfotail[4];
434 	s8 rxevm[2];
435 	s8 rxsnr[4];
436 	u8 pdsnr[2];
437 	u8 csi_current[2];
438 	u8 csi_target[2];
439 	u8 sigevm;
440 	u8 max_ex_pwr;
441 	u8 ex_intf_flag:1;
442 	u8 sgi_en:1;
443 	u8 rxsc:2;
444 	u8 reserve:4;
445 } __packed;
446 
447 struct tx_desc_8821ae {
448 	u32 pktsize:16;
449 	u32 offset:8;
450 	u32 bmc:1;
451 	u32 htc:1;
452 	u32 lastseg:1;
453 	u32 firstseg:1;
454 	u32 linip:1;
455 	u32 noacm:1;
456 	u32 gf:1;
457 	u32 own:1;
458 
459 	u32 macid:6;
460 	u32 rsvd0:2;
461 	u32 queuesel:5;
462 	u32 rd_nav_ext:1;
463 	u32 lsig_txop_en:1;
464 	u32 pifs:1;
465 	u32 rateid:4;
466 	u32 nav_usehdr:1;
467 	u32 en_descid:1;
468 	u32 sectype:2;
469 	u32 pktoffset:8;
470 
471 	u32 rts_rc:6;
472 	u32 data_rc:6;
473 	u32 agg_en:1;
474 	u32 rdg_en:1;
475 	u32 bar_retryht:2;
476 	u32 agg_break:1;
477 	u32 morefrag:1;
478 	u32 raw:1;
479 	u32 ccx:1;
480 	u32 ampdudensity:3;
481 	u32 bt_int:1;
482 	u32 ant_sela:1;
483 	u32 ant_selb:1;
484 	u32 txant_cck:2;
485 	u32 txant_l:2;
486 	u32 txant_ht:2;
487 
488 	u32 nextheadpage:8;
489 	u32 tailpage:8;
490 	u32 seq:12;
491 	u32 cpu_handle:1;
492 	u32 tag1:1;
493 	u32 trigger_int:1;
494 	u32 hwseq_en:1;
495 
496 	u32 rtsrate:5;
497 	u32 apdcfe:1;
498 	u32 qos:1;
499 	u32 hwseq_ssn:1;
500 	u32 userrate:1;
501 	u32 dis_rtsfb:1;
502 	u32 dis_datafb:1;
503 	u32 cts2self:1;
504 	u32 rts_en:1;
505 	u32 hwrts_en:1;
506 	u32 portid:1;
507 	u32 pwr_status:3;
508 	u32 waitdcts:1;
509 	u32 cts2ap_en:1;
510 	u32 txsc:2;
511 	u32 stbc:2;
512 	u32 txshort:1;
513 	u32 txbw:1;
514 	u32 rtsshort:1;
515 	u32 rtsbw:1;
516 	u32 rtssc:2;
517 	u32 rtsstbc:2;
518 
519 	u32 txrate:6;
520 	u32 shortgi:1;
521 	u32 ccxt:1;
522 	u32 txrate_fb_lmt:5;
523 	u32 rtsrate_fb_lmt:4;
524 	u32 retrylmt_en:1;
525 	u32 txretrylmt:6;
526 	u32 usb_txaggnum:8;
527 
528 	u32 txagca:5;
529 	u32 txagcb:5;
530 	u32 usemaxlen:1;
531 	u32 maxaggnum:5;
532 	u32 mcsg1maxlen:4;
533 	u32 mcsg2maxlen:4;
534 	u32 mcsg3maxlen:4;
535 	u32 mcs7sgimaxlen:4;
536 
537 	u32 txbuffersize:16;
538 	u32 sw_offset30:8;
539 	u32 sw_offset31:4;
540 	u32 rsvd1:1;
541 	u32 antsel_c:1;
542 	u32 null_0:1;
543 	u32 null_1:1;
544 
545 	u32 txbuffaddr;
546 	u32 txbufferaddr64;
547 	u32 nextdescaddress;
548 	u32 nextdescaddress64;
549 
550 	u32 reserve_pass_pcie_mm_limit[4];
551 } __packed;
552 
553 struct rx_desc_8821ae {
554 	u32 length:14;
555 	u32 crc32:1;
556 	u32 icverror:1;
557 	u32 drv_infosize:4;
558 	u32 security:3;
559 	u32 qos:1;
560 	u32 shift:2;
561 	u32 phystatus:1;
562 	u32 swdec:1;
563 	u32 lastseg:1;
564 	u32 firstseg:1;
565 	u32 eor:1;
566 	u32 own:1;
567 
568 	u32 macid:6;
569 	u32 tid:4;
570 	u32 hwrsvd:5;
571 	u32 paggr:1;
572 	u32 faggr:1;
573 	u32 a1_fit:4;
574 	u32 a2_fit:4;
575 	u32 pam:1;
576 	u32 pwr:1;
577 	u32 moredata:1;
578 	u32 morefrag:1;
579 	u32 type:2;
580 	u32 mc:1;
581 	u32 bc:1;
582 
583 	u32 seq:12;
584 	u32 frag:4;
585 	u32 nextpktlen:14;
586 	u32 nextind:1;
587 	u32 rsvd:1;
588 
589 	u32 rxmcs:6;
590 	u32 rxht:1;
591 	u32 amsdu:1;
592 	u32 splcp:1;
593 	u32 bandwidth:1;
594 	u32 htc:1;
595 	u32 tcpchk_rpt:1;
596 	u32 ipcchk_rpt:1;
597 	u32 tcpchk_valid:1;
598 	u32 hwpcerr:1;
599 	u32 hwpcind:1;
600 	u32 iv0:16;
601 
602 	u32 iv1;
603 
604 	u32 tsfl;
605 
606 	u32 bufferaddress;
607 	u32 bufferaddress64;
608 
609 } __packed;
610 
611 void rtl8821ae_tx_fill_desc(struct ieee80211_hw *hw,
612 			    struct ieee80211_hdr *hdr, u8 *pdesc_tx, u8 *txbd,
613 			    struct ieee80211_tx_info *info,
614 			    struct ieee80211_sta *sta,
615 			    struct sk_buff *skb,
616 			    u8 hw_queue, struct rtl_tcb_desc *ptcb_desc);
617 bool rtl8821ae_rx_query_desc(struct ieee80211_hw *hw,
618 			     struct rtl_stats *status,
619 			     struct ieee80211_rx_status *rx_status,
620 			     u8 *pdesc, struct sk_buff *skb);
621 void rtl8821ae_set_desc(struct ieee80211_hw *hw, u8 *pdesc,
622 			bool istx, u8 desc_name, u8 *val);
623 u64 rtl8821ae_get_desc(struct ieee80211_hw *hw,
624 		       u8 *pdesc, bool istx, u8 desc_name);
625 bool rtl8821ae_is_tx_desc_closed(struct ieee80211_hw *hw,
626 				 u8 hw_queue, u16 index);
627 void rtl8821ae_tx_polling(struct ieee80211_hw *hw, u8 hw_queue);
628 void rtl8821ae_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc,
629 			       bool firstseg, bool lastseg,
630 			       struct sk_buff *skb);
631 u32 rtl8821ae_rx_command_packet(struct ieee80211_hw *hw,
632 				const struct rtl_stats *status,
633 				struct sk_buff *skb);
634 #endif
635