1 /****************************************************************************** 2 * 3 * Copyright(c) 2009-2010 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * The full GNU General Public License is included in this distribution in the 15 * file called LICENSE. 16 * 17 * Contact Information: 18 * wlanfae <wlanfae@realtek.com> 19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, 20 * Hsinchu 300, Taiwan. 21 * 22 * Larry Finger <Larry.Finger@lwfinger.net> 23 * 24 *****************************************************************************/ 25 26 #include "../wifi.h" 27 #include "../pci.h" 28 #include "../base.h" 29 #include "../stats.h" 30 #include "reg.h" 31 #include "def.h" 32 #include "trx.h" 33 #include "led.h" 34 #include "dm.h" 35 #include "phy.h" 36 #include "fw.h" 37 38 static u8 _rtl8821ae_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue) 39 { 40 __le16 fc = rtl_get_fc(skb); 41 42 if (unlikely(ieee80211_is_beacon(fc))) 43 return QSLT_BEACON; 44 if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc)) 45 return QSLT_MGNT; 46 47 return skb->priority; 48 } 49 50 static u16 odm_cfo(s8 value) 51 { 52 int ret_val; 53 54 if (value < 0) { 55 ret_val = 0 - value; 56 ret_val = (ret_val << 1) + (ret_val >> 1); 57 /* set bit12 as 1 for negative cfo */ 58 ret_val = ret_val | BIT(12); 59 } else { 60 ret_val = value; 61 ret_val = (ret_val << 1) + (ret_val >> 1); 62 } 63 return ret_val; 64 } 65 66 static u8 _rtl8821ae_evm_dbm_jaguar(s8 value) 67 { 68 s8 ret_val = value; 69 70 /* -33dB~0dB to 33dB ~ 0dB*/ 71 if (ret_val == -128) 72 ret_val = 127; 73 else if (ret_val < 0) 74 ret_val = 0 - ret_val; 75 76 ret_val = ret_val >> 1; 77 return ret_val; 78 } 79 80 static void query_rxphystatus(struct ieee80211_hw *hw, 81 struct rtl_stats *pstatus, u8 *pdesc, 82 struct rx_fwinfo_8821ae *p_drvinfo, 83 bool bpacket_match_bssid, 84 bool bpacket_toself, bool packet_beacon) 85 { 86 struct rtl_priv *rtlpriv = rtl_priv(hw); 87 struct phy_status_rpt *p_phystrpt = (struct phy_status_rpt *)p_drvinfo; 88 struct rtl_dm *rtldm = rtl_dm(rtl_priv(hw)); 89 struct rtl_phy *rtlphy = &rtlpriv->phy; 90 s8 rx_pwr_all = 0, rx_pwr[4]; 91 u8 rf_rx_num = 0, evm, evmdbm, pwdb_all; 92 u8 i, max_spatial_stream; 93 u32 rssi, total_rssi = 0; 94 bool is_cck = pstatus->is_cck; 95 u8 lan_idx, vga_idx; 96 97 /* Record it for next packet processing */ 98 pstatus->packet_matchbssid = bpacket_match_bssid; 99 pstatus->packet_toself = bpacket_toself; 100 pstatus->packet_beacon = packet_beacon; 101 pstatus->rx_mimo_signalquality[0] = -1; 102 pstatus->rx_mimo_signalquality[1] = -1; 103 104 if (is_cck) { 105 u8 cck_highpwr; 106 u8 cck_agc_rpt; 107 108 cck_agc_rpt = p_phystrpt->cfosho[0]; 109 110 /* (1)Hardware does not provide RSSI for CCK 111 * (2)PWDB, Average PWDB cacluated by 112 * hardware (for rate adaptive) 113 */ 114 cck_highpwr = (u8)rtlphy->cck_high_power; 115 116 lan_idx = ((cck_agc_rpt & 0xE0) >> 5); 117 vga_idx = (cck_agc_rpt & 0x1f); 118 if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8812AE) { 119 switch (lan_idx) { 120 case 7: 121 if (vga_idx <= 27) 122 /*VGA_idx = 27~2*/ 123 rx_pwr_all = -100 + 2*(27-vga_idx); 124 else 125 rx_pwr_all = -100; 126 break; 127 case 6: 128 /*VGA_idx = 2~0*/ 129 rx_pwr_all = -48 + 2*(2-vga_idx); 130 break; 131 case 5: 132 /*VGA_idx = 7~5*/ 133 rx_pwr_all = -42 + 2*(7-vga_idx); 134 break; 135 case 4: 136 /*VGA_idx = 7~4*/ 137 rx_pwr_all = -36 + 2*(7-vga_idx); 138 break; 139 case 3: 140 /*VGA_idx = 7~0*/ 141 rx_pwr_all = -24 + 2*(7-vga_idx); 142 break; 143 case 2: 144 if (cck_highpwr) 145 /*VGA_idx = 5~0*/ 146 rx_pwr_all = -12 + 2*(5-vga_idx); 147 else 148 rx_pwr_all = -6 + 2*(5-vga_idx); 149 break; 150 case 1: 151 rx_pwr_all = 8-2*vga_idx; 152 break; 153 case 0: 154 rx_pwr_all = 14-2*vga_idx; 155 break; 156 default: 157 break; 158 } 159 rx_pwr_all += 6; 160 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all); 161 if (!cck_highpwr) { 162 if (pwdb_all >= 80) 163 pwdb_all = 164 ((pwdb_all - 80)<<1) + 165 ((pwdb_all - 80)>>1) + 80; 166 else if ((pwdb_all <= 78) && (pwdb_all >= 20)) 167 pwdb_all += 3; 168 if (pwdb_all > 100) 169 pwdb_all = 100; 170 } 171 } else { /* 8821 */ 172 s8 pout = -6; 173 174 switch (lan_idx) { 175 case 5: 176 rx_pwr_all = pout - 32 - (2*vga_idx); 177 break; 178 case 4: 179 rx_pwr_all = pout - 24 - (2*vga_idx); 180 break; 181 case 2: 182 rx_pwr_all = pout - 11 - (2*vga_idx); 183 break; 184 case 1: 185 rx_pwr_all = pout + 5 - (2*vga_idx); 186 break; 187 case 0: 188 rx_pwr_all = pout + 21 - (2*vga_idx); 189 break; 190 } 191 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all); 192 } 193 194 pstatus->rx_pwdb_all = pwdb_all; 195 pstatus->recvsignalpower = rx_pwr_all; 196 197 /* (3) Get Signal Quality (EVM) */ 198 if (bpacket_match_bssid) { 199 u8 sq; 200 201 if (pstatus->rx_pwdb_all > 40) { 202 sq = 100; 203 } else { 204 sq = p_phystrpt->pwdb_all; 205 if (sq > 64) 206 sq = 0; 207 else if (sq < 20) 208 sq = 100; 209 else 210 sq = ((64 - sq) * 100) / 44; 211 } 212 213 pstatus->signalquality = sq; 214 pstatus->rx_mimo_signalquality[0] = sq; 215 pstatus->rx_mimo_signalquality[1] = -1; 216 } 217 } else { 218 /* (1)Get RSSI for HT rate */ 219 for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) { 220 /* we will judge RF RX path now. */ 221 if (rtlpriv->dm.rfpath_rxenable[i]) 222 rf_rx_num++; 223 224 rx_pwr[i] = (p_phystrpt->gain_trsw[i] & 0x7f) - 110; 225 226 /* Translate DBM to percentage. */ 227 rssi = rtl_query_rxpwrpercentage(rx_pwr[i]); 228 total_rssi += rssi; 229 230 /* Get Rx snr value in DB */ 231 pstatus->rx_snr[i] = p_phystrpt->rxsnr[i] / 2; 232 rtlpriv->stats.rx_snr_db[i] = p_phystrpt->rxsnr[i] / 2; 233 234 pstatus->cfo_short[i] = odm_cfo(p_phystrpt->cfosho[i]); 235 pstatus->cfo_tail[i] = odm_cfo(p_phystrpt->cfotail[i]); 236 /* Record Signal Strength for next packet */ 237 pstatus->rx_mimo_signalstrength[i] = (u8)rssi; 238 } 239 240 /* (2)PWDB, Average PWDB cacluated by 241 * hardware (for rate adaptive) 242 */ 243 rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110; 244 245 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all); 246 pstatus->rx_pwdb_all = pwdb_all; 247 pstatus->rxpower = rx_pwr_all; 248 pstatus->recvsignalpower = rx_pwr_all; 249 250 /* (3)EVM of HT rate */ 251 if ((pstatus->is_ht && pstatus->rate >= DESC_RATEMCS8 && 252 pstatus->rate <= DESC_RATEMCS15) || 253 (pstatus->is_vht && 254 pstatus->rate >= DESC_RATEVHT2SS_MCS0 && 255 pstatus->rate <= DESC_RATEVHT2SS_MCS9)) 256 max_spatial_stream = 2; 257 else 258 max_spatial_stream = 1; 259 260 for (i = 0; i < max_spatial_stream; i++) { 261 evm = rtl_evm_db_to_percentage(p_phystrpt->rxevm[i]); 262 evmdbm = _rtl8821ae_evm_dbm_jaguar(p_phystrpt->rxevm[i]); 263 264 if (bpacket_match_bssid) { 265 /* Fill value in RFD, Get the first 266 * spatial stream only 267 */ 268 if (i == 0) 269 pstatus->signalquality = evm; 270 pstatus->rx_mimo_signalquality[i] = evm; 271 pstatus->rx_mimo_evm_dbm[i] = evmdbm; 272 } 273 } 274 if (bpacket_match_bssid) { 275 for (i = RF90_PATH_A; i <= RF90_PATH_B; i++) 276 rtl_priv(hw)->dm.cfo_tail[i] = 277 (s8)p_phystrpt->cfotail[i]; 278 279 rtl_priv(hw)->dm.packet_count++; 280 } 281 } 282 283 /* UI BSS List signal strength(in percentage), 284 * make it good looking, from 0~100. 285 */ 286 if (is_cck) 287 pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw, 288 pwdb_all)); 289 else if (rf_rx_num != 0) 290 pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw, 291 total_rssi /= rf_rx_num)); 292 /*HW antenna diversity*/ 293 rtldm->fat_table.antsel_rx_keep_0 = p_phystrpt->antidx_anta; 294 rtldm->fat_table.antsel_rx_keep_1 = p_phystrpt->antidx_antb; 295 } 296 297 static void translate_rx_signal_stuff(struct ieee80211_hw *hw, 298 struct sk_buff *skb, 299 struct rtl_stats *pstatus, u8 *pdesc, 300 struct rx_fwinfo_8821ae *p_drvinfo) 301 { 302 struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); 303 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw)); 304 struct ieee80211_hdr *hdr; 305 u8 *tmp_buf; 306 u8 *praddr; 307 u8 *psaddr; 308 __le16 fc; 309 bool packet_matchbssid, packet_toself, packet_beacon; 310 311 tmp_buf = skb->data + pstatus->rx_drvinfo_size + pstatus->rx_bufshift; 312 313 hdr = (struct ieee80211_hdr *)tmp_buf; 314 fc = hdr->frame_control; 315 praddr = hdr->addr1; 316 psaddr = ieee80211_get_SA(hdr); 317 ether_addr_copy(pstatus->psaddr, psaddr); 318 319 packet_matchbssid = (!ieee80211_is_ctl(fc) && 320 (ether_addr_equal(mac->bssid, 321 ieee80211_has_tods(fc) ? 322 hdr->addr1 : 323 ieee80211_has_fromds(fc) ? 324 hdr->addr2 : hdr->addr3)) && 325 (!pstatus->hwerror) && 326 (!pstatus->crc) && (!pstatus->icv)); 327 328 packet_toself = packet_matchbssid && 329 (ether_addr_equal(praddr, rtlefuse->dev_addr)); 330 331 if (ieee80211_is_beacon(hdr->frame_control)) 332 packet_beacon = true; 333 else 334 packet_beacon = false; 335 336 if (packet_beacon && packet_matchbssid) 337 rtl_priv(hw)->dm.dbginfo.num_qry_beacon_pkt++; 338 339 if (packet_matchbssid && 340 ieee80211_is_data_qos(hdr->frame_control) && 341 !is_multicast_ether_addr(ieee80211_get_DA(hdr))) { 342 struct ieee80211_qos_hdr *hdr_qos = 343 (struct ieee80211_qos_hdr *)tmp_buf; 344 u16 tid = le16_to_cpu(hdr_qos->qos_ctrl) & 0xf; 345 346 if (tid != 0 && tid != 3) 347 rtl_priv(hw)->dm.dbginfo.num_non_be_pkt++; 348 } 349 350 query_rxphystatus(hw, pstatus, pdesc, p_drvinfo, 351 packet_matchbssid, packet_toself, 352 packet_beacon); 353 /*_rtl8821ae_smart_antenna(hw, pstatus); */ 354 rtl_process_phyinfo(hw, tmp_buf, pstatus); 355 } 356 357 static void _rtl8821ae_insert_emcontent(struct rtl_tcb_desc *ptcb_desc, 358 u8 *virtualaddress) 359 { 360 u32 dwtmp = 0; 361 362 memset(virtualaddress, 0, 8); 363 364 SET_EARLYMODE_PKTNUM(virtualaddress, ptcb_desc->empkt_num); 365 if (ptcb_desc->empkt_num == 1) { 366 dwtmp = ptcb_desc->empkt_len[0]; 367 } else { 368 dwtmp = ptcb_desc->empkt_len[0]; 369 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4; 370 dwtmp += ptcb_desc->empkt_len[1]; 371 } 372 SET_EARLYMODE_LEN0(virtualaddress, dwtmp); 373 374 if (ptcb_desc->empkt_num <= 3) { 375 dwtmp = ptcb_desc->empkt_len[2]; 376 } else { 377 dwtmp = ptcb_desc->empkt_len[2]; 378 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4; 379 dwtmp += ptcb_desc->empkt_len[3]; 380 } 381 SET_EARLYMODE_LEN1(virtualaddress, dwtmp); 382 if (ptcb_desc->empkt_num <= 5) { 383 dwtmp = ptcb_desc->empkt_len[4]; 384 } else { 385 dwtmp = ptcb_desc->empkt_len[4]; 386 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4; 387 dwtmp += ptcb_desc->empkt_len[5]; 388 } 389 SET_EARLYMODE_LEN2_1(virtualaddress, dwtmp & 0xF); 390 SET_EARLYMODE_LEN2_2(virtualaddress, dwtmp >> 4); 391 if (ptcb_desc->empkt_num <= 7) { 392 dwtmp = ptcb_desc->empkt_len[6]; 393 } else { 394 dwtmp = ptcb_desc->empkt_len[6]; 395 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4; 396 dwtmp += ptcb_desc->empkt_len[7]; 397 } 398 SET_EARLYMODE_LEN3(virtualaddress, dwtmp); 399 if (ptcb_desc->empkt_num <= 9) { 400 dwtmp = ptcb_desc->empkt_len[8]; 401 } else { 402 dwtmp = ptcb_desc->empkt_len[8]; 403 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4; 404 dwtmp += ptcb_desc->empkt_len[9]; 405 } 406 SET_EARLYMODE_LEN4(virtualaddress, dwtmp); 407 } 408 409 static bool rtl8821ae_get_rxdesc_is_ht(struct ieee80211_hw *hw, u8 *pdesc) 410 { 411 struct rtl_priv *rtlpriv = rtl_priv(hw); 412 u8 rx_rate = 0; 413 414 rx_rate = GET_RX_DESC_RXMCS(pdesc); 415 416 RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD, "rx_rate=0x%02x.\n", rx_rate); 417 418 if ((rx_rate >= DESC_RATEMCS0) && (rx_rate <= DESC_RATEMCS15)) 419 return true; 420 return false; 421 } 422 423 static bool rtl8821ae_get_rxdesc_is_vht(struct ieee80211_hw *hw, u8 *pdesc) 424 { 425 struct rtl_priv *rtlpriv = rtl_priv(hw); 426 u8 rx_rate = 0; 427 428 rx_rate = GET_RX_DESC_RXMCS(pdesc); 429 430 RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD, "rx_rate=0x%02x.\n", rx_rate); 431 432 if (rx_rate >= DESC_RATEVHT1SS_MCS0) 433 return true; 434 return false; 435 } 436 437 static u8 rtl8821ae_get_rx_vht_nss(struct ieee80211_hw *hw, u8 *pdesc) 438 { 439 u8 rx_rate = 0; 440 u8 vht_nss = 0; 441 442 rx_rate = GET_RX_DESC_RXMCS(pdesc); 443 if ((rx_rate >= DESC_RATEVHT1SS_MCS0) && 444 (rx_rate <= DESC_RATEVHT1SS_MCS9)) 445 vht_nss = 1; 446 else if ((rx_rate >= DESC_RATEVHT2SS_MCS0) && 447 (rx_rate <= DESC_RATEVHT2SS_MCS9)) 448 vht_nss = 2; 449 450 return vht_nss; 451 } 452 453 bool rtl8821ae_rx_query_desc(struct ieee80211_hw *hw, 454 struct rtl_stats *status, 455 struct ieee80211_rx_status *rx_status, 456 u8 *pdesc, struct sk_buff *skb) 457 { 458 struct rtl_priv *rtlpriv = rtl_priv(hw); 459 struct rx_fwinfo_8821ae *p_drvinfo; 460 struct ieee80211_hdr *hdr; 461 462 u32 phystatus = GET_RX_DESC_PHYST(pdesc); 463 464 status->length = (u16)GET_RX_DESC_PKT_LEN(pdesc); 465 status->rx_drvinfo_size = (u8)GET_RX_DESC_DRV_INFO_SIZE(pdesc) * 466 RX_DRV_INFO_SIZE_UNIT; 467 status->rx_bufshift = (u8)(GET_RX_DESC_SHIFT(pdesc) & 0x03); 468 status->icv = (u16)GET_RX_DESC_ICV(pdesc); 469 status->crc = (u16)GET_RX_DESC_CRC32(pdesc); 470 status->hwerror = (status->crc | status->icv); 471 status->decrypted = !GET_RX_DESC_SWDEC(pdesc); 472 status->rate = (u8)GET_RX_DESC_RXMCS(pdesc); 473 status->shortpreamble = (u16)GET_RX_DESC_SPLCP(pdesc); 474 status->isampdu = (bool)(GET_RX_DESC_PAGGR(pdesc) == 1); 475 status->isfirst_ampdu = (bool)(GET_RX_DESC_PAGGR(pdesc) == 1); 476 status->timestamp_low = GET_RX_DESC_TSFL(pdesc); 477 status->rx_packet_bw = GET_RX_DESC_BW(pdesc); 478 status->macid = GET_RX_DESC_MACID(pdesc); 479 status->is_short_gi = !(bool)GET_RX_DESC_SPLCP(pdesc); 480 status->is_ht = rtl8821ae_get_rxdesc_is_ht(hw, pdesc); 481 status->is_vht = rtl8821ae_get_rxdesc_is_vht(hw, pdesc); 482 status->vht_nss = rtl8821ae_get_rx_vht_nss(hw, pdesc); 483 status->is_cck = RTL8821AE_RX_HAL_IS_CCK_RATE(status->rate); 484 485 RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD, 486 "rx_packet_bw=%s,is_ht %d, is_vht %d, vht_nss=%d,is_short_gi %d.\n", 487 (status->rx_packet_bw == 2) ? "80M" : 488 (status->rx_packet_bw == 1) ? "40M" : "20M", 489 status->is_ht, status->is_vht, status->vht_nss, 490 status->is_short_gi); 491 492 if (GET_RX_STATUS_DESC_RPT_SEL(pdesc)) 493 status->packet_report_type = C2H_PACKET; 494 else 495 status->packet_report_type = NORMAL_RX; 496 497 if (GET_RX_STATUS_DESC_PATTERN_MATCH(pdesc)) 498 status->wake_match = BIT(2); 499 else if (GET_RX_STATUS_DESC_MAGIC_MATCH(pdesc)) 500 status->wake_match = BIT(1); 501 else if (GET_RX_STATUS_DESC_UNICAST_MATCH(pdesc)) 502 status->wake_match = BIT(0); 503 else 504 status->wake_match = 0; 505 506 if (status->wake_match) 507 RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD, 508 "GGGGGGGGGGGGGet Wakeup Packet!! WakeMatch=%d\n", 509 status->wake_match); 510 rx_status->freq = hw->conf.chandef.chan->center_freq; 511 rx_status->band = hw->conf.chandef.chan->band; 512 513 hdr = (struct ieee80211_hdr *)(skb->data + 514 status->rx_drvinfo_size + status->rx_bufshift); 515 516 if (status->crc) 517 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC; 518 519 if (status->rx_packet_bw == HT_CHANNEL_WIDTH_20_40) 520 rx_status->bw = RATE_INFO_BW_40; 521 else if (status->rx_packet_bw == HT_CHANNEL_WIDTH_80) 522 rx_status->bw = RATE_INFO_BW_80; 523 if (status->is_ht) 524 rx_status->encoding = RX_ENC_HT; 525 if (status->is_vht) 526 rx_status->encoding = RX_ENC_VHT; 527 528 if (status->is_short_gi) 529 rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 530 531 rx_status->nss = status->vht_nss; 532 rx_status->flag |= RX_FLAG_MACTIME_START; 533 534 /* hw will set status->decrypted true, if it finds the 535 * frame is open data frame or mgmt frame. 536 * So hw will not decryption robust managment frame 537 * for IEEE80211w but still set status->decrypted 538 * true, so here we should set it back to undecrypted 539 * for IEEE80211w frame, and mac80211 sw will help 540 * to decrypt it 541 */ 542 if (status->decrypted) { 543 if ((!_ieee80211_is_robust_mgmt_frame(hdr)) && 544 (ieee80211_has_protected(hdr->frame_control))) 545 rx_status->flag |= RX_FLAG_DECRYPTED; 546 else 547 rx_status->flag &= ~RX_FLAG_DECRYPTED; 548 } 549 550 /* rate_idx: index of data rate into band's 551 * supported rates or MCS index if HT rates 552 * are use (RX_FLAG_HT) 553 */ 554 rx_status->rate_idx = rtlwifi_rate_mapping(hw, status->is_ht, 555 status->is_vht, 556 status->rate); 557 558 rx_status->mactime = status->timestamp_low; 559 if (phystatus) { 560 p_drvinfo = (struct rx_fwinfo_8821ae *)(skb->data + 561 status->rx_bufshift); 562 563 translate_rx_signal_stuff(hw, skb, status, pdesc, p_drvinfo); 564 } 565 rx_status->signal = status->recvsignalpower + 10; 566 if (status->packet_report_type == TX_REPORT2) { 567 status->macid_valid_entry[0] = 568 GET_RX_RPT2_DESC_MACID_VALID_1(pdesc); 569 status->macid_valid_entry[1] = 570 GET_RX_RPT2_DESC_MACID_VALID_2(pdesc); 571 } 572 return true; 573 } 574 575 static u8 rtl8821ae_bw_mapping(struct ieee80211_hw *hw, 576 struct rtl_tcb_desc *ptcb_desc) 577 { 578 struct rtl_priv *rtlpriv = rtl_priv(hw); 579 struct rtl_phy *rtlphy = &rtlpriv->phy; 580 u8 bw_setting_of_desc = 0; 581 582 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, 583 "rtl8821ae_bw_mapping, current_chan_bw %d, packet_bw %d\n", 584 rtlphy->current_chan_bw, ptcb_desc->packet_bw); 585 586 if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_80) { 587 if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_80) 588 bw_setting_of_desc = 2; 589 else if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) 590 bw_setting_of_desc = 1; 591 else 592 bw_setting_of_desc = 0; 593 } else if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20_40) { 594 if ((ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) || 595 (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_80)) 596 bw_setting_of_desc = 1; 597 else 598 bw_setting_of_desc = 0; 599 } else { 600 bw_setting_of_desc = 0; 601 } 602 return bw_setting_of_desc; 603 } 604 605 static u8 rtl8821ae_sc_mapping(struct ieee80211_hw *hw, 606 struct rtl_tcb_desc *ptcb_desc) 607 { 608 struct rtl_priv *rtlpriv = rtl_priv(hw); 609 struct rtl_phy *rtlphy = &rtlpriv->phy; 610 struct rtl_mac *mac = rtl_mac(rtlpriv); 611 u8 sc_setting_of_desc = 0; 612 613 if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_80) { 614 if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_80) { 615 sc_setting_of_desc = VHT_DATA_SC_DONOT_CARE; 616 } else if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) { 617 if (mac->cur_80_prime_sc == 618 HAL_PRIME_CHNL_OFFSET_LOWER) 619 sc_setting_of_desc = 620 VHT_DATA_SC_40_LOWER_OF_80MHZ; 621 else if (mac->cur_80_prime_sc == 622 HAL_PRIME_CHNL_OFFSET_UPPER) 623 sc_setting_of_desc = 624 VHT_DATA_SC_40_UPPER_OF_80MHZ; 625 else 626 RT_TRACE(rtlpriv, COMP_SEND, DBG_LOUD, 627 "rtl8821ae_sc_mapping: Not Correct Primary40MHz Setting\n"); 628 } else { 629 if ((mac->cur_40_prime_sc == 630 HAL_PRIME_CHNL_OFFSET_LOWER) && 631 (mac->cur_80_prime_sc == 632 HAL_PRIME_CHNL_OFFSET_LOWER)) 633 sc_setting_of_desc = 634 VHT_DATA_SC_20_LOWEST_OF_80MHZ; 635 else if ((mac->cur_40_prime_sc == 636 HAL_PRIME_CHNL_OFFSET_UPPER) && 637 (mac->cur_80_prime_sc == 638 HAL_PRIME_CHNL_OFFSET_LOWER)) 639 sc_setting_of_desc = 640 VHT_DATA_SC_20_LOWER_OF_80MHZ; 641 else if ((mac->cur_40_prime_sc == 642 HAL_PRIME_CHNL_OFFSET_LOWER) && 643 (mac->cur_80_prime_sc == 644 HAL_PRIME_CHNL_OFFSET_UPPER)) 645 sc_setting_of_desc = 646 VHT_DATA_SC_20_UPPER_OF_80MHZ; 647 else if ((mac->cur_40_prime_sc == 648 HAL_PRIME_CHNL_OFFSET_UPPER) && 649 (mac->cur_80_prime_sc == 650 HAL_PRIME_CHNL_OFFSET_UPPER)) 651 sc_setting_of_desc = 652 VHT_DATA_SC_20_UPPERST_OF_80MHZ; 653 else 654 RT_TRACE(rtlpriv, COMP_SEND, DBG_LOUD, 655 "rtl8821ae_sc_mapping: Not Correct Primary40MHz Setting\n"); 656 } 657 } else if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20_40) { 658 if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) { 659 sc_setting_of_desc = VHT_DATA_SC_DONOT_CARE; 660 } else if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20) { 661 if (mac->cur_40_prime_sc == 662 HAL_PRIME_CHNL_OFFSET_UPPER) { 663 sc_setting_of_desc = 664 VHT_DATA_SC_20_UPPER_OF_80MHZ; 665 } else if (mac->cur_40_prime_sc == 666 HAL_PRIME_CHNL_OFFSET_LOWER){ 667 sc_setting_of_desc = 668 VHT_DATA_SC_20_LOWER_OF_80MHZ; 669 } else { 670 sc_setting_of_desc = VHT_DATA_SC_DONOT_CARE; 671 } 672 } 673 } else { 674 sc_setting_of_desc = VHT_DATA_SC_DONOT_CARE; 675 } 676 677 return sc_setting_of_desc; 678 } 679 680 void rtl8821ae_tx_fill_desc(struct ieee80211_hw *hw, 681 struct ieee80211_hdr *hdr, u8 *pdesc_tx, u8 *txbd, 682 struct ieee80211_tx_info *info, 683 struct ieee80211_sta *sta, 684 struct sk_buff *skb, 685 u8 hw_queue, struct rtl_tcb_desc *ptcb_desc) 686 { 687 struct rtl_priv *rtlpriv = rtl_priv(hw); 688 struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); 689 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 690 struct rtl_hal *rtlhal = rtl_hal(rtlpriv); 691 struct rtlwifi_tx_info *tx_info = rtl_tx_skb_cb_info(skb); 692 u8 *pdesc = (u8 *)pdesc_tx; 693 u16 seq_number; 694 __le16 fc = hdr->frame_control; 695 unsigned int buf_len = 0; 696 unsigned int skb_len = skb->len; 697 u8 fw_qsel = _rtl8821ae_map_hwqueue_to_fwqueue(skb, hw_queue); 698 bool firstseg = ((hdr->seq_ctrl & 699 cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0); 700 bool lastseg = ((hdr->frame_control & 701 cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0); 702 dma_addr_t mapping; 703 u8 short_gi = 0; 704 705 seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4; 706 rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc); 707 /* reserve 8 byte for AMPDU early mode */ 708 if (rtlhal->earlymode_enable) { 709 skb_push(skb, EM_HDR_LEN); 710 memset(skb->data, 0, EM_HDR_LEN); 711 } 712 buf_len = skb->len; 713 mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len, 714 PCI_DMA_TODEVICE); 715 if (pci_dma_mapping_error(rtlpci->pdev, mapping)) { 716 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, 717 "DMA mapping error\n"); 718 return; 719 } 720 CLEAR_PCI_TX_DESC_CONTENT(pdesc, sizeof(struct tx_desc_8821ae)); 721 if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) { 722 firstseg = true; 723 lastseg = true; 724 } 725 if (firstseg) { 726 if (rtlhal->earlymode_enable) { 727 SET_TX_DESC_PKT_OFFSET(pdesc, 1); 728 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN + 729 EM_HDR_LEN); 730 if (ptcb_desc->empkt_num) { 731 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, 732 "Insert 8 byte.pTcb->EMPktNum:%d\n", 733 ptcb_desc->empkt_num); 734 _rtl8821ae_insert_emcontent(ptcb_desc, 735 (u8 *)(skb->data)); 736 } 737 } else { 738 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN); 739 } 740 741 742 /* ptcb_desc->use_driver_rate = true; */ 743 SET_TX_DESC_TX_RATE(pdesc, ptcb_desc->hw_rate); 744 if (ptcb_desc->hw_rate > DESC_RATEMCS0) 745 short_gi = (ptcb_desc->use_shortgi) ? 1 : 0; 746 else 747 short_gi = (ptcb_desc->use_shortpreamble) ? 1 : 0; 748 749 SET_TX_DESC_DATA_SHORTGI(pdesc, short_gi); 750 751 if (info->flags & IEEE80211_TX_CTL_AMPDU) { 752 SET_TX_DESC_AGG_ENABLE(pdesc, 1); 753 SET_TX_DESC_MAX_AGG_NUM(pdesc, 0x1f); 754 } 755 SET_TX_DESC_SEQ(pdesc, seq_number); 756 SET_TX_DESC_RTS_ENABLE(pdesc, ((ptcb_desc->rts_enable && 757 !ptcb_desc->cts_enable) ? 1 : 0)); 758 SET_TX_DESC_HW_RTS_ENABLE(pdesc, 0); 759 SET_TX_DESC_CTS2SELF(pdesc, ((ptcb_desc->cts_enable) ? 1 : 0)); 760 761 SET_TX_DESC_RTS_RATE(pdesc, ptcb_desc->rts_rate); 762 SET_TX_DESC_RTS_SC(pdesc, ptcb_desc->rts_sc); 763 SET_TX_DESC_RTS_SHORT(pdesc, 764 ((ptcb_desc->rts_rate <= DESC_RATE54M) ? 765 (ptcb_desc->rts_use_shortpreamble ? 1 : 0) : 766 (ptcb_desc->rts_use_shortgi ? 1 : 0))); 767 768 if (ptcb_desc->tx_enable_sw_calc_duration) 769 SET_TX_DESC_NAV_USE_HDR(pdesc, 1); 770 771 SET_TX_DESC_DATA_BW(pdesc, 772 rtl8821ae_bw_mapping(hw, ptcb_desc)); 773 774 SET_TX_DESC_TX_SUB_CARRIER(pdesc, 775 rtl8821ae_sc_mapping(hw, ptcb_desc)); 776 777 SET_TX_DESC_LINIP(pdesc, 0); 778 SET_TX_DESC_PKT_SIZE(pdesc, (u16)skb_len); 779 if (sta) { 780 u8 ampdu_density = sta->ht_cap.ampdu_density; 781 782 SET_TX_DESC_AMPDU_DENSITY(pdesc, ampdu_density); 783 } 784 if (info->control.hw_key) { 785 struct ieee80211_key_conf *keyconf = 786 info->control.hw_key; 787 switch (keyconf->cipher) { 788 case WLAN_CIPHER_SUITE_WEP40: 789 case WLAN_CIPHER_SUITE_WEP104: 790 case WLAN_CIPHER_SUITE_TKIP: 791 SET_TX_DESC_SEC_TYPE(pdesc, 0x1); 792 break; 793 case WLAN_CIPHER_SUITE_CCMP: 794 SET_TX_DESC_SEC_TYPE(pdesc, 0x3); 795 break; 796 default: 797 SET_TX_DESC_SEC_TYPE(pdesc, 0x0); 798 break; 799 } 800 } 801 802 SET_TX_DESC_QUEUE_SEL(pdesc, fw_qsel); 803 SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F); 804 SET_TX_DESC_RTS_RATE_FB_LIMIT(pdesc, 0xF); 805 SET_TX_DESC_DISABLE_FB(pdesc, ptcb_desc->disable_ratefallback ? 806 1 : 0); 807 SET_TX_DESC_USE_RATE(pdesc, ptcb_desc->use_driver_rate ? 1 : 0); 808 809 if (ieee80211_is_data_qos(fc)) { 810 if (mac->rdg_en) { 811 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, 812 "Enable RDG function.\n"); 813 SET_TX_DESC_RDG_ENABLE(pdesc, 1); 814 SET_TX_DESC_HTC(pdesc, 1); 815 } 816 } 817 /* tx report */ 818 rtl_set_tx_report(ptcb_desc, pdesc, hw, tx_info); 819 } 820 821 SET_TX_DESC_FIRST_SEG(pdesc, (firstseg ? 1 : 0)); 822 SET_TX_DESC_LAST_SEG(pdesc, (lastseg ? 1 : 0)); 823 SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)buf_len); 824 SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping); 825 /* if (rtlpriv->dm.useramask) { */ 826 if (1) { 827 SET_TX_DESC_RATE_ID(pdesc, ptcb_desc->ratr_index); 828 SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id); 829 } else { 830 SET_TX_DESC_RATE_ID(pdesc, 0xC + ptcb_desc->ratr_index); 831 SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id); 832 } 833 if (!ieee80211_is_data_qos(fc)) { 834 SET_TX_DESC_HWSEQ_EN(pdesc, 1); 835 SET_TX_DESC_HWSEQ_SEL(pdesc, 0); 836 } 837 SET_TX_DESC_MORE_FRAG(pdesc, (lastseg ? 0 : 1)); 838 if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) || 839 is_broadcast_ether_addr(ieee80211_get_DA(hdr))) { 840 SET_TX_DESC_BMC(pdesc, 1); 841 } 842 843 rtl8821ae_dm_set_tx_ant_by_tx_info(hw, pdesc, ptcb_desc->mac_id); 844 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "\n"); 845 } 846 847 void rtl8821ae_tx_fill_cmddesc(struct ieee80211_hw *hw, 848 u8 *pdesc, bool firstseg, 849 bool lastseg, struct sk_buff *skb) 850 { 851 struct rtl_priv *rtlpriv = rtl_priv(hw); 852 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 853 u8 fw_queue = QSLT_BEACON; 854 855 dma_addr_t mapping = pci_map_single(rtlpci->pdev, 856 skb->data, skb->len, 857 PCI_DMA_TODEVICE); 858 859 if (pci_dma_mapping_error(rtlpci->pdev, mapping)) { 860 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, 861 "DMA mapping error\n"); 862 return; 863 } 864 CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE); 865 866 SET_TX_DESC_FIRST_SEG(pdesc, 1); 867 SET_TX_DESC_LAST_SEG(pdesc, 1); 868 869 SET_TX_DESC_PKT_SIZE((u8 *)pdesc, (u16)(skb->len)); 870 871 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN); 872 873 SET_TX_DESC_USE_RATE(pdesc, 1); 874 SET_TX_DESC_TX_RATE(pdesc, DESC_RATE1M); 875 SET_TX_DESC_DISABLE_FB(pdesc, 1); 876 877 SET_TX_DESC_DATA_BW(pdesc, 0); 878 879 SET_TX_DESC_HWSEQ_EN(pdesc, 1); 880 881 SET_TX_DESC_QUEUE_SEL(pdesc, fw_queue); 882 883 SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)(skb->len)); 884 885 SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping); 886 887 SET_TX_DESC_MACID(pdesc, 0); 888 889 SET_TX_DESC_OWN(pdesc, 1); 890 891 RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD, 892 "H2C Tx Cmd Content\n", 893 pdesc, TX_DESC_SIZE); 894 } 895 896 void rtl8821ae_set_desc(struct ieee80211_hw *hw, u8 *pdesc, 897 bool istx, u8 desc_name, u8 *val) 898 { 899 if (istx) { 900 switch (desc_name) { 901 case HW_DESC_OWN: 902 SET_TX_DESC_OWN(pdesc, 1); 903 break; 904 case HW_DESC_TX_NEXTDESC_ADDR: 905 SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *)val); 906 break; 907 default: 908 WARN_ONCE(true, 909 "rtl8821ae: ERR txdesc :%d not processed\n", 910 desc_name); 911 break; 912 } 913 } else { 914 switch (desc_name) { 915 case HW_DESC_RXOWN: 916 SET_RX_DESC_OWN(pdesc, 1); 917 break; 918 case HW_DESC_RXBUFF_ADDR: 919 SET_RX_DESC_BUFF_ADDR(pdesc, *(u32 *)val); 920 break; 921 case HW_DESC_RXPKT_LEN: 922 SET_RX_DESC_PKT_LEN(pdesc, *(u32 *)val); 923 break; 924 case HW_DESC_RXERO: 925 SET_RX_DESC_EOR(pdesc, 1); 926 break; 927 default: 928 WARN_ONCE(true, 929 "rtl8821ae: ERR rxdesc :%d not processed\n", 930 desc_name); 931 break; 932 } 933 } 934 } 935 936 u64 rtl8821ae_get_desc(struct ieee80211_hw *hw, 937 u8 *pdesc, bool istx, u8 desc_name) 938 { 939 u32 ret = 0; 940 941 if (istx) { 942 switch (desc_name) { 943 case HW_DESC_OWN: 944 ret = GET_TX_DESC_OWN(pdesc); 945 break; 946 case HW_DESC_TXBUFF_ADDR: 947 ret = GET_TX_DESC_TX_BUFFER_ADDRESS(pdesc); 948 break; 949 default: 950 WARN_ONCE(true, 951 "rtl8821ae: ERR txdesc :%d not processed\n", 952 desc_name); 953 break; 954 } 955 } else { 956 switch (desc_name) { 957 case HW_DESC_OWN: 958 ret = GET_RX_DESC_OWN(pdesc); 959 break; 960 case HW_DESC_RXPKT_LEN: 961 ret = GET_RX_DESC_PKT_LEN(pdesc); 962 break; 963 case HW_DESC_RXBUFF_ADDR: 964 ret = GET_RX_DESC_BUFF_ADDR(pdesc); 965 break; 966 default: 967 WARN_ONCE(true, 968 "rtl8821ae: ERR rxdesc :%d not processed\n", 969 desc_name); 970 break; 971 } 972 } 973 return ret; 974 } 975 976 bool rtl8821ae_is_tx_desc_closed(struct ieee80211_hw *hw, 977 u8 hw_queue, u16 index) 978 { 979 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 980 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue]; 981 u8 *entry = (u8 *)(&ring->desc[ring->idx]); 982 u8 own = (u8)rtl8821ae_get_desc(hw, entry, true, HW_DESC_OWN); 983 984 /** 985 *beacon packet will only use the first 986 *descriptor defautly,and the own may not 987 *be cleared by the hardware 988 */ 989 if (own) 990 return false; 991 return true; 992 } 993 994 void rtl8821ae_tx_polling(struct ieee80211_hw *hw, u8 hw_queue) 995 { 996 struct rtl_priv *rtlpriv = rtl_priv(hw); 997 998 if (hw_queue == BEACON_QUEUE) { 999 rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4)); 1000 } else { 1001 rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, 1002 BIT(0) << (hw_queue)); 1003 } 1004 } 1005