1 /****************************************************************************** 2 * 3 * Copyright(c) 2009-2010 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * The full GNU General Public License is included in this distribution in the 15 * file called LICENSE. 16 * 17 * Contact Information: 18 * wlanfae <wlanfae@realtek.com> 19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, 20 * Hsinchu 300, Taiwan. 21 * 22 * Larry Finger <Larry.Finger@lwfinger.net> 23 * 24 *****************************************************************************/ 25 26 #include "../wifi.h" 27 #include "../pci.h" 28 #include "../base.h" 29 #include "../stats.h" 30 #include "reg.h" 31 #include "def.h" 32 #include "trx.h" 33 #include "led.h" 34 #include "dm.h" 35 #include "phy.h" 36 #include "fw.h" 37 38 static u8 _rtl8821ae_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue) 39 { 40 __le16 fc = rtl_get_fc(skb); 41 42 if (unlikely(ieee80211_is_beacon(fc))) 43 return QSLT_BEACON; 44 if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc)) 45 return QSLT_MGNT; 46 47 return skb->priority; 48 } 49 50 static u16 odm_cfo(s8 value) 51 { 52 int ret_val; 53 54 if (value < 0) { 55 ret_val = 0 - value; 56 ret_val = (ret_val << 1) + (ret_val >> 1); 57 /* set bit12 as 1 for negative cfo */ 58 ret_val = ret_val | BIT(12); 59 } else { 60 ret_val = value; 61 ret_val = (ret_val << 1) + (ret_val >> 1); 62 } 63 return ret_val; 64 } 65 66 static u8 _rtl8821ae_evm_dbm_jaguar(s8 value) 67 { 68 s8 ret_val = value; 69 70 /* -33dB~0dB to 33dB ~ 0dB*/ 71 if (ret_val == -128) 72 ret_val = 127; 73 else if (ret_val < 0) 74 ret_val = 0 - ret_val; 75 76 ret_val = ret_val >> 1; 77 return ret_val; 78 } 79 80 static void query_rxphystatus(struct ieee80211_hw *hw, 81 struct rtl_stats *pstatus, u8 *pdesc, 82 struct rx_fwinfo_8821ae *p_drvinfo, 83 bool bpacket_match_bssid, 84 bool bpacket_toself, bool packet_beacon) 85 { 86 struct rtl_priv *rtlpriv = rtl_priv(hw); 87 struct phy_status_rpt *p_phystrpt = (struct phy_status_rpt *)p_drvinfo; 88 struct rtl_dm *rtldm = rtl_dm(rtl_priv(hw)); 89 struct rtl_phy *rtlphy = &rtlpriv->phy; 90 s8 rx_pwr_all = 0, rx_pwr[4]; 91 u8 rf_rx_num = 0, evm, evmdbm, pwdb_all; 92 u8 i, max_spatial_stream; 93 u32 rssi, total_rssi = 0; 94 bool is_cck = pstatus->is_cck; 95 u8 lan_idx, vga_idx; 96 97 /* Record it for next packet processing */ 98 pstatus->packet_matchbssid = bpacket_match_bssid; 99 pstatus->packet_toself = bpacket_toself; 100 pstatus->packet_beacon = packet_beacon; 101 pstatus->rx_mimo_signalquality[0] = -1; 102 pstatus->rx_mimo_signalquality[1] = -1; 103 104 if (is_cck) { 105 u8 cck_highpwr; 106 u8 cck_agc_rpt; 107 108 cck_agc_rpt = p_phystrpt->cfosho[0]; 109 110 /* (1)Hardware does not provide RSSI for CCK 111 * (2)PWDB, Average PWDB cacluated by 112 * hardware (for rate adaptive) 113 */ 114 cck_highpwr = (u8)rtlphy->cck_high_power; 115 116 lan_idx = ((cck_agc_rpt & 0xE0) >> 5); 117 vga_idx = (cck_agc_rpt & 0x1f); 118 if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8812AE) { 119 switch (lan_idx) { 120 case 7: 121 if (vga_idx <= 27) 122 /*VGA_idx = 27~2*/ 123 rx_pwr_all = -100 + 2*(27-vga_idx); 124 else 125 rx_pwr_all = -100; 126 break; 127 case 6: 128 /*VGA_idx = 2~0*/ 129 rx_pwr_all = -48 + 2*(2-vga_idx); 130 break; 131 case 5: 132 /*VGA_idx = 7~5*/ 133 rx_pwr_all = -42 + 2*(7-vga_idx); 134 break; 135 case 4: 136 /*VGA_idx = 7~4*/ 137 rx_pwr_all = -36 + 2*(7-vga_idx); 138 break; 139 case 3: 140 /*VGA_idx = 7~0*/ 141 rx_pwr_all = -24 + 2*(7-vga_idx); 142 break; 143 case 2: 144 if (cck_highpwr) 145 /*VGA_idx = 5~0*/ 146 rx_pwr_all = -12 + 2*(5-vga_idx); 147 else 148 rx_pwr_all = -6 + 2*(5-vga_idx); 149 break; 150 case 1: 151 rx_pwr_all = 8-2*vga_idx; 152 break; 153 case 0: 154 rx_pwr_all = 14-2*vga_idx; 155 break; 156 default: 157 break; 158 } 159 rx_pwr_all += 6; 160 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all); 161 if (!cck_highpwr) { 162 if (pwdb_all >= 80) 163 pwdb_all = 164 ((pwdb_all - 80)<<1) + 165 ((pwdb_all - 80)>>1) + 80; 166 else if ((pwdb_all <= 78) && (pwdb_all >= 20)) 167 pwdb_all += 3; 168 if (pwdb_all > 100) 169 pwdb_all = 100; 170 } 171 } else { /* 8821 */ 172 s8 pout = -6; 173 174 switch (lan_idx) { 175 case 5: 176 rx_pwr_all = pout - 32 - (2*vga_idx); 177 break; 178 case 4: 179 rx_pwr_all = pout - 24 - (2*vga_idx); 180 break; 181 case 2: 182 rx_pwr_all = pout - 11 - (2*vga_idx); 183 break; 184 case 1: 185 rx_pwr_all = pout + 5 - (2*vga_idx); 186 break; 187 case 0: 188 rx_pwr_all = pout + 21 - (2*vga_idx); 189 break; 190 } 191 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all); 192 } 193 194 pstatus->rx_pwdb_all = pwdb_all; 195 pstatus->recvsignalpower = rx_pwr_all; 196 197 /* (3) Get Signal Quality (EVM) */ 198 if (bpacket_match_bssid) { 199 u8 sq; 200 201 if (pstatus->rx_pwdb_all > 40) { 202 sq = 100; 203 } else { 204 sq = p_phystrpt->pwdb_all; 205 if (sq > 64) 206 sq = 0; 207 else if (sq < 20) 208 sq = 100; 209 else 210 sq = ((64 - sq) * 100) / 44; 211 } 212 213 pstatus->signalquality = sq; 214 pstatus->rx_mimo_signalquality[0] = sq; 215 pstatus->rx_mimo_signalquality[1] = -1; 216 } 217 } else { 218 /* (1)Get RSSI for HT rate */ 219 for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) { 220 /* we will judge RF RX path now. */ 221 if (rtlpriv->dm.rfpath_rxenable[i]) 222 rf_rx_num++; 223 224 rx_pwr[i] = (p_phystrpt->gain_trsw[i] & 0x7f) - 110; 225 226 /* Translate DBM to percentage. */ 227 rssi = rtl_query_rxpwrpercentage(rx_pwr[i]); 228 total_rssi += rssi; 229 230 /* Get Rx snr value in DB */ 231 pstatus->rx_snr[i] = p_phystrpt->rxsnr[i] / 2; 232 rtlpriv->stats.rx_snr_db[i] = p_phystrpt->rxsnr[i] / 2; 233 234 pstatus->cfo_short[i] = odm_cfo(p_phystrpt->cfosho[i]); 235 pstatus->cfo_tail[i] = odm_cfo(p_phystrpt->cfotail[i]); 236 /* Record Signal Strength for next packet */ 237 pstatus->rx_mimo_signalstrength[i] = (u8)rssi; 238 } 239 240 /* (2)PWDB, Average PWDB cacluated by 241 * hardware (for rate adaptive) 242 */ 243 rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110; 244 245 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all); 246 pstatus->rx_pwdb_all = pwdb_all; 247 pstatus->rxpower = rx_pwr_all; 248 pstatus->recvsignalpower = rx_pwr_all; 249 250 /* (3)EVM of HT rate */ 251 if ((pstatus->is_ht && pstatus->rate >= DESC_RATEMCS8 && 252 pstatus->rate <= DESC_RATEMCS15) || 253 (pstatus->is_vht && 254 pstatus->rate >= DESC_RATEVHT2SS_MCS0 && 255 pstatus->rate <= DESC_RATEVHT2SS_MCS9)) 256 max_spatial_stream = 2; 257 else 258 max_spatial_stream = 1; 259 260 for (i = 0; i < max_spatial_stream; i++) { 261 evm = rtl_evm_db_to_percentage(p_phystrpt->rxevm[i]); 262 evmdbm = _rtl8821ae_evm_dbm_jaguar(p_phystrpt->rxevm[i]); 263 264 if (bpacket_match_bssid) { 265 /* Fill value in RFD, Get the first 266 * spatial stream only 267 */ 268 if (i == 0) 269 pstatus->signalquality = evm; 270 pstatus->rx_mimo_signalquality[i] = evm; 271 pstatus->rx_mimo_evm_dbm[i] = evmdbm; 272 } 273 } 274 if (bpacket_match_bssid) { 275 for (i = RF90_PATH_A; i <= RF90_PATH_B; i++) 276 rtl_priv(hw)->dm.cfo_tail[i] = 277 (s8)p_phystrpt->cfotail[i]; 278 279 rtl_priv(hw)->dm.packet_count++; 280 } 281 } 282 283 /* UI BSS List signal strength(in percentage), 284 * make it good looking, from 0~100. 285 */ 286 if (is_cck) 287 pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw, 288 pwdb_all)); 289 else if (rf_rx_num != 0) 290 pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw, 291 total_rssi /= rf_rx_num)); 292 /*HW antenna diversity*/ 293 rtldm->fat_table.antsel_rx_keep_0 = p_phystrpt->antidx_anta; 294 rtldm->fat_table.antsel_rx_keep_1 = p_phystrpt->antidx_antb; 295 } 296 297 static void translate_rx_signal_stuff(struct ieee80211_hw *hw, 298 struct sk_buff *skb, 299 struct rtl_stats *pstatus, u8 *pdesc, 300 struct rx_fwinfo_8821ae *p_drvinfo) 301 { 302 struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); 303 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw)); 304 struct ieee80211_hdr *hdr; 305 u8 *tmp_buf; 306 u8 *praddr; 307 u8 *psaddr; 308 __le16 fc; 309 u16 type; 310 bool packet_matchbssid, packet_toself, packet_beacon; 311 312 tmp_buf = skb->data + pstatus->rx_drvinfo_size + pstatus->rx_bufshift; 313 314 hdr = (struct ieee80211_hdr *)tmp_buf; 315 fc = hdr->frame_control; 316 type = WLAN_FC_GET_TYPE(hdr->frame_control); 317 praddr = hdr->addr1; 318 psaddr = ieee80211_get_SA(hdr); 319 ether_addr_copy(pstatus->psaddr, psaddr); 320 321 packet_matchbssid = (!ieee80211_is_ctl(fc) && 322 (ether_addr_equal(mac->bssid, 323 ieee80211_has_tods(fc) ? 324 hdr->addr1 : 325 ieee80211_has_fromds(fc) ? 326 hdr->addr2 : hdr->addr3)) && 327 (!pstatus->hwerror) && 328 (!pstatus->crc) && (!pstatus->icv)); 329 330 packet_toself = packet_matchbssid && 331 (ether_addr_equal(praddr, rtlefuse->dev_addr)); 332 333 if (ieee80211_is_beacon(hdr->frame_control)) 334 packet_beacon = true; 335 else 336 packet_beacon = false; 337 338 if (packet_beacon && packet_matchbssid) 339 rtl_priv(hw)->dm.dbginfo.num_qry_beacon_pkt++; 340 341 if (packet_matchbssid && 342 ieee80211_is_data_qos(hdr->frame_control) && 343 !is_multicast_ether_addr(ieee80211_get_DA(hdr))) { 344 struct ieee80211_qos_hdr *hdr_qos = 345 (struct ieee80211_qos_hdr *)tmp_buf; 346 u16 tid = le16_to_cpu(hdr_qos->qos_ctrl) & 0xf; 347 348 if (tid != 0 && tid != 3) 349 rtl_priv(hw)->dm.dbginfo.num_non_be_pkt++; 350 } 351 352 query_rxphystatus(hw, pstatus, pdesc, p_drvinfo, 353 packet_matchbssid, packet_toself, 354 packet_beacon); 355 /*_rtl8821ae_smart_antenna(hw, pstatus); */ 356 rtl_process_phyinfo(hw, tmp_buf, pstatus); 357 } 358 359 static void _rtl8821ae_insert_emcontent(struct rtl_tcb_desc *ptcb_desc, 360 u8 *virtualaddress) 361 { 362 u32 dwtmp = 0; 363 364 memset(virtualaddress, 0, 8); 365 366 SET_EARLYMODE_PKTNUM(virtualaddress, ptcb_desc->empkt_num); 367 if (ptcb_desc->empkt_num == 1) { 368 dwtmp = ptcb_desc->empkt_len[0]; 369 } else { 370 dwtmp = ptcb_desc->empkt_len[0]; 371 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4; 372 dwtmp += ptcb_desc->empkt_len[1]; 373 } 374 SET_EARLYMODE_LEN0(virtualaddress, dwtmp); 375 376 if (ptcb_desc->empkt_num <= 3) { 377 dwtmp = ptcb_desc->empkt_len[2]; 378 } else { 379 dwtmp = ptcb_desc->empkt_len[2]; 380 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4; 381 dwtmp += ptcb_desc->empkt_len[3]; 382 } 383 SET_EARLYMODE_LEN1(virtualaddress, dwtmp); 384 if (ptcb_desc->empkt_num <= 5) { 385 dwtmp = ptcb_desc->empkt_len[4]; 386 } else { 387 dwtmp = ptcb_desc->empkt_len[4]; 388 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4; 389 dwtmp += ptcb_desc->empkt_len[5]; 390 } 391 SET_EARLYMODE_LEN2_1(virtualaddress, dwtmp & 0xF); 392 SET_EARLYMODE_LEN2_2(virtualaddress, dwtmp >> 4); 393 if (ptcb_desc->empkt_num <= 7) { 394 dwtmp = ptcb_desc->empkt_len[6]; 395 } else { 396 dwtmp = ptcb_desc->empkt_len[6]; 397 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4; 398 dwtmp += ptcb_desc->empkt_len[7]; 399 } 400 SET_EARLYMODE_LEN3(virtualaddress, dwtmp); 401 if (ptcb_desc->empkt_num <= 9) { 402 dwtmp = ptcb_desc->empkt_len[8]; 403 } else { 404 dwtmp = ptcb_desc->empkt_len[8]; 405 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4; 406 dwtmp += ptcb_desc->empkt_len[9]; 407 } 408 SET_EARLYMODE_LEN4(virtualaddress, dwtmp); 409 } 410 411 static bool rtl8821ae_get_rxdesc_is_ht(struct ieee80211_hw *hw, u8 *pdesc) 412 { 413 struct rtl_priv *rtlpriv = rtl_priv(hw); 414 u8 rx_rate = 0; 415 416 rx_rate = GET_RX_DESC_RXMCS(pdesc); 417 418 RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD, "rx_rate=0x%02x.\n", rx_rate); 419 420 if ((rx_rate >= DESC_RATEMCS0) && (rx_rate <= DESC_RATEMCS15)) 421 return true; 422 return false; 423 } 424 425 static bool rtl8821ae_get_rxdesc_is_vht(struct ieee80211_hw *hw, u8 *pdesc) 426 { 427 struct rtl_priv *rtlpriv = rtl_priv(hw); 428 u8 rx_rate = 0; 429 430 rx_rate = GET_RX_DESC_RXMCS(pdesc); 431 432 RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD, "rx_rate=0x%02x.\n", rx_rate); 433 434 if (rx_rate >= DESC_RATEVHT1SS_MCS0) 435 return true; 436 return false; 437 } 438 439 static u8 rtl8821ae_get_rx_vht_nss(struct ieee80211_hw *hw, u8 *pdesc) 440 { 441 u8 rx_rate = 0; 442 u8 vht_nss = 0; 443 444 rx_rate = GET_RX_DESC_RXMCS(pdesc); 445 if ((rx_rate >= DESC_RATEVHT1SS_MCS0) && 446 (rx_rate <= DESC_RATEVHT1SS_MCS9)) 447 vht_nss = 1; 448 else if ((rx_rate >= DESC_RATEVHT2SS_MCS0) && 449 (rx_rate <= DESC_RATEVHT2SS_MCS9)) 450 vht_nss = 2; 451 452 return vht_nss; 453 } 454 455 bool rtl8821ae_rx_query_desc(struct ieee80211_hw *hw, 456 struct rtl_stats *status, 457 struct ieee80211_rx_status *rx_status, 458 u8 *pdesc, struct sk_buff *skb) 459 { 460 struct rtl_priv *rtlpriv = rtl_priv(hw); 461 struct rx_fwinfo_8821ae *p_drvinfo; 462 struct ieee80211_hdr *hdr; 463 464 u32 phystatus = GET_RX_DESC_PHYST(pdesc); 465 466 status->length = (u16)GET_RX_DESC_PKT_LEN(pdesc); 467 status->rx_drvinfo_size = (u8)GET_RX_DESC_DRV_INFO_SIZE(pdesc) * 468 RX_DRV_INFO_SIZE_UNIT; 469 status->rx_bufshift = (u8)(GET_RX_DESC_SHIFT(pdesc) & 0x03); 470 status->icv = (u16)GET_RX_DESC_ICV(pdesc); 471 status->crc = (u16)GET_RX_DESC_CRC32(pdesc); 472 status->hwerror = (status->crc | status->icv); 473 status->decrypted = !GET_RX_DESC_SWDEC(pdesc); 474 status->rate = (u8)GET_RX_DESC_RXMCS(pdesc); 475 status->shortpreamble = (u16)GET_RX_DESC_SPLCP(pdesc); 476 status->isampdu = (bool)(GET_RX_DESC_PAGGR(pdesc) == 1); 477 status->isfirst_ampdu = (bool)(GET_RX_DESC_PAGGR(pdesc) == 1); 478 status->timestamp_low = GET_RX_DESC_TSFL(pdesc); 479 status->rx_packet_bw = GET_RX_DESC_BW(pdesc); 480 status->macid = GET_RX_DESC_MACID(pdesc); 481 status->is_short_gi = !(bool)GET_RX_DESC_SPLCP(pdesc); 482 status->is_ht = rtl8821ae_get_rxdesc_is_ht(hw, pdesc); 483 status->is_vht = rtl8821ae_get_rxdesc_is_vht(hw, pdesc); 484 status->vht_nss = rtl8821ae_get_rx_vht_nss(hw, pdesc); 485 status->is_cck = RTL8821AE_RX_HAL_IS_CCK_RATE(status->rate); 486 487 RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD, 488 "rx_packet_bw=%s,is_ht %d, is_vht %d, vht_nss=%d,is_short_gi %d.\n", 489 (status->rx_packet_bw == 2) ? "80M" : 490 (status->rx_packet_bw == 1) ? "40M" : "20M", 491 status->is_ht, status->is_vht, status->vht_nss, 492 status->is_short_gi); 493 494 if (GET_RX_STATUS_DESC_RPT_SEL(pdesc)) 495 status->packet_report_type = C2H_PACKET; 496 else 497 status->packet_report_type = NORMAL_RX; 498 499 if (GET_RX_STATUS_DESC_PATTERN_MATCH(pdesc)) 500 status->wake_match = BIT(2); 501 else if (GET_RX_STATUS_DESC_MAGIC_MATCH(pdesc)) 502 status->wake_match = BIT(1); 503 else if (GET_RX_STATUS_DESC_UNICAST_MATCH(pdesc)) 504 status->wake_match = BIT(0); 505 else 506 status->wake_match = 0; 507 508 if (status->wake_match) 509 RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD, 510 "GGGGGGGGGGGGGet Wakeup Packet!! WakeMatch=%d\n", 511 status->wake_match); 512 rx_status->freq = hw->conf.chandef.chan->center_freq; 513 rx_status->band = hw->conf.chandef.chan->band; 514 515 hdr = (struct ieee80211_hdr *)(skb->data + 516 status->rx_drvinfo_size + status->rx_bufshift); 517 518 if (status->crc) 519 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC; 520 521 if (status->rx_packet_bw == HT_CHANNEL_WIDTH_20_40) 522 rx_status->bw = RATE_INFO_BW_40; 523 else if (status->rx_packet_bw == HT_CHANNEL_WIDTH_80) 524 rx_status->bw = RATE_INFO_BW_80; 525 if (status->is_ht) 526 rx_status->encoding = RX_ENC_HT; 527 if (status->is_vht) 528 rx_status->encoding = RX_ENC_VHT; 529 530 if (status->is_short_gi) 531 rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 532 533 rx_status->nss = status->vht_nss; 534 rx_status->flag |= RX_FLAG_MACTIME_START; 535 536 /* hw will set status->decrypted true, if it finds the 537 * frame is open data frame or mgmt frame. 538 * So hw will not decryption robust managment frame 539 * for IEEE80211w but still set status->decrypted 540 * true, so here we should set it back to undecrypted 541 * for IEEE80211w frame, and mac80211 sw will help 542 * to decrypt it 543 */ 544 if (status->decrypted) { 545 if ((!_ieee80211_is_robust_mgmt_frame(hdr)) && 546 (ieee80211_has_protected(hdr->frame_control))) 547 rx_status->flag |= RX_FLAG_DECRYPTED; 548 else 549 rx_status->flag &= ~RX_FLAG_DECRYPTED; 550 } 551 552 /* rate_idx: index of data rate into band's 553 * supported rates or MCS index if HT rates 554 * are use (RX_FLAG_HT) 555 */ 556 rx_status->rate_idx = rtlwifi_rate_mapping(hw, status->is_ht, 557 status->is_vht, 558 status->rate); 559 560 rx_status->mactime = status->timestamp_low; 561 if (phystatus) { 562 p_drvinfo = (struct rx_fwinfo_8821ae *)(skb->data + 563 status->rx_bufshift); 564 565 translate_rx_signal_stuff(hw, skb, status, pdesc, p_drvinfo); 566 } 567 rx_status->signal = status->recvsignalpower + 10; 568 if (status->packet_report_type == TX_REPORT2) { 569 status->macid_valid_entry[0] = 570 GET_RX_RPT2_DESC_MACID_VALID_1(pdesc); 571 status->macid_valid_entry[1] = 572 GET_RX_RPT2_DESC_MACID_VALID_2(pdesc); 573 } 574 return true; 575 } 576 577 static u8 rtl8821ae_bw_mapping(struct ieee80211_hw *hw, 578 struct rtl_tcb_desc *ptcb_desc) 579 { 580 struct rtl_priv *rtlpriv = rtl_priv(hw); 581 struct rtl_phy *rtlphy = &rtlpriv->phy; 582 u8 bw_setting_of_desc = 0; 583 584 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, 585 "rtl8821ae_bw_mapping, current_chan_bw %d, packet_bw %d\n", 586 rtlphy->current_chan_bw, ptcb_desc->packet_bw); 587 588 if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_80) { 589 if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_80) 590 bw_setting_of_desc = 2; 591 else if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) 592 bw_setting_of_desc = 1; 593 else 594 bw_setting_of_desc = 0; 595 } else if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20_40) { 596 if ((ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) || 597 (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_80)) 598 bw_setting_of_desc = 1; 599 else 600 bw_setting_of_desc = 0; 601 } else { 602 bw_setting_of_desc = 0; 603 } 604 return bw_setting_of_desc; 605 } 606 607 static u8 rtl8821ae_sc_mapping(struct ieee80211_hw *hw, 608 struct rtl_tcb_desc *ptcb_desc) 609 { 610 struct rtl_priv *rtlpriv = rtl_priv(hw); 611 struct rtl_phy *rtlphy = &rtlpriv->phy; 612 struct rtl_mac *mac = rtl_mac(rtlpriv); 613 u8 sc_setting_of_desc = 0; 614 615 if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_80) { 616 if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_80) { 617 sc_setting_of_desc = VHT_DATA_SC_DONOT_CARE; 618 } else if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) { 619 if (mac->cur_80_prime_sc == 620 HAL_PRIME_CHNL_OFFSET_LOWER) 621 sc_setting_of_desc = 622 VHT_DATA_SC_40_LOWER_OF_80MHZ; 623 else if (mac->cur_80_prime_sc == 624 HAL_PRIME_CHNL_OFFSET_UPPER) 625 sc_setting_of_desc = 626 VHT_DATA_SC_40_UPPER_OF_80MHZ; 627 else 628 RT_TRACE(rtlpriv, COMP_SEND, DBG_LOUD, 629 "rtl8821ae_sc_mapping: Not Correct Primary40MHz Setting\n"); 630 } else { 631 if ((mac->cur_40_prime_sc == 632 HAL_PRIME_CHNL_OFFSET_LOWER) && 633 (mac->cur_80_prime_sc == 634 HAL_PRIME_CHNL_OFFSET_LOWER)) 635 sc_setting_of_desc = 636 VHT_DATA_SC_20_LOWEST_OF_80MHZ; 637 else if ((mac->cur_40_prime_sc == 638 HAL_PRIME_CHNL_OFFSET_UPPER) && 639 (mac->cur_80_prime_sc == 640 HAL_PRIME_CHNL_OFFSET_LOWER)) 641 sc_setting_of_desc = 642 VHT_DATA_SC_20_LOWER_OF_80MHZ; 643 else if ((mac->cur_40_prime_sc == 644 HAL_PRIME_CHNL_OFFSET_LOWER) && 645 (mac->cur_80_prime_sc == 646 HAL_PRIME_CHNL_OFFSET_UPPER)) 647 sc_setting_of_desc = 648 VHT_DATA_SC_20_UPPER_OF_80MHZ; 649 else if ((mac->cur_40_prime_sc == 650 HAL_PRIME_CHNL_OFFSET_UPPER) && 651 (mac->cur_80_prime_sc == 652 HAL_PRIME_CHNL_OFFSET_UPPER)) 653 sc_setting_of_desc = 654 VHT_DATA_SC_20_UPPERST_OF_80MHZ; 655 else 656 RT_TRACE(rtlpriv, COMP_SEND, DBG_LOUD, 657 "rtl8821ae_sc_mapping: Not Correct Primary40MHz Setting\n"); 658 } 659 } else if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20_40) { 660 if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) { 661 sc_setting_of_desc = VHT_DATA_SC_DONOT_CARE; 662 } else if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20) { 663 if (mac->cur_40_prime_sc == 664 HAL_PRIME_CHNL_OFFSET_UPPER) { 665 sc_setting_of_desc = 666 VHT_DATA_SC_20_UPPER_OF_80MHZ; 667 } else if (mac->cur_40_prime_sc == 668 HAL_PRIME_CHNL_OFFSET_LOWER){ 669 sc_setting_of_desc = 670 VHT_DATA_SC_20_LOWER_OF_80MHZ; 671 } else { 672 sc_setting_of_desc = VHT_DATA_SC_DONOT_CARE; 673 } 674 } 675 } else { 676 sc_setting_of_desc = VHT_DATA_SC_DONOT_CARE; 677 } 678 679 return sc_setting_of_desc; 680 } 681 682 void rtl8821ae_tx_fill_desc(struct ieee80211_hw *hw, 683 struct ieee80211_hdr *hdr, u8 *pdesc_tx, u8 *txbd, 684 struct ieee80211_tx_info *info, 685 struct ieee80211_sta *sta, 686 struct sk_buff *skb, 687 u8 hw_queue, struct rtl_tcb_desc *ptcb_desc) 688 { 689 struct rtl_priv *rtlpriv = rtl_priv(hw); 690 struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); 691 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 692 struct rtl_hal *rtlhal = rtl_hal(rtlpriv); 693 struct rtlwifi_tx_info *tx_info = rtl_tx_skb_cb_info(skb); 694 u8 *pdesc = (u8 *)pdesc_tx; 695 u16 seq_number; 696 __le16 fc = hdr->frame_control; 697 unsigned int buf_len = 0; 698 unsigned int skb_len = skb->len; 699 u8 fw_qsel = _rtl8821ae_map_hwqueue_to_fwqueue(skb, hw_queue); 700 bool firstseg = ((hdr->seq_ctrl & 701 cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0); 702 bool lastseg = ((hdr->frame_control & 703 cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0); 704 dma_addr_t mapping; 705 u8 short_gi = 0; 706 707 seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4; 708 rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc); 709 /* reserve 8 byte for AMPDU early mode */ 710 if (rtlhal->earlymode_enable) { 711 skb_push(skb, EM_HDR_LEN); 712 memset(skb->data, 0, EM_HDR_LEN); 713 } 714 buf_len = skb->len; 715 mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len, 716 PCI_DMA_TODEVICE); 717 if (pci_dma_mapping_error(rtlpci->pdev, mapping)) { 718 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, 719 "DMA mapping error\n"); 720 return; 721 } 722 CLEAR_PCI_TX_DESC_CONTENT(pdesc, sizeof(struct tx_desc_8821ae)); 723 if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) { 724 firstseg = true; 725 lastseg = true; 726 } 727 if (firstseg) { 728 if (rtlhal->earlymode_enable) { 729 SET_TX_DESC_PKT_OFFSET(pdesc, 1); 730 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN + 731 EM_HDR_LEN); 732 if (ptcb_desc->empkt_num) { 733 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, 734 "Insert 8 byte.pTcb->EMPktNum:%d\n", 735 ptcb_desc->empkt_num); 736 _rtl8821ae_insert_emcontent(ptcb_desc, 737 (u8 *)(skb->data)); 738 } 739 } else { 740 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN); 741 } 742 743 744 /* ptcb_desc->use_driver_rate = true; */ 745 SET_TX_DESC_TX_RATE(pdesc, ptcb_desc->hw_rate); 746 if (ptcb_desc->hw_rate > DESC_RATEMCS0) 747 short_gi = (ptcb_desc->use_shortgi) ? 1 : 0; 748 else 749 short_gi = (ptcb_desc->use_shortpreamble) ? 1 : 0; 750 751 SET_TX_DESC_DATA_SHORTGI(pdesc, short_gi); 752 753 if (info->flags & IEEE80211_TX_CTL_AMPDU) { 754 SET_TX_DESC_AGG_ENABLE(pdesc, 1); 755 SET_TX_DESC_MAX_AGG_NUM(pdesc, 0x1f); 756 } 757 SET_TX_DESC_SEQ(pdesc, seq_number); 758 SET_TX_DESC_RTS_ENABLE(pdesc, ((ptcb_desc->rts_enable && 759 !ptcb_desc->cts_enable) ? 1 : 0)); 760 SET_TX_DESC_HW_RTS_ENABLE(pdesc, 0); 761 SET_TX_DESC_CTS2SELF(pdesc, ((ptcb_desc->cts_enable) ? 1 : 0)); 762 763 SET_TX_DESC_RTS_RATE(pdesc, ptcb_desc->rts_rate); 764 SET_TX_DESC_RTS_SC(pdesc, ptcb_desc->rts_sc); 765 SET_TX_DESC_RTS_SHORT(pdesc, 766 ((ptcb_desc->rts_rate <= DESC_RATE54M) ? 767 (ptcb_desc->rts_use_shortpreamble ? 1 : 0) : 768 (ptcb_desc->rts_use_shortgi ? 1 : 0))); 769 770 if (ptcb_desc->tx_enable_sw_calc_duration) 771 SET_TX_DESC_NAV_USE_HDR(pdesc, 1); 772 773 SET_TX_DESC_DATA_BW(pdesc, 774 rtl8821ae_bw_mapping(hw, ptcb_desc)); 775 776 SET_TX_DESC_TX_SUB_CARRIER(pdesc, 777 rtl8821ae_sc_mapping(hw, ptcb_desc)); 778 779 SET_TX_DESC_LINIP(pdesc, 0); 780 SET_TX_DESC_PKT_SIZE(pdesc, (u16)skb_len); 781 if (sta) { 782 u8 ampdu_density = sta->ht_cap.ampdu_density; 783 784 SET_TX_DESC_AMPDU_DENSITY(pdesc, ampdu_density); 785 } 786 if (info->control.hw_key) { 787 struct ieee80211_key_conf *keyconf = 788 info->control.hw_key; 789 switch (keyconf->cipher) { 790 case WLAN_CIPHER_SUITE_WEP40: 791 case WLAN_CIPHER_SUITE_WEP104: 792 case WLAN_CIPHER_SUITE_TKIP: 793 SET_TX_DESC_SEC_TYPE(pdesc, 0x1); 794 break; 795 case WLAN_CIPHER_SUITE_CCMP: 796 SET_TX_DESC_SEC_TYPE(pdesc, 0x3); 797 break; 798 default: 799 SET_TX_DESC_SEC_TYPE(pdesc, 0x0); 800 break; 801 } 802 } 803 804 SET_TX_DESC_QUEUE_SEL(pdesc, fw_qsel); 805 SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F); 806 SET_TX_DESC_RTS_RATE_FB_LIMIT(pdesc, 0xF); 807 SET_TX_DESC_DISABLE_FB(pdesc, ptcb_desc->disable_ratefallback ? 808 1 : 0); 809 SET_TX_DESC_USE_RATE(pdesc, ptcb_desc->use_driver_rate ? 1 : 0); 810 811 if (ieee80211_is_data_qos(fc)) { 812 if (mac->rdg_en) { 813 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, 814 "Enable RDG function.\n"); 815 SET_TX_DESC_RDG_ENABLE(pdesc, 1); 816 SET_TX_DESC_HTC(pdesc, 1); 817 } 818 } 819 /* tx report */ 820 rtl_set_tx_report(ptcb_desc, pdesc, hw, tx_info); 821 } 822 823 SET_TX_DESC_FIRST_SEG(pdesc, (firstseg ? 1 : 0)); 824 SET_TX_DESC_LAST_SEG(pdesc, (lastseg ? 1 : 0)); 825 SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)buf_len); 826 SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping); 827 /* if (rtlpriv->dm.useramask) { */ 828 if (1) { 829 SET_TX_DESC_RATE_ID(pdesc, ptcb_desc->ratr_index); 830 SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id); 831 } else { 832 SET_TX_DESC_RATE_ID(pdesc, 0xC + ptcb_desc->ratr_index); 833 SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id); 834 } 835 if (!ieee80211_is_data_qos(fc)) { 836 SET_TX_DESC_HWSEQ_EN(pdesc, 1); 837 SET_TX_DESC_HWSEQ_SEL(pdesc, 0); 838 } 839 SET_TX_DESC_MORE_FRAG(pdesc, (lastseg ? 0 : 1)); 840 if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) || 841 is_broadcast_ether_addr(ieee80211_get_DA(hdr))) { 842 SET_TX_DESC_BMC(pdesc, 1); 843 } 844 845 rtl8821ae_dm_set_tx_ant_by_tx_info(hw, pdesc, ptcb_desc->mac_id); 846 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "\n"); 847 } 848 849 void rtl8821ae_tx_fill_cmddesc(struct ieee80211_hw *hw, 850 u8 *pdesc, bool firstseg, 851 bool lastseg, struct sk_buff *skb) 852 { 853 struct rtl_priv *rtlpriv = rtl_priv(hw); 854 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 855 u8 fw_queue = QSLT_BEACON; 856 857 dma_addr_t mapping = pci_map_single(rtlpci->pdev, 858 skb->data, skb->len, 859 PCI_DMA_TODEVICE); 860 861 if (pci_dma_mapping_error(rtlpci->pdev, mapping)) { 862 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, 863 "DMA mapping error\n"); 864 return; 865 } 866 CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE); 867 868 SET_TX_DESC_FIRST_SEG(pdesc, 1); 869 SET_TX_DESC_LAST_SEG(pdesc, 1); 870 871 SET_TX_DESC_PKT_SIZE((u8 *)pdesc, (u16)(skb->len)); 872 873 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN); 874 875 SET_TX_DESC_USE_RATE(pdesc, 1); 876 SET_TX_DESC_TX_RATE(pdesc, DESC_RATE1M); 877 SET_TX_DESC_DISABLE_FB(pdesc, 1); 878 879 SET_TX_DESC_DATA_BW(pdesc, 0); 880 881 SET_TX_DESC_HWSEQ_EN(pdesc, 1); 882 883 SET_TX_DESC_QUEUE_SEL(pdesc, fw_queue); 884 885 SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)(skb->len)); 886 887 SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping); 888 889 SET_TX_DESC_MACID(pdesc, 0); 890 891 SET_TX_DESC_OWN(pdesc, 1); 892 893 RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD, 894 "H2C Tx Cmd Content\n", 895 pdesc, TX_DESC_SIZE); 896 } 897 898 void rtl8821ae_set_desc(struct ieee80211_hw *hw, u8 *pdesc, 899 bool istx, u8 desc_name, u8 *val) 900 { 901 if (istx) { 902 switch (desc_name) { 903 case HW_DESC_OWN: 904 SET_TX_DESC_OWN(pdesc, 1); 905 break; 906 case HW_DESC_TX_NEXTDESC_ADDR: 907 SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *)val); 908 break; 909 default: 910 WARN_ONCE(true, 911 "rtl8821ae: ERR txdesc :%d not processed\n", 912 desc_name); 913 break; 914 } 915 } else { 916 switch (desc_name) { 917 case HW_DESC_RXOWN: 918 SET_RX_DESC_OWN(pdesc, 1); 919 break; 920 case HW_DESC_RXBUFF_ADDR: 921 SET_RX_DESC_BUFF_ADDR(pdesc, *(u32 *)val); 922 break; 923 case HW_DESC_RXPKT_LEN: 924 SET_RX_DESC_PKT_LEN(pdesc, *(u32 *)val); 925 break; 926 case HW_DESC_RXERO: 927 SET_RX_DESC_EOR(pdesc, 1); 928 break; 929 default: 930 WARN_ONCE(true, 931 "rtl8821ae: ERR rxdesc :%d not processed\n", 932 desc_name); 933 break; 934 } 935 } 936 } 937 938 u64 rtl8821ae_get_desc(struct ieee80211_hw *hw, 939 u8 *pdesc, bool istx, u8 desc_name) 940 { 941 u32 ret = 0; 942 943 if (istx) { 944 switch (desc_name) { 945 case HW_DESC_OWN: 946 ret = GET_TX_DESC_OWN(pdesc); 947 break; 948 case HW_DESC_TXBUFF_ADDR: 949 ret = GET_TX_DESC_TX_BUFFER_ADDRESS(pdesc); 950 break; 951 default: 952 WARN_ONCE(true, 953 "rtl8821ae: ERR txdesc :%d not processed\n", 954 desc_name); 955 break; 956 } 957 } else { 958 switch (desc_name) { 959 case HW_DESC_OWN: 960 ret = GET_RX_DESC_OWN(pdesc); 961 break; 962 case HW_DESC_RXPKT_LEN: 963 ret = GET_RX_DESC_PKT_LEN(pdesc); 964 break; 965 case HW_DESC_RXBUFF_ADDR: 966 ret = GET_RX_DESC_BUFF_ADDR(pdesc); 967 break; 968 default: 969 WARN_ONCE(true, 970 "rtl8821ae: ERR rxdesc :%d not processed\n", 971 desc_name); 972 break; 973 } 974 } 975 return ret; 976 } 977 978 bool rtl8821ae_is_tx_desc_closed(struct ieee80211_hw *hw, 979 u8 hw_queue, u16 index) 980 { 981 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 982 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue]; 983 u8 *entry = (u8 *)(&ring->desc[ring->idx]); 984 u8 own = (u8)rtl8821ae_get_desc(hw, entry, true, HW_DESC_OWN); 985 986 /** 987 *beacon packet will only use the first 988 *descriptor defautly,and the own may not 989 *be cleared by the hardware 990 */ 991 if (own) 992 return false; 993 return true; 994 } 995 996 void rtl8821ae_tx_polling(struct ieee80211_hw *hw, u8 hw_queue) 997 { 998 struct rtl_priv *rtlpriv = rtl_priv(hw); 999 1000 if (hw_queue == BEACON_QUEUE) { 1001 rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4)); 1002 } else { 1003 rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, 1004 BIT(0) << (hw_queue)); 1005 } 1006 } 1007