1 /****************************************************************************** 2 * 3 * Copyright(c) 2009-2010 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * The full GNU General Public License is included in this distribution in the 15 * file called LICENSE. 16 * 17 * Contact Information: 18 * wlanfae <wlanfae@realtek.com> 19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, 20 * Hsinchu 300, Taiwan. 21 * 22 * Larry Finger <Larry.Finger@lwfinger.net> 23 * 24 *****************************************************************************/ 25 26 #include "../wifi.h" 27 #include "../core.h" 28 #include "../pci.h" 29 #include "reg.h" 30 #include "def.h" 31 #include "phy.h" 32 #include "dm.h" 33 #include "hw.h" 34 #include "fw.h" 35 #include "sw.h" 36 #include "trx.h" 37 #include "led.h" 38 #include "table.h" 39 #include "../btcoexist/rtl_btc.h" 40 41 #include <linux/vmalloc.h> 42 #include <linux/module.h> 43 44 static void rtl8821ae_init_aspm_vars(struct ieee80211_hw *hw) 45 { 46 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 47 48 /*close ASPM for AMD defaultly */ 49 rtlpci->const_amdpci_aspm = 0; 50 51 /** 52 * ASPM PS mode. 53 * 0 - Disable ASPM, 54 * 1 - Enable ASPM without Clock Req, 55 * 2 - Enable ASPM with Clock Req, 56 * 3 - Alwyas Enable ASPM with Clock Req, 57 * 4 - Always Enable ASPM without Clock Req. 58 * set defult to RTL8192CE:3 RTL8192E:2 59 */ 60 rtlpci->const_pci_aspm = 3; 61 62 /*Setting for PCI-E device */ 63 rtlpci->const_devicepci_aspm_setting = 0x03; 64 65 /*Setting for PCI-E bridge */ 66 rtlpci->const_hostpci_aspm_setting = 0x02; 67 68 /** 69 * In Hw/Sw Radio Off situation. 70 * 0 - Default, 71 * 1 - From ASPM setting without low Mac Pwr, 72 * 2 - From ASPM setting with low Mac Pwr, 73 * 3 - Bus D3 74 * set default to RTL8192CE:0 RTL8192SE:2 75 */ 76 rtlpci->const_hwsw_rfoff_d3 = 0; 77 78 /** 79 * This setting works for those device with 80 * backdoor ASPM setting such as EPHY setting. 81 * 0 - Not support ASPM, 82 * 1 - Support ASPM, 83 * 2 - According to chipset. 84 */ 85 rtlpci->const_support_pciaspm = 1; 86 } 87 88 /*InitializeVariables8812E*/ 89 int rtl8821ae_init_sw_vars(struct ieee80211_hw *hw) 90 { 91 int err = 0; 92 struct rtl_priv *rtlpriv = rtl_priv(hw); 93 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 94 struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); 95 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); 96 char *fw_name, *wowlan_fw_name; 97 98 rtl8821ae_bt_reg_init(hw); 99 rtlpriv->btcoexist.btc_ops = rtl_btc_get_ops_pointer(); 100 101 rtlpriv->dm.dm_initialgain_enable = 1; 102 rtlpriv->dm.dm_flag = 0; 103 rtlpriv->dm.disable_framebursting = 0; 104 rtlpriv->dm.thermalvalue = 0; 105 rtlpci->transmit_config = CFENDFORM | BIT(15) | BIT(24) | BIT(25); 106 107 mac->ht_enable = true; 108 mac->ht_cur_stbc = 0; 109 mac->ht_stbc_cap = 0; 110 mac->vht_cur_ldpc = 0; 111 mac->vht_ldpc_cap = 0; 112 mac->vht_cur_stbc = 0; 113 mac->vht_stbc_cap = 0; 114 115 rtlpriv->rtlhal.current_bandtype = BAND_ON_2_4G; 116 /*following 2 is for register 5G band, refer to _rtl_init_mac80211()*/ 117 rtlpriv->rtlhal.bandset = BAND_ON_BOTH; 118 rtlpriv->rtlhal.macphymode = SINGLEMAC_SINGLEPHY; 119 120 rtlpci->receive_config = (RCR_APPFCS | 121 RCR_APP_MIC | 122 RCR_APP_ICV | 123 RCR_APP_PHYST_RXFF | 124 RCR_NONQOS_VHT | 125 RCR_HTC_LOC_CTRL | 126 RCR_AMF | 127 RCR_ACF | 128 /*This bit controls the PS-Poll packet filter.*/ 129 RCR_ADF | 130 RCR_AICV | 131 RCR_ACRC32 | 132 RCR_AB | 133 RCR_AM | 134 RCR_APM | 135 0); 136 137 rtlpci->irq_mask[0] = 138 (u32)(IMR_PSTIMEOUT | 139 IMR_GTINT3 | 140 IMR_HSISR_IND_ON_INT | 141 IMR_C2HCMD | 142 IMR_HIGHDOK | 143 IMR_MGNTDOK | 144 IMR_BKDOK | 145 IMR_BEDOK | 146 IMR_VIDOK | 147 IMR_VODOK | 148 IMR_RDU | 149 IMR_ROK | 150 0); 151 152 rtlpci->irq_mask[1] = 153 (u32)(IMR_RXFOVW | 154 IMR_TXFOVW | 155 0); 156 rtlpci->sys_irq_mask = (u32)(HSIMR_PDN_INT_EN | 157 HSIMR_RON_INT_EN | 158 0); 159 /* for WOWLAN */ 160 rtlpriv->psc.wo_wlan_mode = WAKE_ON_MAGIC_PACKET | 161 WAKE_ON_PATTERN_MATCH; 162 163 /* for LPS & IPS */ 164 rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps; 165 rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps; 166 rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps; 167 rtlpci->msi_support = rtlpriv->cfg->mod_params->msi_support; 168 rtlpci->int_clear = rtlpriv->cfg->mod_params->int_clear; 169 rtlpriv->cfg->mod_params->sw_crypto = 170 rtlpriv->cfg->mod_params->sw_crypto; 171 rtlpriv->cfg->mod_params->disable_watchdog = 172 rtlpriv->cfg->mod_params->disable_watchdog; 173 if (rtlpriv->cfg->mod_params->disable_watchdog) 174 pr_info("watchdog disabled\n"); 175 rtlpriv->psc.reg_fwctrl_lps = 3; 176 rtlpriv->psc.reg_max_lps_awakeintvl = 5; 177 178 /* for ASPM, you can close aspm through 179 * set const_support_pciaspm = 0 180 */ 181 rtl8821ae_init_aspm_vars(hw); 182 183 if (rtlpriv->psc.reg_fwctrl_lps == 1) 184 rtlpriv->psc.fwctrl_psmode = FW_PS_MIN_MODE; 185 else if (rtlpriv->psc.reg_fwctrl_lps == 2) 186 rtlpriv->psc.fwctrl_psmode = FW_PS_MAX_MODE; 187 else if (rtlpriv->psc.reg_fwctrl_lps == 3) 188 rtlpriv->psc.fwctrl_psmode = FW_PS_DTIM_MODE; 189 190 /* for firmware buf */ 191 rtlpriv->rtlhal.pfirmware = vzalloc(0x8000); 192 if (!rtlpriv->rtlhal.pfirmware) { 193 pr_err("Can't alloc buffer for fw.\n"); 194 return 1; 195 } 196 rtlpriv->rtlhal.wowlan_firmware = vzalloc(0x8000); 197 if (!rtlpriv->rtlhal.wowlan_firmware) { 198 pr_err("Can't alloc buffer for wowlan fw.\n"); 199 return 1; 200 } 201 202 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8812AE) { 203 fw_name = "rtlwifi/rtl8812aefw.bin"; 204 wowlan_fw_name = "rtlwifi/rtl8812aefw_wowlan.bin"; 205 } else { 206 fw_name = "rtlwifi/rtl8821aefw.bin"; 207 wowlan_fw_name = "rtlwifi/rtl8821aefw_wowlan.bin"; 208 } 209 210 rtlpriv->max_fw_size = 0x8000; 211 /*load normal firmware*/ 212 pr_info("Using firmware %s\n", fw_name); 213 err = request_firmware_nowait(THIS_MODULE, 1, fw_name, 214 rtlpriv->io.dev, GFP_KERNEL, hw, 215 rtl_fw_cb); 216 if (err) { 217 pr_err("Failed to request normal firmware!\n"); 218 return 1; 219 } 220 /*load wowlan firmware*/ 221 pr_info("Using firmware %s\n", wowlan_fw_name); 222 err = request_firmware_nowait(THIS_MODULE, 1, 223 wowlan_fw_name, 224 rtlpriv->io.dev, GFP_KERNEL, hw, 225 rtl_wowlan_fw_cb); 226 if (err) { 227 pr_err("Failed to request wowlan firmware!\n"); 228 return 1; 229 } 230 return 0; 231 } 232 233 void rtl8821ae_deinit_sw_vars(struct ieee80211_hw *hw) 234 { 235 struct rtl_priv *rtlpriv = rtl_priv(hw); 236 237 if (rtlpriv->rtlhal.pfirmware) { 238 vfree(rtlpriv->rtlhal.pfirmware); 239 rtlpriv->rtlhal.pfirmware = NULL; 240 } 241 #if (USE_SPECIFIC_FW_TO_SUPPORT_WOWLAN == 1) 242 if (rtlpriv->rtlhal.wowlan_firmware) { 243 vfree(rtlpriv->rtlhal.wowlan_firmware); 244 rtlpriv->rtlhal.wowlan_firmware = NULL; 245 } 246 #endif 247 } 248 249 /* get bt coexist status */ 250 bool rtl8821ae_get_btc_status(void) 251 { 252 return true; 253 } 254 255 static struct rtl_hal_ops rtl8821ae_hal_ops = { 256 .init_sw_vars = rtl8821ae_init_sw_vars, 257 .deinit_sw_vars = rtl8821ae_deinit_sw_vars, 258 .read_eeprom_info = rtl8821ae_read_eeprom_info, 259 .interrupt_recognized = rtl8821ae_interrupt_recognized, 260 .hw_init = rtl8821ae_hw_init, 261 .hw_disable = rtl8821ae_card_disable, 262 .hw_suspend = rtl8821ae_suspend, 263 .hw_resume = rtl8821ae_resume, 264 .enable_interrupt = rtl8821ae_enable_interrupt, 265 .disable_interrupt = rtl8821ae_disable_interrupt, 266 .set_network_type = rtl8821ae_set_network_type, 267 .set_chk_bssid = rtl8821ae_set_check_bssid, 268 .set_qos = rtl8821ae_set_qos, 269 .set_bcn_reg = rtl8821ae_set_beacon_related_registers, 270 .set_bcn_intv = rtl8821ae_set_beacon_interval, 271 .update_interrupt_mask = rtl8821ae_update_interrupt_mask, 272 .get_hw_reg = rtl8821ae_get_hw_reg, 273 .set_hw_reg = rtl8821ae_set_hw_reg, 274 .update_rate_tbl = rtl8821ae_update_hal_rate_tbl, 275 .fill_tx_desc = rtl8821ae_tx_fill_desc, 276 .fill_tx_cmddesc = rtl8821ae_tx_fill_cmddesc, 277 .query_rx_desc = rtl8821ae_rx_query_desc, 278 .set_channel_access = rtl8821ae_update_channel_access_setting, 279 .radio_onoff_checking = rtl8821ae_gpio_radio_on_off_checking, 280 .set_bw_mode = rtl8821ae_phy_set_bw_mode, 281 .switch_channel = rtl8821ae_phy_sw_chnl, 282 .dm_watchdog = rtl8821ae_dm_watchdog, 283 .scan_operation_backup = rtl8821ae_phy_scan_operation_backup, 284 .set_rf_power_state = rtl8821ae_phy_set_rf_power_state, 285 .led_control = rtl8821ae_led_control, 286 .set_desc = rtl8821ae_set_desc, 287 .get_desc = rtl8821ae_get_desc, 288 .is_tx_desc_closed = rtl8821ae_is_tx_desc_closed, 289 .tx_polling = rtl8821ae_tx_polling, 290 .enable_hw_sec = rtl8821ae_enable_hw_security_config, 291 .set_key = rtl8821ae_set_key, 292 .init_sw_leds = rtl8821ae_init_sw_leds, 293 .get_bbreg = rtl8821ae_phy_query_bb_reg, 294 .set_bbreg = rtl8821ae_phy_set_bb_reg, 295 .get_rfreg = rtl8821ae_phy_query_rf_reg, 296 .set_rfreg = rtl8821ae_phy_set_rf_reg, 297 .fill_h2c_cmd = rtl8821ae_fill_h2c_cmd, 298 .get_btc_status = rtl8821ae_get_btc_status, 299 .rx_command_packet = rtl8821ae_rx_command_packet, 300 .c2h_content_parsing = rtl8821ae_c2h_content_parsing, 301 .add_wowlan_pattern = rtl8821ae_add_wowlan_pattern, 302 }; 303 304 static struct rtl_mod_params rtl8821ae_mod_params = { 305 .sw_crypto = false, 306 .inactiveps = true, 307 .swctrl_lps = false, 308 .fwctrl_lps = true, 309 .msi_support = true, 310 .int_clear = true, 311 .debug_level = 0, 312 .debug_mask = 0, 313 .disable_watchdog = 0, 314 }; 315 316 static const struct rtl_hal_cfg rtl8821ae_hal_cfg = { 317 .bar_id = 2, 318 .write_readback = true, 319 .name = "rtl8821ae_pci", 320 .ops = &rtl8821ae_hal_ops, 321 .mod_params = &rtl8821ae_mod_params, 322 .maps[SYS_ISO_CTRL] = REG_SYS_ISO_CTRL, 323 .maps[SYS_FUNC_EN] = REG_SYS_FUNC_EN, 324 .maps[SYS_CLK] = REG_SYS_CLKR, 325 .maps[MAC_RCR_AM] = AM, 326 .maps[MAC_RCR_AB] = AB, 327 .maps[MAC_RCR_ACRC32] = ACRC32, 328 .maps[MAC_RCR_ACF] = ACF, 329 .maps[MAC_RCR_AAP] = AAP, 330 .maps[MAC_HIMR] = REG_HIMR, 331 .maps[MAC_HIMRE] = REG_HIMRE, 332 333 .maps[EFUSE_ACCESS] = REG_EFUSE_ACCESS, 334 335 .maps[EFUSE_TEST] = REG_EFUSE_TEST, 336 .maps[EFUSE_CTRL] = REG_EFUSE_CTRL, 337 .maps[EFUSE_CLK] = 0, 338 .maps[EFUSE_CLK_CTRL] = REG_EFUSE_CTRL, 339 .maps[EFUSE_PWC_EV12V] = PWC_EV12V, 340 .maps[EFUSE_FEN_ELDR] = FEN_ELDR, 341 .maps[EFUSE_LOADER_CLK_EN] = LOADER_CLK_EN, 342 .maps[EFUSE_ANA8M] = ANA8M, 343 .maps[EFUSE_HWSET_MAX_SIZE] = HWSET_MAX_SIZE, 344 .maps[EFUSE_MAX_SECTION_MAP] = EFUSE_MAX_SECTION, 345 .maps[EFUSE_REAL_CONTENT_SIZE] = EFUSE_REAL_CONTENT_LEN, 346 .maps[EFUSE_OOB_PROTECT_BYTES_LEN] = EFUSE_OOB_PROTECT_BYTES, 347 348 .maps[RWCAM] = REG_CAMCMD, 349 .maps[WCAMI] = REG_CAMWRITE, 350 .maps[RCAMO] = REG_CAMREAD, 351 .maps[CAMDBG] = REG_CAMDBG, 352 .maps[SECR] = REG_SECCFG, 353 .maps[SEC_CAM_NONE] = CAM_NONE, 354 .maps[SEC_CAM_WEP40] = CAM_WEP40, 355 .maps[SEC_CAM_TKIP] = CAM_TKIP, 356 .maps[SEC_CAM_AES] = CAM_AES, 357 .maps[SEC_CAM_WEP104] = CAM_WEP104, 358 359 .maps[RTL_IMR_BCNDMAINT6] = IMR_BCNDMAINT6, 360 .maps[RTL_IMR_BCNDMAINT5] = IMR_BCNDMAINT5, 361 .maps[RTL_IMR_BCNDMAINT4] = IMR_BCNDMAINT4, 362 .maps[RTL_IMR_BCNDMAINT3] = IMR_BCNDMAINT3, 363 .maps[RTL_IMR_BCNDMAINT2] = IMR_BCNDMAINT2, 364 .maps[RTL_IMR_BCNDMAINT1] = IMR_BCNDMAINT1, 365 /* .maps[RTL_IMR_BCNDOK8] = IMR_BCNDOK8, */ /*need check*/ 366 .maps[RTL_IMR_BCNDOK7] = IMR_BCNDOK7, 367 .maps[RTL_IMR_BCNDOK6] = IMR_BCNDOK6, 368 .maps[RTL_IMR_BCNDOK5] = IMR_BCNDOK5, 369 .maps[RTL_IMR_BCNDOK4] = IMR_BCNDOK4, 370 .maps[RTL_IMR_BCNDOK3] = IMR_BCNDOK3, 371 .maps[RTL_IMR_BCNDOK2] = IMR_BCNDOK2, 372 .maps[RTL_IMR_BCNDOK1] = IMR_BCNDOK1, 373 /* .maps[RTL_IMR_TIMEOUT2] = IMR_TIMEOUT2,*/ 374 /* .maps[RTL_IMR_TIMEOUT1] = IMR_TIMEOUT1,*/ 375 376 .maps[RTL_IMR_TXFOVW] = IMR_TXFOVW, 377 .maps[RTL_IMR_PSTIMEOUT] = IMR_PSTIMEOUT, 378 .maps[RTL_IMR_BCNINT] = IMR_BCNDMAINT0, 379 .maps[RTL_IMR_RXFOVW] = IMR_RXFOVW, 380 .maps[RTL_IMR_RDU] = IMR_RDU, 381 .maps[RTL_IMR_ATIMEND] = IMR_ATIMEND, 382 .maps[RTL_IMR_BDOK] = IMR_BCNDOK0, 383 .maps[RTL_IMR_MGNTDOK] = IMR_MGNTDOK, 384 .maps[RTL_IMR_TBDER] = IMR_TBDER, 385 .maps[RTL_IMR_HIGHDOK] = IMR_HIGHDOK, 386 .maps[RTL_IMR_TBDOK] = IMR_TBDOK, 387 .maps[RTL_IMR_BKDOK] = IMR_BKDOK, 388 .maps[RTL_IMR_BEDOK] = IMR_BEDOK, 389 .maps[RTL_IMR_VIDOK] = IMR_VIDOK, 390 .maps[RTL_IMR_VODOK] = IMR_VODOK, 391 .maps[RTL_IMR_ROK] = IMR_ROK, 392 .maps[RTL_IBSS_INT_MASKS] = (IMR_BCNDMAINT0 | IMR_TBDOK | IMR_TBDER), 393 394 .maps[RTL_RC_CCK_RATE1M] = DESC_RATE1M, 395 .maps[RTL_RC_CCK_RATE2M] = DESC_RATE2M, 396 .maps[RTL_RC_CCK_RATE5_5M] = DESC_RATE5_5M, 397 .maps[RTL_RC_CCK_RATE11M] = DESC_RATE11M, 398 .maps[RTL_RC_OFDM_RATE6M] = DESC_RATE6M, 399 .maps[RTL_RC_OFDM_RATE9M] = DESC_RATE9M, 400 .maps[RTL_RC_OFDM_RATE12M] = DESC_RATE12M, 401 .maps[RTL_RC_OFDM_RATE18M] = DESC_RATE18M, 402 .maps[RTL_RC_OFDM_RATE24M] = DESC_RATE24M, 403 .maps[RTL_RC_OFDM_RATE36M] = DESC_RATE36M, 404 .maps[RTL_RC_OFDM_RATE48M] = DESC_RATE48M, 405 .maps[RTL_RC_OFDM_RATE54M] = DESC_RATE54M, 406 407 .maps[RTL_RC_HT_RATEMCS7] = DESC_RATEMCS7, 408 .maps[RTL_RC_HT_RATEMCS15] = DESC_RATEMCS15, 409 410 /*VHT hightest rate*/ 411 .maps[RTL_RC_VHT_RATE_1SS_MCS7] = DESC_RATEVHT1SS_MCS7, 412 .maps[RTL_RC_VHT_RATE_1SS_MCS8] = DESC_RATEVHT1SS_MCS8, 413 .maps[RTL_RC_VHT_RATE_1SS_MCS9] = DESC_RATEVHT1SS_MCS9, 414 .maps[RTL_RC_VHT_RATE_2SS_MCS7] = DESC_RATEVHT2SS_MCS7, 415 .maps[RTL_RC_VHT_RATE_2SS_MCS8] = DESC_RATEVHT2SS_MCS8, 416 .maps[RTL_RC_VHT_RATE_2SS_MCS9] = DESC_RATEVHT2SS_MCS9, 417 }; 418 419 static struct pci_device_id rtl8821ae_pci_ids[] = { 420 {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8812, rtl8821ae_hal_cfg)}, 421 {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8821, rtl8821ae_hal_cfg)}, 422 {}, 423 }; 424 425 MODULE_DEVICE_TABLE(pci, rtl8821ae_pci_ids); 426 427 MODULE_AUTHOR("Realtek WlanFAE <wlanfae@realtek.com>"); 428 MODULE_LICENSE("GPL"); 429 MODULE_DESCRIPTION("Realtek 8821ae 802.11ac PCI wireless"); 430 MODULE_FIRMWARE("rtlwifi/rtl8821aefw.bin"); 431 432 module_param_named(swenc, rtl8821ae_mod_params.sw_crypto, bool, 0444); 433 module_param_named(debug_level, rtl8821ae_mod_params.debug_level, int, 0644); 434 module_param_named(debug_mask, rtl8821ae_mod_params.debug_mask, ullong, 0644); 435 module_param_named(ips, rtl8821ae_mod_params.inactiveps, bool, 0444); 436 module_param_named(swlps, rtl8821ae_mod_params.swctrl_lps, bool, 0444); 437 module_param_named(fwlps, rtl8821ae_mod_params.fwctrl_lps, bool, 0444); 438 module_param_named(msi, rtl8821ae_mod_params.msi_support, bool, 0444); 439 module_param_named(disable_watchdog, rtl8821ae_mod_params.disable_watchdog, 440 bool, 0444); 441 module_param_named(int_clear, rtl8821ae_mod_params.int_clear, bool, 0444); 442 MODULE_PARM_DESC(swenc, "Set to 1 for software crypto (default 0)\n"); 443 MODULE_PARM_DESC(ips, "Set to 0 to not use link power save (default 1)\n"); 444 MODULE_PARM_DESC(swlps, "Set to 1 to use SW control power save (default 0)\n"); 445 MODULE_PARM_DESC(fwlps, "Set to 1 to use FW control power save (default 1)\n"); 446 MODULE_PARM_DESC(msi, "Set to 1 to use MSI interrupts mode (default 1)\n"); 447 MODULE_PARM_DESC(debug_level, "Set debug level (0-5) (default 0)"); 448 MODULE_PARM_DESC(debug_mask, "Set debug mask (default 0)"); 449 MODULE_PARM_DESC(disable_watchdog, "Set to 1 to disable the watchdog (default 0)\n"); 450 MODULE_PARM_DESC(int_clear, "Set to 0 to disable interrupt clear before set (default 1)\n"); 451 452 static SIMPLE_DEV_PM_OPS(rtlwifi_pm_ops, rtl_pci_suspend, rtl_pci_resume); 453 454 static struct pci_driver rtl8821ae_driver = { 455 .name = KBUILD_MODNAME, 456 .id_table = rtl8821ae_pci_ids, 457 .probe = rtl_pci_probe, 458 .remove = rtl_pci_disconnect, 459 .driver.pm = &rtlwifi_pm_ops, 460 }; 461 462 module_pci_driver(rtl8821ae_driver); 463