1 /****************************************************************************** 2 * 3 * Copyright(c) 2009-2014 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * The full GNU General Public License is included in this distribution in the 15 * file called LICENSE. 16 * 17 * Contact Information: 18 * wlanfae <wlanfae@realtek.com> 19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, 20 * Hsinchu 300, Taiwan. 21 * 22 * Larry Finger <Larry.Finger@lwfinger.net> 23 * 24 *****************************************************************************/ 25 26 #ifndef __RTL8723BE_TRX_H__ 27 #define __RTL8723BE_TRX_H__ 28 29 #define TX_DESC_SIZE 40 30 #define TX_DESC_AGGR_SUBFRAME_SIZE 32 31 32 #define RX_DESC_SIZE 32 33 #define RX_DRV_INFO_SIZE_UNIT 8 34 35 #define TX_DESC_NEXT_DESC_OFFSET 40 36 #define USB_HWDESC_HEADER_LEN 40 37 #define CRCLENGTH 4 38 39 #define SET_TX_DESC_PKT_SIZE(__pdesc, __val) \ 40 SET_BITS_TO_LE_4BYTE(__pdesc, 0, 16, __val) 41 #define SET_TX_DESC_OFFSET(__pdesc, __val) \ 42 SET_BITS_TO_LE_4BYTE(__pdesc, 16, 8, __val) 43 #define SET_TX_DESC_BMC(__pdesc, __val) \ 44 SET_BITS_TO_LE_4BYTE(__pdesc, 24, 1, __val) 45 #define SET_TX_DESC_HTC(__pdesc, __val) \ 46 SET_BITS_TO_LE_4BYTE(__pdesc, 25, 1, __val) 47 #define SET_TX_DESC_LAST_SEG(__pdesc, __val) \ 48 SET_BITS_TO_LE_4BYTE(__pdesc, 26, 1, __val) 49 #define SET_TX_DESC_FIRST_SEG(__pdesc, __val) \ 50 SET_BITS_TO_LE_4BYTE(__pdesc, 27, 1, __val) 51 #define SET_TX_DESC_LINIP(__pdesc, __val) \ 52 SET_BITS_TO_LE_4BYTE(__pdesc, 28, 1, __val) 53 #define SET_TX_DESC_NO_ACM(__pdesc, __val) \ 54 SET_BITS_TO_LE_4BYTE(__pdesc, 29, 1, __val) 55 #define SET_TX_DESC_GF(__pdesc, __val) \ 56 SET_BITS_TO_LE_4BYTE(__pdesc, 30, 1, __val) 57 #define SET_TX_DESC_OWN(__pdesc, __val) \ 58 SET_BITS_TO_LE_4BYTE(__pdesc, 31, 1, __val) 59 60 #define GET_TX_DESC_PKT_SIZE(__pdesc) \ 61 LE_BITS_TO_4BYTE(__pdesc, 0, 16) 62 #define GET_TX_DESC_OFFSET(__pdesc) \ 63 LE_BITS_TO_4BYTE(__pdesc, 16, 8) 64 #define GET_TX_DESC_BMC(__pdesc) \ 65 LE_BITS_TO_4BYTE(__pdesc, 24, 1) 66 #define GET_TX_DESC_HTC(__pdesc) \ 67 LE_BITS_TO_4BYTE(__pdesc, 25, 1) 68 #define GET_TX_DESC_LAST_SEG(__pdesc) \ 69 LE_BITS_TO_4BYTE(__pdesc, 26, 1) 70 #define GET_TX_DESC_FIRST_SEG(__pdesc) \ 71 LE_BITS_TO_4BYTE(__pdesc, 27, 1) 72 #define GET_TX_DESC_LINIP(__pdesc) \ 73 LE_BITS_TO_4BYTE(__pdesc, 28, 1) 74 #define GET_TX_DESC_NO_ACM(__pdesc) \ 75 LE_BITS_TO_4BYTE(__pdesc, 29, 1) 76 #define GET_TX_DESC_GF(__pdesc) \ 77 LE_BITS_TO_4BYTE(__pdesc, 30, 1) 78 #define GET_TX_DESC_OWN(__pdesc) \ 79 LE_BITS_TO_4BYTE(__pdesc, 31, 1) 80 81 #define SET_TX_DESC_MACID(__pdesc, __val) \ 82 SET_BITS_TO_LE_4BYTE(__pdesc+4, 0, 7, __val) 83 #define SET_TX_DESC_QUEUE_SEL(__pdesc, __val) \ 84 SET_BITS_TO_LE_4BYTE(__pdesc+4, 8, 5, __val) 85 #define SET_TX_DESC_RDG_NAV_EXT(__pdesc, __val) \ 86 SET_BITS_TO_LE_4BYTE(__pdesc+4, 13, 1, __val) 87 #define SET_TX_DESC_LSIG_TXOP_EN(__pdesc, __val) \ 88 SET_BITS_TO_LE_4BYTE(__pdesc+4, 14, 1, __val) 89 #define SET_TX_DESC_PIFS(__pdesc, __val) \ 90 SET_BITS_TO_LE_4BYTE(__pdesc+4, 15, 1, __val) 91 #define SET_TX_DESC_RATE_ID(__pdesc, __val) \ 92 SET_BITS_TO_LE_4BYTE(__pdesc+4, 16, 5, __val) 93 #define SET_TX_DESC_EN_DESC_ID(__pdesc, __val) \ 94 SET_BITS_TO_LE_4BYTE(__pdesc+4, 21, 1, __val) 95 #define SET_TX_DESC_SEC_TYPE(__pdesc, __val) \ 96 SET_BITS_TO_LE_4BYTE(__pdesc+4, 22, 2, __val) 97 #define SET_TX_DESC_PKT_OFFSET(__pdesc, __val) \ 98 SET_BITS_TO_LE_4BYTE(__pdesc+4, 24, 5, __val) 99 100 101 #define SET_TX_DESC_PAID(__pdesc, __val) \ 102 SET_BITS_TO_LE_4BYTE(__pdesc+8, 0, 9, __val) 103 #define SET_TX_DESC_CCA_RTS(__pdesc, __val) \ 104 SET_BITS_TO_LE_4BYTE(__pdesc+8, 10, 2, __val) 105 #define SET_TX_DESC_AGG_ENABLE(__pdesc, __val) \ 106 SET_BITS_TO_LE_4BYTE(__pdesc+8, 12, 1, __val) 107 #define SET_TX_DESC_RDG_ENABLE(__pdesc, __val) \ 108 SET_BITS_TO_LE_4BYTE(__pdesc+8, 13, 1, __val) 109 #define SET_TX_DESC_BAR_RTY_TH(__pdesc, __val) \ 110 SET_BITS_TO_LE_4BYTE(__pdesc+8, 14, 2, __val) 111 #define SET_TX_DESC_AGG_BREAK(__pdesc, __val) \ 112 SET_BITS_TO_LE_4BYTE(__pdesc+8, 16, 1, __val) 113 #define SET_TX_DESC_MORE_FRAG(__pdesc, __val) \ 114 SET_BITS_TO_LE_4BYTE(__pdesc+8, 17, 1, __val) 115 #define SET_TX_DESC_RAW(__pdesc, __val) \ 116 SET_BITS_TO_LE_4BYTE(__pdesc+8, 18, 1, __val) 117 #define SET_TX_DESC_SPE_RPT(__pdesc, __val) \ 118 SET_BITS_TO_LE_4BYTE(__pdesc+8, 19, 1, __val) 119 #define SET_TX_DESC_AMPDU_DENSITY(__pdesc, __val) \ 120 SET_BITS_TO_LE_4BYTE(__pdesc+8, 20, 3, __val) 121 #define SET_TX_DESC_BT_INT(__pdesc, __val) \ 122 SET_BITS_TO_LE_4BYTE(__pdesc+8, 23, 1, __val) 123 #define SET_TX_DESC_GID(__pdesc, __val) \ 124 SET_BITS_TO_LE_4BYTE(__pdesc+8, 24, 6, __val) 125 126 127 #define SET_TX_DESC_WHEADER_LEN(__pdesc, __val) \ 128 SET_BITS_TO_LE_4BYTE(__pdesc+12, 0, 4, __val) 129 #define SET_TX_DESC_CHK_EN(__pdesc, __val) \ 130 SET_BITS_TO_LE_4BYTE(__pdesc+12, 4, 1, __val) 131 #define SET_TX_DESC_EARLY_MODE(__pdesc, __val) \ 132 SET_BITS_TO_LE_4BYTE(__pdesc+12, 5, 1, __val) 133 #define SET_TX_DESC_HWSEQ_SEL(__pdesc, __val) \ 134 SET_BITS_TO_LE_4BYTE(__pdesc+12, 6, 2, __val) 135 #define SET_TX_DESC_USE_RATE(__pdesc, __val) \ 136 SET_BITS_TO_LE_4BYTE(__pdesc+12, 8, 1, __val) 137 #define SET_TX_DESC_DISABLE_RTS_FB(__pdesc, __val) \ 138 SET_BITS_TO_LE_4BYTE(__pdesc+12, 9, 1, __val) 139 #define SET_TX_DESC_DISABLE_FB(__pdesc, __val) \ 140 SET_BITS_TO_LE_4BYTE(__pdesc+12, 10, 1, __val) 141 #define SET_TX_DESC_CTS2SELF(__pdesc, __val) \ 142 SET_BITS_TO_LE_4BYTE(__pdesc+12, 11, 1, __val) 143 #define SET_TX_DESC_RTS_ENABLE(__pdesc, __val) \ 144 SET_BITS_TO_LE_4BYTE(__pdesc+12, 12, 1, __val) 145 #define SET_TX_DESC_HW_RTS_ENABLE(__pdesc, __val) \ 146 SET_BITS_TO_LE_4BYTE(__pdesc+12, 13, 1, __val) 147 #define SET_TX_DESC_NAV_USE_HDR(__pdesc, __val) \ 148 SET_BITS_TO_LE_4BYTE(__pdesc+12, 15, 1, __val) 149 #define SET_TX_DESC_USE_MAX_LEN(__pdesc, __val) \ 150 SET_BITS_TO_LE_4BYTE(__pdesc+12, 16, 1, __val) 151 #define SET_TX_DESC_MAX_AGG_NUM(__pdesc, __val) \ 152 SET_BITS_TO_LE_4BYTE(__pdesc+12, 17, 5, __val) 153 #define SET_TX_DESC_NDPA(__pdesc, __val) \ 154 SET_BITS_TO_LE_4BYTE(__pdesc+12, 22, 2, __val) 155 #define SET_TX_DESC_AMPDU_MAX_TIME(__pdesc, __val) \ 156 SET_BITS_TO_LE_4BYTE(__pdesc+12, 24, 8, __val) 157 158 159 #define SET_TX_DESC_TX_RATE(__pdesc, __val) \ 160 SET_BITS_TO_LE_4BYTE(__pdesc+16, 0, 7, __val) 161 #define SET_TX_DESC_DATA_RATE_FB_LIMIT(__pdesc, __val) \ 162 SET_BITS_TO_LE_4BYTE(__pdesc+16, 8, 5, __val) 163 #define SET_TX_DESC_RTS_RATE_FB_LIMIT(__pdesc, __val) \ 164 SET_BITS_TO_LE_4BYTE(__pdesc+16, 13, 4, __val) 165 #define SET_TX_DESC_RETRY_LIMIT_ENABLE(__pdesc, __val) \ 166 SET_BITS_TO_LE_4BYTE(__pdesc+16, 17, 1, __val) 167 #define SET_TX_DESC_DATA_RETRY_LIMIT(__pdesc, __val) \ 168 SET_BITS_TO_LE_4BYTE(__pdesc+16, 18, 6, __val) 169 #define SET_TX_DESC_RTS_RATE(__pdesc, __val) \ 170 SET_BITS_TO_LE_4BYTE(__pdesc+16, 24, 5, __val) 171 172 173 #define SET_TX_DESC_TX_SUB_CARRIER(__pdesc, __val) \ 174 SET_BITS_TO_LE_4BYTE(__pdesc+20, 0, 4, __val) 175 #define SET_TX_DESC_DATA_SHORTGI(__pdesc, __val) \ 176 SET_BITS_TO_LE_4BYTE(__pdesc+20, 4, 1, __val) 177 #define SET_TX_DESC_DATA_BW(__pdesc, __val) \ 178 SET_BITS_TO_LE_4BYTE(__pdesc+20, 5, 2, __val) 179 #define SET_TX_DESC_DATA_LDPC(__pdesc, __val) \ 180 SET_BITS_TO_LE_4BYTE(__pdesc+20, 7, 1, __val) 181 #define SET_TX_DESC_DATA_STBC(__pdesc, __val) \ 182 SET_BITS_TO_LE_4BYTE(__pdesc+20, 8, 2, __val) 183 #define SET_TX_DESC_CTROL_STBC(__pdesc, __val) \ 184 SET_BITS_TO_LE_4BYTE(__pdesc+20, 10, 2, __val) 185 #define SET_TX_DESC_RTS_SHORT(__pdesc, __val) \ 186 SET_BITS_TO_LE_4BYTE(__pdesc+20, 12, 1, __val) 187 #define SET_TX_DESC_RTS_SC(__pdesc, __val) \ 188 SET_BITS_TO_LE_4BYTE(__pdesc+20, 13, 4, __val) 189 190 191 #define SET_TX_DESC_TX_BUFFER_SIZE(__pdesc, __val) \ 192 SET_BITS_TO_LE_4BYTE(__pdesc+28, 0, 16, __val) 193 194 #define GET_TX_DESC_TX_BUFFER_SIZE(__pdesc) \ 195 LE_BITS_TO_4BYTE(__pdesc+28, 0, 16) 196 197 #define SET_TX_DESC_HWSEQ_EN(__pdesc, __val) \ 198 SET_BITS_TO_LE_4BYTE(__pdesc+32, 15, 1, __val) 199 200 #define SET_TX_DESC_SEQ(__pdesc, __val) \ 201 SET_BITS_TO_LE_4BYTE(__pdesc+36, 12, 12, __val) 202 203 #define SET_TX_DESC_TX_BUFFER_ADDRESS(__pdesc, __val) \ 204 SET_BITS_TO_LE_4BYTE(__pdesc+40, 0, 32, __val) 205 206 #define GET_TX_DESC_TX_BUFFER_ADDRESS(__pdesc) \ 207 LE_BITS_TO_4BYTE(__pdesc+40, 0, 32) 208 209 210 #define SET_TX_DESC_NEXT_DESC_ADDRESS(__pdesc, __val) \ 211 SET_BITS_TO_LE_4BYTE(__pdesc+48, 0, 32, __val) 212 213 #define GET_TX_DESC_NEXT_DESC_ADDRESS(__pdesc) \ 214 LE_BITS_TO_4BYTE(__pdesc+48, 0, 32) 215 216 #define GET_RX_DESC_PKT_LEN(__pdesc) \ 217 LE_BITS_TO_4BYTE(__pdesc, 0, 14) 218 #define GET_RX_DESC_CRC32(__pdesc) \ 219 LE_BITS_TO_4BYTE(__pdesc, 14, 1) 220 #define GET_RX_DESC_ICV(__pdesc) \ 221 LE_BITS_TO_4BYTE(__pdesc, 15, 1) 222 #define GET_RX_DESC_DRV_INFO_SIZE(__pdesc) \ 223 LE_BITS_TO_4BYTE(__pdesc, 16, 4) 224 #define GET_RX_DESC_SECURITY(__pdesc) \ 225 LE_BITS_TO_4BYTE(__pdesc, 20, 3) 226 #define GET_RX_DESC_QOS(__pdesc) \ 227 LE_BITS_TO_4BYTE(__pdesc, 23, 1) 228 #define GET_RX_DESC_SHIFT(__pdesc) \ 229 LE_BITS_TO_4BYTE(__pdesc, 24, 2) 230 #define GET_RX_DESC_PHYST(__pdesc) \ 231 LE_BITS_TO_4BYTE(__pdesc, 26, 1) 232 #define GET_RX_DESC_SWDEC(__pdesc) \ 233 LE_BITS_TO_4BYTE(__pdesc, 27, 1) 234 #define GET_RX_DESC_LS(__pdesc) \ 235 LE_BITS_TO_4BYTE(__pdesc, 28, 1) 236 #define GET_RX_DESC_FS(__pdesc) \ 237 LE_BITS_TO_4BYTE(__pdesc, 29, 1) 238 #define GET_RX_DESC_EOR(__pdesc) \ 239 LE_BITS_TO_4BYTE(__pdesc, 30, 1) 240 #define GET_RX_DESC_OWN(__pdesc) \ 241 LE_BITS_TO_4BYTE(__pdesc, 31, 1) 242 243 #define SET_RX_DESC_PKT_LEN(__pdesc, __val) \ 244 SET_BITS_TO_LE_4BYTE(__pdesc, 0, 14, __val) 245 #define SET_RX_DESC_EOR(__pdesc, __val) \ 246 SET_BITS_TO_LE_4BYTE(__pdesc, 30, 1, __val) 247 #define SET_RX_DESC_OWN(__pdesc, __val) \ 248 SET_BITS_TO_LE_4BYTE(__pdesc, 31, 1, __val) 249 250 #define GET_RX_DESC_MACID(__pdesc) \ 251 LE_BITS_TO_4BYTE(__pdesc+4, 0, 7) 252 #define GET_RX_DESC_TID(__pdesc) \ 253 LE_BITS_TO_4BYTE(__pdesc+4, 8, 4) 254 #define GET_RX_DESC_AMSDU(__pdesc) \ 255 LE_BITS_TO_4BYTE(__pdesc+4, 13, 1) 256 #define GET_RX_STATUS_DESC_RXID_MATCH(__pdesc) \ 257 LE_BITS_TO_4BYTE(__pdesc+4, 14, 1) 258 #define GET_RX_DESC_PAGGR(__pdesc) \ 259 LE_BITS_TO_4BYTE(__pdesc+4, 15, 1) 260 #define GET_RX_DESC_A1_FIT(__pdesc) \ 261 LE_BITS_TO_4BYTE(__pdesc+4, 16, 4) 262 #define GET_RX_DESC_CHKERR(__pdesc) \ 263 LE_BITS_TO_4BYTE(__pdesc+4, 20, 1) 264 #define GET_RX_DESC_IPVER(__pdesc) \ 265 LE_BITS_TO_4BYTE(__pdesc+4, 21, 1) 266 #define GET_RX_STATUS_DESC_IS_TCPUDP(__pdesc) \ 267 LE_BITS_TO_4BYTE(__pdesc+4, 22, 1) 268 #define GET_RX_STATUS_DESC_CHK_VLD(__pdesc) \ 269 LE_BITS_TO_4BYTE(__pdesc+4, 23, 1) 270 #define GET_RX_DESC_PAM(__pdesc) \ 271 LE_BITS_TO_4BYTE(__pdesc+4, 24, 1) 272 #define GET_RX_DESC_PWR(__pdesc) \ 273 LE_BITS_TO_4BYTE(__pdesc+4, 25, 1) 274 #define GET_RX_DESC_MD(__pdesc) \ 275 LE_BITS_TO_4BYTE(__pdesc+4, 26, 1) 276 #define GET_RX_DESC_MF(__pdesc) \ 277 LE_BITS_TO_4BYTE(__pdesc+4, 27, 1) 278 #define GET_RX_DESC_TYPE(__pdesc) \ 279 LE_BITS_TO_4BYTE(__pdesc+4, 28, 2) 280 #define GET_RX_DESC_MC(__pdesc) \ 281 LE_BITS_TO_4BYTE(__pdesc+4, 30, 1) 282 #define GET_RX_DESC_BC(__pdesc) \ 283 LE_BITS_TO_4BYTE(__pdesc+4, 31, 1) 284 285 286 #define GET_RX_DESC_SEQ(__pdesc) \ 287 LE_BITS_TO_4BYTE(__pdesc+8, 0, 12) 288 #define GET_RX_DESC_FRAG(__pdesc) \ 289 LE_BITS_TO_4BYTE(__pdesc+8, 12, 4) 290 #define GET_RX_STATUS_DESC_RX_IS_QOS(__pdesc) \ 291 LE_BITS_TO_4BYTE(__pdesc+8, 16, 1) 292 #define GET_RX_STATUS_DESC_WLANHD_IV_LEN(__pdesc) \ 293 LE_BITS_TO_4BYTE(__pdesc+8, 18, 6) 294 #define GET_RX_STATUS_DESC_RPT_SEL(__pdesc) \ 295 LE_BITS_TO_4BYTE(__pdesc+8, 28, 1) 296 297 298 #define GET_RX_DESC_RXMCS(__pdesc) \ 299 LE_BITS_TO_4BYTE(__pdesc+12, 0, 7) 300 #define GET_RX_DESC_RXHT(__pdesc) \ 301 LE_BITS_TO_4BYTE(__pdesc+12, 6, 1) 302 #define GET_RX_STATUS_DESC_RX_GF(__pdesc) \ 303 LE_BITS_TO_4BYTE(__pdesc+12, 7, 1) 304 #define GET_RX_DESC_HTC(__pdesc) \ 305 LE_BITS_TO_4BYTE(__pdesc+12, 10, 1) 306 #define GET_RX_STATUS_DESC_EOSP(__pdesc) \ 307 LE_BITS_TO_4BYTE(__pdesc+12, 11, 1) 308 #define GET_RX_STATUS_DESC_BSSID_FIT(__pdesc) \ 309 LE_BITS_TO_4BYTE(__pdesc+12, 12, 2) 310 311 #define GET_RX_STATUS_DESC_PATTERN_MATCH(__pdesc) \ 312 LE_BITS_TO_4BYTE(__pdesc+12, 29, 1) 313 #define GET_RX_STATUS_DESC_UNICAST_MATCH(__pdesc) \ 314 LE_BITS_TO_4BYTE(__pdesc+12, 30, 1) 315 #define GET_RX_STATUS_DESC_MAGIC_MATCH(__pdesc) \ 316 LE_BITS_TO_4BYTE(__pdesc+12, 31, 1) 317 318 #define GET_RX_DESC_SPLCP(__pdesc) \ 319 LE_BITS_TO_4BYTE(__pdesc+16, 0, 1) 320 #define GET_RX_STATUS_DESC_LDPC(__pdesc) \ 321 LE_BITS_TO_4BYTE(__pdesc+16, 1, 1) 322 #define GET_RX_STATUS_DESC_STBC(__pdesc) \ 323 LE_BITS_TO_4BYTE(__pdesc+16, 2, 1) 324 #define GET_RX_DESC_BW(__pdesc) \ 325 LE_BITS_TO_4BYTE(__pdesc+16, 4, 2) 326 327 #define GET_RX_DESC_TSFL(__pdesc) \ 328 LE_BITS_TO_4BYTE(__pdesc+20, 0, 32) 329 330 #define GET_RX_DESC_BUFF_ADDR(__pdesc) \ 331 LE_BITS_TO_4BYTE(__pdesc+24, 0, 32) 332 #define GET_RX_DESC_BUFF_ADDR64(__pdesc) \ 333 LE_BITS_TO_4BYTE(__pdesc+28, 0, 32) 334 335 #define SET_RX_DESC_BUFF_ADDR(__pdesc, __val) \ 336 SET_BITS_TO_LE_4BYTE(__pdesc+24, 0, 32, __val) 337 #define SET_RX_DESC_BUFF_ADDR64(__pdesc, __val) \ 338 SET_BITS_TO_LE_4BYTE(__pdesc+28, 0, 32, __val) 339 340 341 /* TX report 2 format in Rx desc*/ 342 343 #define GET_RX_RPT2_DESC_PKT_LEN(__rxstatusdesc) \ 344 LE_BITS_TO_4BYTE(__rxstatusdesc, 0, 9) 345 #define GET_RX_RPT2_DESC_MACID_VALID_1(__rxstatusdesc) \ 346 LE_BITS_TO_4BYTE(__rxstatusdesc+16, 0, 32) 347 #define GET_RX_RPT2_DESC_MACID_VALID_2(__rxstatusdesc) \ 348 LE_BITS_TO_4BYTE(__rxstatusdesc+20, 0, 32) 349 350 #define SET_EARLYMODE_PKTNUM(__paddr, __value) \ 351 SET_BITS_TO_LE_4BYTE(__paddr, 0, 4, __value) 352 #define SET_EARLYMODE_LEN0(__paddr, __value) \ 353 SET_BITS_TO_LE_4BYTE(__paddr, 4, 12, __value) 354 #define SET_EARLYMODE_LEN1(__paddr, __value) \ 355 SET_BITS_TO_LE_4BYTE(__paddr, 16, 12, __value) 356 #define SET_EARLYMODE_LEN2_1(__paddr, __value) \ 357 SET_BITS_TO_LE_4BYTE(__paddr, 28, 4, __value) 358 #define SET_EARLYMODE_LEN2_2(__paddr, __value) \ 359 SET_BITS_TO_LE_4BYTE(__paddr+4, 0, 8, __value) 360 #define SET_EARLYMODE_LEN3(__paddr, __value) \ 361 SET_BITS_TO_LE_4BYTE(__paddr+4, 8, 12, __value) 362 #define SET_EARLYMODE_LEN4(__paddr, __value) \ 363 SET_BITS_TO_LE_4BYTE(__paddr+4, 20, 12, __value) 364 365 #define CLEAR_PCI_TX_DESC_CONTENT(__pdesc, _size) \ 366 do { \ 367 if (_size > TX_DESC_NEXT_DESC_OFFSET) \ 368 memset(__pdesc, 0, TX_DESC_NEXT_DESC_OFFSET); \ 369 else \ 370 memset(__pdesc, 0, _size); \ 371 } while (0) 372 373 struct phy_rx_agc_info_t { 374 #ifdef __LITTLE_ENDIAN 375 u8 gain:7, trsw:1; 376 #else 377 u8 trsw:1, gain:7; 378 #endif 379 }; 380 struct phy_status_rpt { 381 struct phy_rx_agc_info_t path_agc[2]; 382 u8 ch_corr[2]; 383 u8 cck_sig_qual_ofdm_pwdb_all; 384 u8 cck_agc_rpt_ofdm_cfosho_a; 385 u8 cck_rpt_b_ofdm_cfosho_b; 386 u8 rsvd_1;/* ch_corr_msb; */ 387 u8 noise_power_db_msb; 388 s8 path_cfotail[2]; 389 u8 pcts_mask[2]; 390 s8 stream_rxevm[2]; 391 u8 path_rxsnr[2]; 392 u8 noise_power_db_lsb; 393 u8 rsvd_2[3]; 394 u8 stream_csi[2]; 395 u8 stream_target_csi[2]; 396 u8 sig_evm; 397 u8 rsvd_3; 398 #ifdef __LITTLE_ENDIAN 399 u8 antsel_rx_keep_2:1; /*ex_intf_flg:1;*/ 400 u8 sgi_en:1; 401 u8 rxsc:2; 402 u8 idle_long:1; 403 u8 r_ant_train_en:1; 404 u8 ant_sel_b:1; 405 u8 ant_sel:1; 406 #else /* _BIG_ENDIAN_ */ 407 u8 ant_sel:1; 408 u8 ant_sel_b:1; 409 u8 r_ant_train_en:1; 410 u8 idle_long:1; 411 u8 rxsc:2; 412 u8 sgi_en:1; 413 u8 antsel_rx_keep_2:1; /*ex_intf_flg:1;*/ 414 #endif 415 } __packed; 416 417 struct rx_fwinfo_8723be { 418 u8 gain_trsw[2]; 419 u16 chl_num:10; 420 u16 sub_chnl:4; 421 u16 r_rfmod:2; 422 u8 pwdb_all; 423 u8 cfosho[4]; 424 u8 cfotail[4]; 425 s8 rxevm[2]; 426 s8 rxsnr[2]; 427 u8 pcts_msk_rpt[2]; 428 u8 pdsnr[2]; 429 u8 csi_current[2]; 430 u8 rx_gain_c; 431 u8 rx_gain_d; 432 u8 sigevm; 433 u8 resvd_0; 434 u8 antidx_anta:3; 435 u8 antidx_antb:3; 436 u8 resvd_1:2; 437 } __packed; 438 439 struct tx_desc_8723be { 440 u32 pktsize:16; 441 u32 offset:8; 442 u32 bmc:1; 443 u32 htc:1; 444 u32 lastseg:1; 445 u32 firstseg:1; 446 u32 linip:1; 447 u32 noacm:1; 448 u32 gf:1; 449 u32 own:1; 450 451 u32 macid:6; 452 u32 rsvd0:2; 453 u32 queuesel:5; 454 u32 rd_nav_ext:1; 455 u32 lsig_txop_en:1; 456 u32 pifs:1; 457 u32 rateid:4; 458 u32 nav_usehdr:1; 459 u32 en_descid:1; 460 u32 sectype:2; 461 u32 pktoffset:8; 462 463 u32 rts_rc:6; 464 u32 data_rc:6; 465 u32 agg_en:1; 466 u32 rdg_en:1; 467 u32 bar_retryht:2; 468 u32 agg_break:1; 469 u32 morefrag:1; 470 u32 raw:1; 471 u32 ccx:1; 472 u32 ampdudensity:3; 473 u32 bt_int:1; 474 u32 ant_sela:1; 475 u32 ant_selb:1; 476 u32 txant_cck:2; 477 u32 txant_l:2; 478 u32 txant_ht:2; 479 480 u32 nextheadpage:8; 481 u32 tailpage:8; 482 u32 seq:12; 483 u32 cpu_handle:1; 484 u32 tag1:1; 485 u32 trigger_int:1; 486 u32 hwseq_en:1; 487 488 u32 rtsrate:5; 489 u32 apdcfe:1; 490 u32 qos:1; 491 u32 hwseq_ssn:1; 492 u32 userrate:1; 493 u32 dis_rtsfb:1; 494 u32 dis_datafb:1; 495 u32 cts2self:1; 496 u32 rts_en:1; 497 u32 hwrts_en:1; 498 u32 portid:1; 499 u32 pwr_status:3; 500 u32 waitdcts:1; 501 u32 cts2ap_en:1; 502 u32 txsc:2; 503 u32 stbc:2; 504 u32 txshort:1; 505 u32 txbw:1; 506 u32 rtsshort:1; 507 u32 rtsbw:1; 508 u32 rtssc:2; 509 u32 rtsstbc:2; 510 511 u32 txrate:6; 512 u32 shortgi:1; 513 u32 ccxt:1; 514 u32 txrate_fb_lmt:5; 515 u32 rtsrate_fb_lmt:4; 516 u32 retrylmt_en:1; 517 u32 txretrylmt:6; 518 u32 usb_txaggnum:8; 519 520 u32 txagca:5; 521 u32 txagcb:5; 522 u32 usemaxlen:1; 523 u32 maxaggnum:5; 524 u32 mcsg1maxlen:4; 525 u32 mcsg2maxlen:4; 526 u32 mcsg3maxlen:4; 527 u32 mcs7sgimaxlen:4; 528 529 u32 txbuffersize:16; 530 u32 sw_offset30:8; 531 u32 sw_offset31:4; 532 u32 rsvd1:1; 533 u32 antsel_c:1; 534 u32 null_0:1; 535 u32 null_1:1; 536 537 u32 txbuffaddr; 538 u32 txbufferaddr64; 539 u32 nextdescaddress; 540 u32 nextdescaddress64; 541 542 u32 reserve_pass_pcie_mm_limit[4]; 543 } __packed; 544 545 struct rx_desc_8723be { 546 u32 length:14; 547 u32 crc32:1; 548 u32 icverror:1; 549 u32 drv_infosize:4; 550 u32 security:3; 551 u32 qos:1; 552 u32 shift:2; 553 u32 phystatus:1; 554 u32 swdec:1; 555 u32 lastseg:1; 556 u32 firstseg:1; 557 u32 eor:1; 558 u32 own:1; 559 560 u32 macid:6; 561 u32 tid:4; 562 u32 hwrsvd:5; 563 u32 paggr:1; 564 u32 faggr:1; 565 u32 a1_fit:4; 566 u32 a2_fit:4; 567 u32 pam:1; 568 u32 pwr:1; 569 u32 moredata:1; 570 u32 morefrag:1; 571 u32 type:2; 572 u32 mc:1; 573 u32 bc:1; 574 575 u32 seq:12; 576 u32 frag:4; 577 u32 nextpktlen:14; 578 u32 nextind:1; 579 u32 rsvd:1; 580 581 u32 rxmcs:6; 582 u32 rxht:1; 583 u32 amsdu:1; 584 u32 splcp:1; 585 u32 bandwidth:1; 586 u32 htc:1; 587 u32 tcpchk_rpt:1; 588 u32 ipcchk_rpt:1; 589 u32 tcpchk_valid:1; 590 u32 hwpcerr:1; 591 u32 hwpcind:1; 592 u32 iv0:16; 593 594 u32 iv1; 595 596 u32 tsfl; 597 598 u32 bufferaddress; 599 u32 bufferaddress64; 600 601 } __packed; 602 603 void rtl8723be_tx_fill_desc(struct ieee80211_hw *hw, 604 struct ieee80211_hdr *hdr, 605 u8 *pdesc_tx, u8 *txbd, 606 struct ieee80211_tx_info *info, 607 struct ieee80211_sta *sta, struct sk_buff *skb, 608 u8 hw_queue, struct rtl_tcb_desc *ptcb_desc); 609 bool rtl8723be_rx_query_desc(struct ieee80211_hw *hw, 610 struct rtl_stats *status, 611 struct ieee80211_rx_status *rx_status, 612 u8 *pdesc, struct sk_buff *skb); 613 void rtl8723be_set_desc(struct ieee80211_hw *hw, u8 *pdesc, 614 bool istx, u8 desc_name, u8 *val); 615 u32 rtl8723be_get_desc(u8 *pdesc, bool istx, u8 desc_name); 616 bool rtl8723be_is_tx_desc_closed(struct ieee80211_hw *hw, 617 u8 hw_queue, u16 index); 618 void rtl8723be_tx_polling(struct ieee80211_hw *hw, u8 hw_queue); 619 void rtl8723be_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc, 620 bool firstseg, bool lastseg, 621 struct sk_buff *skb); 622 u32 rtl8723be_rx_command_packet(struct ieee80211_hw *hw, 623 const struct rtl_stats *status, 624 struct sk_buff *skb); 625 #endif 626