1 /****************************************************************************** 2 * 3 * Copyright(c) 2009-2014 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * The full GNU General Public License is included in this distribution in the 15 * file called LICENSE. 16 * 17 * Contact Information: 18 * wlanfae <wlanfae@realtek.com> 19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, 20 * Hsinchu 300, Taiwan. 21 * 22 * Larry Finger <Larry.Finger@lwfinger.net> 23 * 24 *****************************************************************************/ 25 26 #ifndef __RTL8723BE_TRX_H__ 27 #define __RTL8723BE_TRX_H__ 28 29 #define TX_DESC_SIZE 40 30 #define TX_DESC_AGGR_SUBFRAME_SIZE 32 31 32 #define RX_DESC_SIZE 32 33 #define RX_DRV_INFO_SIZE_UNIT 8 34 35 #define TX_DESC_NEXT_DESC_OFFSET 40 36 #define USB_HWDESC_HEADER_LEN 40 37 #define CRCLENGTH 4 38 39 #define SET_TX_DESC_PKT_SIZE(__pdesc, __val) \ 40 SET_BITS_TO_LE_4BYTE(__pdesc, 0, 16, __val) 41 #define SET_TX_DESC_OFFSET(__pdesc, __val) \ 42 SET_BITS_TO_LE_4BYTE(__pdesc, 16, 8, __val) 43 #define SET_TX_DESC_BMC(__pdesc, __val) \ 44 SET_BITS_TO_LE_4BYTE(__pdesc, 24, 1, __val) 45 #define SET_TX_DESC_HTC(__pdesc, __val) \ 46 SET_BITS_TO_LE_4BYTE(__pdesc, 25, 1, __val) 47 #define SET_TX_DESC_LAST_SEG(__pdesc, __val) \ 48 SET_BITS_TO_LE_4BYTE(__pdesc, 26, 1, __val) 49 #define SET_TX_DESC_FIRST_SEG(__pdesc, __val) \ 50 SET_BITS_TO_LE_4BYTE(__pdesc, 27, 1, __val) 51 #define SET_TX_DESC_LINIP(__pdesc, __val) \ 52 SET_BITS_TO_LE_4BYTE(__pdesc, 28, 1, __val) 53 #define SET_TX_DESC_NO_ACM(__pdesc, __val) \ 54 SET_BITS_TO_LE_4BYTE(__pdesc, 29, 1, __val) 55 #define SET_TX_DESC_GF(__pdesc, __val) \ 56 SET_BITS_TO_LE_4BYTE(__pdesc, 30, 1, __val) 57 #define SET_TX_DESC_OWN(__pdesc, __val) \ 58 SET_BITS_TO_LE_4BYTE(__pdesc, 31, 1, __val) 59 60 #define GET_TX_DESC_PKT_SIZE(__pdesc) \ 61 LE_BITS_TO_4BYTE(__pdesc, 0, 16) 62 #define GET_TX_DESC_OFFSET(__pdesc) \ 63 LE_BITS_TO_4BYTE(__pdesc, 16, 8) 64 #define GET_TX_DESC_BMC(__pdesc) \ 65 LE_BITS_TO_4BYTE(__pdesc, 24, 1) 66 #define GET_TX_DESC_HTC(__pdesc) \ 67 LE_BITS_TO_4BYTE(__pdesc, 25, 1) 68 #define GET_TX_DESC_LAST_SEG(__pdesc) \ 69 LE_BITS_TO_4BYTE(__pdesc, 26, 1) 70 #define GET_TX_DESC_FIRST_SEG(__pdesc) \ 71 LE_BITS_TO_4BYTE(__pdesc, 27, 1) 72 #define GET_TX_DESC_LINIP(__pdesc) \ 73 LE_BITS_TO_4BYTE(__pdesc, 28, 1) 74 #define GET_TX_DESC_NO_ACM(__pdesc) \ 75 LE_BITS_TO_4BYTE(__pdesc, 29, 1) 76 #define GET_TX_DESC_GF(__pdesc) \ 77 LE_BITS_TO_4BYTE(__pdesc, 30, 1) 78 #define GET_TX_DESC_OWN(__pdesc) \ 79 LE_BITS_TO_4BYTE(__pdesc, 31, 1) 80 81 #define SET_TX_DESC_MACID(__pdesc, __val) \ 82 SET_BITS_TO_LE_4BYTE(__pdesc+4, 0, 7, __val) 83 #define SET_TX_DESC_QUEUE_SEL(__pdesc, __val) \ 84 SET_BITS_TO_LE_4BYTE(__pdesc+4, 8, 5, __val) 85 #define SET_TX_DESC_RDG_NAV_EXT(__pdesc, __val) \ 86 SET_BITS_TO_LE_4BYTE(__pdesc+4, 13, 1, __val) 87 #define SET_TX_DESC_LSIG_TXOP_EN(__pdesc, __val) \ 88 SET_BITS_TO_LE_4BYTE(__pdesc+4, 14, 1, __val) 89 #define SET_TX_DESC_PIFS(__pdesc, __val) \ 90 SET_BITS_TO_LE_4BYTE(__pdesc+4, 15, 1, __val) 91 #define SET_TX_DESC_RATE_ID(__pdesc, __val) \ 92 SET_BITS_TO_LE_4BYTE(__pdesc+4, 16, 5, __val) 93 #define SET_TX_DESC_EN_DESC_ID(__pdesc, __val) \ 94 SET_BITS_TO_LE_4BYTE(__pdesc+4, 21, 1, __val) 95 #define SET_TX_DESC_SEC_TYPE(__pdesc, __val) \ 96 SET_BITS_TO_LE_4BYTE(__pdesc+4, 22, 2, __val) 97 #define SET_TX_DESC_PKT_OFFSET(__pdesc, __val) \ 98 SET_BITS_TO_LE_4BYTE(__pdesc+4, 24, 5, __val) 99 100 101 #define SET_TX_DESC_PAID(__pdesc, __val) \ 102 SET_BITS_TO_LE_4BYTE(__pdesc+8, 0, 9, __val) 103 #define SET_TX_DESC_CCA_RTS(__pdesc, __val) \ 104 SET_BITS_TO_LE_4BYTE(__pdesc+8, 10, 2, __val) 105 #define SET_TX_DESC_AGG_ENABLE(__pdesc, __val) \ 106 SET_BITS_TO_LE_4BYTE(__pdesc+8, 12, 1, __val) 107 #define SET_TX_DESC_RDG_ENABLE(__pdesc, __val) \ 108 SET_BITS_TO_LE_4BYTE(__pdesc+8, 13, 1, __val) 109 #define SET_TX_DESC_BAR_RTY_TH(__pdesc, __val) \ 110 SET_BITS_TO_LE_4BYTE((__pdesc) + 8, 14, 2, __val) 111 #define SET_TX_DESC_AGG_BREAK(__pdesc, __val) \ 112 SET_BITS_TO_LE_4BYTE(__pdesc+8, 16, 1, __val) 113 #define SET_TX_DESC_MORE_FRAG(__pdesc, __val) \ 114 SET_BITS_TO_LE_4BYTE(__pdesc+8, 17, 1, __val) 115 #define SET_TX_DESC_RAW(__pdesc, __val) \ 116 SET_BITS_TO_LE_4BYTE(__pdesc+8, 18, 1, __val) 117 #define SET_TX_DESC_SPE_RPT(__pdesc, __val) \ 118 SET_BITS_TO_LE_4BYTE((__pdesc) + 8, 19, 1, __val) 119 #define SET_TX_DESC_AMPDU_DENSITY(__pdesc, __val) \ 120 SET_BITS_TO_LE_4BYTE(__pdesc+8, 20, 3, __val) 121 #define SET_TX_DESC_BT_INT(__pdesc, __val) \ 122 SET_BITS_TO_LE_4BYTE(__pdesc+8, 23, 1, __val) 123 #define SET_TX_DESC_GID(__pdesc, __val) \ 124 SET_BITS_TO_LE_4BYTE(__pdesc+8, 24, 6, __val) 125 126 127 #define SET_TX_DESC_WHEADER_LEN(__pdesc, __val) \ 128 SET_BITS_TO_LE_4BYTE(__pdesc+12, 0, 4, __val) 129 #define SET_TX_DESC_CHK_EN(__pdesc, __val) \ 130 SET_BITS_TO_LE_4BYTE(__pdesc+12, 4, 1, __val) 131 #define SET_TX_DESC_EARLY_MODE(__pdesc, __val) \ 132 SET_BITS_TO_LE_4BYTE(__pdesc+12, 5, 1, __val) 133 #define SET_TX_DESC_HWSEQ_SEL(__pdesc, __val) \ 134 SET_BITS_TO_LE_4BYTE(__pdesc+12, 6, 2, __val) 135 #define SET_TX_DESC_USE_RATE(__pdesc, __val) \ 136 SET_BITS_TO_LE_4BYTE(__pdesc+12, 8, 1, __val) 137 #define SET_TX_DESC_DISABLE_RTS_FB(__pdesc, __val) \ 138 SET_BITS_TO_LE_4BYTE(__pdesc+12, 9, 1, __val) 139 #define SET_TX_DESC_DISABLE_FB(__pdesc, __val) \ 140 SET_BITS_TO_LE_4BYTE(__pdesc+12, 10, 1, __val) 141 #define SET_TX_DESC_CTS2SELF(__pdesc, __val) \ 142 SET_BITS_TO_LE_4BYTE(__pdesc+12, 11, 1, __val) 143 #define SET_TX_DESC_RTS_ENABLE(__pdesc, __val) \ 144 SET_BITS_TO_LE_4BYTE(__pdesc+12, 12, 1, __val) 145 #define SET_TX_DESC_HW_RTS_ENABLE(__pdesc, __val) \ 146 SET_BITS_TO_LE_4BYTE(__pdesc+12, 13, 1, __val) 147 #define SET_TX_DESC_NAV_USE_HDR(__pdesc, __val) \ 148 SET_BITS_TO_LE_4BYTE(__pdesc+12, 15, 1, __val) 149 #define SET_TX_DESC_USE_MAX_LEN(__pdesc, __val) \ 150 SET_BITS_TO_LE_4BYTE(__pdesc+12, 16, 1, __val) 151 #define SET_TX_DESC_MAX_AGG_NUM(__pdesc, __val) \ 152 SET_BITS_TO_LE_4BYTE(__pdesc+12, 17, 5, __val) 153 #define SET_TX_DESC_NDPA(__pdesc, __val) \ 154 SET_BITS_TO_LE_4BYTE(__pdesc+12, 22, 2, __val) 155 #define SET_TX_DESC_AMPDU_MAX_TIME(__pdesc, __val) \ 156 SET_BITS_TO_LE_4BYTE(__pdesc+12, 24, 8, __val) 157 158 159 #define SET_TX_DESC_TX_RATE(__pdesc, __val) \ 160 SET_BITS_TO_LE_4BYTE(__pdesc+16, 0, 7, __val) 161 #define SET_TX_DESC_DATA_RATE_FB_LIMIT(__pdesc, __val) \ 162 SET_BITS_TO_LE_4BYTE(__pdesc+16, 8, 5, __val) 163 #define SET_TX_DESC_RTS_RATE_FB_LIMIT(__pdesc, __val) \ 164 SET_BITS_TO_LE_4BYTE(__pdesc+16, 13, 4, __val) 165 #define SET_TX_DESC_RETRY_LIMIT_ENABLE(__pdesc, __val) \ 166 SET_BITS_TO_LE_4BYTE(__pdesc+16, 17, 1, __val) 167 #define SET_TX_DESC_DATA_RETRY_LIMIT(__pdesc, __val) \ 168 SET_BITS_TO_LE_4BYTE(__pdesc+16, 18, 6, __val) 169 #define SET_TX_DESC_RTS_RATE(__pdesc, __val) \ 170 SET_BITS_TO_LE_4BYTE(__pdesc+16, 24, 5, __val) 171 172 173 #define SET_TX_DESC_TX_SUB_CARRIER(__pdesc, __val) \ 174 SET_BITS_TO_LE_4BYTE(__pdesc+20, 0, 4, __val) 175 #define SET_TX_DESC_DATA_SHORTGI(__pdesc, __val) \ 176 SET_BITS_TO_LE_4BYTE(__pdesc+20, 4, 1, __val) 177 #define SET_TX_DESC_DATA_BW(__pdesc, __val) \ 178 SET_BITS_TO_LE_4BYTE(__pdesc+20, 5, 2, __val) 179 #define SET_TX_DESC_DATA_LDPC(__pdesc, __val) \ 180 SET_BITS_TO_LE_4BYTE(__pdesc+20, 7, 1, __val) 181 #define SET_TX_DESC_DATA_STBC(__pdesc, __val) \ 182 SET_BITS_TO_LE_4BYTE(__pdesc+20, 8, 2, __val) 183 #define SET_TX_DESC_CTROL_STBC(__pdesc, __val) \ 184 SET_BITS_TO_LE_4BYTE(__pdesc+20, 10, 2, __val) 185 #define SET_TX_DESC_RTS_SHORT(__pdesc, __val) \ 186 SET_BITS_TO_LE_4BYTE(__pdesc+20, 12, 1, __val) 187 #define SET_TX_DESC_RTS_SC(__pdesc, __val) \ 188 SET_BITS_TO_LE_4BYTE(__pdesc+20, 13, 4, __val) 189 190 #define SET_TX_DESC_SW_DEFINE(__pdesc, __val) \ 191 SET_BITS_TO_LE_4BYTE((__pdesc) + 24, 0, 12, __val) 192 #define SET_TX_DESC_MBSSID(__pdesc, __val) \ 193 SET_BITS_TO_LE_4BYTE((__pdesc) + 24, 12, 4, __val) 194 #define SET_TX_DESC_ANTSEL_A(__pdesc, __val) \ 195 SET_BITS_TO_LE_4BYTE((__pdesc) + 24, 16, 3, __val) 196 #define SET_TX_DESC_ANTSEL_B(__pdesc, __val) \ 197 SET_BITS_TO_LE_4BYTE((__pdesc) + 24, 19, 3, __val) 198 #define SET_TX_DESC_ANTSEL_C(__pdesc, __val) \ 199 SET_BITS_TO_LE_4BYTE((__pdesc) + 24, 22, 3, __val) 200 #define SET_TX_DESC_ANTSEL_D(__pdesc, __val) \ 201 SET_BITS_TO_LE_4BYTE((__pdesc) + 24, 25, 3, __val) 202 203 #define SET_TX_DESC_TX_BUFFER_SIZE(__pdesc, __val) \ 204 SET_BITS_TO_LE_4BYTE(__pdesc+28, 0, 16, __val) 205 206 #define GET_TX_DESC_TX_BUFFER_SIZE(__pdesc) \ 207 LE_BITS_TO_4BYTE(__pdesc+28, 0, 16) 208 209 #define SET_TX_DESC_HWSEQ_EN(__pdesc, __val) \ 210 SET_BITS_TO_LE_4BYTE(__pdesc+32, 15, 1, __val) 211 212 #define SET_TX_DESC_SEQ(__pdesc, __val) \ 213 SET_BITS_TO_LE_4BYTE(__pdesc+36, 12, 12, __val) 214 215 #define SET_TX_DESC_TX_BUFFER_ADDRESS(__pdesc, __val) \ 216 SET_BITS_TO_LE_4BYTE(__pdesc+40, 0, 32, __val) 217 218 #define GET_TX_DESC_TX_BUFFER_ADDRESS(__pdesc) \ 219 LE_BITS_TO_4BYTE(__pdesc+40, 0, 32) 220 221 222 #define SET_TX_DESC_NEXT_DESC_ADDRESS(__pdesc, __val) \ 223 SET_BITS_TO_LE_4BYTE(__pdesc+48, 0, 32, __val) 224 225 #define GET_TX_DESC_NEXT_DESC_ADDRESS(__pdesc) \ 226 LE_BITS_TO_4BYTE(__pdesc+48, 0, 32) 227 228 #define GET_RX_DESC_PKT_LEN(__pdesc) \ 229 LE_BITS_TO_4BYTE(__pdesc, 0, 14) 230 #define GET_RX_DESC_CRC32(__pdesc) \ 231 LE_BITS_TO_4BYTE(__pdesc, 14, 1) 232 #define GET_RX_DESC_ICV(__pdesc) \ 233 LE_BITS_TO_4BYTE(__pdesc, 15, 1) 234 #define GET_RX_DESC_DRV_INFO_SIZE(__pdesc) \ 235 LE_BITS_TO_4BYTE(__pdesc, 16, 4) 236 #define GET_RX_DESC_SECURITY(__pdesc) \ 237 LE_BITS_TO_4BYTE(__pdesc, 20, 3) 238 #define GET_RX_DESC_QOS(__pdesc) \ 239 LE_BITS_TO_4BYTE(__pdesc, 23, 1) 240 #define GET_RX_DESC_SHIFT(__pdesc) \ 241 LE_BITS_TO_4BYTE(__pdesc, 24, 2) 242 #define GET_RX_DESC_PHYST(__pdesc) \ 243 LE_BITS_TO_4BYTE(__pdesc, 26, 1) 244 #define GET_RX_DESC_SWDEC(__pdesc) \ 245 LE_BITS_TO_4BYTE(__pdesc, 27, 1) 246 #define GET_RX_DESC_LS(__pdesc) \ 247 LE_BITS_TO_4BYTE(__pdesc, 28, 1) 248 #define GET_RX_DESC_FS(__pdesc) \ 249 LE_BITS_TO_4BYTE(__pdesc, 29, 1) 250 #define GET_RX_DESC_EOR(__pdesc) \ 251 LE_BITS_TO_4BYTE(__pdesc, 30, 1) 252 #define GET_RX_DESC_OWN(__pdesc) \ 253 LE_BITS_TO_4BYTE(__pdesc, 31, 1) 254 255 #define SET_RX_DESC_PKT_LEN(__pdesc, __val) \ 256 SET_BITS_TO_LE_4BYTE(__pdesc, 0, 14, __val) 257 #define SET_RX_DESC_EOR(__pdesc, __val) \ 258 SET_BITS_TO_LE_4BYTE(__pdesc, 30, 1, __val) 259 #define SET_RX_DESC_OWN(__pdesc, __val) \ 260 SET_BITS_TO_LE_4BYTE(__pdesc, 31, 1, __val) 261 262 #define GET_RX_DESC_MACID(__pdesc) \ 263 LE_BITS_TO_4BYTE(__pdesc+4, 0, 7) 264 #define GET_RX_DESC_TID(__pdesc) \ 265 LE_BITS_TO_4BYTE(__pdesc+4, 8, 4) 266 #define GET_RX_DESC_AMSDU(__pdesc) \ 267 LE_BITS_TO_4BYTE(__pdesc+4, 13, 1) 268 #define GET_RX_STATUS_DESC_RXID_MATCH(__pdesc) \ 269 LE_BITS_TO_4BYTE(__pdesc+4, 14, 1) 270 #define GET_RX_DESC_PAGGR(__pdesc) \ 271 LE_BITS_TO_4BYTE(__pdesc+4, 15, 1) 272 #define GET_RX_DESC_A1_FIT(__pdesc) \ 273 LE_BITS_TO_4BYTE(__pdesc+4, 16, 4) 274 #define GET_RX_DESC_CHKERR(__pdesc) \ 275 LE_BITS_TO_4BYTE(__pdesc+4, 20, 1) 276 #define GET_RX_DESC_IPVER(__pdesc) \ 277 LE_BITS_TO_4BYTE(__pdesc+4, 21, 1) 278 #define GET_RX_STATUS_DESC_IS_TCPUDP(__pdesc) \ 279 LE_BITS_TO_4BYTE(__pdesc+4, 22, 1) 280 #define GET_RX_STATUS_DESC_CHK_VLD(__pdesc) \ 281 LE_BITS_TO_4BYTE(__pdesc+4, 23, 1) 282 #define GET_RX_DESC_PAM(__pdesc) \ 283 LE_BITS_TO_4BYTE(__pdesc+4, 24, 1) 284 #define GET_RX_DESC_PWR(__pdesc) \ 285 LE_BITS_TO_4BYTE(__pdesc+4, 25, 1) 286 #define GET_RX_DESC_MD(__pdesc) \ 287 LE_BITS_TO_4BYTE(__pdesc+4, 26, 1) 288 #define GET_RX_DESC_MF(__pdesc) \ 289 LE_BITS_TO_4BYTE(__pdesc+4, 27, 1) 290 #define GET_RX_DESC_TYPE(__pdesc) \ 291 LE_BITS_TO_4BYTE(__pdesc+4, 28, 2) 292 #define GET_RX_DESC_MC(__pdesc) \ 293 LE_BITS_TO_4BYTE(__pdesc+4, 30, 1) 294 #define GET_RX_DESC_BC(__pdesc) \ 295 LE_BITS_TO_4BYTE(__pdesc+4, 31, 1) 296 297 298 #define GET_RX_DESC_SEQ(__pdesc) \ 299 LE_BITS_TO_4BYTE(__pdesc+8, 0, 12) 300 #define GET_RX_DESC_FRAG(__pdesc) \ 301 LE_BITS_TO_4BYTE(__pdesc+8, 12, 4) 302 #define GET_RX_STATUS_DESC_RX_IS_QOS(__pdesc) \ 303 LE_BITS_TO_4BYTE(__pdesc+8, 16, 1) 304 #define GET_RX_STATUS_DESC_WLANHD_IV_LEN(__pdesc) \ 305 LE_BITS_TO_4BYTE(__pdesc+8, 18, 6) 306 #define GET_RX_STATUS_DESC_RPT_SEL(__pdesc) \ 307 LE_BITS_TO_4BYTE(__pdesc+8, 28, 1) 308 309 310 #define GET_RX_DESC_RXMCS(__pdesc) \ 311 LE_BITS_TO_4BYTE(__pdesc+12, 0, 7) 312 #define GET_RX_DESC_RXHT(__pdesc) \ 313 LE_BITS_TO_4BYTE(__pdesc+12, 6, 1) 314 #define GET_RX_STATUS_DESC_RX_GF(__pdesc) \ 315 LE_BITS_TO_4BYTE(__pdesc+12, 7, 1) 316 #define GET_RX_DESC_HTC(__pdesc) \ 317 LE_BITS_TO_4BYTE(__pdesc+12, 10, 1) 318 #define GET_RX_STATUS_DESC_EOSP(__pdesc) \ 319 LE_BITS_TO_4BYTE(__pdesc+12, 11, 1) 320 #define GET_RX_STATUS_DESC_BSSID_FIT(__pdesc) \ 321 LE_BITS_TO_4BYTE(__pdesc+12, 12, 2) 322 323 #define GET_RX_STATUS_DESC_PATTERN_MATCH(__pdesc) \ 324 LE_BITS_TO_4BYTE(__pdesc+12, 29, 1) 325 #define GET_RX_STATUS_DESC_UNICAST_MATCH(__pdesc) \ 326 LE_BITS_TO_4BYTE(__pdesc+12, 30, 1) 327 #define GET_RX_STATUS_DESC_MAGIC_MATCH(__pdesc) \ 328 LE_BITS_TO_4BYTE(__pdesc+12, 31, 1) 329 330 #define GET_RX_DESC_SPLCP(__pdesc) \ 331 LE_BITS_TO_4BYTE(__pdesc+16, 0, 1) 332 #define GET_RX_STATUS_DESC_LDPC(__pdesc) \ 333 LE_BITS_TO_4BYTE(__pdesc+16, 1, 1) 334 #define GET_RX_STATUS_DESC_STBC(__pdesc) \ 335 LE_BITS_TO_4BYTE(__pdesc+16, 2, 1) 336 #define GET_RX_DESC_BW(__pdesc) \ 337 LE_BITS_TO_4BYTE(__pdesc+16, 4, 2) 338 339 #define GET_RX_DESC_TSFL(__pdesc) \ 340 LE_BITS_TO_4BYTE(__pdesc+20, 0, 32) 341 342 #define GET_RX_DESC_BUFF_ADDR(__pdesc) \ 343 LE_BITS_TO_4BYTE(__pdesc+24, 0, 32) 344 #define GET_RX_DESC_BUFF_ADDR64(__pdesc) \ 345 LE_BITS_TO_4BYTE(__pdesc+28, 0, 32) 346 347 #define SET_RX_DESC_BUFF_ADDR(__pdesc, __val) \ 348 SET_BITS_TO_LE_4BYTE(__pdesc+24, 0, 32, __val) 349 #define SET_RX_DESC_BUFF_ADDR64(__pdesc, __val) \ 350 SET_BITS_TO_LE_4BYTE(__pdesc+28, 0, 32, __val) 351 352 353 /* TX report 2 format in Rx desc*/ 354 355 #define GET_RX_RPT2_DESC_PKT_LEN(__rxstatusdesc) \ 356 LE_BITS_TO_4BYTE(__rxstatusdesc, 0, 9) 357 #define GET_RX_RPT2_DESC_MACID_VALID_1(__rxstatusdesc) \ 358 LE_BITS_TO_4BYTE(__rxstatusdesc+16, 0, 32) 359 #define GET_RX_RPT2_DESC_MACID_VALID_2(__rxstatusdesc) \ 360 LE_BITS_TO_4BYTE(__rxstatusdesc+20, 0, 32) 361 362 #define SET_EARLYMODE_PKTNUM(__paddr, __value) \ 363 SET_BITS_TO_LE_4BYTE(__paddr, 0, 4, __value) 364 #define SET_EARLYMODE_LEN0(__paddr, __value) \ 365 SET_BITS_TO_LE_4BYTE(__paddr, 4, 12, __value) 366 #define SET_EARLYMODE_LEN1(__paddr, __value) \ 367 SET_BITS_TO_LE_4BYTE(__paddr, 16, 12, __value) 368 #define SET_EARLYMODE_LEN2_1(__paddr, __value) \ 369 SET_BITS_TO_LE_4BYTE(__paddr, 28, 4, __value) 370 #define SET_EARLYMODE_LEN2_2(__paddr, __value) \ 371 SET_BITS_TO_LE_4BYTE(__paddr+4, 0, 8, __value) 372 #define SET_EARLYMODE_LEN3(__paddr, __value) \ 373 SET_BITS_TO_LE_4BYTE(__paddr+4, 8, 12, __value) 374 #define SET_EARLYMODE_LEN4(__paddr, __value) \ 375 SET_BITS_TO_LE_4BYTE(__paddr+4, 20, 12, __value) 376 377 #define CLEAR_PCI_TX_DESC_CONTENT(__pdesc, _size) \ 378 do { \ 379 if (_size > TX_DESC_NEXT_DESC_OFFSET) \ 380 memset(__pdesc, 0, TX_DESC_NEXT_DESC_OFFSET); \ 381 else \ 382 memset(__pdesc, 0, _size); \ 383 } while (0) 384 385 struct phy_rx_agc_info_t { 386 #ifdef __LITTLE_ENDIAN 387 u8 gain:7, trsw:1; 388 #else 389 u8 trsw:1, gain:7; 390 #endif 391 }; 392 struct phy_status_rpt { 393 struct phy_rx_agc_info_t path_agc[2]; 394 u8 ch_corr[2]; 395 u8 cck_sig_qual_ofdm_pwdb_all; 396 u8 cck_agc_rpt_ofdm_cfosho_a; 397 u8 cck_rpt_b_ofdm_cfosho_b; 398 u8 rsvd_1;/* ch_corr_msb; */ 399 u8 noise_power_db_msb; 400 s8 path_cfotail[2]; 401 u8 pcts_mask[2]; 402 s8 stream_rxevm[2]; 403 u8 path_rxsnr[2]; 404 u8 noise_power_db_lsb; 405 u8 rsvd_2[3]; 406 u8 stream_csi[2]; 407 u8 stream_target_csi[2]; 408 u8 sig_evm; 409 u8 rsvd_3; 410 #ifdef __LITTLE_ENDIAN 411 u8 antsel_rx_keep_2:1; /*ex_intf_flg:1;*/ 412 u8 sgi_en:1; 413 u8 rxsc:2; 414 u8 idle_long:1; 415 u8 r_ant_train_en:1; 416 u8 ant_sel_b:1; 417 u8 ant_sel:1; 418 #else /* _BIG_ENDIAN_ */ 419 u8 ant_sel:1; 420 u8 ant_sel_b:1; 421 u8 r_ant_train_en:1; 422 u8 idle_long:1; 423 u8 rxsc:2; 424 u8 sgi_en:1; 425 u8 antsel_rx_keep_2:1; /*ex_intf_flg:1;*/ 426 #endif 427 } __packed; 428 429 struct rx_fwinfo_8723be { 430 u8 gain_trsw[2]; 431 u16 chl_num:10; 432 u16 sub_chnl:4; 433 u16 r_rfmod:2; 434 u8 pwdb_all; 435 u8 cfosho[4]; 436 u8 cfotail[4]; 437 s8 rxevm[2]; 438 s8 rxsnr[2]; 439 u8 pcts_msk_rpt[2]; 440 u8 pdsnr[2]; 441 u8 csi_current[2]; 442 u8 rx_gain_c; 443 u8 rx_gain_d; 444 u8 sigevm; 445 u8 resvd_0; 446 u8 antidx_anta:3; 447 u8 antidx_antb:3; 448 u8 resvd_1:2; 449 } __packed; 450 451 struct tx_desc_8723be { 452 u32 pktsize:16; 453 u32 offset:8; 454 u32 bmc:1; 455 u32 htc:1; 456 u32 lastseg:1; 457 u32 firstseg:1; 458 u32 linip:1; 459 u32 noacm:1; 460 u32 gf:1; 461 u32 own:1; 462 463 u32 macid:6; 464 u32 rsvd0:2; 465 u32 queuesel:5; 466 u32 rd_nav_ext:1; 467 u32 lsig_txop_en:1; 468 u32 pifs:1; 469 u32 rateid:4; 470 u32 nav_usehdr:1; 471 u32 en_descid:1; 472 u32 sectype:2; 473 u32 pktoffset:8; 474 475 u32 rts_rc:6; 476 u32 data_rc:6; 477 u32 agg_en:1; 478 u32 rdg_en:1; 479 u32 bar_retryht:2; 480 u32 agg_break:1; 481 u32 morefrag:1; 482 u32 raw:1; 483 u32 ccx:1; 484 u32 ampdudensity:3; 485 u32 bt_int:1; 486 u32 ant_sela:1; 487 u32 ant_selb:1; 488 u32 txant_cck:2; 489 u32 txant_l:2; 490 u32 txant_ht:2; 491 492 u32 nextheadpage:8; 493 u32 tailpage:8; 494 u32 seq:12; 495 u32 cpu_handle:1; 496 u32 tag1:1; 497 u32 trigger_int:1; 498 u32 hwseq_en:1; 499 500 u32 rtsrate:5; 501 u32 apdcfe:1; 502 u32 qos:1; 503 u32 hwseq_ssn:1; 504 u32 userrate:1; 505 u32 dis_rtsfb:1; 506 u32 dis_datafb:1; 507 u32 cts2self:1; 508 u32 rts_en:1; 509 u32 hwrts_en:1; 510 u32 portid:1; 511 u32 pwr_status:3; 512 u32 waitdcts:1; 513 u32 cts2ap_en:1; 514 u32 txsc:2; 515 u32 stbc:2; 516 u32 txshort:1; 517 u32 txbw:1; 518 u32 rtsshort:1; 519 u32 rtsbw:1; 520 u32 rtssc:2; 521 u32 rtsstbc:2; 522 523 u32 txrate:6; 524 u32 shortgi:1; 525 u32 ccxt:1; 526 u32 txrate_fb_lmt:5; 527 u32 rtsrate_fb_lmt:4; 528 u32 retrylmt_en:1; 529 u32 txretrylmt:6; 530 u32 usb_txaggnum:8; 531 532 u32 txagca:5; 533 u32 txagcb:5; 534 u32 usemaxlen:1; 535 u32 maxaggnum:5; 536 u32 mcsg1maxlen:4; 537 u32 mcsg2maxlen:4; 538 u32 mcsg3maxlen:4; 539 u32 mcs7sgimaxlen:4; 540 541 u32 txbuffersize:16; 542 u32 sw_offset30:8; 543 u32 sw_offset31:4; 544 u32 rsvd1:1; 545 u32 antsel_c:1; 546 u32 null_0:1; 547 u32 null_1:1; 548 549 u32 txbuffaddr; 550 u32 txbufferaddr64; 551 u32 nextdescaddress; 552 u32 nextdescaddress64; 553 554 u32 reserve_pass_pcie_mm_limit[4]; 555 } __packed; 556 557 struct rx_desc_8723be { 558 u32 length:14; 559 u32 crc32:1; 560 u32 icverror:1; 561 u32 drv_infosize:4; 562 u32 security:3; 563 u32 qos:1; 564 u32 shift:2; 565 u32 phystatus:1; 566 u32 swdec:1; 567 u32 lastseg:1; 568 u32 firstseg:1; 569 u32 eor:1; 570 u32 own:1; 571 572 u32 macid:6; 573 u32 tid:4; 574 u32 hwrsvd:5; 575 u32 paggr:1; 576 u32 faggr:1; 577 u32 a1_fit:4; 578 u32 a2_fit:4; 579 u32 pam:1; 580 u32 pwr:1; 581 u32 moredata:1; 582 u32 morefrag:1; 583 u32 type:2; 584 u32 mc:1; 585 u32 bc:1; 586 587 u32 seq:12; 588 u32 frag:4; 589 u32 nextpktlen:14; 590 u32 nextind:1; 591 u32 rsvd:1; 592 593 u32 rxmcs:6; 594 u32 rxht:1; 595 u32 amsdu:1; 596 u32 splcp:1; 597 u32 bandwidth:1; 598 u32 htc:1; 599 u32 tcpchk_rpt:1; 600 u32 ipcchk_rpt:1; 601 u32 tcpchk_valid:1; 602 u32 hwpcerr:1; 603 u32 hwpcind:1; 604 u32 iv0:16; 605 606 u32 iv1; 607 608 u32 tsfl; 609 610 u32 bufferaddress; 611 u32 bufferaddress64; 612 613 } __packed; 614 615 void rtl8723be_tx_fill_desc(struct ieee80211_hw *hw, 616 struct ieee80211_hdr *hdr, 617 u8 *pdesc_tx, u8 *txbd, 618 struct ieee80211_tx_info *info, 619 struct ieee80211_sta *sta, struct sk_buff *skb, 620 u8 hw_queue, struct rtl_tcb_desc *ptcb_desc); 621 bool rtl8723be_rx_query_desc(struct ieee80211_hw *hw, 622 struct rtl_stats *status, 623 struct ieee80211_rx_status *rx_status, 624 u8 *pdesc, struct sk_buff *skb); 625 void rtl8723be_set_desc(struct ieee80211_hw *hw, u8 *pdesc, 626 bool istx, u8 desc_name, u8 *val); 627 u32 rtl8723be_get_desc(u8 *pdesc, bool istx, u8 desc_name); 628 bool rtl8723be_is_tx_desc_closed(struct ieee80211_hw *hw, 629 u8 hw_queue, u16 index); 630 void rtl8723be_tx_polling(struct ieee80211_hw *hw, u8 hw_queue); 631 void rtl8723be_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc, 632 bool firstseg, bool lastseg, 633 struct sk_buff *skb); 634 u32 rtl8723be_rx_command_packet(struct ieee80211_hw *hw, 635 const struct rtl_stats *status, 636 struct sk_buff *skb); 637 #endif 638