1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2009-2014  Realtek Corporation.*/
3 
4 #include "../wifi.h"
5 #include "../pci.h"
6 #include "../base.h"
7 #include "../stats.h"
8 #include "reg.h"
9 #include "def.h"
10 #include "phy.h"
11 #include "trx.h"
12 #include "led.h"
13 #include "dm.h"
14 #include "fw.h"
15 
16 static u8 _rtl8723be_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue)
17 {
18 	__le16 fc = rtl_get_fc(skb);
19 
20 	if (unlikely(ieee80211_is_beacon(fc)))
21 		return QSLT_BEACON;
22 	if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
23 		return QSLT_MGNT;
24 
25 	return skb->priority;
26 }
27 
28 static void _rtl8723be_query_rxphystatus(struct ieee80211_hw *hw,
29 					 struct rtl_stats *pstatus,
30 					 __le32 *pdesc,
31 					 struct rx_fwinfo_8723be *p_drvinfo,
32 					 bool bpacket_match_bssid,
33 					 bool bpacket_toself,
34 					 bool packet_beacon)
35 {
36 	struct rtl_priv *rtlpriv = rtl_priv(hw);
37 	struct phy_status_rpt *p_phystrpt = (struct phy_status_rpt *)p_drvinfo;
38 	s8 rx_pwr_all = 0, rx_pwr[4];
39 	u8 rf_rx_num = 0, evm, pwdb_all, pwdb_all_bt = 0;
40 	u8 i, max_spatial_stream;
41 	u32 rssi, total_rssi = 0;
42 	bool is_cck = pstatus->is_cck;
43 	u8 lan_idx, vga_idx;
44 
45 	/* Record it for next packet processing */
46 	pstatus->packet_matchbssid = bpacket_match_bssid;
47 	pstatus->packet_toself = bpacket_toself;
48 	pstatus->packet_beacon = packet_beacon;
49 	pstatus->rx_mimo_signalquality[0] = -1;
50 	pstatus->rx_mimo_signalquality[1] = -1;
51 
52 	if (is_cck) {
53 		u8 cck_highpwr;
54 		u8 cck_agc_rpt;
55 
56 		cck_agc_rpt = p_phystrpt->cck_agc_rpt_ofdm_cfosho_a;
57 
58 		/* (1)Hardware does not provide RSSI for CCK */
59 		/* (2)PWDB, Average PWDB cacluated by
60 		 * hardware (for rate adaptive)
61 		 */
62 		cck_highpwr = (u8)rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2,
63 						 BIT(9));
64 
65 		lan_idx = ((cck_agc_rpt & 0xE0) >> 5);
66 		vga_idx = (cck_agc_rpt & 0x1f);
67 
68 		switch (lan_idx) {
69 		/* 46 53 73 95 201301231630 */
70 		/* 46 53 77 99 201301241630 */
71 		case 6:
72 			rx_pwr_all = -34 - (2 * vga_idx);
73 			break;
74 		case 4:
75 			rx_pwr_all = -14 - (2 * vga_idx);
76 			break;
77 		case 1:
78 			rx_pwr_all = 6 - (2 * vga_idx);
79 			break;
80 		case 0:
81 			rx_pwr_all = 16 - (2 * vga_idx);
82 			break;
83 		default:
84 			break;
85 		}
86 
87 		pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
88 		if (pwdb_all > 100)
89 			pwdb_all = 100;
90 
91 		pstatus->rx_pwdb_all = pwdb_all;
92 		pstatus->bt_rx_rssi_percentage = pwdb_all;
93 		pstatus->recvsignalpower = rx_pwr_all;
94 
95 		/* (3) Get Signal Quality (EVM) */
96 		if (bpacket_match_bssid) {
97 			u8 sq, sq_rpt;
98 			if (pstatus->rx_pwdb_all > 40) {
99 				sq = 100;
100 			} else {
101 				sq_rpt = p_phystrpt->cck_sig_qual_ofdm_pwdb_all;
102 				if (sq_rpt > 64)
103 					sq = 0;
104 				else if (sq_rpt < 20)
105 					sq = 100;
106 				else
107 					sq = ((64 - sq_rpt) * 100) / 44;
108 			}
109 			pstatus->signalquality = sq;
110 			pstatus->rx_mimo_signalquality[0] = sq;
111 			pstatus->rx_mimo_signalquality[1] = -1;
112 		}
113 	} else {
114 		/* (1)Get RSSI for HT rate */
115 		for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
116 			/* we will judge RF RX path now. */
117 			if (rtlpriv->dm.rfpath_rxenable[i])
118 				rf_rx_num++;
119 
120 			rx_pwr[i] = ((p_phystrpt->path_agc[i].gain & 0x3f) * 2)
121 				    - 110;
122 
123 			pstatus->rx_pwr[i] = rx_pwr[i];
124 			/* Translate DBM to percentage. */
125 			rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);
126 			total_rssi += rssi;
127 
128 			pstatus->rx_mimo_signalstrength[i] = (u8)rssi;
129 		}
130 
131 		/* (2)PWDB, Average PWDB cacluated by
132 		 * hardware (for rate adaptive)
133 		 */
134 		rx_pwr_all = ((p_phystrpt->cck_sig_qual_ofdm_pwdb_all >> 1) &
135 			     0x7f) - 110;
136 
137 		pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
138 		pwdb_all_bt = pwdb_all;
139 		pstatus->rx_pwdb_all = pwdb_all;
140 		pstatus->bt_rx_rssi_percentage = pwdb_all_bt;
141 		pstatus->rxpower = rx_pwr_all;
142 		pstatus->recvsignalpower = rx_pwr_all;
143 
144 		/* (3)EVM of HT rate */
145 		if (pstatus->rate >= DESC92C_RATEMCS8 &&
146 		    pstatus->rate <= DESC92C_RATEMCS15)
147 			max_spatial_stream = 2;
148 		else
149 			max_spatial_stream = 1;
150 
151 		for (i = 0; i < max_spatial_stream; i++) {
152 			evm = rtl_evm_db_to_percentage(
153 						p_phystrpt->stream_rxevm[i]);
154 
155 			if (bpacket_match_bssid) {
156 				/* Fill value in RFD, Get the first
157 				 * spatial stream only
158 				 */
159 				if (i == 0)
160 					pstatus->signalquality =
161 							(u8)(evm & 0xff);
162 				pstatus->rx_mimo_signalquality[i] =
163 							(u8)(evm & 0xff);
164 			}
165 		}
166 
167 		if (bpacket_match_bssid) {
168 			for (i = RF90_PATH_A; i <= RF90_PATH_B; i++)
169 				rtl_priv(hw)->dm.cfo_tail[i] =
170 					(int)p_phystrpt->path_cfotail[i];
171 
172 			if (rtl_priv(hw)->dm.packet_count == 0xffffffff)
173 				rtl_priv(hw)->dm.packet_count = 0;
174 			else
175 				rtl_priv(hw)->dm.packet_count++;
176 		}
177 	}
178 
179 	/* UI BSS List signal strength(in percentage),
180 	 * make it good looking, from 0~100.
181 	 */
182 	if (is_cck)
183 		pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
184 								pwdb_all));
185 	else if (rf_rx_num != 0)
186 		pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
187 						total_rssi /= rf_rx_num));
188 }
189 
190 static void _rtl8723be_translate_rx_signal_stuff(struct ieee80211_hw *hw,
191 					struct sk_buff *skb,
192 					struct rtl_stats *pstatus,
193 					__le32 *pdesc,
194 					struct rx_fwinfo_8723be *p_drvinfo)
195 {
196 	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
197 	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
198 	struct ieee80211_hdr *hdr;
199 	u8 *tmp_buf;
200 	u8 *praddr;
201 	u8 *psaddr;
202 	u16 fc, type;
203 	bool packet_matchbssid, packet_toself, packet_beacon;
204 
205 	tmp_buf = skb->data + pstatus->rx_drvinfo_size + pstatus->rx_bufshift;
206 
207 	hdr = (struct ieee80211_hdr *)tmp_buf;
208 	fc = le16_to_cpu(hdr->frame_control);
209 	type = WLAN_FC_GET_TYPE(hdr->frame_control);
210 	praddr = hdr->addr1;
211 	psaddr = ieee80211_get_SA(hdr);
212 	memcpy(pstatus->psaddr, psaddr, ETH_ALEN);
213 
214 	packet_matchbssid = ((IEEE80211_FTYPE_CTL != type) &&
215 	     (ether_addr_equal(mac->bssid, (fc & IEEE80211_FCTL_TODS) ?
216 				  hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS) ?
217 				  hdr->addr2 : hdr->addr3)) &&
218 				  (!pstatus->hwerror) &&
219 				  (!pstatus->crc) && (!pstatus->icv));
220 
221 	packet_toself = packet_matchbssid &&
222 	    (ether_addr_equal(praddr, rtlefuse->dev_addr));
223 
224 	/* YP: packet_beacon is not initialized,
225 	 * this assignment is neccesary,
226 	 * otherwise it counld be true in this case
227 	 * the situation is much worse in Kernel 3.10
228 	 */
229 	if (ieee80211_is_beacon(hdr->frame_control))
230 		packet_beacon = true;
231 	else
232 		packet_beacon = false;
233 
234 	if (packet_beacon && packet_matchbssid)
235 		rtl_priv(hw)->dm.dbginfo.num_qry_beacon_pkt++;
236 
237 	_rtl8723be_query_rxphystatus(hw, pstatus, pdesc, p_drvinfo,
238 				     packet_matchbssid,
239 				     packet_toself,
240 				     packet_beacon);
241 
242 	rtl_process_phyinfo(hw, tmp_buf, pstatus);
243 }
244 
245 static void _rtl8723be_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
246 					__le32 *virtualaddress)
247 {
248 	u32 dwtmp = 0;
249 	memset(virtualaddress, 0, 8);
250 
251 	set_earlymode_pktnum(virtualaddress, ptcb_desc->empkt_num);
252 	if (ptcb_desc->empkt_num == 1) {
253 		dwtmp = ptcb_desc->empkt_len[0];
254 	} else {
255 		dwtmp = ptcb_desc->empkt_len[0];
256 		dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
257 		dwtmp += ptcb_desc->empkt_len[1];
258 	}
259 	set_earlymode_len0(virtualaddress, dwtmp);
260 
261 	if (ptcb_desc->empkt_num <= 3) {
262 		dwtmp = ptcb_desc->empkt_len[2];
263 	} else {
264 		dwtmp = ptcb_desc->empkt_len[2];
265 		dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
266 		dwtmp += ptcb_desc->empkt_len[3];
267 	}
268 	set_earlymode_len1(virtualaddress, dwtmp);
269 	if (ptcb_desc->empkt_num <= 5) {
270 		dwtmp = ptcb_desc->empkt_len[4];
271 	} else {
272 		dwtmp = ptcb_desc->empkt_len[4];
273 		dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
274 		dwtmp += ptcb_desc->empkt_len[5];
275 	}
276 	set_earlymode_len2_1(virtualaddress, dwtmp & 0xF);
277 	set_earlymode_len2_2(virtualaddress, dwtmp >> 4);
278 	if (ptcb_desc->empkt_num <= 7) {
279 		dwtmp = ptcb_desc->empkt_len[6];
280 	} else {
281 		dwtmp = ptcb_desc->empkt_len[6];
282 		dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
283 		dwtmp += ptcb_desc->empkt_len[7];
284 	}
285 	set_earlymode_len3(virtualaddress, dwtmp);
286 	if (ptcb_desc->empkt_num <= 9) {
287 		dwtmp = ptcb_desc->empkt_len[8];
288 	} else {
289 		dwtmp = ptcb_desc->empkt_len[8];
290 		dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
291 		dwtmp += ptcb_desc->empkt_len[9];
292 	}
293 	set_earlymode_len4(virtualaddress, dwtmp);
294 }
295 
296 bool rtl8723be_rx_query_desc(struct ieee80211_hw *hw,
297 			     struct rtl_stats *status,
298 			     struct ieee80211_rx_status *rx_status,
299 			     u8 *pdesc8, struct sk_buff *skb)
300 {
301 	struct rtl_priv *rtlpriv = rtl_priv(hw);
302 	struct rx_fwinfo_8723be *p_drvinfo;
303 	struct ieee80211_hdr *hdr;
304 	u8 wake_match;
305 	__le32 *pdesc = (__le32 *)pdesc8;
306 	u32 phystatus = get_rx_desc_physt(pdesc);
307 
308 	status->length = (u16)get_rx_desc_pkt_len(pdesc);
309 	status->rx_drvinfo_size = (u8)get_rx_desc_drv_info_size(pdesc) *
310 				  RX_DRV_INFO_SIZE_UNIT;
311 	status->rx_bufshift = (u8)(get_rx_desc_shift(pdesc) & 0x03);
312 	status->icv = (u16)get_rx_desc_icv(pdesc);
313 	status->crc = (u16)get_rx_desc_crc32(pdesc);
314 	status->hwerror = (status->crc | status->icv);
315 	status->decrypted = !get_rx_desc_swdec(pdesc);
316 	status->rate = (u8)get_rx_desc_rxmcs(pdesc);
317 	status->shortpreamble = (u16)get_rx_desc_splcp(pdesc);
318 	status->isampdu = (bool)(get_rx_desc_paggr(pdesc) == 1);
319 	status->isfirst_ampdu = (bool)(get_rx_desc_paggr(pdesc) == 1);
320 	status->timestamp_low = get_rx_desc_tsfl(pdesc);
321 	status->rx_is40mhzpacket = (bool)get_rx_desc_bw(pdesc);
322 	status->bandwidth = (u8)get_rx_desc_bw(pdesc);
323 	status->macid = get_rx_desc_macid(pdesc);
324 	status->is_ht = (bool)get_rx_desc_rxht(pdesc);
325 
326 	status->is_cck = RX_HAL_IS_CCK_RATE(status->rate);
327 
328 	if (get_rx_status_desc_rpt_sel(pdesc))
329 		status->packet_report_type = C2H_PACKET;
330 	else
331 		status->packet_report_type = NORMAL_RX;
332 
333 
334 	if (get_rx_status_desc_pattern_match(pdesc))
335 		wake_match = BIT(2);
336 	else if (get_rx_status_desc_magic_match(pdesc))
337 		wake_match = BIT(1);
338 	else if (get_rx_status_desc_unicast_match(pdesc))
339 		wake_match = BIT(0);
340 	else
341 		wake_match = 0;
342 	if (wake_match)
343 		RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD,
344 		"GGGGGGGGGGGGGet Wakeup Packet!! WakeMatch=%d\n",
345 		wake_match);
346 	rx_status->freq = hw->conf.chandef.chan->center_freq;
347 	rx_status->band = hw->conf.chandef.chan->band;
348 
349 	hdr = (struct ieee80211_hdr *)(skb->data + status->rx_drvinfo_size +
350 				       status->rx_bufshift);
351 
352 	if (status->crc)
353 		rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
354 
355 	if (status->rx_is40mhzpacket)
356 		rx_status->bw = RATE_INFO_BW_40;
357 
358 	if (status->is_ht)
359 		rx_status->encoding = RX_ENC_HT;
360 
361 	rx_status->flag |= RX_FLAG_MACTIME_START;
362 
363 	/* hw will set status->decrypted true, if it finds the
364 	 * frame is open data frame or mgmt frame.
365 	 * So hw will not decryption robust managment frame
366 	 * for IEEE80211w but still set status->decrypted
367 	 * true, so here we should set it back to undecrypted
368 	 * for IEEE80211w frame, and mac80211 sw will help
369 	 * to decrypt it
370 	 */
371 	if (status->decrypted) {
372 		if ((!_ieee80211_is_robust_mgmt_frame(hdr)) &&
373 		    (ieee80211_has_protected(hdr->frame_control)))
374 			rx_status->flag |= RX_FLAG_DECRYPTED;
375 		else
376 			rx_status->flag &= ~RX_FLAG_DECRYPTED;
377 	}
378 
379 	/* rate_idx: index of data rate into band's
380 	 * supported rates or MCS index if HT rates
381 	 * are use (RX_FLAG_HT)
382 	 */
383 	rx_status->rate_idx = rtlwifi_rate_mapping(hw, status->is_ht,
384 						   false, status->rate);
385 
386 	rx_status->mactime = status->timestamp_low;
387 	if (phystatus) {
388 		p_drvinfo = (struct rx_fwinfo_8723be *)(skb->data +
389 							status->rx_bufshift);
390 
391 		_rtl8723be_translate_rx_signal_stuff(hw, skb, status,
392 						     pdesc, p_drvinfo);
393 	}
394 	rx_status->signal = status->recvsignalpower + 10;
395 	if (status->packet_report_type == TX_REPORT2) {
396 		status->macid_valid_entry[0] =
397 		  get_rx_rpt2_desc_macid_valid_1(pdesc);
398 		status->macid_valid_entry[1] =
399 		  get_rx_rpt2_desc_macid_valid_2(pdesc);
400 	}
401 	return true;
402 }
403 
404 void rtl8723be_tx_fill_desc(struct ieee80211_hw *hw,
405 			    struct ieee80211_hdr *hdr, u8 *pdesc8,
406 			    u8 *txbd, struct ieee80211_tx_info *info,
407 			    struct ieee80211_sta *sta, struct sk_buff *skb,
408 			    u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
409 {
410 	struct rtl_priv *rtlpriv = rtl_priv(hw);
411 	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
412 	struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
413 	struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
414 	struct rtlwifi_tx_info *tx_info = rtl_tx_skb_cb_info(skb);
415 	__le32 *pdesc = (__le32 *)pdesc8;
416 	u16 seq_number;
417 	__le16 fc = hdr->frame_control;
418 	unsigned int buf_len = 0;
419 	unsigned int skb_len = skb->len;
420 	u8 fw_qsel = _rtl8723be_map_hwqueue_to_fwqueue(skb, hw_queue);
421 	bool firstseg = ((hdr->seq_ctrl &
422 			    cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
423 	bool lastseg = ((hdr->frame_control &
424 			   cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
425 	dma_addr_t mapping;
426 	u8 bw_40 = 0;
427 	u8 short_gi = 0;
428 
429 	if (mac->opmode == NL80211_IFTYPE_STATION) {
430 		bw_40 = mac->bw_40;
431 	} else if (mac->opmode == NL80211_IFTYPE_AP ||
432 		mac->opmode == NL80211_IFTYPE_ADHOC) {
433 		if (sta)
434 			bw_40 = sta->ht_cap.cap &
435 				IEEE80211_HT_CAP_SUP_WIDTH_20_40;
436 	}
437 	seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
438 	rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
439 	/* reserve 8 byte for AMPDU early mode */
440 	if (rtlhal->earlymode_enable) {
441 		skb_push(skb, EM_HDR_LEN);
442 		memset(skb->data, 0, EM_HDR_LEN);
443 	}
444 	buf_len = skb->len;
445 	mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len,
446 				 PCI_DMA_TODEVICE);
447 	if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
448 		RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "DMA mapping error\n");
449 		return;
450 	}
451 	clear_pci_tx_desc_content(pdesc, sizeof(struct tx_desc_8723be));
452 	if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
453 		firstseg = true;
454 		lastseg = true;
455 	}
456 	if (firstseg) {
457 		if (rtlhal->earlymode_enable) {
458 			set_tx_desc_pkt_offset(pdesc, 1);
459 			set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN +
460 					   EM_HDR_LEN);
461 			if (ptcb_desc->empkt_num) {
462 				RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
463 					 "Insert 8 byte.pTcb->EMPktNum:%d\n",
464 					  ptcb_desc->empkt_num);
465 				_rtl8723be_insert_emcontent(ptcb_desc,
466 							    (__le32 *)(skb->data));
467 			}
468 		} else {
469 			set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN);
470 		}
471 
472 
473 		/* ptcb_desc->use_driver_rate = true; */
474 		set_tx_desc_tx_rate(pdesc, ptcb_desc->hw_rate);
475 		if (ptcb_desc->hw_rate > DESC92C_RATEMCS0)
476 			short_gi = (ptcb_desc->use_shortgi) ? 1 : 0;
477 		else
478 			short_gi = (ptcb_desc->use_shortpreamble) ? 1 : 0;
479 
480 		set_tx_desc_data_shortgi(pdesc, short_gi);
481 
482 		if (info->flags & IEEE80211_TX_CTL_AMPDU) {
483 			set_tx_desc_agg_enable(pdesc, 1);
484 			set_tx_desc_max_agg_num(pdesc, 0x14);
485 		}
486 		set_tx_desc_seq(pdesc, seq_number);
487 		set_tx_desc_rts_enable(pdesc, ((ptcb_desc->rts_enable &&
488 						!ptcb_desc->cts_enable) ?
489 						1 : 0));
490 		set_tx_desc_hw_rts_enable(pdesc, 0);
491 		set_tx_desc_cts2self(pdesc, ((ptcb_desc->cts_enable) ?
492 					      1 : 0));
493 
494 		set_tx_desc_rts_rate(pdesc, ptcb_desc->rts_rate);
495 
496 		set_tx_desc_rts_sc(pdesc, ptcb_desc->rts_sc);
497 		set_tx_desc_rts_short(pdesc,
498 			((ptcb_desc->rts_rate <= DESC92C_RATE54M) ?
499 			 (ptcb_desc->rts_use_shortpreamble ? 1 : 0) :
500 			 (ptcb_desc->rts_use_shortgi ? 1 : 0)));
501 
502 		if (ptcb_desc->tx_enable_sw_calc_duration)
503 			set_tx_desc_nav_use_hdr(pdesc, 1);
504 
505 		if (bw_40) {
506 			if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) {
507 				set_tx_desc_data_bw(pdesc, 1);
508 				set_tx_desc_tx_sub_carrier(pdesc, 3);
509 			} else {
510 				set_tx_desc_data_bw(pdesc, 0);
511 				set_tx_desc_tx_sub_carrier(pdesc, mac->cur_40_prime_sc);
512 			}
513 		} else {
514 			set_tx_desc_data_bw(pdesc, 0);
515 			set_tx_desc_tx_sub_carrier(pdesc, 0);
516 		}
517 
518 		set_tx_desc_linip(pdesc, 0);
519 		set_tx_desc_pkt_size(pdesc, (u16)skb_len);
520 		if (sta) {
521 			u8 ampdu_density = sta->ht_cap.ampdu_density;
522 			set_tx_desc_ampdu_density(pdesc, ampdu_density);
523 		}
524 		if (info->control.hw_key) {
525 			struct ieee80211_key_conf *keyconf =
526 						info->control.hw_key;
527 			switch (keyconf->cipher) {
528 			case WLAN_CIPHER_SUITE_WEP40:
529 			case WLAN_CIPHER_SUITE_WEP104:
530 			case WLAN_CIPHER_SUITE_TKIP:
531 				set_tx_desc_sec_type(pdesc, 0x1);
532 				break;
533 			case WLAN_CIPHER_SUITE_CCMP:
534 				set_tx_desc_sec_type(pdesc, 0x3);
535 				break;
536 			default:
537 				set_tx_desc_sec_type(pdesc, 0x0);
538 				break;
539 			}
540 		}
541 
542 		set_tx_desc_queue_sel(pdesc, fw_qsel);
543 		set_tx_desc_data_rate_fb_limit(pdesc, 0x1F);
544 		set_tx_desc_rts_rate_fb_limit(pdesc, 0xF);
545 		set_tx_desc_disable_fb(pdesc, ptcb_desc->disable_ratefallback ?
546 					      1 : 0);
547 		set_tx_desc_use_rate(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);
548 
549 		/* Set TxRate and RTSRate in TxDesc  */
550 		/* This prevent Tx initial rate of new-coming packets */
551 		/* from being overwritten by retried  packet rate.*/
552 		if (ieee80211_is_data_qos(fc)) {
553 			if (mac->rdg_en) {
554 				RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
555 					 "Enable RDG function.\n");
556 				set_tx_desc_rdg_enable(pdesc, 1);
557 				set_tx_desc_htc(pdesc, 1);
558 			}
559 		}
560 		/* tx report */
561 		rtl_set_tx_report(ptcb_desc, pdesc8, hw, tx_info);
562 	}
563 
564 	set_tx_desc_first_seg(pdesc, (firstseg ? 1 : 0));
565 	set_tx_desc_last_seg(pdesc, (lastseg ? 1 : 0));
566 	set_tx_desc_tx_buffer_size(pdesc, (u16)buf_len);
567 	set_tx_desc_tx_buffer_address(pdesc, mapping);
568 	/* if (rtlpriv->dm.useramask) { */
569 	if (1) {
570 		set_tx_desc_rate_id(pdesc, ptcb_desc->ratr_index);
571 		set_tx_desc_macid(pdesc, ptcb_desc->mac_id);
572 	} else {
573 		set_tx_desc_rate_id(pdesc, 0xC + ptcb_desc->ratr_index);
574 		set_tx_desc_macid(pdesc, ptcb_desc->mac_id);
575 	}
576 	if (!ieee80211_is_data_qos(fc))  {
577 		set_tx_desc_hwseq_en(pdesc, 1);
578 		set_tx_desc_hwseq_sel(pdesc, 0);
579 	}
580 	set_tx_desc_more_frag(pdesc, (lastseg ? 0 : 1));
581 	if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
582 	    is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
583 		set_tx_desc_bmc(pdesc, 1);
584 	}
585 
586 	RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
587 }
588 
589 void rtl8723be_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc8,
590 			       bool firstseg, bool lastseg,
591 			       struct sk_buff *skb)
592 {
593 	struct rtl_priv *rtlpriv = rtl_priv(hw);
594 	struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
595 	u8 fw_queue = QSLT_BEACON;
596 	__le32 *pdesc = (__le32 *)pdesc8;
597 
598 	dma_addr_t mapping = pci_map_single(rtlpci->pdev,
599 					    skb->data, skb->len,
600 					    PCI_DMA_TODEVICE);
601 
602 	if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
603 		RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
604 			 "DMA mapping error\n");
605 		return;
606 	}
607 	clear_pci_tx_desc_content(pdesc, TX_DESC_SIZE);
608 
609 	set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN);
610 
611 	set_tx_desc_tx_rate(pdesc, DESC92C_RATE1M);
612 
613 	set_tx_desc_seq(pdesc, 0);
614 
615 	set_tx_desc_linip(pdesc, 0);
616 
617 	set_tx_desc_queue_sel(pdesc, fw_queue);
618 
619 	set_tx_desc_first_seg(pdesc, 1);
620 	set_tx_desc_last_seg(pdesc, 1);
621 
622 	set_tx_desc_tx_buffer_size(pdesc, (u16)(skb->len));
623 
624 	set_tx_desc_tx_buffer_address(pdesc, mapping);
625 
626 	set_tx_desc_rate_id(pdesc, 0);
627 	set_tx_desc_macid(pdesc, 0);
628 
629 	set_tx_desc_own(pdesc, 1);
630 
631 	set_tx_desc_pkt_size(pdesc, (u16)(skb->len));
632 
633 	set_tx_desc_first_seg(pdesc, 1);
634 	set_tx_desc_last_seg(pdesc, 1);
635 
636 	set_tx_desc_use_rate(pdesc, 1);
637 
638 	RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
639 		      "H2C Tx Cmd Content\n", pdesc, TX_DESC_SIZE);
640 }
641 
642 void rtl8723be_set_desc(struct ieee80211_hw *hw, u8 *pdesc8,
643 			bool istx, u8 desc_name, u8 *val)
644 {
645 	__le32 *pdesc = (__le32 *)pdesc8;
646 
647 	if (istx) {
648 		switch (desc_name) {
649 		case HW_DESC_OWN:
650 			set_tx_desc_own(pdesc, 1);
651 			break;
652 		case HW_DESC_TX_NEXTDESC_ADDR:
653 			set_tx_desc_next_desc_address(pdesc, *(u32 *)val);
654 			break;
655 		default:
656 			WARN_ONCE(true, "rtl8723be: ERR txdesc :%d not processed\n",
657 				  desc_name);
658 			break;
659 		}
660 	} else {
661 		switch (desc_name) {
662 		case HW_DESC_RXOWN:
663 			set_rx_desc_own(pdesc, 1);
664 			break;
665 		case HW_DESC_RXBUFF_ADDR:
666 			set_rx_desc_buff_addr(pdesc, *(u32 *)val);
667 			break;
668 		case HW_DESC_RXPKT_LEN:
669 			set_rx_desc_pkt_len(pdesc, *(u32 *)val);
670 			break;
671 		case HW_DESC_RXERO:
672 			set_rx_desc_eor(pdesc, 1);
673 			break;
674 		default:
675 			WARN_ONCE(true, "rtl8723be: ERR rxdesc :%d not process\n",
676 				  desc_name);
677 			break;
678 		}
679 	}
680 }
681 
682 u64 rtl8723be_get_desc(struct ieee80211_hw *hw,
683 		       u8 *pdesc8, bool istx, u8 desc_name)
684 {
685 	u32 ret = 0;
686 	__le32 *pdesc = (__le32 *)pdesc8;
687 
688 	if (istx) {
689 		switch (desc_name) {
690 		case HW_DESC_OWN:
691 			ret = get_tx_desc_own(pdesc);
692 			break;
693 		case HW_DESC_TXBUFF_ADDR:
694 			ret = get_tx_desc_tx_buffer_address(pdesc);
695 			break;
696 		default:
697 			WARN_ONCE(true, "rtl8723be: ERR txdesc :%d not process\n",
698 				  desc_name);
699 			break;
700 		}
701 	} else {
702 		switch (desc_name) {
703 		case HW_DESC_OWN:
704 			ret = get_rx_desc_own(pdesc);
705 			break;
706 		case HW_DESC_RXPKT_LEN:
707 			ret = get_rx_desc_pkt_len(pdesc);
708 			break;
709 		case HW_DESC_RXBUFF_ADDR:
710 			ret = get_rx_desc_buff_addr(pdesc);
711 			break;
712 		default:
713 			WARN_ONCE(true, "rtl8723be: ERR rxdesc :%d not processed\n",
714 				  desc_name);
715 			break;
716 		}
717 	}
718 	return ret;
719 }
720 
721 bool rtl8723be_is_tx_desc_closed(struct ieee80211_hw *hw,
722 				 u8 hw_queue, u16 index)
723 {
724 	struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
725 	struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
726 	u8 *entry = (u8 *)(&ring->desc[ring->idx]);
727 	u8 own = (u8)rtl8723be_get_desc(hw, entry, true, HW_DESC_OWN);
728 
729 	/*beacon packet will only use the first
730 	 *descriptor defautly,and the own may not
731 	 *be cleared by the hardware
732 	 */
733 	if (own)
734 		return false;
735 	return true;
736 }
737 
738 void rtl8723be_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
739 {
740 	struct rtl_priv *rtlpriv = rtl_priv(hw);
741 	if (hw_queue == BEACON_QUEUE) {
742 		rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4));
743 	} else {
744 		rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG,
745 			       BIT(0) << (hw_queue));
746 	}
747 }
748