1 /****************************************************************************** 2 * 3 * Copyright(c) 2009-2012 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * The full GNU General Public License is included in this distribution in the 15 * file called LICENSE. 16 * 17 * Contact Information: 18 * wlanfae <wlanfae@realtek.com> 19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, 20 * Hsinchu 300, Taiwan. 21 * 22 * Larry Finger <Larry.Finger@lwfinger.net> 23 * 24 *****************************************************************************/ 25 26 #include "../wifi.h" 27 #include "../core.h" 28 #include "../pci.h" 29 #include "reg.h" 30 #include "def.h" 31 #include "phy.h" 32 #include "dm.h" 33 #include "fw.h" 34 #include "../rtl8723com/fw_common.h" 35 #include "hw.h" 36 #include "sw.h" 37 #include "trx.h" 38 #include "led.h" 39 #include "table.h" 40 #include "hal_btc.h" 41 #include "../btcoexist/rtl_btc.h" 42 #include "../rtl8723com/phy_common.h" 43 44 #include <linux/vmalloc.h> 45 #include <linux/module.h> 46 47 static void rtl8723e_init_aspm_vars(struct ieee80211_hw *hw) 48 { 49 struct rtl_priv *rtlpriv = rtl_priv(hw); 50 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 51 52 /*close ASPM for AMD defaultly */ 53 rtlpci->const_amdpci_aspm = 0; 54 55 /** 56 * ASPM PS mode. 57 * 0 - Disable ASPM, 58 * 1 - Enable ASPM without Clock Req, 59 * 2 - Enable ASPM with Clock Req, 60 * 3 - Alwyas Enable ASPM with Clock Req, 61 * 4 - Always Enable ASPM without Clock Req. 62 * set defult to RTL8192CE:3 RTL8192E:2 63 */ 64 rtlpci->const_pci_aspm = 3; 65 66 /*Setting for PCI-E device */ 67 rtlpci->const_devicepci_aspm_setting = 0x03; 68 69 /*Setting for PCI-E bridge */ 70 rtlpci->const_hostpci_aspm_setting = 0x02; 71 72 /** 73 * In Hw/Sw Radio Off situation. 74 * 0 - Default, 75 * 1 - From ASPM setting without low Mac Pwr, 76 * 2 - From ASPM setting with low Mac Pwr, 77 * 3 - Bus D3 78 * set default to RTL8192CE:0 RTL8192SE:2 79 */ 80 rtlpci->const_hwsw_rfoff_d3 = 0; 81 82 /** 83 * This setting works for those device with 84 * backdoor ASPM setting such as EPHY setting. 85 * 0 - Not support ASPM, 86 * 1 - Support ASPM, 87 * 2 - According to chipset. 88 */ 89 rtlpci->const_support_pciaspm = rtlpriv->cfg->mod_params->aspm_support; 90 } 91 92 int rtl8723e_init_sw_vars(struct ieee80211_hw *hw) 93 { 94 struct rtl_priv *rtlpriv = rtl_priv(hw); 95 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 96 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); 97 int err = 0; 98 char *fw_name = "rtlwifi/rtl8723fw.bin"; 99 100 rtl8723e_bt_reg_init(hw); 101 102 rtlpriv->btcoexist.btc_ops = rtl_btc_get_ops_pointer(); 103 104 rtlpriv->dm.dm_initialgain_enable = 1; 105 rtlpriv->dm.dm_flag = 0; 106 rtlpriv->dm.disable_framebursting = 0; 107 rtlpriv->dm.thermalvalue = 0; 108 rtlpci->transmit_config = CFENDFORM | BIT(12) | BIT(13); 109 110 /* compatible 5G band 88ce just 2.4G band & smsp */ 111 rtlpriv->rtlhal.current_bandtype = BAND_ON_2_4G; 112 rtlpriv->rtlhal.bandset = BAND_ON_2_4G; 113 rtlpriv->rtlhal.macphymode = SINGLEMAC_SINGLEPHY; 114 115 rtlpci->receive_config = (RCR_APPFCS | 116 RCR_APP_MIC | 117 RCR_APP_ICV | 118 RCR_APP_PHYST_RXFF | 119 RCR_HTC_LOC_CTRL | 120 RCR_AMF | 121 RCR_ACF | 122 RCR_ADF | 123 RCR_AICV | 124 RCR_AB | 125 RCR_AM | 126 RCR_APM | 127 0); 128 129 rtlpci->irq_mask[0] = 130 (u32) (PHIMR_ROK | 131 PHIMR_RDU | 132 PHIMR_VODOK | 133 PHIMR_VIDOK | 134 PHIMR_BEDOK | 135 PHIMR_BKDOK | 136 PHIMR_MGNTDOK | 137 PHIMR_HIGHDOK | 138 PHIMR_C2HCMD | 139 PHIMR_HISRE_IND | 140 PHIMR_TSF_BIT32_TOGGLE | 141 PHIMR_TXBCNOK | 142 PHIMR_PSTIMEOUT | 143 0); 144 145 rtlpci->irq_mask[1] = 146 (u32)(PHIMR_RXFOVW | 147 0); 148 149 /* for LPS & IPS */ 150 rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps; 151 rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps; 152 rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps; 153 rtlpci->msi_support = rtlpriv->cfg->mod_params->msi_support; 154 rtlpriv->cfg->mod_params->sw_crypto = 155 rtlpriv->cfg->mod_params->sw_crypto; 156 rtlpriv->cfg->mod_params->disable_watchdog = 157 rtlpriv->cfg->mod_params->disable_watchdog; 158 if (rtlpriv->cfg->mod_params->disable_watchdog) 159 pr_info("watchdog disabled\n"); 160 rtlpriv->psc.reg_fwctrl_lps = 3; 161 rtlpriv->psc.reg_max_lps_awakeintvl = 5; 162 rtl8723e_init_aspm_vars(hw); 163 164 if (rtlpriv->psc.reg_fwctrl_lps == 1) 165 rtlpriv->psc.fwctrl_psmode = FW_PS_MIN_MODE; 166 else if (rtlpriv->psc.reg_fwctrl_lps == 2) 167 rtlpriv->psc.fwctrl_psmode = FW_PS_MAX_MODE; 168 else if (rtlpriv->psc.reg_fwctrl_lps == 3) 169 rtlpriv->psc.fwctrl_psmode = FW_PS_DTIM_MODE; 170 171 /* for firmware buf */ 172 rtlpriv->rtlhal.pfirmware = vzalloc(0x6000); 173 if (!rtlpriv->rtlhal.pfirmware) { 174 pr_err("Can't alloc buffer for fw.\n"); 175 return 1; 176 } 177 178 if (IS_81xxC_VENDOR_UMC_B_CUT(rtlhal->version)) 179 fw_name = "rtlwifi/rtl8723fw_B.bin"; 180 181 rtlpriv->max_fw_size = 0x6000; 182 pr_info("Using firmware %s\n", fw_name); 183 err = request_firmware_nowait(THIS_MODULE, 1, fw_name, 184 rtlpriv->io.dev, GFP_KERNEL, hw, 185 rtl_fw_cb); 186 if (err) { 187 pr_err("Failed to request firmware!\n"); 188 vfree(rtlpriv->rtlhal.pfirmware); 189 rtlpriv->rtlhal.pfirmware = NULL; 190 return 1; 191 } 192 return 0; 193 } 194 195 void rtl8723e_deinit_sw_vars(struct ieee80211_hw *hw) 196 { 197 struct rtl_priv *rtlpriv = rtl_priv(hw); 198 199 if (rtlpriv->rtlhal.pfirmware) { 200 vfree(rtlpriv->rtlhal.pfirmware); 201 rtlpriv->rtlhal.pfirmware = NULL; 202 } 203 } 204 205 /* get bt coexist status */ 206 bool rtl8723e_get_btc_status(void) 207 { 208 return true; 209 } 210 211 static bool is_fw_header(struct rtlwifi_firmware_header *hdr) 212 { 213 return (le16_to_cpu(hdr->signature) & 0xfff0) == 0x2300; 214 } 215 216 static struct rtl_hal_ops rtl8723e_hal_ops = { 217 .init_sw_vars = rtl8723e_init_sw_vars, 218 .deinit_sw_vars = rtl8723e_deinit_sw_vars, 219 .read_eeprom_info = rtl8723e_read_eeprom_info, 220 .interrupt_recognized = rtl8723e_interrupt_recognized, 221 .hw_init = rtl8723e_hw_init, 222 .hw_disable = rtl8723e_card_disable, 223 .hw_suspend = rtl8723e_suspend, 224 .hw_resume = rtl8723e_resume, 225 .enable_interrupt = rtl8723e_enable_interrupt, 226 .disable_interrupt = rtl8723e_disable_interrupt, 227 .set_network_type = rtl8723e_set_network_type, 228 .set_chk_bssid = rtl8723e_set_check_bssid, 229 .set_qos = rtl8723e_set_qos, 230 .set_bcn_reg = rtl8723e_set_beacon_related_registers, 231 .set_bcn_intv = rtl8723e_set_beacon_interval, 232 .update_interrupt_mask = rtl8723e_update_interrupt_mask, 233 .get_hw_reg = rtl8723e_get_hw_reg, 234 .set_hw_reg = rtl8723e_set_hw_reg, 235 .update_rate_tbl = rtl8723e_update_hal_rate_tbl, 236 .fill_tx_desc = rtl8723e_tx_fill_desc, 237 .fill_tx_cmddesc = rtl8723e_tx_fill_cmddesc, 238 .query_rx_desc = rtl8723e_rx_query_desc, 239 .set_channel_access = rtl8723e_update_channel_access_setting, 240 .radio_onoff_checking = rtl8723e_gpio_radio_on_off_checking, 241 .set_bw_mode = rtl8723e_phy_set_bw_mode, 242 .switch_channel = rtl8723e_phy_sw_chnl, 243 .dm_watchdog = rtl8723e_dm_watchdog, 244 .scan_operation_backup = rtl8723e_phy_scan_operation_backup, 245 .set_rf_power_state = rtl8723e_phy_set_rf_power_state, 246 .led_control = rtl8723e_led_control, 247 .set_desc = rtl8723e_set_desc, 248 .get_desc = rtl8723e_get_desc, 249 .is_tx_desc_closed = rtl8723e_is_tx_desc_closed, 250 .tx_polling = rtl8723e_tx_polling, 251 .enable_hw_sec = rtl8723e_enable_hw_security_config, 252 .set_key = rtl8723e_set_key, 253 .init_sw_leds = rtl8723e_init_sw_leds, 254 .get_bbreg = rtl8723_phy_query_bb_reg, 255 .set_bbreg = rtl8723_phy_set_bb_reg, 256 .get_rfreg = rtl8723e_phy_query_rf_reg, 257 .set_rfreg = rtl8723e_phy_set_rf_reg, 258 .c2h_command_handle = rtl_8723e_c2h_command_handle, 259 .bt_wifi_media_status_notify = rtl_8723e_bt_wifi_media_status_notify, 260 .bt_coex_off_before_lps = 261 rtl8723e_dm_bt_turn_off_bt_coexist_before_enter_lps, 262 .get_btc_status = rtl8723e_get_btc_status, 263 .is_fw_header = is_fw_header, 264 }; 265 266 static struct rtl_mod_params rtl8723e_mod_params = { 267 .sw_crypto = false, 268 .inactiveps = true, 269 .swctrl_lps = false, 270 .fwctrl_lps = true, 271 .aspm_support = 1, 272 .debug_level = 0, 273 .debug_mask = 0, 274 .msi_support = false, 275 .disable_watchdog = false, 276 }; 277 278 static const struct rtl_hal_cfg rtl8723e_hal_cfg = { 279 .bar_id = 2, 280 .write_readback = true, 281 .name = "rtl8723e_pci", 282 .ops = &rtl8723e_hal_ops, 283 .mod_params = &rtl8723e_mod_params, 284 .maps[SYS_ISO_CTRL] = REG_SYS_ISO_CTRL, 285 .maps[SYS_FUNC_EN] = REG_SYS_FUNC_EN, 286 .maps[SYS_CLK] = REG_SYS_CLKR, 287 .maps[MAC_RCR_AM] = AM, 288 .maps[MAC_RCR_AB] = AB, 289 .maps[MAC_RCR_ACRC32] = ACRC32, 290 .maps[MAC_RCR_ACF] = ACF, 291 .maps[MAC_RCR_AAP] = AAP, 292 .maps[MAC_HIMR] = REG_HIMR, 293 .maps[MAC_HIMRE] = REG_HIMRE, 294 .maps[EFUSE_TEST] = REG_EFUSE_TEST, 295 .maps[EFUSE_CTRL] = REG_EFUSE_CTRL, 296 .maps[EFUSE_CLK] = 0, 297 .maps[EFUSE_CLK_CTRL] = REG_EFUSE_CTRL, 298 .maps[EFUSE_PWC_EV12V] = PWC_EV12V, 299 .maps[EFUSE_FEN_ELDR] = FEN_ELDR, 300 .maps[EFUSE_LOADER_CLK_EN] = LOADER_CLK_EN, 301 .maps[EFUSE_ANA8M] = ANA8M, 302 .maps[EFUSE_HWSET_MAX_SIZE] = HWSET_MAX_SIZE, 303 .maps[EFUSE_MAX_SECTION_MAP] = EFUSE_MAX_SECTION, 304 .maps[EFUSE_REAL_CONTENT_SIZE] = EFUSE_REAL_CONTENT_LEN, 305 .maps[EFUSE_OOB_PROTECT_BYTES_LEN] = EFUSE_OOB_PROTECT_BYTES, 306 307 .maps[RWCAM] = REG_CAMCMD, 308 .maps[WCAMI] = REG_CAMWRITE, 309 .maps[RCAMO] = REG_CAMREAD, 310 .maps[CAMDBG] = REG_CAMDBG, 311 .maps[SECR] = REG_SECCFG, 312 .maps[SEC_CAM_NONE] = CAM_NONE, 313 .maps[SEC_CAM_WEP40] = CAM_WEP40, 314 .maps[SEC_CAM_TKIP] = CAM_TKIP, 315 .maps[SEC_CAM_AES] = CAM_AES, 316 .maps[SEC_CAM_WEP104] = CAM_WEP104, 317 318 .maps[RTL_IMR_BCNDMAINT6] = IMR_BCNDMAINT6, 319 .maps[RTL_IMR_BCNDMAINT5] = IMR_BCNDMAINT5, 320 .maps[RTL_IMR_BCNDMAINT4] = IMR_BCNDMAINT4, 321 .maps[RTL_IMR_BCNDMAINT3] = IMR_BCNDMAINT3, 322 .maps[RTL_IMR_BCNDMAINT2] = IMR_BCNDMAINT2, 323 .maps[RTL_IMR_BCNDMAINT1] = IMR_BCNDMAINT1, 324 .maps[RTL_IMR_BCNDOK8] = IMR_BCNDOK8, 325 .maps[RTL_IMR_BCNDOK7] = IMR_BCNDOK7, 326 .maps[RTL_IMR_BCNDOK6] = IMR_BCNDOK6, 327 .maps[RTL_IMR_BCNDOK5] = IMR_BCNDOK5, 328 .maps[RTL_IMR_BCNDOK4] = IMR_BCNDOK4, 329 .maps[RTL_IMR_BCNDOK3] = IMR_BCNDOK3, 330 .maps[RTL_IMR_BCNDOK2] = IMR_BCNDOK2, 331 .maps[RTL_IMR_BCNDOK1] = IMR_BCNDOK1, 332 .maps[RTL_IMR_TIMEOUT2] = IMR_TIMEOUT2, 333 .maps[RTL_IMR_TIMEOUT1] = IMR_TIMEOUT1, 334 335 .maps[RTL_IMR_TXFOVW] = PHIMR_TXFOVW, 336 .maps[RTL_IMR_PSTIMEOUT] = PHIMR_PSTIMEOUT, 337 .maps[RTL_IMR_BCNINT] = PHIMR_BCNDMAINT0, 338 .maps[RTL_IMR_RXFOVW] = PHIMR_RXFOVW, 339 .maps[RTL_IMR_RDU] = PHIMR_RDU, 340 .maps[RTL_IMR_ATIMEND] = PHIMR_ATIMEND_E, 341 .maps[RTL_IMR_BDOK] = PHIMR_BCNDOK0, 342 .maps[RTL_IMR_MGNTDOK] = PHIMR_MGNTDOK, 343 .maps[RTL_IMR_TBDER] = PHIMR_TXBCNERR, 344 .maps[RTL_IMR_HIGHDOK] = PHIMR_HIGHDOK, 345 .maps[RTL_IMR_TBDOK] = PHIMR_TXBCNOK, 346 .maps[RTL_IMR_BKDOK] = PHIMR_BKDOK, 347 .maps[RTL_IMR_BEDOK] = PHIMR_BEDOK, 348 .maps[RTL_IMR_VIDOK] = PHIMR_VIDOK, 349 .maps[RTL_IMR_VODOK] = PHIMR_VODOK, 350 .maps[RTL_IMR_ROK] = PHIMR_ROK, 351 .maps[RTL_IBSS_INT_MASKS] = 352 (PHIMR_BCNDMAINT0 | PHIMR_TXBCNOK | PHIMR_TXBCNERR), 353 .maps[RTL_IMR_C2HCMD] = PHIMR_C2HCMD, 354 355 356 .maps[RTL_RC_CCK_RATE1M] = DESC92C_RATE1M, 357 .maps[RTL_RC_CCK_RATE2M] = DESC92C_RATE2M, 358 .maps[RTL_RC_CCK_RATE5_5M] = DESC92C_RATE5_5M, 359 .maps[RTL_RC_CCK_RATE11M] = DESC92C_RATE11M, 360 .maps[RTL_RC_OFDM_RATE6M] = DESC92C_RATE6M, 361 .maps[RTL_RC_OFDM_RATE9M] = DESC92C_RATE9M, 362 .maps[RTL_RC_OFDM_RATE12M] = DESC92C_RATE12M, 363 .maps[RTL_RC_OFDM_RATE18M] = DESC92C_RATE18M, 364 .maps[RTL_RC_OFDM_RATE24M] = DESC92C_RATE24M, 365 .maps[RTL_RC_OFDM_RATE36M] = DESC92C_RATE36M, 366 .maps[RTL_RC_OFDM_RATE48M] = DESC92C_RATE48M, 367 .maps[RTL_RC_OFDM_RATE54M] = DESC92C_RATE54M, 368 369 .maps[RTL_RC_HT_RATEMCS7] = DESC92C_RATEMCS7, 370 .maps[RTL_RC_HT_RATEMCS15] = DESC92C_RATEMCS15, 371 }; 372 373 static const struct pci_device_id rtl8723e_pci_ids[] = { 374 {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8723, rtl8723e_hal_cfg)}, 375 {}, 376 }; 377 378 MODULE_DEVICE_TABLE(pci, rtl8723e_pci_ids); 379 380 MODULE_AUTHOR("lizhaoming <chaoming_li@realsil.com.cn>"); 381 MODULE_AUTHOR("Realtek WlanFAE <wlanfae@realtek.com>"); 382 MODULE_LICENSE("GPL"); 383 MODULE_DESCRIPTION("Realtek 8723E 802.11n PCI wireless"); 384 MODULE_FIRMWARE("rtlwifi/rtl8723efw.bin"); 385 386 module_param_named(swenc, rtl8723e_mod_params.sw_crypto, bool, 0444); 387 module_param_named(debug_level, rtl8723e_mod_params.debug_level, int, 0644); 388 module_param_named(debug_mask, rtl8723e_mod_params.debug_mask, ullong, 0644); 389 module_param_named(ips, rtl8723e_mod_params.inactiveps, bool, 0444); 390 module_param_named(swlps, rtl8723e_mod_params.swctrl_lps, bool, 0444); 391 module_param_named(fwlps, rtl8723e_mod_params.fwctrl_lps, bool, 0444); 392 module_param_named(msi, rtl8723e_mod_params.msi_support, bool, 0444); 393 module_param_named(aspm, rtl8723e_mod_params.aspm_support, int, 0444); 394 module_param_named(disable_watchdog, rtl8723e_mod_params.disable_watchdog, 395 bool, 0444); 396 MODULE_PARM_DESC(swenc, "Set to 1 for software crypto (default 0)\n"); 397 MODULE_PARM_DESC(ips, "Set to 0 to not use link power save (default 1)\n"); 398 MODULE_PARM_DESC(swlps, "Set to 1 to use SW control power save (default 0)\n"); 399 MODULE_PARM_DESC(fwlps, "Set to 1 to use FW control power save (default 1)\n"); 400 MODULE_PARM_DESC(msi, "Set to 1 to use MSI interrupts mode (default 0)\n"); 401 MODULE_PARM_DESC(aspm, "Set to 1 to enable ASPM (default 1)\n"); 402 MODULE_PARM_DESC(debug_level, "Set debug level (0-5) (default 0)"); 403 MODULE_PARM_DESC(debug_mask, "Set debug mask (default 0)"); 404 MODULE_PARM_DESC(disable_watchdog, "Set to 1 to disable the watchdog (default 0)\n"); 405 406 static SIMPLE_DEV_PM_OPS(rtlwifi_pm_ops, rtl_pci_suspend, rtl_pci_resume); 407 408 static struct pci_driver rtl8723e_driver = { 409 .name = KBUILD_MODNAME, 410 .id_table = rtl8723e_pci_ids, 411 .probe = rtl_pci_probe, 412 .remove = rtl_pci_disconnect, 413 .driver.pm = &rtlwifi_pm_ops, 414 }; 415 416 module_pci_driver(rtl8723e_driver); 417