148fa0b4dSLarry Finger /* SPDX-License-Identifier: GPL-2.0 */
248fa0b4dSLarry Finger /* Copyright(c) 2009-2012  Realtek Corporation.*/
3f1d2b4d3SLarry Finger 
4f1d2b4d3SLarry Finger #ifndef __RTL92C_PHY_H__
5f1d2b4d3SLarry Finger #define __RTL92C_PHY_H__
6f1d2b4d3SLarry Finger 
7f1d2b4d3SLarry Finger #define MAX_PRECMD_CNT				16
8f1d2b4d3SLarry Finger #define MAX_RFDEPENDCMD_CNT			16
9f1d2b4d3SLarry Finger #define MAX_POSTCMD_CNT				16
10f1d2b4d3SLarry Finger 
11f1d2b4d3SLarry Finger #define MAX_DOZE_WAITING_TIMES_9x		64
12f1d2b4d3SLarry Finger 
13f1d2b4d3SLarry Finger #define RT_CANNOT_IO(hw)			false
14f1d2b4d3SLarry Finger #define HIGHPOWER_RADIOA_ARRAYLEN		22
15f1d2b4d3SLarry Finger 
16f1d2b4d3SLarry Finger #define IQK_ADDA_REG_NUM			16
17f1d2b4d3SLarry Finger #define MAX_TOLERANCE				5
18f1d2b4d3SLarry Finger #define	IQK_DELAY_TIME				1
19f1d2b4d3SLarry Finger 
20f1d2b4d3SLarry Finger #define	APK_BB_REG_NUM				5
21f1d2b4d3SLarry Finger #define	APK_AFE_REG_NUM				16
22f1d2b4d3SLarry Finger #define	APK_CURVE_REG_NUM			4
23f1d2b4d3SLarry Finger #define	PATH_NUM				2
24f1d2b4d3SLarry Finger 
25f1d2b4d3SLarry Finger #define LOOP_LIMIT				5
26f1d2b4d3SLarry Finger #define MAX_STALL_TIME				50
27f1d2b4d3SLarry Finger #define ANTENNADIVERSITYVALUE			0x80
28f1d2b4d3SLarry Finger #define MAX_TXPWR_IDX_NMODE_92S			63
2992a1aa25SLarry Finger #define reset_cnt_limit				3
30f1d2b4d3SLarry Finger 
31f1d2b4d3SLarry Finger #define IQK_ADDA_REG_NUM			16
32f1d2b4d3SLarry Finger #define IQK_MAC_REG_NUM				4
33f1d2b4d3SLarry Finger 
34f1d2b4d3SLarry Finger #define IQK_DELAY_TIME				1
35f1d2b4d3SLarry Finger 
36f1d2b4d3SLarry Finger #define RF6052_MAX_PATH				2
37f1d2b4d3SLarry Finger 
38f1d2b4d3SLarry Finger #define CT_OFFSET_MAC_ADDR			0X16
39f1d2b4d3SLarry Finger 
40f1d2b4d3SLarry Finger #define CT_OFFSET_CCK_TX_PWR_IDX		0x5A
41f1d2b4d3SLarry Finger #define CT_OFFSET_HT401S_TX_PWR_IDX		0x60
42f1d2b4d3SLarry Finger #define CT_OFFSET_HT402S_TX_PWR_IDX_DIFF	0x66
43f1d2b4d3SLarry Finger #define CT_OFFSET_HT20_TX_PWR_IDX_DIFF		0x69
44f1d2b4d3SLarry Finger #define CT_OFFSET_OFDM_TX_PWR_IDX_DIFF		0x6C
45f1d2b4d3SLarry Finger 
46f1d2b4d3SLarry Finger #define CT_OFFSET_HT40_MAX_PWR_OFFSET		0x6F
47f1d2b4d3SLarry Finger #define CT_OFFSET_HT20_MAX_PWR_OFFSET		0x72
48f1d2b4d3SLarry Finger 
49f1d2b4d3SLarry Finger #define CT_OFFSET_CHANNEL_PLAH			0x75
50f1d2b4d3SLarry Finger #define CT_OFFSET_THERMAL_METER			0x78
51f1d2b4d3SLarry Finger #define CT_OFFSET_RF_OPTION			0x79
52f1d2b4d3SLarry Finger #define CT_OFFSET_VERSION			0x7E
53f1d2b4d3SLarry Finger #define CT_OFFSET_CUSTOMER_ID			0x7F
54f1d2b4d3SLarry Finger 
55f1d2b4d3SLarry Finger #define RTL92C_MAX_PATH_NUM			2
56f1d2b4d3SLarry Finger 
57f1d2b4d3SLarry Finger enum hw90_block_e {
58f1d2b4d3SLarry Finger 	HW90_BLOCK_MAC = 0,
59f1d2b4d3SLarry Finger 	HW90_BLOCK_PHY0 = 1,
60f1d2b4d3SLarry Finger 	HW90_BLOCK_PHY1 = 2,
61f1d2b4d3SLarry Finger 	HW90_BLOCK_RF = 3,
62f1d2b4d3SLarry Finger 	HW90_BLOCK_MAXIMUM = 4,
63f1d2b4d3SLarry Finger };
64f1d2b4d3SLarry Finger 
65f1d2b4d3SLarry Finger enum baseband_config_type {
66f1d2b4d3SLarry Finger 	BASEBAND_CONFIG_PHY_REG = 0,
67f1d2b4d3SLarry Finger 	BASEBAND_CONFIG_AGC_TAB = 1,
68f1d2b4d3SLarry Finger };
69f1d2b4d3SLarry Finger 
70f1d2b4d3SLarry Finger enum ra_offset_area {
71f1d2b4d3SLarry Finger 	RA_OFFSET_LEGACY_OFDM1,
72f1d2b4d3SLarry Finger 	RA_OFFSET_LEGACY_OFDM2,
73f1d2b4d3SLarry Finger 	RA_OFFSET_HT_OFDM1,
74f1d2b4d3SLarry Finger 	RA_OFFSET_HT_OFDM2,
75f1d2b4d3SLarry Finger 	RA_OFFSET_HT_OFDM3,
76f1d2b4d3SLarry Finger 	RA_OFFSET_HT_OFDM4,
77f1d2b4d3SLarry Finger 	RA_OFFSET_HT_CCK,
78f1d2b4d3SLarry Finger };
79f1d2b4d3SLarry Finger 
80f1d2b4d3SLarry Finger enum antenna_path {
81f1d2b4d3SLarry Finger 	ANTENNA_NONE,
82f1d2b4d3SLarry Finger 	ANTENNA_D,
83f1d2b4d3SLarry Finger 	ANTENNA_C,
84f1d2b4d3SLarry Finger 	ANTENNA_CD,
85f1d2b4d3SLarry Finger 	ANTENNA_B,
86f1d2b4d3SLarry Finger 	ANTENNA_BD,
87f1d2b4d3SLarry Finger 	ANTENNA_BC,
88f1d2b4d3SLarry Finger 	ANTENNA_BCD,
89f1d2b4d3SLarry Finger 	ANTENNA_A,
90f1d2b4d3SLarry Finger 	ANTENNA_AD,
91f1d2b4d3SLarry Finger 	ANTENNA_AC,
92f1d2b4d3SLarry Finger 	ANTENNA_ACD,
93f1d2b4d3SLarry Finger 	ANTENNA_AB,
94f1d2b4d3SLarry Finger 	ANTENNA_ABD,
95f1d2b4d3SLarry Finger 	ANTENNA_ABC,
96f1d2b4d3SLarry Finger 	ANTENNA_ABCD
97f1d2b4d3SLarry Finger };
98f1d2b4d3SLarry Finger 
99f1d2b4d3SLarry Finger struct r_antenna_select_ofdm {
100f1d2b4d3SLarry Finger 	u32 r_tx_antenna:4;
101f1d2b4d3SLarry Finger 	u32 r_ant_l:4;
102f1d2b4d3SLarry Finger 	u32 r_ant_non_ht:4;
103f1d2b4d3SLarry Finger 	u32 r_ant_ht1:4;
104f1d2b4d3SLarry Finger 	u32 r_ant_ht2:4;
105f1d2b4d3SLarry Finger 	u32 r_ant_ht_s1:4;
106f1d2b4d3SLarry Finger 	u32 r_ant_non_ht_s1:4;
107f1d2b4d3SLarry Finger 	u32 ofdm_txsc:2;
108f1d2b4d3SLarry Finger 	u32 reserved:2;
109f1d2b4d3SLarry Finger };
110f1d2b4d3SLarry Finger 
111f1d2b4d3SLarry Finger struct r_antenna_select_cck {
112f1d2b4d3SLarry Finger 	u8 r_cckrx_enable_2:2;
113f1d2b4d3SLarry Finger 	u8 r_cckrx_enable:2;
114f1d2b4d3SLarry Finger 	u8 r_ccktx_enable:4;
115f1d2b4d3SLarry Finger };
116f1d2b4d3SLarry Finger 
117f1d2b4d3SLarry Finger struct efuse_contents {
118f1d2b4d3SLarry Finger 	u8 mac_addr[ETH_ALEN];
119f1d2b4d3SLarry Finger 	u8 cck_tx_power_idx[6];
120f1d2b4d3SLarry Finger 	u8 ht40_1s_tx_power_idx[6];
121f1d2b4d3SLarry Finger 	u8 ht40_2s_tx_power_idx_diff[3];
122f1d2b4d3SLarry Finger 	u8 ht20_tx_power_idx_diff[3];
123f1d2b4d3SLarry Finger 	u8 ofdm_tx_power_idx_diff[3];
124f1d2b4d3SLarry Finger 	u8 ht40_max_power_offset[3];
125f1d2b4d3SLarry Finger 	u8 ht20_max_power_offset[3];
126f1d2b4d3SLarry Finger 	u8 channel_plan;
127f1d2b4d3SLarry Finger 	u8 thermal_meter;
128f1d2b4d3SLarry Finger 	u8 rf_option[5];
129f1d2b4d3SLarry Finger 	u8 version;
130f1d2b4d3SLarry Finger 	u8 oem_id;
131f1d2b4d3SLarry Finger 	u8 regulatory;
132f1d2b4d3SLarry Finger };
133f1d2b4d3SLarry Finger 
134f1d2b4d3SLarry Finger struct tx_power_struct {
135f1d2b4d3SLarry Finger 	u8 cck[RTL92C_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
136f1d2b4d3SLarry Finger 	u8 ht40_1s[RTL92C_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
137f1d2b4d3SLarry Finger 	u8 ht40_2s[RTL92C_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
138f1d2b4d3SLarry Finger 	u8 ht20_diff[RTL92C_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
139f1d2b4d3SLarry Finger 	u8 legacy_ht_diff[RTL92C_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
140f1d2b4d3SLarry Finger 	u8 legacy_ht_txpowerdiff;
141f1d2b4d3SLarry Finger 	u8 groupht20[RTL92C_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
142f1d2b4d3SLarry Finger 	u8 groupht40[RTL92C_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
143f1d2b4d3SLarry Finger 	u8 pwrgroup_cnt;
144f1d2b4d3SLarry Finger 	u32 mcs_original_offset[4][16];
145f1d2b4d3SLarry Finger };
146f1d2b4d3SLarry Finger 
147f1d2b4d3SLarry Finger u32 rtl8723e_phy_query_rf_reg(struct ieee80211_hw *hw,
148f1d2b4d3SLarry Finger 			      enum radio_path rfpath, u32 regaddr,
149f1d2b4d3SLarry Finger 			      u32 bitmask);
150f1d2b4d3SLarry Finger void rtl8723e_phy_set_rf_reg(struct ieee80211_hw *hw,
151f1d2b4d3SLarry Finger 			     enum radio_path rfpath, u32 regaddr,
152f1d2b4d3SLarry Finger 			     u32 bitmask, u32 data);
153f1d2b4d3SLarry Finger bool rtl8723e_phy_mac_config(struct ieee80211_hw *hw);
154f1d2b4d3SLarry Finger bool rtl8723e_phy_bb_config(struct ieee80211_hw *hw);
155f1d2b4d3SLarry Finger bool rtl8723e_phy_rf_config(struct ieee80211_hw *hw);
156f1d2b4d3SLarry Finger bool rtl92c_phy_config_rf_with_feaderfile(struct ieee80211_hw *hw,
157f1d2b4d3SLarry Finger 					  enum radio_path rfpath);
158f1d2b4d3SLarry Finger void rtl8723e_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw);
159f1d2b4d3SLarry Finger void rtl8723e_phy_get_txpower_level(struct ieee80211_hw *hw,
160f1d2b4d3SLarry Finger 				    long *powerlevel);
161f1d2b4d3SLarry Finger void rtl8723e_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel);
162f1d2b4d3SLarry Finger bool rtl8723e_phy_update_txpower_dbm(struct ieee80211_hw *hw,
163f1d2b4d3SLarry Finger 				     long power_indbm);
164f1d2b4d3SLarry Finger void rtl8723e_phy_scan_operation_backup(struct ieee80211_hw *hw,
165f1d2b4d3SLarry Finger 					u8 operation);
166f1d2b4d3SLarry Finger void rtl8723e_phy_set_bw_mode_callback(struct ieee80211_hw *hw);
167f1d2b4d3SLarry Finger void rtl8723e_phy_set_bw_mode(struct ieee80211_hw *hw,
168f1d2b4d3SLarry Finger 			      enum nl80211_channel_type ch_type);
169f1d2b4d3SLarry Finger void rtl8723e_phy_sw_chnl_callback(struct ieee80211_hw *hw);
170f1d2b4d3SLarry Finger u8 rtl8723e_phy_sw_chnl(struct ieee80211_hw *hw);
171f1d2b4d3SLarry Finger void rtl8723e_phy_iq_calibrate(struct ieee80211_hw *hw, bool b_recovery);
172f1d2b4d3SLarry Finger void rtl8723e_phy_lc_calibrate(struct ieee80211_hw *hw);
173f1d2b4d3SLarry Finger void rtl8723e_phy_set_rfpath_switch(struct ieee80211_hw *hw, bool bmain);
174f1d2b4d3SLarry Finger bool rtl8723e_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
175f1d2b4d3SLarry Finger 					    enum radio_path rfpath);
176f1d2b4d3SLarry Finger bool rtl8723e_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype);
177f1d2b4d3SLarry Finger bool rtl8723e_phy_set_rf_power_state(struct ieee80211_hw *hw,
178f1d2b4d3SLarry Finger 				     enum rf_pwrstate rfpwr_state);
179f1d2b4d3SLarry Finger 
180f1d2b4d3SLarry Finger #endif
181