1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2009-2012  Realtek Corporation.*/
3 
4 #ifndef	__RTL8723E_DM_H__
5 #define __RTL8723E_DM_H__
6 
7 #define HAL_DM_DIG_DISABLE			BIT(0)
8 #define HAL_DM_HIPWR_DISABLE			BIT(1)
9 
10 #define OFDM_TABLE_LENGTH			37
11 #define CCK_TABLE_LENGTH			33
12 
13 #define OFDM_TABLE_SIZE				37
14 #define CCK_TABLE_SIZE				33
15 
16 #define BW_AUTO_SWITCH_HIGH_LOW			25
17 #define BW_AUTO_SWITCH_LOW_HIGH			30
18 
19 #define DM_DIG_FA_UPPER				0x32
20 #define DM_DIG_FA_LOWER				0x20
21 #define DM_DIG_FA_TH0				0x20
22 #define DM_DIG_FA_TH1				0x100
23 #define DM_DIG_FA_TH2				0x200
24 
25 #define RXPATHSELECTION_SS_TH_LOW		30
26 #define RXPATHSELECTION_DIFF_TH			18
27 
28 #define DM_RATR_STA_INIT			0
29 #define DM_RATR_STA_HIGH			1
30 #define DM_RATR_STA_MIDDLE			2
31 #define DM_RATR_STA_LOW				3
32 
33 #define CTS2SELF_THVAL				30
34 #define REGC38_TH				20
35 
36 #define WAIOTTHVAL				25
37 
38 #define TXHIGHPWRLEVEL_NORMAL			0
39 #define TXHIGHPWRLEVEL_LEVEL1			1
40 #define TXHIGHPWRLEVEL_LEVEL2			2
41 #define TXHIGHPWRLEVEL_BT1			3
42 #define TXHIGHPWRLEVEL_BT2			4
43 
44 #define DM_TYPE_BYFW				0
45 #define DM_TYPE_BYDRIVER			1
46 
47 #define TX_POWER_NEAR_FIELD_THRESH_LVL2		74
48 #define TX_POWER_NEAR_FIELD_THRESH_LVL1		67
49 
50 struct swat_t {
51 	u8 failure_cnt;
52 	u8 try_flag;
53 	u8 stop_trying;
54 	long pre_rssi;
55 	long trying_threshold;
56 	u8 cur_antenna;
57 	u8 pre_antenna;
58 
59 };
60 
61 enum tag_dynamic_init_gain_operation_type_definition {
62 	DIG_TYPE_THRESH_HIGH = 0,
63 	DIG_TYPE_THRESH_LOW = 1,
64 	DIG_TYPE_BACKOFF = 2,
65 	DIG_TYPE_RX_GAIN_MIN = 3,
66 	DIG_TYPE_RX_GAIN_MAX = 4,
67 	DIG_TYPE_ENABLE = 5,
68 	DIG_TYPE_DISABLE = 6,
69 	DIG_OP_TYPE_MAX
70 };
71 
72 enum dm_1r_cca_e {
73 	CCA_1R = 0,
74 	CCA_2R = 1,
75 	CCA_MAX = 2,
76 };
77 
78 enum dm_rf_e {
79 	RF_SAVE = 0,
80 	RF_NORMAL = 1,
81 	RF_MAX = 2,
82 };
83 
84 enum dm_sw_ant_switch_e {
85 	ANS_ANTENNA_B = 1,
86 	ANS_ANTENNA_A = 2,
87 	ANS_ANTENNA_MAX = 3,
88 };
89 
90 #define BT_RSSI_STATE_NORMAL_POWER      BIT_OFFSET_LEN_MASK_32(0, 1)
91 #define BT_RSSI_STATE_AMDPU_OFF         BIT_OFFSET_LEN_MASK_32(1, 1)
92 #define BT_RSSI_STATE_SPECIAL_LOW       BIT_OFFSET_LEN_MASK_32(2, 1)
93 #define BT_RSSI_STATE_BG_EDCA_LOW       BIT_OFFSET_LEN_MASK_32(3, 1)
94 #define BT_RSSI_STATE_TXPOWER_LOW       BIT_OFFSET_LEN_MASK_32(4, 1)
95 #define GET_UNDECORATED_AVERAGE_RSSI(_priv)     \
96 	( \
97 	(((struct rtl_priv *)(_priv))->mac80211.opmode ==		\
98 			     NL80211_IFTYPE_ADHOC) ?			\
99 	(((struct rtl_priv *)(_priv))->dm.entry_min_undec_sm_pwdb) :	\
100 	(((struct rtl_priv *)(_priv))->dm.undec_sm_pwdb)		\
101 	)
102 
103 void rtl8723e_dm_init(struct ieee80211_hw *hw);
104 void rtl8723e_dm_watchdog(struct ieee80211_hw *hw);
105 void rtl8723e_dm_write_dig(struct ieee80211_hw *hw);
106 void rtl8723e_dm_check_txpower_tracking(struct ieee80211_hw *hw);
107 void rtl8723e_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw);
108 void rtl8723e_dm_rf_saving(struct ieee80211_hw *hw, u8 bforce_in_normal);
109 void rtl8723e_dm_bt_coexist(struct ieee80211_hw *hw);
110 #endif
111