1 /******************************************************************************
2  *
3  * Copyright(c) 2009-2012  Realtek Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc.,
16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17  *
18  * The full GNU General Public License is included in this distribution in the
19  * file called LICENSE.
20  *
21  * Contact Information:
22  * wlanfae <wlanfae@realtek.com>
23  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24  * Hsinchu 300, Taiwan.
25  *
26  * Larry Finger <Larry.Finger@lwfinger.net>
27  *
28  *****************************************************************************/
29 #ifndef __RTL92S_PHY_H__
30 #define __RTL92S_PHY_H__
31 
32 #define MAX_TXPWR_IDX_NMODE_92S		63
33 #define MAX_DOZE_WAITING_TIMES_9x	64
34 
35 /* Channel switch:The size of
36  * command tables for switch channel */
37 #define MAX_PRECMD_CNT			16
38 #define MAX_RFDEPENDCMD_CNT		16
39 #define MAX_POSTCMD_CNT			16
40 
41 #define RF90_PATH_MAX			4
42 #define RF6052_MAX_PATH			2
43 
44 enum version_8192s {
45 	VERSION_8192S_ACUT,
46 	VERSION_8192S_BCUT,
47 	VERSION_8192S_CCUT
48 };
49 
50 enum swchnlcmd_id {
51 	CMDID_END,
52 	CMDID_SET_TXPOWEROWER_LEVEL,
53 	CMDID_BBREGWRITE10,
54 	CMDID_WRITEPORT_ULONG,
55 	CMDID_WRITEPORT_USHORT,
56 	CMDID_WRITEPORT_UCHAR,
57 	CMDID_RF_WRITEREG,
58 };
59 
60 struct swchnlcmd {
61 	enum swchnlcmd_id cmdid;
62 	u32 para1;
63 	u32 para2;
64 	u32 msdelay;
65 };
66 
67 enum baseband_config_type {
68 	/* Radio Path A */
69 	BASEBAND_CONFIG_PHY_REG = 0,
70 	/* Radio Path B */
71 	BASEBAND_CONFIG_AGC_TAB = 1,
72 };
73 
74 #define hal_get_firmwareversion(rtlpriv) \
75 	(((struct rt_firmware *)(rtlpriv->rtlhal.pfirmware))->firmwareversion)
76 
77 u32 rtl92s_phy_query_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask);
78 void rtl92s_phy_set_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask,
79 			   u32 data);
80 void rtl92s_phy_scan_operation_backup(struct ieee80211_hw *hw, u8 operation);
81 u32 rtl92s_phy_query_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,
82 			    u32 regaddr, u32 bitmask);
83 void rtl92s_phy_set_rf_reg(struct ieee80211_hw *hw,	enum radio_path rfpath,
84 			   u32 regaddr, u32 bitmask, u32 data);
85 void rtl92s_phy_set_bw_mode(struct ieee80211_hw *hw,
86 			    enum nl80211_channel_type ch_type);
87 u8 rtl92s_phy_sw_chnl(struct ieee80211_hw *hw);
88 bool rtl92s_phy_set_rf_power_state(struct ieee80211_hw *hw,
89 				   enum rf_pwrstate rfpower_state);
90 bool rtl92s_phy_mac_config(struct ieee80211_hw *hw);
91 void rtl92s_phy_switch_ephy_parameter(struct ieee80211_hw *hw);
92 bool rtl92s_phy_bb_config(struct ieee80211_hw *hw);
93 bool rtl92s_phy_rf_config(struct ieee80211_hw *hw);
94 void rtl92s_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw);
95 void rtl92s_phy_set_txpower(struct ieee80211_hw *hw, u8	channel);
96 bool rtl92s_phy_set_fw_cmd(struct ieee80211_hw *hw, enum fwcmd_iotype fwcmd_io);
97 void rtl92s_phy_chk_fwcmd_iodone(struct ieee80211_hw *hw);
98 void rtl92s_phy_set_beacon_hwreg(struct ieee80211_hw *hw, u16 beaconinterval);
99 u8 rtl92s_phy_config_rf(struct ieee80211_hw *hw, enum radio_path rfpath) ;
100 
101 #endif
102 
103