1 /******************************************************************************
2  *
3  * Copyright(c) 2009-2014  Realtek Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * The full GNU General Public License is included in this distribution in the
15  * file called LICENSE.
16  *
17  * Contact Information:
18  * wlanfae <wlanfae@realtek.com>
19  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20  * Hsinchu 300, Taiwan.
21  * Larry Finger <Larry.Finger@lwfinger.net>
22  *
23  *****************************************************************************/
24 
25 #ifndef __RTL92E__FW__H__
26 #define __RTL92E__FW__H__
27 
28 #define FW_8192C_SIZE				0x8000
29 #define FW_8192C_START_ADDRESS			0x1000
30 #define FW_8192C_END_ADDRESS			0x5FFF
31 #define FW_8192C_PAGE_SIZE			4096
32 #define FW_8192C_POLLING_DELAY			5
33 #define FW_8192C_POLLING_TIMEOUT_COUNT		3000
34 
35 #define IS_FW_HEADER_EXIST(_pfwhdr)	\
36 	((le16_to_cpu(_pfwhdr->signature) & 0xFFF0) == 0x92E0)
37 #define USE_OLD_WOWLAN_DEBUG_FW 0
38 
39 #define H2C_92E_RSVDPAGE_LOC_LEN		5
40 #define H2C_92E_PWEMODE_LENGTH			7
41 #define H2C_92E_JOINBSSRPT_LENGTH		1
42 #define H2C_92E_AP_OFFLOAD_LENGTH		3
43 #define H2C_92E_WOWLAN_LENGTH			3
44 #define H2C_92E_KEEP_ALIVE_CTRL_LENGTH		3
45 #if (USE_OLD_WOWLAN_DEBUG_FW == 0)
46 #define H2C_92E_REMOTE_WAKE_CTRL_LEN		1
47 #else
48 #define H2C_92E_REMOTE_WAKE_CTRL_LEN		3
49 #endif
50 #define H2C_92E_AOAC_GLOBAL_INFO_LEN		2
51 #define H2C_92E_AOAC_RSVDPAGE_LOC_LEN		7
52 
53 /* Fw PS state for RPWM.
54 *BIT[2:0] = HW state
55 *BIT[3] = Protocol PS state,  1: register active state, 0: register sleep state
56 *BIT[4] = sub-state
57 */
58 #define	FW_PS_RF_ON		BIT(2)
59 #define	FW_PS_REGISTER_ACTIVE	BIT(3)
60 
61 #define	FW_PS_ACK		BIT(6)
62 #define	FW_PS_TOGGLE		BIT(7)
63 
64  /* 92E RPWM value*/
65  /* BIT[0] = 1: 32k, 0: 40M*/
66 #define	FW_PS_CLOCK_OFF		BIT(0)		/* 32k */
67 #define	FW_PS_CLOCK_ON		0		/* 40M */
68 
69 #define	FW_PS_STATE_MASK		(0x0F)
70 #define	FW_PS_STATE_HW_MASK		(0x07)
71 #define	FW_PS_STATE_INT_MASK		(0x3F)
72 
73 #define	FW_PS_STATE(x)			(FW_PS_STATE_MASK & (x))
74 
75 #define	FW_PS_STATE_ALL_ON_92E		(FW_PS_CLOCK_ON)
76 #define	FW_PS_STATE_RF_ON_92E		(FW_PS_CLOCK_ON)
77 #define	FW_PS_STATE_RF_OFF_92E		(FW_PS_CLOCK_ON)
78 #define	FW_PS_STATE_RF_OFF_LOW_PWR	(FW_PS_CLOCK_OFF)
79 
80 /* For 92E H2C PwrMode Cmd ID 5.*/
81 #define	FW_PWR_STATE_ACTIVE	((FW_PS_RF_ON) | (FW_PS_REGISTER_ACTIVE))
82 #define	FW_PWR_STATE_RF_OFF	0
83 
84 #define	FW_PS_IS_ACK(x)		((x) & FW_PS_ACK)
85 
86 #define	IS_IN_LOW_POWER_STATE_92E(__state)		\
87 	(FW_PS_STATE(__state) == FW_PS_CLOCK_OFF)
88 
89 #define	FW_PWR_STATE_ACTIVE	((FW_PS_RF_ON) | (FW_PS_REGISTER_ACTIVE))
90 #define	FW_PWR_STATE_RF_OFF	0
91 
92 enum rtl8192e_h2c_cmd {
93 	H2C_92E_RSVDPAGE = 0,
94 	H2C_92E_MSRRPT = 1,
95 	H2C_92E_SCAN = 2,
96 	H2C_92E_KEEP_ALIVE_CTRL = 3,
97 	H2C_92E_DISCONNECT_DECISION = 4,
98 #if (USE_OLD_WOWLAN_DEBUG_FW == 1)
99 	H2C_92E_WO_WLAN = 5,
100 #endif
101 	H2C_92E_INIT_OFFLOAD = 6,
102 #if (USE_OLD_WOWLAN_DEBUG_FW == 1)
103 	H2C_92E_REMOTE_WAKE_CTRL = 7,
104 #endif
105 	H2C_92E_AP_OFFLOAD = 8,
106 	H2C_92E_BCN_RSVDPAGE = 9,
107 	H2C_92E_PROBERSP_RSVDPAGE = 10,
108 
109 	H2C_92E_SETPWRMODE = 0x20,
110 	H2C_92E_PS_TUNING_PARA = 0x21,
111 	H2C_92E_PS_TUNING_PARA2 = 0x22,
112 	H2C_92E_PS_LPS_PARA = 0x23,
113 	H2C_92E_P2P_PS_OFFLOAD = 024,
114 
115 #if (USE_OLD_WOWLAN_DEBUG_FW == 0)
116 	H2C_92E_WO_WLAN = 0x80,
117 	H2C_92E_REMOTE_WAKE_CTRL = 0x81,
118 	H2C_92E_AOAC_GLOBAL_INFO = 0x82,
119 	H2C_92E_AOAC_RSVDPAGE = 0x83,
120 #endif
121 	H2C_92E_RA_MASK = 0x40,
122 	H2C_92E_RSSI_REPORT = 0x42,
123 	H2C_92E_SELECTIVE_SUSPEND_ROF_CMD,
124 	H2C_92E_P2P_PS_MODE,
125 	H2C_92E_PSD_RESULT,
126 	/*Not defined CTW CMD for P2P yet*/
127 	H2C_92E_P2P_PS_CTW_CMD,
128 	MAX_92E_H2CCMD
129 };
130 
131 enum rtl8192e_c2h_evt {
132 	C2H_8192E_DBG = 0,
133 	C2H_8192E_LB = 1,
134 	C2H_8192E_TXBF = 2,
135 	C2H_8192E_TX_REPORT = 3,
136 	C2H_8192E_BT_INFO = 9,
137 	C2H_8192E_BT_MP = 11,
138 	C2H_8192E_RA_RPT = 12,
139 	MAX_8192E_C2HEVENT
140 };
141 
142 #define pagenum_128(_len)	\
143 	(u32)(((_len) >> 7) + ((_len) & 0x7F ? 1 : 0))
144 
145 #define SET_H2CCMD_PWRMODE_PARM_MODE(__ph2ccmd, __val)			\
146 	SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
147 #define SET_H2CCMD_PWRMODE_PARM_RLBM(__cmd, __val)			\
148 	SET_BITS_TO_LE_1BYTE((__cmd)+1, 0, 4, __val)
149 #define SET_H2CCMD_PWRMODE_PARM_SMART_PS(__cmd, __val)		\
150 	SET_BITS_TO_LE_1BYTE((__cmd)+1, 4, 4, __val)
151 #define SET_H2CCMD_PWRMODE_PARM_AWAKE_INTERVAL(__cmd, __val)	\
152 	SET_BITS_TO_LE_1BYTE((__cmd)+2, 0, 8, __val)
153 #define SET_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__cmd, __val)	\
154 	SET_BITS_TO_LE_1BYTE((__cmd)+3, 0, 8, __val)
155 #define SET_H2CCMD_PWRMODE_PARM_PWR_STATE(__cmd, __val)		\
156 	SET_BITS_TO_LE_1BYTE((__cmd)+4, 0, 8, __val)
157 #define SET_H2CCMD_PWRMODE_PARM_BYTE5(__cmd, __val)		\
158 	SET_BITS_TO_LE_1BYTE((__cmd) + 5, 0, 8, __val)
159 #define GET_92E_H2CCMD_PWRMODE_PARM_MODE(__cmd)			\
160 	LE_BITS_TO_1BYTE(__cmd, 0, 8)
161 
162 #define SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(__ph2ccmd, __val)		\
163 	SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
164 #define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__ph2ccmd, __val)		\
165 	SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
166 #define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__ph2ccmd, __val)		\
167 	SET_BITS_TO_LE_1BYTE((__ph2ccmd)+1, 0, 8, __val)
168 #define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__ph2ccmd, __val)		\
169 	SET_BITS_TO_LE_1BYTE((__ph2ccmd)+2, 0, 8, __val)
170 #define SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__ph2ccmd, __val)		\
171 	SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 3, 0, 8, __val)
172 #define SET_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__ph2ccmd, __val)	\
173 	SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 4, 0, 8, __val)
174 
175 /* _MEDIA_STATUS_RPT_PARM_CMD1 */
176 #define SET_H2CCMD_MSRRPT_PARM_OPMODE(__cmd, __val)		\
177 	SET_BITS_TO_LE_1BYTE(__cmd, 0, 1, __val)
178 #define SET_H2CCMD_MSRRPT_PARM_MACID_IND(__cmd, __val)		\
179 	SET_BITS_TO_LE_1BYTE(__cmd, 1, 1, __val)
180 #define SET_H2CCMD_MSRRPT_PARM_MACID(__cmd, __val)		\
181 	SET_BITS_TO_LE_1BYTE(__cmd+1, 0, 8, __val)
182 #define SET_H2CCMD_MSRRPT_PARM_MACID_END(__cmd, __val)		\
183 	SET_BITS_TO_LE_1BYTE(__cmd+2, 0, 8, __val)
184 
185 int rtl92ee_download_fw(struct ieee80211_hw *hw, bool buse_wake_on_wlan_fw);
186 void rtl92ee_fill_h2c_cmd(struct ieee80211_hw *hw, u8 element_id,
187 			  u32 cmd_len, u8 *cmdbuffer);
188 void rtl92ee_firmware_selfreset(struct ieee80211_hw *hw);
189 void rtl92ee_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode);
190 void rtl92ee_set_fw_media_status_rpt_cmd(struct ieee80211_hw *hw, u8 mstatus);
191 void rtl92ee_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool b_dl_finished);
192 void rtl92ee_set_p2p_ps_offload_cmd(struct ieee80211_hw *hw, u8 p2p_ps_state);
193 void rtl92ee_c2h_packet_handler(struct ieee80211_hw *hw, u8 *buffer, u8 len);
194 void rtl92ee_c2h_content_parsing(struct ieee80211_hw *hw, u8 c2h_cmd_id,
195 				 u8 c2h_cmd_len, u8 *tmp_buf);
196 #endif
197