1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright(c) 2009-2012 Realtek Corporation.*/ 3 4 #ifndef __RTL92D__FW__H__ 5 #define __RTL92D__FW__H__ 6 7 #define FW_8192D_START_ADDRESS 0x1000 8 #define FW_8192D_PAGE_SIZE 4096 9 #define FW_8192D_POLLING_TIMEOUT_COUNT 1000 10 11 #define IS_FW_HEADER_EXIST(_pfwhdr) \ 12 ((GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFF0) == 0x92C0 || \ 13 (GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFF0) == 0x88C0 || \ 14 (GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFFF) == 0x92D0 || \ 15 (GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFFF) == 0x92D1 || \ 16 (GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFFF) == 0x92D2 || \ 17 (GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFFF) == 0x92D3) 18 19 /* Define a macro that takes an le32 word, converts it to host ordering, 20 * right shifts by a specified count, creates a mask of the specified 21 * bit count, and extracts that number of bits. 22 */ 23 24 #define SHIFT_AND_MASK_LE(__pdesc, __shift, __mask) \ 25 ((le32_to_cpu(*(((__le32 *)(__pdesc)))) >> (__shift)) & \ 26 BIT_LEN_MASK_32(__mask)) 27 28 /* Firmware Header(8-byte alinment required) */ 29 /* --- LONG WORD 0 ---- */ 30 #define GET_FIRMWARE_HDR_SIGNATURE(__fwhdr) \ 31 SHIFT_AND_MASK_LE(__fwhdr, 0, 16) 32 #define GET_FIRMWARE_HDR_CATEGORY(__fwhdr) \ 33 SHIFT_AND_MASK_LE(__fwhdr, 16, 8) 34 #define GET_FIRMWARE_HDR_FUNCTION(__fwhdr) \ 35 SHIFT_AND_MASK_LE(__fwhdr, 24, 8) 36 #define GET_FIRMWARE_HDR_VERSION(__fwhdr) \ 37 SHIFT_AND_MASK_LE(__fwhdr + 4, 0, 16) 38 #define GET_FIRMWARE_HDR_SUB_VER(__fwhdr) \ 39 SHIFT_AND_MASK_LE(__fwhdr + 4, 16, 8) 40 #define GET_FIRMWARE_HDR_RSVD1(__fwhdr) \ 41 SHIFT_AND_MASK_LE(__fwhdr + 4, 24, 8) 42 43 /* --- LONG WORD 1 ---- */ 44 #define GET_FIRMWARE_HDR_MONTH(__fwhdr) \ 45 SHIFT_AND_MASK_LE(__fwhdr + 8, 0, 8) 46 #define GET_FIRMWARE_HDR_DATE(__fwhdr) \ 47 SHIFT_AND_MASK_LE(__fwhdr + 8, 8, 8) 48 #define GET_FIRMWARE_HDR_HOUR(__fwhdr) \ 49 SHIFT_AND_MASK_LE(__fwhdr + 8, 16, 8) 50 #define GET_FIRMWARE_HDR_MINUTE(__fwhdr) \ 51 SHIFT_AND_MASK_LE(__fwhdr + 8, 24, 8) 52 #define GET_FIRMWARE_HDR_ROMCODE_SIZE(__fwhdr) \ 53 SHIFT_AND_MASK_LE(__fwhdr + 12, 0, 16) 54 #define GET_FIRMWARE_HDR_RSVD2(__fwhdr) \ 55 SHIFT_AND_MASK_LE(__fwhdr + 12, 16, 16) 56 57 /* --- LONG WORD 2 ---- */ 58 #define GET_FIRMWARE_HDR_SVN_IDX(__fwhdr) \ 59 SHIFT_AND_MASK_LE(__fwhdr + 16, 0, 32) 60 #define GET_FIRMWARE_HDR_RSVD3(__fwhdr) \ 61 SHIFT_AND_MASK_LE(__fwhdr + 20, 0, 32) 62 63 /* --- LONG WORD 3 ---- */ 64 #define GET_FIRMWARE_HDR_RSVD4(__fwhdr) \ 65 SHIFT_AND_MASK_LE(__fwhdr + 24, 0, 32) 66 #define GET_FIRMWARE_HDR_RSVD5(__fwhdr) \ 67 SHIFT_AND_MASK_LE(__fwhdr + 28, 0, 32) 68 69 #define pagenum_128(_len) \ 70 (u32)(((_len) >> 7) + ((_len) & 0x7F ? 1 : 0)) 71 72 #define SET_H2CCMD_PWRMODE_PARM_MODE(__ph2ccmd, __val) \ 73 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val) 74 #define SET_H2CCMD_PWRMODE_PARM_SMART_PS(__ph2ccmd, __val) \ 75 SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 1, 0, 8, __val) 76 #define SET_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__ph2ccmd, __val) \ 77 SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 2, 0, 8, __val) 78 #define SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(__ph2ccmd, __val) \ 79 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val) 80 #define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__ph2ccmd, __val) \ 81 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val) 82 #define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__ph2ccmd, __val) \ 83 SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 1, 0, 8, __val) 84 #define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__ph2ccmd, __val) \ 85 SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 2, 0, 8, __val) 86 87 int rtl92d_download_fw(struct ieee80211_hw *hw); 88 void rtl92d_fill_h2c_cmd(struct ieee80211_hw *hw, u8 element_id, 89 u32 cmd_len, u8 *p_cmdbuffer); 90 void rtl92d_firmware_selfreset(struct ieee80211_hw *hw); 91 void rtl92d_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool b_dl_finished); 92 void rtl92d_set_fw_joinbss_report_cmd(struct ieee80211_hw *hw, u8 mstatus); 93 94 #endif 95