1 /******************************************************************************
2  *
3  * Copyright(c) 2009-2012  Realtek Corporation. All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * The full GNU General Public License is included in this distribution in the
15  * file called LICENSE.
16  *
17  * Contact Information:
18  * wlanfae <wlanfae@realtek.com>
19  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20  * Hsinchu 300, Taiwan.
21  *
22  * Larry Finger <Larry.Finger@lwfinger.net>
23  *
24  *****************************************************************************/
25 
26 #ifndef __RTL92CU_TRX_H__
27 #define __RTL92CU_TRX_H__
28 
29 #define RTL92C_USB_BULK_IN_NUM			1
30 #define RTL92C_NUM_RX_URBS			8
31 #define RTL92C_NUM_TX_URBS			32
32 
33 #define RTL92C_SIZE_MAX_RX_BUFFER		15360   /* 8192 */
34 #define RX_DRV_INFO_SIZE_UNIT			8
35 
36 #define RTL_AGG_ON				1
37 
38 enum usb_rx_agg_mode {
39 	USB_RX_AGG_DISABLE,
40 	USB_RX_AGG_DMA,
41 	USB_RX_AGG_USB,
42 	USB_RX_AGG_DMA_USB
43 };
44 
45 #define TX_SELE_HQ				BIT(0)	/* High Queue */
46 #define TX_SELE_LQ				BIT(1)	/* Low Queue */
47 #define TX_SELE_NQ				BIT(2)	/* Normal Queue */
48 
49 #define RTL_USB_TX_AGG_NUM_DESC			5
50 
51 #define RTL_USB_RX_AGG_PAGE_NUM			4
52 #define RTL_USB_RX_AGG_PAGE_TIMEOUT		3
53 
54 #define RTL_USB_RX_AGG_BLOCK_NUM		5
55 #define RTL_USB_RX_AGG_BLOCK_TIMEOUT		3
56 
57 /*======================== rx status =========================================*/
58 
59 struct rx_drv_info_92c {
60 	/*
61 	 * Driver info contain PHY status and other variabel size info
62 	 * PHY Status content as below
63 	 */
64 
65 	/* DWORD 0 */
66 	u8 gain_trsw[4];
67 
68 	/* DWORD 1 */
69 	u8 pwdb_all;
70 	u8 cfosho[4];
71 
72 	/* DWORD 2 */
73 	u8 cfotail[4];
74 
75 	/* DWORD 3 */
76 	s8 rxevm[2];
77 	s8 rxsnr[4];
78 
79 	/* DWORD 4 */
80 	u8 pdsnr[2];
81 
82 	/* DWORD 5 */
83 	u8 csi_current[2];
84 	u8 csi_target[2];
85 
86 	/* DWORD 6 */
87 	u8 sigevm;
88 	u8 max_ex_pwr;
89 	u8 ex_intf_flag:1;
90 	u8 sgi_en:1;
91 	u8 rxsc:2;
92 	u8 reserve:4;
93 } __packed;
94 
95 /* macros to read various fields in RX descriptor */
96 
97 /* DWORD 0 */
98 #define GET_RX_DESC_PKT_LEN(__rxdesc)		\
99 	LE_BITS_TO_4BYTE((__rxdesc), 0, 14)
100 #define GET_RX_DESC_CRC32(__rxdesc)		\
101 	LE_BITS_TO_4BYTE(__rxdesc, 14, 1)
102 #define GET_RX_DESC_ICV(__rxdesc)		\
103 	LE_BITS_TO_4BYTE(__rxdesc, 15, 1)
104 #define GET_RX_DESC_DRVINFO_SIZE(__rxdesc)	\
105 	LE_BITS_TO_4BYTE(__rxdesc, 16, 4)
106 #define GET_RX_DESC_SECURITY(__rxdesc)		\
107 	LE_BITS_TO_4BYTE(__rxdesc, 20, 3)
108 #define GET_RX_DESC_QOS(__rxdesc)		\
109 	LE_BITS_TO_4BYTE(__rxdesc, 23, 1)
110 #define GET_RX_DESC_SHIFT(__rxdesc)		\
111 	LE_BITS_TO_4BYTE(__rxdesc, 24, 2)
112 #define GET_RX_DESC_PHY_STATUS(__rxdesc)	\
113 	LE_BITS_TO_4BYTE(__rxdesc, 26, 1)
114 #define GET_RX_DESC_SWDEC(__rxdesc)		\
115 	LE_BITS_TO_4BYTE(__rxdesc, 27, 1)
116 #define GET_RX_DESC_LAST_SEG(__rxdesc)		\
117 	LE_BITS_TO_4BYTE(__rxdesc, 28, 1)
118 #define GET_RX_DESC_FIRST_SEG(__rxdesc)		\
119 	LE_BITS_TO_4BYTE(__rxdesc, 29, 1)
120 #define GET_RX_DESC_EOR(__rxdesc)		\
121 	LE_BITS_TO_4BYTE(__rxdesc, 30, 1)
122 #define GET_RX_DESC_OWN(__rxdesc)		\
123 	LE_BITS_TO_4BYTE(__rxdesc, 31, 1)
124 
125 /* DWORD 1 */
126 #define GET_RX_DESC_MACID(__rxdesc)		\
127 	LE_BITS_TO_4BYTE(__rxdesc + 4, 0, 5)
128 #define GET_RX_DESC_TID(__rxdesc)		\
129 	LE_BITS_TO_4BYTE(__rxdesc + 4, 5, 4)
130 #define GET_RX_DESC_PAGGR(__rxdesc)		\
131 	LE_BITS_TO_4BYTE(__rxdesc + 4, 14, 1)
132 #define GET_RX_DESC_FAGGR(__rxdesc)		\
133 	LE_BITS_TO_4BYTE(__rxdesc + 4, 15, 1)
134 #define GET_RX_DESC_A1_FIT(__rxdesc)		\
135 	LE_BITS_TO_4BYTE(__rxdesc + 4, 16, 4)
136 #define GET_RX_DESC_A2_FIT(__rxdesc)		\
137 	LE_BITS_TO_4BYTE(__rxdesc + 4, 20, 4)
138 #define GET_RX_DESC_PAM(__rxdesc)		\
139 	LE_BITS_TO_4BYTE(__rxdesc + 4, 24, 1)
140 #define GET_RX_DESC_PWR(__rxdesc)		\
141 	LE_BITS_TO_4BYTE(__rxdesc + 4, 25, 1)
142 #define GET_RX_DESC_MORE_DATA(__rxdesc)		\
143 	LE_BITS_TO_4BYTE(__rxdesc + 4, 26, 1)
144 #define GET_RX_DESC_MORE_FRAG(__rxdesc)		\
145 	LE_BITS_TO_4BYTE(__rxdesc + 4, 27, 1)
146 #define GET_RX_DESC_TYPE(__rxdesc)		\
147 	LE_BITS_TO_4BYTE(__rxdesc + 4, 28, 2)
148 #define GET_RX_DESC_MC(__rxdesc)		\
149 	LE_BITS_TO_4BYTE(__rxdesc + 4, 30, 1)
150 #define GET_RX_DESC_BC(__rxdesc)		\
151 	LE_BITS_TO_4BYTE(__rxdesc + 4, 31, 1)
152 
153 /* DWORD 2 */
154 #define GET_RX_DESC_SEQ(__rxdesc)		\
155 	LE_BITS_TO_4BYTE(__rxdesc + 8, 0, 12)
156 #define GET_RX_DESC_FRAG(__rxdesc)		\
157 	LE_BITS_TO_4BYTE(__rxdesc + 8, 12, 4)
158 #define GET_RX_DESC_USB_AGG_PKTNUM(__rxdesc)	\
159 	LE_BITS_TO_4BYTE(__rxdesc + 8, 16, 8)
160 #define GET_RX_DESC_NEXT_IND(__rxdesc)		\
161 	LE_BITS_TO_4BYTE(__rxdesc + 8, 30, 1)
162 
163 /* DWORD 3 */
164 #define GET_RX_DESC_RX_MCS(__rxdesc)		\
165 	LE_BITS_TO_4BYTE(__rxdesc + 12, 0, 6)
166 #define GET_RX_DESC_RX_HT(__rxdesc)		\
167 	LE_BITS_TO_4BYTE(__rxdesc + 12, 6, 1)
168 #define GET_RX_DESC_AMSDU(__rxdesc)		\
169 	LE_BITS_TO_4BYTE(__rxdesc + 12, 7, 1)
170 #define GET_RX_DESC_SPLCP(__rxdesc)		\
171 	LE_BITS_TO_4BYTE(__rxdesc + 12, 8, 1)
172 #define GET_RX_DESC_BW(__rxdesc)		\
173 	LE_BITS_TO_4BYTE(__rxdesc + 12, 9, 1)
174 #define GET_RX_DESC_HTC(__rxdesc)		\
175 	LE_BITS_TO_4BYTE(__rxdesc + 12, 10, 1)
176 #define GET_RX_DESC_TCP_CHK_RPT(__rxdesc)	\
177 	LE_BITS_TO_4BYTE(__rxdesc + 12, 11, 1)
178 #define GET_RX_DESC_IP_CHK_RPT(__rxdesc)	\
179 	LE_BITS_TO_4BYTE(__rxdesc + 12, 12, 1)
180 #define GET_RX_DESC_TCP_CHK_VALID(__rxdesc)	\
181 	LE_BITS_TO_4BYTE(__rxdesc + 12, 13, 1)
182 #define GET_RX_DESC_HWPC_ERR(__rxdesc)		\
183 	LE_BITS_TO_4BYTE(__rxdesc + 12, 14, 1)
184 #define GET_RX_DESC_HWPC_IND(__rxdesc)		\
185 	LE_BITS_TO_4BYTE(__rxdesc + 12, 15, 1)
186 #define GET_RX_DESC_IV0(__rxdesc)		\
187 	LE_BITS_TO_4BYTE(__rxdesc + 12, 16, 16)
188 
189 /* DWORD 4 */
190 #define GET_RX_DESC_IV1(__rxdesc)		\
191 	LE_BITS_TO_4BYTE(__rxdesc + 16, 0, 32)
192 
193 /* DWORD 5 */
194 #define GET_RX_DESC_TSFL(__rxdesc)		\
195 	LE_BITS_TO_4BYTE(__rxdesc + 20, 0, 32)
196 
197 /*======================= tx desc ============================================*/
198 
199 /* macros to set various fields in TX descriptor */
200 
201 /* Dword 0 */
202 #define SET_TX_DESC_PKT_SIZE(__txdesc, __value)		\
203 	SET_BITS_TO_LE_4BYTE(__txdesc, 0, 16, __value)
204 #define SET_TX_DESC_OFFSET(__txdesc, __value)		\
205 	SET_BITS_TO_LE_4BYTE(__txdesc, 16, 8, __value)
206 #define SET_TX_DESC_BMC(__txdesc, __value)		\
207 	SET_BITS_TO_LE_4BYTE(__txdesc, 24, 1, __value)
208 #define SET_TX_DESC_HTC(__txdesc, __value)		\
209 	SET_BITS_TO_LE_4BYTE(__txdesc, 25, 1, __value)
210 #define SET_TX_DESC_LAST_SEG(__txdesc, __value)		\
211 	SET_BITS_TO_LE_4BYTE(__txdesc, 26, 1, __value)
212 #define SET_TX_DESC_FIRST_SEG(__txdesc, __value)	\
213 	 SET_BITS_TO_LE_4BYTE(__txdesc, 27, 1, __value)
214 #define SET_TX_DESC_LINIP(__txdesc, __value)		\
215 	SET_BITS_TO_LE_4BYTE(__txdesc, 28, 1, __value)
216 #define SET_TX_DESC_NO_ACM(__txdesc, __value)		\
217 	SET_BITS_TO_LE_4BYTE(__txdesc, 29, 1, __value)
218 #define SET_TX_DESC_GF(__txdesc, __value)		\
219 	SET_BITS_TO_LE_4BYTE(__txdesc, 30, 1, __value)
220 #define SET_TX_DESC_OWN(__txdesc, __value)		\
221 	SET_BITS_TO_LE_4BYTE(__txdesc, 31, 1, __value)
222 
223 
224 /* Dword 1 */
225 #define SET_TX_DESC_MACID(__txdesc, __value)		\
226 	SET_BITS_TO_LE_4BYTE(__txdesc + 4, 0, 5, __value)
227 #define SET_TX_DESC_AGG_ENABLE(__txdesc, __value)	\
228 	SET_BITS_TO_LE_4BYTE(__txdesc + 4, 5, 1, __value)
229 #define SET_TX_DESC_AGG_BREAK(__txdesc, __value)	\
230 	SET_BITS_TO_LE_4BYTE(__txdesc + 4, 6, 1, __value)
231 #define SET_TX_DESC_RDG_ENABLE(__txdesc, __value)	\
232 	SET_BITS_TO_LE_4BYTE(__txdesc + 4, 7, 1, __value)
233 #define SET_TX_DESC_QUEUE_SEL(__txdesc, __value)	\
234 	SET_BITS_TO_LE_4BYTE(__txdesc + 4, 8, 5, __value)
235 #define SET_TX_DESC_RDG_NAV_EXT(__txdesc, __value)	\
236 	SET_BITS_TO_LE_4BYTE(__txdesc + 4, 13, 1, __value)
237 #define SET_TX_DESC_LSIG_TXOP_EN(__txdesc, __value)	\
238 	SET_BITS_TO_LE_4BYTE(__txdesc + 4, 14, 1, __value)
239 #define SET_TX_DESC_PIFS(__txdesc, __value)		\
240 	SET_BITS_TO_LE_4BYTE(__txdesc + 4, 15, 1, __value)
241 #define SET_TX_DESC_RATE_ID(__txdesc, __value)		\
242 	SET_BITS_TO_LE_4BYTE(__txdesc + 4, 16, 4, __value)
243 #define SET_TX_DESC_RA_BRSR_ID(__txdesc, __value)	\
244 	SET_BITS_TO_LE_4BYTE(__txdesc + 4, 16, 4, __value)
245 #define SET_TX_DESC_NAV_USE_HDR(__txdesc, __value)	\
246 	SET_BITS_TO_LE_4BYTE(__txdesc + 4, 20, 1, __value)
247 #define SET_TX_DESC_EN_DESC_ID(__txdesc, __value)	\
248 	SET_BITS_TO_LE_4BYTE(__txdesc + 4, 21, 1, __value)
249 #define SET_TX_DESC_SEC_TYPE(__txdesc, __value)		\
250 	SET_BITS_TO_LE_4BYTE(__txdesc + 4, 22, 2, __value)
251 #define SET_TX_DESC_PKT_OFFSET(__txdesc, __value)	\
252 	SET_BITS_TO_LE_4BYTE(__txdesc + 4, 26, 5, __value)
253 
254 /* Dword 2 */
255 #define SET_TX_DESC_RTS_RC(__txdesc, __value)		\
256 	SET_BITS_TO_LE_4BYTE(__txdesc + 8, 0, 6, __value)
257 #define SET_TX_DESC_DATA_RC(__txdesc, __value)		\
258 	SET_BITS_TO_LE_4BYTE(__txdesc + 8, 6, 6, __value)
259 #define SET_TX_DESC_BAR_RTY_TH(__txdesc, __value)	\
260 	SET_BITS_TO_LE_4BYTE(__txdesc + 8, 14, 2, __value)
261 #define SET_TX_DESC_MORE_FRAG(__txdesc, __value)	\
262 	SET_BITS_TO_LE_4BYTE(__txdesc + 8, 17, 1, __value)
263 #define SET_TX_DESC_RAW(__txdesc, __value)		\
264 	SET_BITS_TO_LE_4BYTE(__txdesc + 8, 18, 1, __value)
265 #define SET_TX_DESC_CCX(__txdesc, __value)		\
266 	SET_BITS_TO_LE_4BYTE(__txdesc + 8, 19, 1, __value)
267 #define SET_TX_DESC_AMPDU_DENSITY(__txdesc, __value)	\
268 	SET_BITS_TO_LE_4BYTE(__txdesc + 8, 20, 3, __value)
269 #define SET_TX_DESC_ANTSEL_A(__txdesc, __value)		\
270 	SET_BITS_TO_LE_4BYTE(__txdesc + 8, 24, 1, __value)
271 #define SET_TX_DESC_ANTSEL_B(__txdesc, __value)		\
272 	SET_BITS_TO_LE_4BYTE(__txdesc + 8, 25, 1, __value)
273 #define SET_TX_DESC_TX_ANT_CCK(__txdesc, __value)	\
274 	SET_BITS_TO_LE_4BYTE(__txdesc + 8, 26, 2, __value)
275 #define SET_TX_DESC_TX_ANTL(__txdesc, __value)		\
276 	SET_BITS_TO_LE_4BYTE(__txdesc + 8, 28, 2, __value)
277 #define SET_TX_DESC_TX_ANT_HT(__txdesc, __value)	\
278 	SET_BITS_TO_LE_4BYTE(__txdesc + 8, 30, 2, __value)
279 
280 /* Dword 3 */
281 #define SET_TX_DESC_NEXT_HEAP_PAGE(__txdesc, __value)	\
282 	SET_BITS_TO_LE_4BYTE(__txdesc + 12, 0, 8, __value)
283 #define SET_TX_DESC_TAIL_PAGE(__txdesc, __value)	\
284 	SET_BITS_TO_LE_4BYTE(__txdesc + 12, 8, 8, __value)
285 #define SET_TX_DESC_SEQ(__txdesc, __value)		\
286 	SET_BITS_TO_LE_4BYTE(__txdesc + 12, 16, 12, __value)
287 #define SET_TX_DESC_PKT_ID(__txdesc, __value)		\
288 	SET_BITS_TO_LE_4BYTE(__txdesc + 12, 28, 4, __value)
289 
290 /* Dword 4 */
291 #define SET_TX_DESC_RTS_RATE(__txdesc, __value)		\
292 	SET_BITS_TO_LE_4BYTE(__txdesc + 16, 0, 5, __value)
293 #define SET_TX_DESC_AP_DCFE(__txdesc, __value)		\
294 	SET_BITS_TO_LE_4BYTE(__txdesc + 16, 5, 1, __value)
295 #define SET_TX_DESC_QOS(__txdesc, __value)		\
296 	SET_BITS_TO_LE_4BYTE(__txdesc + 16, 6, 1, __value)
297 #define SET_TX_DESC_HWSEQ_EN(__txdesc, __value)		\
298 	SET_BITS_TO_LE_4BYTE(__txdesc + 16, 7, 1, __value)
299 #define SET_TX_DESC_USE_RATE(__txdesc, __value)		\
300 	SET_BITS_TO_LE_4BYTE(__txdesc + 16, 8, 1, __value)
301 #define SET_TX_DESC_DISABLE_RTS_FB(__txdesc, __value)	\
302 	SET_BITS_TO_LE_4BYTE(__txdesc + 16, 9, 1, __value)
303 #define SET_TX_DESC_DISABLE_FB(__txdesc, __value)	\
304 	SET_BITS_TO_LE_4BYTE(__txdesc + 16, 10, 1, __value)
305 #define SET_TX_DESC_CTS2SELF(__txdesc, __value)		\
306 	SET_BITS_TO_LE_4BYTE(__txdesc + 16, 11, 1, __value)
307 #define SET_TX_DESC_RTS_ENABLE(__txdesc, __value)	\
308 	SET_BITS_TO_LE_4BYTE(__txdesc + 16, 12, 1, __value)
309 #define SET_TX_DESC_HW_RTS_ENABLE(__txdesc, __value)	\
310 	SET_BITS_TO_LE_4BYTE(__txdesc + 16, 13, 1, __value)
311 #define SET_TX_DESC_WAIT_DCTS(__txdesc, __value)	\
312 	SET_BITS_TO_LE_4BYTE(__txdesc + 16, 18, 1, __value)
313 #define SET_TX_DESC_CTS2AP_EN(__txdesc, __value)	\
314 	SET_BITS_TO_LE_4BYTE(__txdesc + 16, 19, 1, __value)
315 #define SET_TX_DESC_DATA_SC(__txdesc, __value)		\
316 	SET_BITS_TO_LE_4BYTE(__txdesc + 16, 20, 2, __value)
317 #define SET_TX_DESC_DATA_STBC(__txdesc, __value)	\
318 	SET_BITS_TO_LE_4BYTE(__txdesc + 16, 22, 2, __value)
319 #define SET_TX_DESC_DATA_SHORT(__txdesc, __value)	\
320 	SET_BITS_TO_LE_4BYTE(__txdesc + 16, 24, 1, __value)
321 #define SET_TX_DESC_DATA_BW(__txdesc, __value)		\
322 	SET_BITS_TO_LE_4BYTE(__txdesc + 16, 25, 1, __value)
323 #define SET_TX_DESC_RTS_SHORT(__txdesc, __value)	\
324 	SET_BITS_TO_LE_4BYTE(__txdesc + 16, 26, 1, __value)
325 #define SET_TX_DESC_RTS_BW(__txdesc, __value)		\
326 	SET_BITS_TO_LE_4BYTE(__txdesc + 16, 27, 1, __value)
327 #define SET_TX_DESC_RTS_SC(__txdesc, __value)		\
328 	SET_BITS_TO_LE_4BYTE(__txdesc + 16, 28, 2, __value)
329 #define SET_TX_DESC_RTS_STBC(__txdesc, __value)		\
330 	SET_BITS_TO_LE_4BYTE(__txdesc + 16, 30, 2, __value)
331 
332 /* Dword 5 */
333 #define SET_TX_DESC_TX_RATE(__pdesc, __val)		\
334 	SET_BITS_TO_LE_4BYTE(__pdesc + 20, 0, 6, __val)
335 #define SET_TX_DESC_DATA_SHORTGI(__pdesc, __val)	\
336 	SET_BITS_TO_LE_4BYTE(__pdesc + 20, 6, 1, __val)
337 #define SET_TX_DESC_CCX_TAG(__pdesc, __val)		\
338 	SET_BITS_TO_LE_4BYTE(__pdesc + 20, 7, 1, __val)
339 #define SET_TX_DESC_DATA_RATE_FB_LIMIT(__txdesc, __value) \
340 	SET_BITS_TO_LE_4BYTE(__txdesc + 20, 8, 5, __value)
341 #define SET_TX_DESC_RTS_RATE_FB_LIMIT(__txdesc, __value) \
342 	SET_BITS_TO_LE_4BYTE(__txdesc + 20, 13, 4, __value)
343 #define SET_TX_DESC_RETRY_LIMIT_ENABLE(__txdesc, __value) \
344 	SET_BITS_TO_LE_4BYTE(__txdesc + 20, 17, 1, __value)
345 #define SET_TX_DESC_DATA_RETRY_LIMIT(__txdesc, __value)	\
346 	SET_BITS_TO_LE_4BYTE(__txdesc + 20, 18, 6, __value)
347 #define SET_TX_DESC_USB_TXAGG_NUM(__txdesc, __value)	\
348 	SET_BITS_TO_LE_4BYTE(__txdesc + 20, 24, 8, __value)
349 
350 /* Dword 6 */
351 #define SET_TX_DESC_TXAGC_A(__txdesc, __value)		\
352 	SET_BITS_TO_LE_4BYTE(__txdesc + 24, 0, 5, __value)
353 #define SET_TX_DESC_TXAGC_B(__txdesc, __value)		\
354 	SET_BITS_TO_LE_4BYTE(__txdesc + 24, 5, 5, __value)
355 #define SET_TX_DESC_USB_MAX_LEN(__txdesc, __value)	\
356 	SET_BITS_TO_LE_4BYTE(__txdesc + 24, 10, 1, __value)
357 #define SET_TX_DESC_MAX_AGG_NUM(__txdesc, __value)	\
358 	SET_BITS_TO_LE_4BYTE(__txdesc + 24, 11, 5, __value)
359 #define SET_TX_DESC_MCSG1_MAX_LEN(__txdesc, __value)	\
360 	SET_BITS_TO_LE_4BYTE(__txdesc + 24, 16, 4, __value)
361 #define SET_TX_DESC_MCSG2_MAX_LEN(__txdesc, __value)	\
362 	SET_BITS_TO_LE_4BYTE(__txdesc + 24, 20, 4, __value)
363 #define SET_TX_DESC_MCSG3_MAX_LEN(__txdesc, __value)	\
364 	SET_BITS_TO_LE_4BYTE(__txdesc + 24, 24, 4, __value)
365 #define SET_TX_DESC_MCSG7_MAX_LEN(__txdesc, __value)	\
366 	SET_BITS_TO_LE_4BYTE(__txdesc + 24, 28, 4, __value)
367 
368 /* Dword 7 */
369 #define SET_TX_DESC_TX_DESC_CHECKSUM(__txdesc, __value) \
370 	SET_BITS_TO_LE_4BYTE(__txdesc + 28, 0, 16, __value)
371 #define SET_TX_DESC_MCSG4_MAX_LEN(__txdesc, __value)	\
372 	SET_BITS_TO_LE_4BYTE(__txdesc + 28, 16, 4, __value)
373 #define SET_TX_DESC_MCSG5_MAX_LEN(__txdesc, __value)	\
374 	SET_BITS_TO_LE_4BYTE(__txdesc + 28, 20, 4, __value)
375 #define SET_TX_DESC_MCSG6_MAX_LEN(__txdesc, __value)	\
376 	SET_BITS_TO_LE_4BYTE(__txdesc + 28, 24, 4, __value)
377 #define SET_TX_DESC_MCSG15_MAX_LEN(__txdesc, __value)	\
378 	SET_BITS_TO_LE_4BYTE(__txdesc + 28, 28, 4, __value)
379 
380 
381 int  rtl8192cu_endpoint_mapping(struct ieee80211_hw *hw);
382 u16 rtl8192cu_mq_to_hwq(__le16 fc, u16 mac80211_queue_index);
383 bool rtl92cu_rx_query_desc(struct ieee80211_hw *hw,
384 			   struct rtl_stats *stats,
385 			   struct ieee80211_rx_status *rx_status,
386 			   u8 *p_desc, struct sk_buff *skb);
387 void  rtl8192cu_rx_hdl(struct ieee80211_hw *hw, struct sk_buff * skb);
388 void rtl8192c_rx_segregate_hdl(struct ieee80211_hw *, struct sk_buff *,
389 			       struct sk_buff_head *);
390 void rtl8192c_tx_cleanup(struct ieee80211_hw *hw, struct sk_buff  *skb);
391 int rtl8192c_tx_post_hdl(struct ieee80211_hw *hw, struct urb *urb,
392 			 struct sk_buff *skb);
393 struct sk_buff *rtl8192c_tx_aggregate_hdl(struct ieee80211_hw *,
394 					   struct sk_buff_head *);
395 void rtl92cu_tx_fill_desc(struct ieee80211_hw *hw,
396 			  struct ieee80211_hdr *hdr, u8 *pdesc_tx,
397 			  u8 *pbd_desc_tx, struct ieee80211_tx_info *info,
398 			  struct ieee80211_sta *sta,
399 			  struct sk_buff *skb,
400 			  u8 queue_index,
401 			  struct rtl_tcb_desc *tcb_desc);
402 void rtl92cu_fill_fake_txdesc(struct ieee80211_hw *hw, u8 * pDesc,
403 			      u32 buffer_len, bool bIsPsPoll);
404 void rtl92cu_tx_fill_cmddesc(struct ieee80211_hw *hw,
405 			     u8 *pdesc, bool b_firstseg,
406 			     bool b_lastseg, struct sk_buff *skb);
407 bool rtl92cu_cmd_send_packet(struct ieee80211_hw *hw, struct sk_buff *skb);
408 
409 #endif
410