1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 2009-2012 Realtek Corporation.*/ 3 4 #include "../wifi.h" 5 #include "../pci.h" 6 #include "../base.h" 7 #include "../stats.h" 8 #include "reg.h" 9 #include "def.h" 10 #include "phy.h" 11 #include "trx.h" 12 #include "led.h" 13 14 static u8 _rtl92ce_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue) 15 { 16 __le16 fc = rtl_get_fc(skb); 17 18 if (unlikely(ieee80211_is_beacon(fc))) 19 return QSLT_BEACON; 20 if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc)) 21 return QSLT_MGNT; 22 23 return skb->priority; 24 } 25 26 static u8 _rtl92c_query_rxpwrpercentage(s8 antpower) 27 { 28 if ((antpower <= -100) || (antpower >= 20)) 29 return 0; 30 else if (antpower >= 0) 31 return 100; 32 else 33 return 100 + antpower; 34 } 35 36 static long _rtl92ce_signal_scale_mapping(struct ieee80211_hw *hw, 37 long currsig) 38 { 39 long retsig; 40 41 if (currsig >= 61 && currsig <= 100) 42 retsig = 90 + ((currsig - 60) / 4); 43 else if (currsig >= 41 && currsig <= 60) 44 retsig = 78 + ((currsig - 40) / 2); 45 else if (currsig >= 31 && currsig <= 40) 46 retsig = 66 + (currsig - 30); 47 else if (currsig >= 21 && currsig <= 30) 48 retsig = 54 + (currsig - 20); 49 else if (currsig >= 5 && currsig <= 20) 50 retsig = 42 + (((currsig - 5) * 2) / 3); 51 else if (currsig == 4) 52 retsig = 36; 53 else if (currsig == 3) 54 retsig = 27; 55 else if (currsig == 2) 56 retsig = 18; 57 else if (currsig == 1) 58 retsig = 9; 59 else 60 retsig = currsig; 61 62 return retsig; 63 } 64 65 static void _rtl92ce_query_rxphystatus(struct ieee80211_hw *hw, 66 struct rtl_stats *pstats, 67 struct rx_desc_92c *pdesc, 68 struct rx_fwinfo_92c *p_drvinfo, 69 bool packet_match_bssid, 70 bool packet_toself, 71 bool packet_beacon) 72 { 73 struct rtl_priv *rtlpriv = rtl_priv(hw); 74 struct phy_sts_cck_8192s_t *cck_buf; 75 struct rtl_ps_ctl *ppsc = rtl_psc(rtlpriv); 76 s8 rx_pwr_all = 0, rx_pwr[4]; 77 u8 evm, pwdb_all, rf_rx_num = 0; 78 u8 i, max_spatial_stream; 79 u32 rssi, total_rssi = 0; 80 bool is_cck_rate; 81 82 is_cck_rate = RX_HAL_IS_CCK_RATE(pdesc->rxmcs); 83 pstats->packet_matchbssid = packet_match_bssid; 84 pstats->packet_toself = packet_toself; 85 pstats->is_cck = is_cck_rate; 86 pstats->packet_beacon = packet_beacon; 87 pstats->rx_mimo_sig_qual[0] = -1; 88 pstats->rx_mimo_sig_qual[1] = -1; 89 90 if (is_cck_rate) { 91 u8 report, cck_highpwr; 92 93 cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo; 94 95 if (ppsc->rfpwr_state == ERFON) 96 cck_highpwr = (u8) rtl_get_bbreg(hw, 97 RFPGA0_XA_HSSIPARAMETER2, 98 BIT(9)); 99 else 100 cck_highpwr = false; 101 102 if (!cck_highpwr) { 103 u8 cck_agc_rpt = cck_buf->cck_agc_rpt; 104 105 report = cck_buf->cck_agc_rpt & 0xc0; 106 report = report >> 6; 107 switch (report) { 108 case 0x3: 109 rx_pwr_all = -46 - (cck_agc_rpt & 0x3e); 110 break; 111 case 0x2: 112 rx_pwr_all = -26 - (cck_agc_rpt & 0x3e); 113 break; 114 case 0x1: 115 rx_pwr_all = -12 - (cck_agc_rpt & 0x3e); 116 break; 117 case 0x0: 118 rx_pwr_all = 16 - (cck_agc_rpt & 0x3e); 119 break; 120 } 121 } else { 122 u8 cck_agc_rpt = cck_buf->cck_agc_rpt; 123 124 report = p_drvinfo->cfosho[0] & 0x60; 125 report = report >> 5; 126 switch (report) { 127 case 0x3: 128 rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f) << 1); 129 break; 130 case 0x2: 131 rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f) << 1); 132 break; 133 case 0x1: 134 rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f) << 1); 135 break; 136 case 0x0: 137 rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f) << 1); 138 break; 139 } 140 } 141 142 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all); 143 /* CCK gain is smaller than OFDM/MCS gain, 144 * so we add gain diff by experiences, 145 * the val is 6 146 */ 147 pwdb_all += 6; 148 if (pwdb_all > 100) 149 pwdb_all = 100; 150 /* modify the offset to make the same 151 * gain index with OFDM. 152 */ 153 if (pwdb_all > 34 && pwdb_all <= 42) 154 pwdb_all -= 2; 155 else if (pwdb_all > 26 && pwdb_all <= 34) 156 pwdb_all -= 6; 157 else if (pwdb_all > 14 && pwdb_all <= 26) 158 pwdb_all -= 8; 159 else if (pwdb_all > 4 && pwdb_all <= 14) 160 pwdb_all -= 4; 161 162 pstats->rx_pwdb_all = pwdb_all; 163 pstats->recvsignalpower = rx_pwr_all; 164 165 /* (3) Get Signal Quality (EVM) */ 166 if (packet_match_bssid) { 167 u8 sq; 168 169 if (pstats->rx_pwdb_all > 40) 170 sq = 100; 171 else { 172 sq = cck_buf->sq_rpt; 173 if (sq > 64) 174 sq = 0; 175 else if (sq < 20) 176 sq = 100; 177 else 178 sq = ((64 - sq) * 100) / 44; 179 } 180 181 pstats->signalquality = sq; 182 pstats->rx_mimo_sig_qual[0] = sq; 183 pstats->rx_mimo_sig_qual[1] = -1; 184 } 185 } else { 186 rtlpriv->dm.rfpath_rxenable[0] = 187 rtlpriv->dm.rfpath_rxenable[1] = true; 188 /* (1)Get RSSI for HT rate */ 189 for (i = RF90_PATH_A; i < RF90_PATH_MAX; i++) { 190 /* we will judge RF RX path now. */ 191 if (rtlpriv->dm.rfpath_rxenable[i]) 192 rf_rx_num++; 193 194 rx_pwr[i] = 195 ((p_drvinfo->gain_trsw[i] & 0x3f) * 2) - 110; 196 /* Translate DBM to percentage. */ 197 rssi = _rtl92c_query_rxpwrpercentage(rx_pwr[i]); 198 total_rssi += rssi; 199 /* Get Rx snr value in DB */ 200 rtlpriv->stats.rx_snr_db[i] = 201 (long)(p_drvinfo->rxsnr[i] / 2); 202 203 /* Record Signal Strength for next packet */ 204 if (packet_match_bssid) 205 pstats->rx_mimo_signalstrength[i] = (u8) rssi; 206 } 207 208 /* (2)PWDB, Average PWDB cacluated by 209 * hardware (for rate adaptive) 210 */ 211 rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110; 212 pwdb_all = _rtl92c_query_rxpwrpercentage(rx_pwr_all); 213 pstats->rx_pwdb_all = pwdb_all; 214 pstats->rxpower = rx_pwr_all; 215 pstats->recvsignalpower = rx_pwr_all; 216 217 /* (3)EVM of HT rate */ 218 if (pstats->is_ht && pstats->rate >= DESC_RATEMCS8 && 219 pstats->rate <= DESC_RATEMCS15) 220 max_spatial_stream = 2; 221 else 222 max_spatial_stream = 1; 223 224 for (i = 0; i < max_spatial_stream; i++) { 225 evm = rtl_evm_db_to_percentage(p_drvinfo->rxevm[i]); 226 227 if (packet_match_bssid) { 228 /* Fill value in RFD, Get the first 229 * spatial stream only 230 */ 231 if (i == 0) 232 pstats->signalquality = 233 (u8)(evm & 0xff); 234 pstats->rx_mimo_sig_qual[i] = (u8)(evm & 0xff); 235 } 236 } 237 } 238 239 /* UI BSS List signal strength(in percentage), 240 * make it good looking, from 0~100. 241 */ 242 if (is_cck_rate) 243 pstats->signalstrength = 244 (u8)(_rtl92ce_signal_scale_mapping(hw, pwdb_all)); 245 else if (rf_rx_num != 0) 246 pstats->signalstrength = 247 (u8)(_rtl92ce_signal_scale_mapping 248 (hw, total_rssi /= rf_rx_num)); 249 } 250 251 static void _rtl92ce_translate_rx_signal_stuff(struct ieee80211_hw *hw, 252 struct sk_buff *skb, 253 struct rtl_stats *pstats, 254 struct rx_desc_92c *pdesc, 255 struct rx_fwinfo_92c *p_drvinfo) 256 { 257 struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); 258 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw)); 259 260 struct ieee80211_hdr *hdr; 261 u8 *tmp_buf; 262 u8 *praddr; 263 __le16 fc; 264 u16 type, c_fc; 265 bool packet_matchbssid, packet_toself, packet_beacon = false; 266 267 tmp_buf = skb->data + pstats->rx_drvinfo_size + pstats->rx_bufshift; 268 269 hdr = (struct ieee80211_hdr *)tmp_buf; 270 fc = hdr->frame_control; 271 c_fc = le16_to_cpu(fc); 272 type = WLAN_FC_GET_TYPE(fc); 273 praddr = hdr->addr1; 274 275 packet_matchbssid = 276 ((IEEE80211_FTYPE_CTL != type) && 277 ether_addr_equal(mac->bssid, 278 (c_fc & IEEE80211_FCTL_TODS) ? hdr->addr1 : 279 (c_fc & IEEE80211_FCTL_FROMDS) ? hdr->addr2 : 280 hdr->addr3) && 281 (!pstats->hwerror) && (!pstats->crc) && (!pstats->icv)); 282 283 packet_toself = packet_matchbssid && 284 ether_addr_equal(praddr, rtlefuse->dev_addr); 285 286 if (ieee80211_is_beacon(fc)) 287 packet_beacon = true; 288 289 _rtl92ce_query_rxphystatus(hw, pstats, pdesc, p_drvinfo, 290 packet_matchbssid, packet_toself, 291 packet_beacon); 292 293 rtl_process_phyinfo(hw, tmp_buf, pstats); 294 } 295 296 bool rtl92ce_rx_query_desc(struct ieee80211_hw *hw, 297 struct rtl_stats *stats, 298 struct ieee80211_rx_status *rx_status, 299 u8 *p_desc8, struct sk_buff *skb) 300 { 301 struct rx_fwinfo_92c *p_drvinfo; 302 struct rx_desc_92c *pdesc = (struct rx_desc_92c *)p_desc8; 303 struct ieee80211_hdr *hdr; 304 __le32 *p_desc = (__le32 *)p_desc8; 305 u32 phystatus = get_rx_desc_physt(p_desc); 306 307 stats->length = (u16)get_rx_desc_pkt_len(p_desc); 308 stats->rx_drvinfo_size = (u8)get_rx_desc_drv_info_size(p_desc) * 309 RX_DRV_INFO_SIZE_UNIT; 310 stats->rx_bufshift = (u8)(get_rx_desc_shift(p_desc) & 0x03); 311 stats->icv = (u16)get_rx_desc_icv(p_desc); 312 stats->crc = (u16)get_rx_desc_crc32(p_desc); 313 stats->hwerror = (stats->crc | stats->icv); 314 stats->decrypted = !get_rx_desc_swdec(p_desc); 315 stats->rate = (u8)get_rx_desc_rxmcs(p_desc); 316 stats->shortpreamble = (u16)get_rx_desc_splcp(p_desc); 317 stats->isampdu = (bool)(get_rx_desc_paggr(p_desc) == 1); 318 stats->isfirst_ampdu = (bool)((get_rx_desc_paggr(p_desc) == 1) && 319 (get_rx_desc_faggr(p_desc) == 1)); 320 stats->timestamp_low = get_rx_desc_tsfl(p_desc); 321 stats->rx_is40mhzpacket = (bool)get_rx_desc_bw(p_desc); 322 stats->is_ht = (bool)get_rx_desc_rxht(p_desc); 323 324 stats->is_cck = RX_HAL_IS_CCK_RATE(pdesc->rxmcs); 325 326 rx_status->freq = hw->conf.chandef.chan->center_freq; 327 rx_status->band = hw->conf.chandef.chan->band; 328 329 hdr = (struct ieee80211_hdr *)(skb->data + stats->rx_drvinfo_size 330 + stats->rx_bufshift); 331 332 if (stats->crc) 333 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC; 334 335 if (stats->rx_is40mhzpacket) 336 rx_status->bw = RATE_INFO_BW_40; 337 338 if (stats->is_ht) 339 rx_status->encoding = RX_ENC_HT; 340 341 rx_status->flag |= RX_FLAG_MACTIME_START; 342 343 /* hw will set stats->decrypted true, if it finds the 344 * frame is open data frame or mgmt frame. 345 * So hw will not decryption robust managment frame 346 * for IEEE80211w but still set status->decrypted 347 * true, so here we should set it back to undecrypted 348 * for IEEE80211w frame, and mac80211 sw will help 349 * to decrypt it 350 */ 351 if (stats->decrypted) { 352 if ((_ieee80211_is_robust_mgmt_frame(hdr)) && 353 (ieee80211_has_protected(hdr->frame_control))) 354 rx_status->flag &= ~RX_FLAG_DECRYPTED; 355 else 356 rx_status->flag |= RX_FLAG_DECRYPTED; 357 } 358 /* rate_idx: index of data rate into band's 359 * supported rates or MCS index if HT rates 360 * are use (RX_FLAG_HT) 361 * Notice: this is diff with windows define 362 */ 363 rx_status->rate_idx = rtlwifi_rate_mapping(hw, stats->is_ht, 364 false, stats->rate); 365 366 rx_status->mactime = stats->timestamp_low; 367 if (phystatus) { 368 p_drvinfo = (struct rx_fwinfo_92c *)(skb->data + 369 stats->rx_bufshift); 370 371 _rtl92ce_translate_rx_signal_stuff(hw, 372 skb, stats, pdesc, 373 p_drvinfo); 374 } 375 376 /*rx_status->qual = stats->signal; */ 377 rx_status->signal = stats->recvsignalpower + 10; 378 379 return true; 380 } 381 382 void rtl92ce_tx_fill_desc(struct ieee80211_hw *hw, 383 struct ieee80211_hdr *hdr, u8 *pdesc8, 384 u8 *pbd_desc_tx, struct ieee80211_tx_info *info, 385 struct ieee80211_sta *sta, 386 struct sk_buff *skb, 387 u8 hw_queue, struct rtl_tcb_desc *tcb_desc) 388 { 389 struct rtl_priv *rtlpriv = rtl_priv(hw); 390 struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); 391 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 392 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw)); 393 bool defaultadapter = true; 394 __le32 *pdesc = (__le32 *)pdesc8; 395 u16 seq_number; 396 __le16 fc = hdr->frame_control; 397 u8 fw_qsel = _rtl92ce_map_hwqueue_to_fwqueue(skb, hw_queue); 398 bool firstseg = ((hdr->seq_ctrl & 399 cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0); 400 401 bool lastseg = ((hdr->frame_control & 402 cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0); 403 404 dma_addr_t mapping = pci_map_single(rtlpci->pdev, 405 skb->data, skb->len, 406 PCI_DMA_TODEVICE); 407 408 u8 bw_40 = 0; 409 410 if (pci_dma_mapping_error(rtlpci->pdev, mapping)) { 411 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, 412 "DMA mapping error\n"); 413 return; 414 } 415 rcu_read_lock(); 416 sta = get_sta(hw, mac->vif, mac->bssid); 417 if (mac->opmode == NL80211_IFTYPE_STATION) { 418 bw_40 = mac->bw_40; 419 } else if (mac->opmode == NL80211_IFTYPE_AP || 420 mac->opmode == NL80211_IFTYPE_ADHOC || 421 mac->opmode == NL80211_IFTYPE_MESH_POINT) { 422 if (sta) 423 bw_40 = sta->bandwidth >= IEEE80211_STA_RX_BW_40; 424 } 425 426 seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4; 427 428 rtl_get_tcb_desc(hw, info, sta, skb, tcb_desc); 429 430 clear_pci_tx_desc_content(pdesc, sizeof(struct tx_desc_92c)); 431 432 if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) { 433 firstseg = true; 434 lastseg = true; 435 } 436 if (firstseg) { 437 set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN); 438 439 set_tx_desc_tx_rate(pdesc, tcb_desc->hw_rate); 440 441 if (tcb_desc->use_shortgi || tcb_desc->use_shortpreamble) 442 set_tx_desc_data_shortgi(pdesc, 1); 443 444 if (info->flags & IEEE80211_TX_CTL_AMPDU) { 445 set_tx_desc_agg_break(pdesc, 1); 446 set_tx_desc_max_agg_num(pdesc, 0x14); 447 } 448 set_tx_desc_seq(pdesc, seq_number); 449 450 set_tx_desc_rts_enable(pdesc, ((tcb_desc->rts_enable && 451 !tcb_desc-> 452 cts_enable) ? 1 : 0)); 453 set_tx_desc_hw_rts_enable(pdesc, 454 ((tcb_desc->rts_enable 455 || tcb_desc->cts_enable) ? 1 : 0)); 456 set_tx_desc_cts2self(pdesc, ((tcb_desc->cts_enable) ? 1 : 0)); 457 set_tx_desc_rts_stbc(pdesc, ((tcb_desc->rts_stbc) ? 1 : 0)); 458 459 set_tx_desc_rts_rate(pdesc, tcb_desc->rts_rate); 460 set_tx_desc_rts_bw(pdesc, 0); 461 set_tx_desc_rts_sc(pdesc, tcb_desc->rts_sc); 462 set_tx_desc_rts_short(pdesc, 463 ((tcb_desc->rts_rate <= DESC_RATE54M) ? 464 (tcb_desc->rts_use_shortpreamble ? 1 : 0) 465 : (tcb_desc->rts_use_shortgi ? 1 : 0))); 466 467 if (bw_40) { 468 if (tcb_desc->packet_bw) { 469 set_tx_desc_data_bw(pdesc, 1); 470 set_tx_desc_tx_sub_carrier(pdesc, 3); 471 } else { 472 set_tx_desc_data_bw(pdesc, 0); 473 set_tx_desc_tx_sub_carrier(pdesc, 474 mac->cur_40_prime_sc); 475 } 476 } else { 477 set_tx_desc_data_bw(pdesc, 0); 478 set_tx_desc_tx_sub_carrier(pdesc, 0); 479 } 480 481 set_tx_desc_linip(pdesc, 0); 482 set_tx_desc_pkt_size(pdesc, (u16)skb->len); 483 484 if (sta) { 485 u8 ampdu_density = sta->ht_cap.ampdu_density; 486 487 set_tx_desc_ampdu_density(pdesc, ampdu_density); 488 } 489 490 if (info->control.hw_key) { 491 struct ieee80211_key_conf *keyconf = 492 info->control.hw_key; 493 494 switch (keyconf->cipher) { 495 case WLAN_CIPHER_SUITE_WEP40: 496 case WLAN_CIPHER_SUITE_WEP104: 497 case WLAN_CIPHER_SUITE_TKIP: 498 set_tx_desc_sec_type(pdesc, 0x1); 499 break; 500 case WLAN_CIPHER_SUITE_CCMP: 501 set_tx_desc_sec_type(pdesc, 0x3); 502 break; 503 default: 504 set_tx_desc_sec_type(pdesc, 0x0); 505 break; 506 507 } 508 } 509 510 set_tx_desc_pkt_id(pdesc, 0); 511 set_tx_desc_queue_sel(pdesc, fw_qsel); 512 513 set_tx_desc_data_rate_fb_limit(pdesc, 0x1F); 514 set_tx_desc_rts_rate_fb_limit(pdesc, 0xF); 515 set_tx_desc_disable_fb(pdesc, 0); 516 set_tx_desc_use_rate(pdesc, tcb_desc->use_driver_rate ? 1 : 0); 517 518 if (ieee80211_is_data_qos(fc)) { 519 if (mac->rdg_en) { 520 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, 521 "Enable RDG function\n"); 522 set_tx_desc_rdg_enable(pdesc, 1); 523 set_tx_desc_htc(pdesc, 1); 524 } 525 } 526 } 527 rcu_read_unlock(); 528 529 set_tx_desc_first_seg(pdesc, (firstseg ? 1 : 0)); 530 set_tx_desc_last_seg(pdesc, (lastseg ? 1 : 0)); 531 532 set_tx_desc_tx_buffer_size(pdesc, (u16)skb->len); 533 534 set_tx_desc_tx_buffer_address(pdesc, mapping); 535 536 if (rtlpriv->dm.useramask) { 537 set_tx_desc_rate_id(pdesc, tcb_desc->ratr_index); 538 set_tx_desc_macid(pdesc, tcb_desc->mac_id); 539 } else { 540 set_tx_desc_rate_id(pdesc, 0xC + tcb_desc->ratr_index); 541 set_tx_desc_macid(pdesc, tcb_desc->ratr_index); 542 } 543 544 if ((!ieee80211_is_data_qos(fc)) && ppsc->fwctrl_lps) { 545 set_tx_desc_hwseq_en(pdesc, 1); 546 set_tx_desc_pkt_id(pdesc, 8); 547 548 if (!defaultadapter) 549 set_tx_desc_qos(pdesc, 1); 550 } 551 552 set_tx_desc_more_frag(pdesc, (lastseg ? 0 : 1)); 553 554 if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) || 555 is_broadcast_ether_addr(ieee80211_get_DA(hdr))) { 556 set_tx_desc_bmc(pdesc, 1); 557 } 558 559 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "\n"); 560 } 561 562 void rtl92ce_tx_fill_cmddesc(struct ieee80211_hw *hw, 563 u8 *pdesc8, bool firstseg, 564 bool lastseg, struct sk_buff *skb) 565 { 566 struct rtl_priv *rtlpriv = rtl_priv(hw); 567 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 568 u8 fw_queue = QSLT_BEACON; 569 __le32 *pdesc = (__le32 *)pdesc8; 570 571 dma_addr_t mapping = pci_map_single(rtlpci->pdev, 572 skb->data, skb->len, 573 PCI_DMA_TODEVICE); 574 575 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data); 576 __le16 fc = hdr->frame_control; 577 578 if (pci_dma_mapping_error(rtlpci->pdev, mapping)) { 579 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, 580 "DMA mapping error\n"); 581 return; 582 } 583 clear_pci_tx_desc_content(pdesc, TX_DESC_SIZE); 584 585 if (firstseg) 586 set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN); 587 588 set_tx_desc_tx_rate(pdesc, DESC_RATE1M); 589 590 set_tx_desc_seq(pdesc, 0); 591 592 set_tx_desc_linip(pdesc, 0); 593 594 set_tx_desc_queue_sel(pdesc, fw_queue); 595 596 set_tx_desc_first_seg(pdesc, 1); 597 set_tx_desc_last_seg(pdesc, 1); 598 599 set_tx_desc_tx_buffer_size(pdesc, (u16)(skb->len)); 600 601 set_tx_desc_tx_buffer_address(pdesc, mapping); 602 603 set_tx_desc_rate_id(pdesc, 7); 604 set_tx_desc_macid(pdesc, 0); 605 606 set_tx_desc_own(pdesc, 1); 607 608 set_tx_desc_pkt_size(pdesc, (u16)(skb->len)); 609 610 set_tx_desc_first_seg(pdesc, 1); 611 set_tx_desc_last_seg(pdesc, 1); 612 613 set_tx_desc_offset(pdesc, 0x20); 614 615 set_tx_desc_use_rate(pdesc, 1); 616 617 if (!ieee80211_is_data_qos(fc)) { 618 set_tx_desc_hwseq_en(pdesc, 1); 619 set_tx_desc_pkt_id(pdesc, 8); 620 } 621 622 RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD, 623 "H2C Tx Cmd Content", pdesc, TX_DESC_SIZE); 624 } 625 626 void rtl92ce_set_desc(struct ieee80211_hw *hw, u8 *pdesc8, bool istx, 627 u8 desc_name, u8 *val) 628 { 629 __le32 *pdesc = (__le32 *)pdesc8; 630 631 if (istx) { 632 switch (desc_name) { 633 case HW_DESC_OWN: 634 wmb(); 635 set_tx_desc_own(pdesc, 1); 636 break; 637 case HW_DESC_TX_NEXTDESC_ADDR: 638 set_tx_desc_next_desc_address(pdesc, *(u32 *)val); 639 break; 640 default: 641 WARN_ONCE(true, "rtl8192ce: ERR txdesc :%d not processed\n", 642 desc_name); 643 break; 644 } 645 } else { 646 switch (desc_name) { 647 case HW_DESC_RXOWN: 648 wmb(); 649 set_rx_desc_own(pdesc, 1); 650 break; 651 case HW_DESC_RXBUFF_ADDR: 652 set_rx_desc_buff_addr(pdesc, *(u32 *)val); 653 break; 654 case HW_DESC_RXPKT_LEN: 655 set_rx_desc_pkt_len(pdesc, *(u32 *)val); 656 break; 657 case HW_DESC_RXERO: 658 set_rx_desc_eor(pdesc, 1); 659 break; 660 default: 661 WARN_ONCE(true, "rtl8192ce: ERR rxdesc :%d not processed\n", 662 desc_name); 663 break; 664 } 665 } 666 } 667 668 u64 rtl92ce_get_desc(struct ieee80211_hw *hw, u8 *p_desc8, 669 bool istx, u8 desc_name) 670 { 671 u32 ret = 0; 672 __le32 *p_desc = (__le32 *)p_desc8; 673 674 if (istx) { 675 switch (desc_name) { 676 case HW_DESC_OWN: 677 ret = get_tx_desc_own(p_desc); 678 break; 679 case HW_DESC_TXBUFF_ADDR: 680 ret = get_tx_desc_tx_buffer_address(p_desc); 681 break; 682 default: 683 WARN_ONCE(true, "rtl8192ce: ERR txdesc :%d not processed\n", 684 desc_name); 685 break; 686 } 687 } else { 688 switch (desc_name) { 689 case HW_DESC_OWN: 690 ret = get_rx_desc_own(p_desc); 691 break; 692 case HW_DESC_RXPKT_LEN: 693 ret = get_rx_desc_pkt_len(p_desc); 694 break; 695 case HW_DESC_RXBUFF_ADDR: 696 ret = get_rx_desc_buff_addr(p_desc); 697 break; 698 default: 699 WARN_ONCE(true, "rtl8192ce: ERR rxdesc :%d not processed\n", 700 desc_name); 701 break; 702 } 703 } 704 return ret; 705 } 706 707 bool rtl92ce_is_tx_desc_closed(struct ieee80211_hw *hw, 708 u8 hw_queue, u16 index) 709 { 710 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 711 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue]; 712 u8 *entry = (u8 *)(&ring->desc[ring->idx]); 713 u8 own = (u8)rtl92ce_get_desc(hw, entry, true, HW_DESC_OWN); 714 715 /*beacon packet will only use the first 716 *descriptor defautly,and the own may not 717 *be cleared by the hardware 718 */ 719 if (own) 720 return false; 721 return true; 722 } 723 724 void rtl92ce_tx_polling(struct ieee80211_hw *hw, u8 hw_queue) 725 { 726 struct rtl_priv *rtlpriv = rtl_priv(hw); 727 728 if (hw_queue == BEACON_QUEUE) { 729 rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4)); 730 } else { 731 rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, 732 BIT(0) << (hw_queue)); 733 } 734 } 735 736