1 /******************************************************************************
2  *
3  * Copyright(c) 2009-2012  Realtek Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * The full GNU General Public License is included in this distribution in the
15  * file called LICENSE.
16  *
17  * Contact Information:
18  * wlanfae <wlanfae@realtek.com>
19  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20  * Hsinchu 300, Taiwan.
21  *
22  * Larry Finger <Larry.Finger@lwfinger.net>
23  *
24  *****************************************************************************/
25 
26 #ifndef	__RTL92C_DM_H__
27 #define __RTL92C_DM_H__
28 
29 #define HAL_DM_DIG_DISABLE			BIT(0)
30 #define HAL_DM_HIPWR_DISABLE			BIT(1)
31 
32 #define OFDM_TABLE_LENGTH			37
33 #define CCK_TABLE_LENGTH			33
34 
35 #define OFDM_TABLE_SIZE				37
36 #define CCK_TABLE_SIZE				33
37 
38 #define BW_AUTO_SWITCH_HIGH_LOW			25
39 #define BW_AUTO_SWITCH_LOW_HIGH			30
40 
41 #define DM_DIG_FA_UPPER				0x32
42 #define DM_DIG_FA_LOWER				0x20
43 #define DM_DIG_FA_TH0				0x20
44 #define DM_DIG_FA_TH1				0x100
45 #define DM_DIG_FA_TH2				0x200
46 
47 #define RXPATHSELECTION_SS_TH_lOW		30
48 #define RXPATHSELECTION_DIFF_TH			18
49 
50 #define DM_RATR_STA_INIT			0
51 #define DM_RATR_STA_HIGH			1
52 #define DM_RATR_STA_MIDDLE			2
53 #define DM_RATR_STA_LOW				3
54 
55 #define CTS2SELF_THVAL				30
56 #define REGC38_TH				20
57 
58 #define WAIOTTHVal				25
59 
60 #define TXHIGHPWRLEVEL_NORMAL			0
61 #define TXHIGHPWRLEVEL_LEVEL1			1
62 #define TXHIGHPWRLEVEL_LEVEL2			2
63 #define TXHIGHPWRLEVEL_BT1			3
64 #define TXHIGHPWRLEVEL_BT2			4
65 
66 #define DM_TYPE_BYFW				0
67 #define DM_TYPE_BYDRIVER			1
68 
69 #define TX_POWER_NEAR_FIELD_THRESH_LVL2		74
70 #define TX_POWER_NEAR_FIELD_THRESH_LVL1		67
71 
72 void rtl92c_dm_init(struct ieee80211_hw *hw);
73 void rtl92c_dm_watchdog(struct ieee80211_hw *hw);
74 void rtl92c_dm_write_dig(struct ieee80211_hw *hw);
75 void rtl92c_dm_init_edca_turbo(struct ieee80211_hw *hw);
76 void rtl92c_dm_check_txpower_tracking(struct ieee80211_hw *hw);
77 void rtl92c_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw);
78 void rtl92c_dm_rf_saving(struct ieee80211_hw *hw, u8 bforce_in_normal);
79 void rtl92c_dm_bt_coexist(struct ieee80211_hw *hw);
80 void rtl92ce_dm_dynamic_txpower(struct ieee80211_hw *hw);
81 
82 #endif
83