1 /******************************************************************************
2  *
3  * Copyright(c) 2009-2012  Realtek Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc.,
16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17  *
18  * The full GNU General Public License is included in this distribution in the
19  * file called LICENSE.
20  *
21  * Contact Information:
22  * wlanfae <wlanfae@realtek.com>
23  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24  * Hsinchu 300, Taiwan.
25  *
26  * Larry Finger <Larry.Finger@lwfinger.net>
27  *
28  *****************************************************************************/
29 
30 #ifndef	__RTL92COMMON_DM_H__
31 #define __RTL92COMMON_DM_H__
32 
33 #include "../wifi.h"
34 #include "../rtl8192ce/def.h"
35 #include "../rtl8192ce/reg.h"
36 #include "fw_common.h"
37 
38 #define HAL_DM_DIG_DISABLE			BIT(0)
39 #define HAL_DM_HIPWR_DISABLE			BIT(1)
40 
41 #define OFDM_TABLE_LENGTH			37
42 #define CCK_TABLE_LENGTH			33
43 
44 #define OFDM_TABLE_SIZE				37
45 #define CCK_TABLE_SIZE				33
46 
47 #define BW_AUTO_SWITCH_HIGH_LOW			25
48 #define BW_AUTO_SWITCH_LOW_HIGH			30
49 
50 #define DM_DIG_FA_UPPER				0x32
51 #define DM_DIG_FA_LOWER				0x20
52 #define DM_DIG_FA_TH0				0x20
53 #define DM_DIG_FA_TH1				0x100
54 #define DM_DIG_FA_TH2				0x200
55 
56 #define RXPATHSELECTION_SS_TH_lOW		30
57 #define RXPATHSELECTION_DIFF_TH			18
58 
59 #define DM_RATR_STA_INIT			0
60 #define DM_RATR_STA_HIGH			1
61 #define DM_RATR_STA_MIDDLE			2
62 #define DM_RATR_STA_LOW				3
63 
64 #define CTS2SELF_THVAL				30
65 #define REGC38_TH				20
66 
67 #define WAIOTTHVal				25
68 
69 #define TXHIGHPWRLEVEL_NORMAL			0
70 #define TXHIGHPWRLEVEL_LEVEL1			1
71 #define TXHIGHPWRLEVEL_LEVEL2			2
72 #define TXHIGHPWRLEVEL_BT1			3
73 #define TXHIGHPWRLEVEL_BT2			4
74 
75 #define DM_TYPE_BYFW				0
76 #define DM_TYPE_BYDRIVER			1
77 
78 #define TX_POWER_NEAR_FIELD_THRESH_LVL2		74
79 #define TX_POWER_NEAR_FIELD_THRESH_LVL1		67
80 
81 #define DYNAMIC_FUNC_DISABLE			0x0
82 #define DYNAMIC_FUNC_DIG			BIT(0)
83 #define DYNAMIC_FUNC_HP				BIT(1)
84 #define DYNAMIC_FUNC_SS				BIT(2) /*Tx Power Tracking*/
85 #define DYNAMIC_FUNC_BT				BIT(3)
86 #define DYNAMIC_FUNC_ANT_DIV			BIT(4)
87 
88 #define	RSSI_CCK				0
89 #define	RSSI_OFDM				1
90 #define	RSSI_DEFAULT				2
91 
92 struct swat_t {
93 	u8 failure_cnt;
94 	u8 try_flag;
95 	u8 stop_trying;
96 	long pre_rssi;
97 	long trying_threshold;
98 	u8 cur_antenna;
99 	u8 pre_antenna;
100 };
101 
102 enum tag_dynamic_init_gain_operation_type_definition {
103 	DIG_TYPE_THRESH_HIGH = 0,
104 	DIG_TYPE_THRESH_LOW = 1,
105 	DIG_TYPE_BACKOFF = 2,
106 	DIG_TYPE_RX_GAIN_MIN = 3,
107 	DIG_TYPE_RX_GAIN_MAX = 4,
108 	DIG_TYPE_ENABLE = 5,
109 	DIG_TYPE_DISABLE = 6,
110 	DIG_OP_TYPE_MAX
111 };
112 
113 enum dm_1r_cca_e {
114 	CCA_1R = 0,
115 	CCA_2R = 1,
116 	CCA_MAX = 2,
117 };
118 
119 enum dm_rf_e {
120 	RF_SAVE = 0,
121 	RF_NORMAL = 1,
122 	RF_MAX = 2,
123 };
124 
125 enum dm_sw_ant_switch_e {
126 	ANS_ANTENNA_B = 1,
127 	ANS_ANTENNA_A = 2,
128 	ANS_ANTENNA_MAX = 3,
129 };
130 
131 void rtl92c_dm_init(struct ieee80211_hw *hw);
132 void rtl92c_dm_watchdog(struct ieee80211_hw *hw);
133 void rtl92c_dm_write_dig(struct ieee80211_hw *hw);
134 void rtl92c_dm_init_edca_turbo(struct ieee80211_hw *hw);
135 void rtl92c_dm_check_txpower_tracking(struct ieee80211_hw *hw);
136 void rtl92c_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw);
137 void rtl92c_dm_rf_saving(struct ieee80211_hw *hw, u8 bforce_in_normal);
138 void rtl92c_phy_ap_calibrate(struct ieee80211_hw *hw, char delta);
139 void rtl92c_phy_lc_calibrate(struct ieee80211_hw *hw);
140 void rtl92c_phy_iq_calibrate(struct ieee80211_hw *hw, bool recovery);
141 void rtl92c_dm_dynamic_txpower(struct ieee80211_hw *hw);
142 void rtl92c_dm_bt_coexist(struct ieee80211_hw *hw);
143 void dm_savepowerindex(struct ieee80211_hw *hw);
144 void dm_writepowerindex(struct ieee80211_hw *hw, u8 value);
145 void dm_restorepowerindex(struct ieee80211_hw *hw);
146 
147 #endif
148