1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2009-2013  Realtek Corporation.*/
3 
4 #include "../wifi.h"
5 #include "../pci.h"
6 #include "../base.h"
7 #include "../stats.h"
8 #include "reg.h"
9 #include "def.h"
10 #include "trx.h"
11 #include "led.h"
12 #include "dm.h"
13 #include "phy.h"
14 
15 static u8 _rtl88ee_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue)
16 {
17 	__le16 fc = rtl_get_fc(skb);
18 
19 	if (unlikely(ieee80211_is_beacon(fc)))
20 		return QSLT_BEACON;
21 	if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
22 		return QSLT_MGNT;
23 
24 	return skb->priority;
25 }
26 
27 static void _rtl88ee_query_rxphystatus(struct ieee80211_hw *hw,
28 			struct rtl_stats *pstatus, u8 *pdesc,
29 			struct rx_fwinfo_88e *p_drvinfo,
30 			bool bpacket_match_bssid,
31 			bool bpacket_toself, bool packet_beacon)
32 {
33 	struct rtl_priv *rtlpriv = rtl_priv(hw);
34 	struct rtl_ps_ctl *ppsc = rtl_psc(rtlpriv);
35 	struct phy_sts_cck_8192s_t *cck_buf;
36 	struct phy_status_rpt *phystrpt =
37 		(struct phy_status_rpt *)p_drvinfo;
38 	struct rtl_dm *rtldm = rtl_dm(rtl_priv(hw));
39 	s8 rx_pwr_all = 0, rx_pwr[4];
40 	u8 rf_rx_num = 0, evm, pwdb_all;
41 	u8 i, max_spatial_stream;
42 	u32 rssi, total_rssi = 0;
43 	bool is_cck = pstatus->is_cck;
44 	u8 lan_idx, vga_idx;
45 
46 	/* Record it for next packet processing */
47 	pstatus->packet_matchbssid = bpacket_match_bssid;
48 	pstatus->packet_toself = bpacket_toself;
49 	pstatus->packet_beacon = packet_beacon;
50 	pstatus->rx_mimo_signalquality[0] = -1;
51 	pstatus->rx_mimo_signalquality[1] = -1;
52 
53 	if (is_cck) {
54 		u8 cck_highpwr;
55 		u8 cck_agc_rpt;
56 		/* CCK Driver info Structure is not the same as OFDM packet. */
57 		cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
58 		cck_agc_rpt = cck_buf->cck_agc_rpt;
59 
60 		/* (1)Hardware does not provide RSSI for CCK
61 		 * (2)PWDB, Average PWDB cacluated by
62 		 * hardware (for rate adaptive)
63 		 */
64 		if (ppsc->rfpwr_state == ERFON)
65 			cck_highpwr =
66 				(u8)rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2,
67 						  BIT(9));
68 		else
69 			cck_highpwr = false;
70 
71 		lan_idx = ((cck_agc_rpt & 0xE0) >> 5);
72 		vga_idx = (cck_agc_rpt & 0x1f);
73 		switch (lan_idx) {
74 		case 7:
75 			if (vga_idx <= 27)
76 				/*VGA_idx = 27~2*/
77 				rx_pwr_all = -100 + 2*(27-vga_idx);
78 			else
79 				rx_pwr_all = -100;
80 			break;
81 		case 6:
82 			/*VGA_idx = 2~0*/
83 			rx_pwr_all = -48 + 2*(2-vga_idx);
84 			break;
85 		case 5:
86 			/*VGA_idx = 7~5*/
87 			rx_pwr_all = -42 + 2*(7-vga_idx);
88 			break;
89 		case 4:
90 			/*VGA_idx = 7~4*/
91 			rx_pwr_all = -36 + 2*(7-vga_idx);
92 			break;
93 		case 3:
94 			/*VGA_idx = 7~0*/
95 			rx_pwr_all = -24 + 2*(7-vga_idx);
96 			break;
97 		case 2:
98 			if (cck_highpwr)
99 				/*VGA_idx = 5~0*/
100 				rx_pwr_all = -12 + 2*(5-vga_idx);
101 			else
102 				rx_pwr_all = -6 + 2*(5-vga_idx);
103 			break;
104 		case 1:
105 			rx_pwr_all = 8-2*vga_idx;
106 			break;
107 		case 0:
108 			rx_pwr_all = 14-2*vga_idx;
109 			break;
110 		default:
111 			break;
112 		}
113 		rx_pwr_all += 6;
114 		pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
115 		/* CCK gain is smaller than OFDM/MCS gain,  */
116 		/* so we add gain diff by experiences, the val is 6 */
117 		pwdb_all += 6;
118 		if (pwdb_all > 100)
119 			pwdb_all = 100;
120 		/* modify the offset to make the same
121 		 * gain index with OFDM.
122 		 */
123 		if (pwdb_all > 34 && pwdb_all <= 42)
124 			pwdb_all -= 2;
125 		else if (pwdb_all > 26 && pwdb_all <= 34)
126 			pwdb_all -= 6;
127 		else if (pwdb_all > 14 && pwdb_all <= 26)
128 			pwdb_all -= 8;
129 		else if (pwdb_all > 4 && pwdb_all <= 14)
130 			pwdb_all -= 4;
131 		if (!cck_highpwr) {
132 			if (pwdb_all >= 80)
133 				pwdb_all = ((pwdb_all-80)<<1) +
134 					   ((pwdb_all-80)>>1) + 80;
135 			else if ((pwdb_all <= 78) && (pwdb_all >= 20))
136 				pwdb_all += 3;
137 			if (pwdb_all > 100)
138 				pwdb_all = 100;
139 		}
140 
141 		pstatus->rx_pwdb_all = pwdb_all;
142 		pstatus->recvsignalpower = rx_pwr_all;
143 
144 		/* (3) Get Signal Quality (EVM) */
145 		if (bpacket_match_bssid) {
146 			u8 sq;
147 
148 			if (pstatus->rx_pwdb_all > 40)
149 				sq = 100;
150 			else {
151 				sq = cck_buf->sq_rpt;
152 				if (sq > 64)
153 					sq = 0;
154 				else if (sq < 20)
155 					sq = 100;
156 				else
157 					sq = ((64 - sq) * 100) / 44;
158 			}
159 
160 			pstatus->signalquality = sq;
161 			pstatus->rx_mimo_signalquality[0] = sq;
162 			pstatus->rx_mimo_signalquality[1] = -1;
163 		}
164 	} else {
165 		rtlpriv->dm.rfpath_rxenable[0] =
166 		    rtlpriv->dm.rfpath_rxenable[1] = true;
167 
168 		/* (1)Get RSSI for HT rate */
169 		for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
170 			/* we will judge RF RX path now. */
171 			if (rtlpriv->dm.rfpath_rxenable[i])
172 				rf_rx_num++;
173 
174 			rx_pwr[i] = ((p_drvinfo->gain_trsw[i] &
175 				      0x3f) * 2) - 110;
176 
177 			/* Translate DBM to percentage. */
178 			rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);
179 			total_rssi += rssi;
180 
181 			/* Get Rx snr value in DB */
182 			rtlpriv->stats.rx_snr_db[i] =
183 				(long)(p_drvinfo->rxsnr[i] / 2);
184 
185 			/* Record Signal Strength for next packet */
186 			if (bpacket_match_bssid)
187 				pstatus->rx_mimo_signalstrength[i] = (u8)rssi;
188 		}
189 
190 		/* (2)PWDB, Average PWDB cacluated by
191 		 * hardware (for rate adaptive)
192 		 */
193 		rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
194 
195 		pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
196 		pstatus->rx_pwdb_all = pwdb_all;
197 		pstatus->rxpower = rx_pwr_all;
198 		pstatus->recvsignalpower = rx_pwr_all;
199 
200 		/* (3)EVM of HT rate */
201 		if (pstatus->is_ht && pstatus->rate >= DESC92C_RATEMCS8 &&
202 		    pstatus->rate <= DESC92C_RATEMCS15)
203 			max_spatial_stream = 2;
204 		else
205 			max_spatial_stream = 1;
206 
207 		for (i = 0; i < max_spatial_stream; i++) {
208 			evm = rtl_evm_db_to_percentage(p_drvinfo->rxevm[i]);
209 
210 			if (bpacket_match_bssid) {
211 				/* Fill value in RFD, Get the first
212 				 * spatial stream onlyi
213 				 */
214 				if (i == 0)
215 					pstatus->signalquality =
216 						(u8)(evm & 0xff);
217 				pstatus->rx_mimo_signalquality[i] =
218 					(u8)(evm & 0xff);
219 			}
220 		}
221 	}
222 
223 	/* UI BSS List signal strength(in percentage),
224 	 * make it good looking, from 0~100.
225 	 */
226 	if (is_cck)
227 		pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
228 			pwdb_all));
229 	else if (rf_rx_num != 0)
230 		pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
231 			total_rssi /= rf_rx_num));
232 	/*HW antenna diversity*/
233 	rtldm->fat_table.antsel_rx_keep_0 = phystrpt->ant_sel;
234 	rtldm->fat_table.antsel_rx_keep_1 = phystrpt->ant_sel_b;
235 	rtldm->fat_table.antsel_rx_keep_2 = phystrpt->antsel_rx_keep_2;
236 }
237 
238 static void _rtl88ee_smart_antenna(struct ieee80211_hw *hw,
239 	struct rtl_stats *pstatus)
240 {
241 	struct rtl_dm *rtldm = rtl_dm(rtl_priv(hw));
242 	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
243 	u8 antsel_tr_mux;
244 	struct fast_ant_training *pfat_table = &rtldm->fat_table;
245 
246 	if (rtlefuse->antenna_div_type == CG_TRX_SMART_ANTDIV) {
247 		if (pfat_table->fat_state == FAT_TRAINING_STATE) {
248 			if (pstatus->packet_toself) {
249 				antsel_tr_mux =
250 					(pfat_table->antsel_rx_keep_2 << 2) |
251 					(pfat_table->antsel_rx_keep_1 << 1) |
252 					pfat_table->antsel_rx_keep_0;
253 				pfat_table->ant_sum[antsel_tr_mux] +=
254 					pstatus->rx_pwdb_all;
255 				pfat_table->ant_cnt[antsel_tr_mux]++;
256 			}
257 		}
258 	} else if ((rtlefuse->antenna_div_type == CG_TRX_HW_ANTDIV) ||
259 	(rtlefuse->antenna_div_type == CGCS_RX_HW_ANTDIV)) {
260 		if (pstatus->packet_toself || pstatus->packet_matchbssid) {
261 			antsel_tr_mux = (pfat_table->antsel_rx_keep_2 << 2) |
262 					(pfat_table->antsel_rx_keep_1 << 1) |
263 					pfat_table->antsel_rx_keep_0;
264 			rtl88e_dm_ant_sel_statistics(hw, antsel_tr_mux, 0,
265 						     pstatus->rx_pwdb_all);
266 		}
267 
268 	}
269 }
270 
271 static void _rtl88ee_translate_rx_signal_stuff(struct ieee80211_hw *hw,
272 					       struct sk_buff *skb,
273 					       struct rtl_stats *pstatus,
274 					       u8 *pdesc,
275 					       struct rx_fwinfo_88e *p_drvinfo)
276 {
277 	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
278 	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
279 	struct ieee80211_hdr *hdr;
280 	u8 *tmp_buf;
281 	u8 *praddr;
282 	u8 *psaddr;
283 	__le16 fc;
284 	bool packet_matchbssid, packet_toself, packet_beacon;
285 
286 	tmp_buf = skb->data + pstatus->rx_drvinfo_size + pstatus->rx_bufshift;
287 
288 	hdr = (struct ieee80211_hdr *)tmp_buf;
289 	fc = hdr->frame_control;
290 	praddr = hdr->addr1;
291 	psaddr = ieee80211_get_SA(hdr);
292 	memcpy(pstatus->psaddr, psaddr, ETH_ALEN);
293 
294 	packet_matchbssid = ((!ieee80211_is_ctl(fc)) &&
295 	     (ether_addr_equal(mac->bssid, ieee80211_has_tods(fc) ?
296 			       hdr->addr1 : ieee80211_has_fromds(fc) ?
297 			       hdr->addr2 : hdr->addr3)) &&
298 			       (!pstatus->hwerror) &&
299 			       (!pstatus->crc) && (!pstatus->icv));
300 
301 	packet_toself = packet_matchbssid &&
302 	    (ether_addr_equal(praddr, rtlefuse->dev_addr));
303 
304 	if (ieee80211_is_beacon(hdr->frame_control))
305 		packet_beacon = true;
306 	else
307 		packet_beacon = false;
308 
309 	_rtl88ee_query_rxphystatus(hw, pstatus, pdesc, p_drvinfo,
310 				   packet_matchbssid, packet_toself,
311 				   packet_beacon);
312 	_rtl88ee_smart_antenna(hw, pstatus);
313 	rtl_process_phyinfo(hw, tmp_buf, pstatus);
314 }
315 
316 static void _rtl88ee_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
317 				      u8 *virtualaddress)
318 {
319 	u32 dwtmp = 0;
320 	memset(virtualaddress, 0, 8);
321 
322 	SET_EARLYMODE_PKTNUM(virtualaddress, ptcb_desc->empkt_num);
323 	if (ptcb_desc->empkt_num == 1) {
324 		dwtmp = ptcb_desc->empkt_len[0];
325 	} else {
326 		dwtmp = ptcb_desc->empkt_len[0];
327 		dwtmp += ((dwtmp%4) ? (4-dwtmp%4) : 0)+4;
328 		dwtmp += ptcb_desc->empkt_len[1];
329 	}
330 	SET_EARLYMODE_LEN0(virtualaddress, dwtmp);
331 
332 	if (ptcb_desc->empkt_num <= 3) {
333 		dwtmp = ptcb_desc->empkt_len[2];
334 	} else {
335 		dwtmp = ptcb_desc->empkt_len[2];
336 		dwtmp += ((dwtmp%4) ? (4-dwtmp%4) : 0)+4;
337 		dwtmp += ptcb_desc->empkt_len[3];
338 	}
339 	SET_EARLYMODE_LEN1(virtualaddress, dwtmp);
340 	if (ptcb_desc->empkt_num <= 5) {
341 		dwtmp = ptcb_desc->empkt_len[4];
342 	} else {
343 		dwtmp = ptcb_desc->empkt_len[4];
344 		dwtmp += ((dwtmp%4) ? (4-dwtmp%4) : 0)+4;
345 		dwtmp += ptcb_desc->empkt_len[5];
346 	}
347 	SET_EARLYMODE_LEN2_1(virtualaddress, dwtmp & 0xF);
348 	SET_EARLYMODE_LEN2_2(virtualaddress, dwtmp >> 4);
349 	if (ptcb_desc->empkt_num <= 7) {
350 		dwtmp = ptcb_desc->empkt_len[6];
351 	} else {
352 		dwtmp = ptcb_desc->empkt_len[6];
353 		dwtmp += ((dwtmp%4) ? (4-dwtmp%4) : 0)+4;
354 		dwtmp += ptcb_desc->empkt_len[7];
355 	}
356 	SET_EARLYMODE_LEN3(virtualaddress, dwtmp);
357 	if (ptcb_desc->empkt_num <= 9) {
358 		dwtmp = ptcb_desc->empkt_len[8];
359 	} else {
360 		dwtmp = ptcb_desc->empkt_len[8];
361 		dwtmp += ((dwtmp%4) ? (4-dwtmp%4) : 0)+4;
362 		dwtmp += ptcb_desc->empkt_len[9];
363 	}
364 	SET_EARLYMODE_LEN4(virtualaddress, dwtmp);
365 }
366 
367 bool rtl88ee_rx_query_desc(struct ieee80211_hw *hw,
368 			   struct rtl_stats *status,
369 			   struct ieee80211_rx_status *rx_status,
370 			   u8 *pdesc, struct sk_buff *skb)
371 {
372 	struct rtl_priv *rtlpriv = rtl_priv(hw);
373 	struct rx_fwinfo_88e *p_drvinfo;
374 	struct ieee80211_hdr *hdr;
375 
376 	u32 phystatus = GET_RX_DESC_PHYST(pdesc);
377 	status->packet_report_type = (u8)GET_RX_STATUS_DESC_RPT_SEL(pdesc);
378 	if (status->packet_report_type == TX_REPORT2)
379 		status->length = (u16)GET_RX_RPT2_DESC_PKT_LEN(pdesc);
380 	else
381 		status->length = (u16)GET_RX_DESC_PKT_LEN(pdesc);
382 	status->rx_drvinfo_size = (u8)GET_RX_DESC_DRV_INFO_SIZE(pdesc) *
383 	    RX_DRV_INFO_SIZE_UNIT;
384 	status->rx_bufshift = (u8)(GET_RX_DESC_SHIFT(pdesc) & 0x03);
385 	status->icv = (u16)GET_RX_DESC_ICV(pdesc);
386 	status->crc = (u16)GET_RX_DESC_CRC32(pdesc);
387 	status->hwerror = (status->crc | status->icv);
388 	status->decrypted = !GET_RX_DESC_SWDEC(pdesc);
389 	status->rate = (u8)GET_RX_DESC_RXMCS(pdesc);
390 	status->shortpreamble = (u16)GET_RX_DESC_SPLCP(pdesc);
391 	status->isampdu = (bool) (GET_RX_DESC_PAGGR(pdesc) == 1);
392 	status->isfirst_ampdu = (bool)((GET_RX_DESC_PAGGR(pdesc) == 1) &&
393 				(GET_RX_DESC_FAGGR(pdesc) == 1));
394 	if (status->packet_report_type == NORMAL_RX)
395 		status->timestamp_low = GET_RX_DESC_TSFL(pdesc);
396 	status->rx_is40mhzpacket = (bool)GET_RX_DESC_BW(pdesc);
397 	status->is_ht = (bool)GET_RX_DESC_RXHT(pdesc);
398 
399 	status->is_cck = RTL8188_RX_HAL_IS_CCK_RATE(status->rate);
400 
401 	status->macid = GET_RX_DESC_MACID(pdesc);
402 	if (GET_RX_STATUS_DESC_MAGIC_MATCH(pdesc))
403 		status->wake_match = BIT(2);
404 	else if (GET_RX_STATUS_DESC_MAGIC_MATCH(pdesc))
405 		status->wake_match = BIT(1);
406 	else if (GET_RX_STATUS_DESC_UNICAST_MATCH(pdesc))
407 		status->wake_match = BIT(0);
408 	else
409 		status->wake_match = 0;
410 	if (status->wake_match)
411 		RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD,
412 		"GGGGGGGGGGGGGet Wakeup Packet!! WakeMatch=%d\n",
413 		status->wake_match);
414 	rx_status->freq = hw->conf.chandef.chan->center_freq;
415 	rx_status->band = hw->conf.chandef.chan->band;
416 
417 	hdr = (struct ieee80211_hdr *)(skb->data + status->rx_drvinfo_size
418 			+ status->rx_bufshift);
419 
420 	if (status->crc)
421 		rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
422 
423 	if (status->rx_is40mhzpacket)
424 		rx_status->bw = RATE_INFO_BW_40;
425 
426 	if (status->is_ht)
427 		rx_status->encoding = RX_ENC_HT;
428 
429 	rx_status->flag |= RX_FLAG_MACTIME_START;
430 
431 	/* hw will set status->decrypted true, if it finds the
432 	 * frame is open data frame or mgmt frame.
433 	 * So hw will not decryption robust managment frame
434 	 * for IEEE80211w but still set status->decrypted
435 	 * true, so here we should set it back to undecrypted
436 	 * for IEEE80211w frame, and mac80211 sw will help
437 	 * to decrypt it
438 	 */
439 	if (status->decrypted) {
440 		if ((!_ieee80211_is_robust_mgmt_frame(hdr)) &&
441 		    (ieee80211_has_protected(hdr->frame_control)))
442 			rx_status->flag |= RX_FLAG_DECRYPTED;
443 		else
444 			rx_status->flag &= ~RX_FLAG_DECRYPTED;
445 	}
446 
447 	/* rate_idx: index of data rate into band's
448 	 * supported rates or MCS index if HT rates
449 	 * are use (RX_FLAG_HT)
450 	 * Notice: this is diff with windows define
451 	 */
452 	rx_status->rate_idx = rtlwifi_rate_mapping(hw, status->is_ht,
453 						   false, status->rate);
454 
455 	rx_status->mactime = status->timestamp_low;
456 	if (phystatus == true) {
457 		p_drvinfo = (struct rx_fwinfo_88e *)(skb->data +
458 						     status->rx_bufshift);
459 
460 		_rtl88ee_translate_rx_signal_stuff(hw,
461 						   skb, status, pdesc,
462 						   p_drvinfo);
463 	}
464 	rx_status->signal = status->recvsignalpower + 10;
465 	if (status->packet_report_type == TX_REPORT2) {
466 		status->macid_valid_entry[0] =
467 			 GET_RX_RPT2_DESC_MACID_VALID_1(pdesc);
468 		status->macid_valid_entry[1] =
469 			 GET_RX_RPT2_DESC_MACID_VALID_2(pdesc);
470 	}
471 	return true;
472 }
473 
474 void rtl88ee_tx_fill_desc(struct ieee80211_hw *hw,
475 			  struct ieee80211_hdr *hdr, u8 *pdesc_tx,
476 			  u8 *txbd, struct ieee80211_tx_info *info,
477 			  struct ieee80211_sta *sta,
478 			  struct sk_buff *skb,
479 			  u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
480 
481 {
482 	struct rtl_priv *rtlpriv = rtl_priv(hw);
483 	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
484 	struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
485 	struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
486 	u8 *pdesc = (u8 *)pdesc_tx;
487 	u16 seq_number;
488 	__le16 fc = hdr->frame_control;
489 	unsigned int buf_len = 0;
490 	unsigned int skb_len = skb->len;
491 	u8 fw_qsel = _rtl88ee_map_hwqueue_to_fwqueue(skb, hw_queue);
492 	bool firstseg = ((hdr->seq_ctrl &
493 			    cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
494 	bool lastseg = ((hdr->frame_control &
495 			   cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
496 	dma_addr_t mapping;
497 	u8 bw_40 = 0;
498 	u8 short_gi = 0;
499 
500 	if (mac->opmode == NL80211_IFTYPE_STATION) {
501 		bw_40 = mac->bw_40;
502 	} else if (mac->opmode == NL80211_IFTYPE_AP ||
503 		mac->opmode == NL80211_IFTYPE_ADHOC) {
504 		if (sta)
505 			bw_40 = sta->ht_cap.cap &
506 				IEEE80211_HT_CAP_SUP_WIDTH_20_40;
507 	}
508 	seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
509 	rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
510 	/* reserve 8 byte for AMPDU early mode */
511 	if (rtlhal->earlymode_enable) {
512 		skb_push(skb, EM_HDR_LEN);
513 		memset(skb->data, 0, EM_HDR_LEN);
514 	}
515 	buf_len = skb->len;
516 	mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len,
517 				 PCI_DMA_TODEVICE);
518 	if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
519 		RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
520 			 "DMA mapping error\n");
521 		return;
522 	}
523 	CLEAR_PCI_TX_DESC_CONTENT(pdesc, sizeof(struct tx_desc_88e));
524 	if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
525 		firstseg = true;
526 		lastseg = true;
527 	}
528 	if (firstseg) {
529 		if (rtlhal->earlymode_enable) {
530 			SET_TX_DESC_PKT_OFFSET(pdesc, 1);
531 			SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN +
532 					   EM_HDR_LEN);
533 			if (ptcb_desc->empkt_num) {
534 				RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
535 					 "Insert 8 byte.pTcb->EMPktNum:%d\n",
536 					  ptcb_desc->empkt_num);
537 				_rtl88ee_insert_emcontent(ptcb_desc,
538 							  (u8 *)(skb->data));
539 			}
540 		} else {
541 			SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
542 		}
543 
544 		ptcb_desc->use_driver_rate = true;
545 		SET_TX_DESC_TX_RATE(pdesc, ptcb_desc->hw_rate);
546 		if (ptcb_desc->hw_rate > DESC92C_RATEMCS0)
547 			short_gi = (ptcb_desc->use_shortgi) ? 1 : 0;
548 		else
549 			short_gi = (ptcb_desc->use_shortpreamble) ? 1 : 0;
550 
551 		SET_TX_DESC_DATA_SHORTGI(pdesc, short_gi);
552 
553 		if (info->flags & IEEE80211_TX_CTL_AMPDU) {
554 			SET_TX_DESC_AGG_ENABLE(pdesc, 1);
555 			SET_TX_DESC_MAX_AGG_NUM(pdesc, 0x14);
556 		}
557 		SET_TX_DESC_SEQ(pdesc, seq_number);
558 		SET_TX_DESC_RTS_ENABLE(pdesc, ((ptcb_desc->rts_enable &&
559 						!ptcb_desc->cts_enable) ? 1 : 0));
560 		SET_TX_DESC_HW_RTS_ENABLE(pdesc, 0);
561 		SET_TX_DESC_CTS2SELF(pdesc, ((ptcb_desc->cts_enable) ? 1 : 0));
562 		SET_TX_DESC_RTS_STBC(pdesc, ((ptcb_desc->rts_stbc) ? 1 : 0));
563 
564 		SET_TX_DESC_RTS_RATE(pdesc, ptcb_desc->rts_rate);
565 		SET_TX_DESC_RTS_BW(pdesc, 0);
566 		SET_TX_DESC_RTS_SC(pdesc, ptcb_desc->rts_sc);
567 		SET_TX_DESC_RTS_SHORT(pdesc,
568 			((ptcb_desc->rts_rate <= DESC92C_RATE54M) ?
569 			(ptcb_desc->rts_use_shortpreamble ? 1 : 0) :
570 			(ptcb_desc->rts_use_shortgi ? 1 : 0)));
571 
572 		if (ptcb_desc->tx_enable_sw_calc_duration)
573 			SET_TX_DESC_NAV_USE_HDR(pdesc, 1);
574 
575 		if (bw_40) {
576 			if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) {
577 				SET_TX_DESC_DATA_BW(pdesc, 1);
578 				SET_TX_DESC_TX_SUB_CARRIER(pdesc, 3);
579 			} else {
580 				SET_TX_DESC_DATA_BW(pdesc, 0);
581 				SET_TX_DESC_TX_SUB_CARRIER(pdesc,
582 							   mac->cur_40_prime_sc);
583 			}
584 		} else {
585 			SET_TX_DESC_DATA_BW(pdesc, 0);
586 			SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0);
587 		}
588 
589 		SET_TX_DESC_LINIP(pdesc, 0);
590 		SET_TX_DESC_PKT_SIZE(pdesc, (u16)skb_len);
591 		if (sta) {
592 			u8 ampdu_density = sta->ht_cap.ampdu_density;
593 			SET_TX_DESC_AMPDU_DENSITY(pdesc, ampdu_density);
594 		}
595 		if (info->control.hw_key) {
596 			struct ieee80211_key_conf *keyconf;
597 
598 			keyconf = info->control.hw_key;
599 			switch (keyconf->cipher) {
600 			case WLAN_CIPHER_SUITE_WEP40:
601 			case WLAN_CIPHER_SUITE_WEP104:
602 			case WLAN_CIPHER_SUITE_TKIP:
603 				SET_TX_DESC_SEC_TYPE(pdesc, 0x1);
604 				break;
605 			case WLAN_CIPHER_SUITE_CCMP:
606 				SET_TX_DESC_SEC_TYPE(pdesc, 0x3);
607 				break;
608 			default:
609 				SET_TX_DESC_SEC_TYPE(pdesc, 0x0);
610 				break;
611 
612 			}
613 		}
614 
615 		SET_TX_DESC_QUEUE_SEL(pdesc, fw_qsel);
616 		SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F);
617 		SET_TX_DESC_RTS_RATE_FB_LIMIT(pdesc, 0xF);
618 		SET_TX_DESC_DISABLE_FB(pdesc, ptcb_desc->disable_ratefallback ?
619 				       1 : 0);
620 		SET_TX_DESC_USE_RATE(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);
621 
622 		/*SET_TX_DESC_PWR_STATUS(pdesc, pwr_status);*/
623 		/* Set TxRate and RTSRate in TxDesc  */
624 		/* This prevent Tx initial rate of new-coming packets */
625 		/* from being overwritten by retried  packet rate.*/
626 		if (!ptcb_desc->use_driver_rate) {
627 			/*SET_TX_DESC_RTS_RATE(pdesc, 0x08); */
628 			/* SET_TX_DESC_TX_RATE(pdesc, 0x0b); */
629 		}
630 		if (ieee80211_is_data_qos(fc)) {
631 			if (mac->rdg_en) {
632 				RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
633 					"Enable RDG function.\n");
634 				SET_TX_DESC_RDG_ENABLE(pdesc, 1);
635 				SET_TX_DESC_HTC(pdesc, 1);
636 			}
637 		}
638 	}
639 
640 	SET_TX_DESC_FIRST_SEG(pdesc, (firstseg ? 1 : 0));
641 	SET_TX_DESC_LAST_SEG(pdesc, (lastseg ? 1 : 0));
642 	SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)buf_len);
643 	SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
644 	if (rtlpriv->dm.useramask) {
645 		SET_TX_DESC_RATE_ID(pdesc, ptcb_desc->ratr_index);
646 		SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id);
647 	} else {
648 		SET_TX_DESC_RATE_ID(pdesc, 0xC + ptcb_desc->ratr_index);
649 		SET_TX_DESC_MACID(pdesc, ptcb_desc->ratr_index);
650 	}
651 	if (ieee80211_is_data_qos(fc))
652 		SET_TX_DESC_QOS(pdesc, 1);
653 
654 	if (!ieee80211_is_data_qos(fc))
655 		SET_TX_DESC_HWSEQ_EN(pdesc, 1);
656 	SET_TX_DESC_MORE_FRAG(pdesc, (lastseg ? 0 : 1));
657 	if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
658 	    is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
659 		SET_TX_DESC_BMC(pdesc, 1);
660 	}
661 
662 	rtl88e_dm_set_tx_ant_by_tx_info(hw, pdesc, ptcb_desc->mac_id);
663 	RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
664 }
665 
666 void rtl88ee_tx_fill_cmddesc(struct ieee80211_hw *hw,
667 			     u8 *pdesc, bool firstseg,
668 			     bool lastseg, struct sk_buff *skb)
669 {
670 	struct rtl_priv *rtlpriv = rtl_priv(hw);
671 	struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
672 	u8 fw_queue = QSLT_BEACON;
673 
674 	dma_addr_t mapping = pci_map_single(rtlpci->pdev,
675 					    skb->data, skb->len,
676 					    PCI_DMA_TODEVICE);
677 
678 	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
679 	__le16 fc = hdr->frame_control;
680 
681 	if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
682 		RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
683 			 "DMA mapping error\n");
684 		return;
685 	}
686 	CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE);
687 
688 	if (firstseg)
689 		SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
690 
691 	SET_TX_DESC_TX_RATE(pdesc, DESC92C_RATE1M);
692 
693 	SET_TX_DESC_SEQ(pdesc, 0);
694 
695 	SET_TX_DESC_LINIP(pdesc, 0);
696 
697 	SET_TX_DESC_QUEUE_SEL(pdesc, fw_queue);
698 
699 	SET_TX_DESC_FIRST_SEG(pdesc, 1);
700 	SET_TX_DESC_LAST_SEG(pdesc, 1);
701 
702 	SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)(skb->len));
703 
704 	SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
705 
706 	SET_TX_DESC_RATE_ID(pdesc, 7);
707 	SET_TX_DESC_MACID(pdesc, 0);
708 
709 	SET_TX_DESC_OWN(pdesc, 1);
710 
711 	SET_TX_DESC_PKT_SIZE(pdesc, (u16)(skb->len));
712 
713 	SET_TX_DESC_FIRST_SEG(pdesc, 1);
714 	SET_TX_DESC_LAST_SEG(pdesc, 1);
715 
716 	SET_TX_DESC_OFFSET(pdesc, 0x20);
717 
718 	SET_TX_DESC_USE_RATE(pdesc, 1);
719 
720 	if (!ieee80211_is_data_qos(fc))
721 		SET_TX_DESC_HWSEQ_EN(pdesc, 1);
722 
723 	RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
724 		      "H2C Tx Cmd Content\n",
725 		      pdesc, TX_DESC_SIZE);
726 }
727 
728 void rtl88ee_set_desc(struct ieee80211_hw *hw, u8 *pdesc,
729 		      bool istx, u8 desc_name, u8 *val)
730 {
731 	if (istx == true) {
732 		switch (desc_name) {
733 		case HW_DESC_OWN:
734 			SET_TX_DESC_OWN(pdesc, 1);
735 			break;
736 		case HW_DESC_TX_NEXTDESC_ADDR:
737 			SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *)val);
738 			break;
739 		default:
740 			WARN_ONCE(true, "rtl8188ee: ERR txdesc :%d not processed\n",
741 				  desc_name);
742 			break;
743 		}
744 	} else {
745 		switch (desc_name) {
746 		case HW_DESC_RXOWN:
747 			SET_RX_DESC_OWN(pdesc, 1);
748 			break;
749 		case HW_DESC_RXBUFF_ADDR:
750 			SET_RX_DESC_BUFF_ADDR(pdesc, *(u32 *)val);
751 			break;
752 		case HW_DESC_RXPKT_LEN:
753 			SET_RX_DESC_PKT_LEN(pdesc, *(u32 *)val);
754 			break;
755 		case HW_DESC_RXERO:
756 			SET_RX_DESC_EOR(pdesc, 1);
757 			break;
758 		default:
759 			WARN_ONCE(true, "rtl8188ee: ERR rxdesc :%d not processed\n",
760 				  desc_name);
761 			break;
762 		}
763 	}
764 }
765 
766 u64 rtl88ee_get_desc(struct ieee80211_hw *hw,
767 		     u8 *pdesc, bool istx, u8 desc_name)
768 {
769 	u32 ret = 0;
770 
771 	if (istx == true) {
772 		switch (desc_name) {
773 		case HW_DESC_OWN:
774 			ret = GET_TX_DESC_OWN(pdesc);
775 			break;
776 		case HW_DESC_TXBUFF_ADDR:
777 			ret = GET_TX_DESC_TX_BUFFER_ADDRESS(pdesc);
778 			break;
779 		default:
780 			WARN_ONCE(true, "rtl8188ee: ERR txdesc :%d not processed\n",
781 				  desc_name);
782 			break;
783 		}
784 	} else {
785 		switch (desc_name) {
786 		case HW_DESC_OWN:
787 			ret = GET_RX_DESC_OWN(pdesc);
788 			break;
789 		case HW_DESC_RXPKT_LEN:
790 			ret = GET_RX_DESC_PKT_LEN(pdesc);
791 			break;
792 		case HW_DESC_RXBUFF_ADDR:
793 			ret = GET_RX_DESC_BUFF_ADDR(pdesc);
794 			break;
795 		default:
796 			WARN_ONCE(true, "rtl8188ee: ERR rxdesc :%d not processed\n",
797 				  desc_name);
798 			break;
799 		}
800 	}
801 	return ret;
802 }
803 
804 bool rtl88ee_is_tx_desc_closed(struct ieee80211_hw *hw, u8 hw_queue, u16 index)
805 {
806 	struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
807 	struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
808 	u8 *entry = (u8 *)(&ring->desc[ring->idx]);
809 	u8 own = (u8)rtl88ee_get_desc(hw, entry, true, HW_DESC_OWN);
810 
811 	/*beacon packet will only use the first
812 	 *descriptor defautly,and the own may not
813 	 *be cleared by the hardware
814 	 */
815 	if (own)
816 		return false;
817 	return true;
818 }
819 
820 void rtl88ee_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
821 {
822 	struct rtl_priv *rtlpriv = rtl_priv(hw);
823 	if (hw_queue == BEACON_QUEUE) {
824 		rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4));
825 	} else {
826 		rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG,
827 			       BIT(0) << (hw_queue));
828 	}
829 }
830