1 /******************************************************************************
2  *
3  * Copyright(c) 2009-2012  Realtek Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * The full GNU General Public License is included in this distribution in the
15  * file called LICENSE.
16  *
17  * Contact Information:
18  * wlanfae <wlanfae@realtek.com>
19  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20  * Hsinchu 300, Taiwan.
21  *
22  * Larry Finger <Larry.Finger@lwfinger.net>
23  *
24  *****************************************************************************/
25 #ifndef	__HALBTC_OUT_SRC_H__
26 #define __HALBTC_OUT_SRC_H__
27 
28 #include	"../wifi.h"
29 
30 #define		NORMAL_EXEC				false
31 #define		FORCE_EXEC				true
32 
33 #define		BTC_RF_OFF				0x0
34 #define		BTC_RF_ON				0x1
35 
36 #define		BTC_RF_A				RF90_PATH_A
37 #define		BTC_RF_B				RF90_PATH_B
38 #define		BTC_RF_C				RF90_PATH_C
39 #define		BTC_RF_D				RF90_PATH_D
40 
41 #define		BTC_SMSP				SINGLEMAC_SINGLEPHY
42 #define		BTC_DMDP				DUALMAC_DUALPHY
43 #define		BTC_DMSP				DUALMAC_SINGLEPHY
44 #define		BTC_MP_UNKNOWN				0xff
45 
46 #define		IN
47 #define		OUT
48 
49 #define		BT_TMP_BUF_SIZE				100
50 
51 #define		BT_COEX_ANT_TYPE_PG			0
52 #define		BT_COEX_ANT_TYPE_ANTDIV			1
53 #define		BT_COEX_ANT_TYPE_DETECTED		2
54 
55 #define		BTC_MIMO_PS_STATIC			0
56 #define		BTC_MIMO_PS_DYNAMIC			1
57 
58 #define		BTC_RATE_DISABLE			0
59 #define		BTC_RATE_ENABLE				1
60 
61 /* single Antenna definition */
62 #define		BTC_ANT_PATH_WIFI			0
63 #define		BTC_ANT_PATH_BT				1
64 #define		BTC_ANT_PATH_PTA			2
65 #define		BTC_ANT_PATH_WIFI5G			3
66 #define		BTC_ANT_PATH_AUTO			4
67 /* dual Antenna definition */
68 #define		BTC_ANT_WIFI_AT_MAIN			0
69 #define		BTC_ANT_WIFI_AT_AUX			1
70 /* coupler Antenna definition */
71 #define		BTC_ANT_WIFI_AT_CPL_MAIN		0
72 #define		BTC_ANT_WIFI_AT_CPL_AUX			1
73 
74 enum btc_bt_reg_type {
75 	BTC_BT_REG_RF		= 0,
76 	BTC_BT_REG_MODEM	= 1,
77 	BTC_BT_REG_BLUEWIZE	= 2,
78 	BTC_BT_REG_VENDOR	= 3,
79 	BTC_BT_REG_LE		= 4,
80 	BTC_BT_REG_MAX
81 };
82 
83 enum btc_chip_interface {
84 	BTC_INTF_UNKNOWN	= 0,
85 	BTC_INTF_PCI		= 1,
86 	BTC_INTF_USB		= 2,
87 	BTC_INTF_SDIO		= 3,
88 	BTC_INTF_GSPI		= 4,
89 	BTC_INTF_MAX
90 };
91 
92 enum btc_chip_type {
93 	BTC_CHIP_UNDEF		= 0,
94 	BTC_CHIP_CSR_BC4	= 1,
95 	BTC_CHIP_CSR_BC8	= 2,
96 	BTC_CHIP_RTL8723A	= 3,
97 	BTC_CHIP_RTL8821	= 4,
98 	BTC_CHIP_RTL8723B	= 5,
99 	BTC_CHIP_MAX
100 };
101 
102 enum btc_msg_type {
103 	BTC_MSG_INTERFACE	= 0x0,
104 	BTC_MSG_ALGORITHM	= 0x1,
105 	BTC_MSG_MAX
106 };
107 
108 /* following is for BTC_MSG_INTERFACE */
109 #define		INTF_INIT				BIT0
110 #define		INTF_NOTIFY				BIT2
111 
112 /* following is for BTC_ALGORITHM */
113 #define		ALGO_BT_RSSI_STATE			BIT0
114 #define		ALGO_WIFI_RSSI_STATE			BIT1
115 #define		ALGO_BT_MONITOR				BIT2
116 #define		ALGO_TRACE				BIT3
117 #define		ALGO_TRACE_FW				BIT4
118 #define		ALGO_TRACE_FW_DETAIL			BIT5
119 #define		ALGO_TRACE_FW_EXEC			BIT6
120 #define		ALGO_TRACE_SW				BIT7
121 #define		ALGO_TRACE_SW_DETAIL			BIT8
122 #define		ALGO_TRACE_SW_EXEC			BIT9
123 
124 /* following is for wifi link status */
125 #define		WIFI_STA_CONNECTED			BIT0
126 #define		WIFI_AP_CONNECTED			BIT1
127 #define		WIFI_HS_CONNECTED			BIT2
128 #define		WIFI_P2P_GO_CONNECTED			BIT3
129 #define		WIFI_P2P_GC_CONNECTED			BIT4
130 
131 #define	BTC_RSSI_HIGH(_rssi_)	\
132 	((_rssi_ == BTC_RSSI_STATE_HIGH ||	\
133 	  _rssi_ == BTC_RSSI_STATE_STAY_HIGH) ? true : false)
134 #define	BTC_RSSI_MEDIUM(_rssi_)	\
135 	((_rssi_ == BTC_RSSI_STATE_MEDIUM ||	\
136 	  _rssi_ == BTC_RSSI_STATE_STAY_MEDIUM) ? true : false)
137 #define	BTC_RSSI_LOW(_rssi_)	\
138 	((_rssi_ == BTC_RSSI_STATE_LOW ||	\
139 	  _rssi_ == BTC_RSSI_STATE_STAY_LOW) ? true : false)
140 
141 enum btc_power_save_type {
142 	BTC_PS_WIFI_NATIVE = 0,
143 	BTC_PS_LPS_ON = 1,
144 	BTC_PS_LPS_OFF = 2,
145 	BTC_PS_LPS_MAX
146 };
147 
148 struct btc_board_info {
149 	/* The following is some board information */
150 	u8 bt_chip_type;
151 	u8 pg_ant_num;	/* pg ant number */
152 	u8 btdm_ant_num;	/* ant number for btdm */
153 	u8 btdm_ant_pos;
154 	u8 single_ant_path; /* current used for 8723b only, 1=>s0,  0=>s1 */
155 	bool tfbga_package;
156 
157 	u8 rfe_type;
158 	u8 ant_div_cfg;
159 	u8 customer_id;
160 };
161 
162 enum btc_dbg_opcode {
163 	BTC_DBG_SET_COEX_NORMAL = 0x0,
164 	BTC_DBG_SET_COEX_WIFI_ONLY = 0x1,
165 	BTC_DBG_SET_COEX_BT_ONLY = 0x2,
166 	BTC_DBG_MAX
167 };
168 
169 enum btc_rssi_state {
170 	BTC_RSSI_STATE_HIGH = 0x0,
171 	BTC_RSSI_STATE_MEDIUM = 0x1,
172 	BTC_RSSI_STATE_LOW = 0x2,
173 	BTC_RSSI_STATE_STAY_HIGH = 0x3,
174 	BTC_RSSI_STATE_STAY_MEDIUM = 0x4,
175 	BTC_RSSI_STATE_STAY_LOW = 0x5,
176 	BTC_RSSI_MAX
177 };
178 
179 enum btc_wifi_role {
180 	BTC_ROLE_STATION = 0x0,
181 	BTC_ROLE_AP = 0x1,
182 	BTC_ROLE_IBSS = 0x2,
183 	BTC_ROLE_HS_MODE = 0x3,
184 	BTC_ROLE_MAX
185 };
186 
187 enum btc_wireless_freq {
188 	BTC_FREQ_2_4G = 0x0,
189 	BTC_FREQ_5G = 0x1,
190 	BTC_FREQ_MAX
191 };
192 
193 enum btc_wifi_bw_mode {
194 	BTC_WIFI_BW_LEGACY = 0x0,
195 	BTC_WIFI_BW_HT20 = 0x1,
196 	BTC_WIFI_BW_HT40 = 0x2,
197 	BTC_WIFI_BW_HT80 = 0x3,
198 	BTC_WIFI_BW_MAX
199 };
200 
201 enum btc_wifi_traffic_dir {
202 	BTC_WIFI_TRAFFIC_TX = 0x0,
203 	BTC_WIFI_TRAFFIC_RX = 0x1,
204 	BTC_WIFI_TRAFFIC_MAX
205 };
206 
207 enum btc_wifi_pnp {
208 	BTC_WIFI_PNP_WAKE_UP = 0x0,
209 	BTC_WIFI_PNP_SLEEP = 0x1,
210 	BTC_WIFI_PNP_SLEEP_KEEP_ANT = 0x2,
211 	BTC_WIFI_PNP_MAX
212 };
213 
214 enum btc_iot_peer {
215 	BTC_IOT_PEER_UNKNOWN = 0,
216 	BTC_IOT_PEER_REALTEK = 1,
217 	BTC_IOT_PEER_REALTEK_92SE = 2,
218 	BTC_IOT_PEER_BROADCOM = 3,
219 	BTC_IOT_PEER_RALINK = 4,
220 	BTC_IOT_PEER_ATHEROS = 5,
221 	BTC_IOT_PEER_CISCO = 6,
222 	BTC_IOT_PEER_MERU = 7,
223 	BTC_IOT_PEER_MARVELL = 8,
224 	BTC_IOT_PEER_REALTEK_SOFTAP = 9,
225 	BTC_IOT_PEER_SELF_SOFTAP = 10, /* Self is SoftAP */
226 	BTC_IOT_PEER_AIRGO = 11,
227 	BTC_IOT_PEER_REALTEK_JAGUAR_BCUTAP = 12,
228 	BTC_IOT_PEER_REALTEK_JAGUAR_CCUTAP = 13,
229 	BTC_IOT_PEER_MAX,
230 };
231 
232 /* for 8723b-d cut large current issue */
233 enum bt_wifi_coex_state {
234 	BTC_WIFI_STAT_INIT,
235 	BTC_WIFI_STAT_IQK,
236 	BTC_WIFI_STAT_NORMAL_OFF,
237 	BTC_WIFI_STAT_MP_OFF,
238 	BTC_WIFI_STAT_NORMAL,
239 	BTC_WIFI_STAT_ANT_DIV,
240 	BTC_WIFI_STAT_MAX
241 };
242 
243 enum bt_ant_type {
244 	BTC_ANT_TYPE_0,
245 	BTC_ANT_TYPE_1,
246 	BTC_ANT_TYPE_2,
247 	BTC_ANT_TYPE_3,
248 	BTC_ANT_TYPE_4,
249 	BTC_ANT_TYPE_MAX
250 };
251 
252 enum btc_get_type {
253 	/* type bool */
254 	BTC_GET_BL_HS_OPERATION,
255 	BTC_GET_BL_HS_CONNECTING,
256 	BTC_GET_BL_WIFI_CONNECTED,
257 	BTC_GET_BL_WIFI_DUAL_BAND_CONNECTED,
258 	BTC_GET_BL_WIFI_BUSY,
259 	BTC_GET_BL_WIFI_SCAN,
260 	BTC_GET_BL_WIFI_LINK,
261 	BTC_GET_BL_WIFI_DHCP,
262 	BTC_GET_BL_WIFI_SOFTAP_IDLE,
263 	BTC_GET_BL_WIFI_SOFTAP_LINKING,
264 	BTC_GET_BL_WIFI_IN_EARLY_SUSPEND,
265 	BTC_GET_BL_WIFI_ROAM,
266 	BTC_GET_BL_WIFI_4_WAY_PROGRESS,
267 	BTC_GET_BL_WIFI_UNDER_5G,
268 	BTC_GET_BL_WIFI_AP_MODE_ENABLE,
269 	BTC_GET_BL_WIFI_ENABLE_ENCRYPTION,
270 	BTC_GET_BL_WIFI_UNDER_B_MODE,
271 	BTC_GET_BL_EXT_SWITCH,
272 	BTC_GET_BL_WIFI_IS_IN_MP_MODE,
273 	BTC_GET_BL_IS_ASUS_8723B,
274 	BTC_GET_BL_FW_READY,
275 	BTC_GET_BL_RF4CE_CONNECTED,
276 
277 	/* type s4Byte */
278 	BTC_GET_S4_WIFI_RSSI,
279 	BTC_GET_S4_HS_RSSI,
280 
281 	/* type u32 */
282 	BTC_GET_U4_WIFI_BW,
283 	BTC_GET_U4_WIFI_TRAFFIC_DIRECTION,
284 	BTC_GET_U4_WIFI_FW_VER,
285 	BTC_GET_U4_WIFI_LINK_STATUS,
286 	BTC_GET_U4_BT_PATCH_VER,
287 	BTC_GET_U4_VENDOR,
288 	BTC_GET_U4_SUPPORTED_VERSION,
289 	BTC_GET_U4_SUPPORTED_FEATURE,
290 	BTC_GET_U4_BT_DEVICE_INFO,
291 	BTC_GET_U4_BT_FORBIDDEN_SLOT_VAL,
292 	BTC_GET_U4_WIFI_IQK_TOTAL,
293 	BTC_GET_U4_WIFI_IQK_OK,
294 	BTC_GET_U4_WIFI_IQK_FAIL,
295 
296 	/* type u1Byte */
297 	BTC_GET_U1_WIFI_DOT11_CHNL,
298 	BTC_GET_U1_WIFI_CENTRAL_CHNL,
299 	BTC_GET_U1_WIFI_HS_CHNL,
300 	BTC_GET_U1_MAC_PHY_MODE,
301 	BTC_GET_U1_AP_NUM,
302 	BTC_GET_U1_ANT_TYPE,
303 	BTC_GET_U1_IOT_PEER,
304 
305 	/* for 1Ant */
306 	BTC_GET_U1_LPS_MODE,
307 	BTC_GET_BL_BT_SCO_BUSY,
308 
309 	/* for test mode */
310 	BTC_GET_DRIVER_TEST_CFG,
311 	BTC_GET_MAX
312 };
313 
314 enum btc_vendor {
315 	BTC_VENDOR_LENOVO,
316 	BTC_VENDOR_ASUS,
317 	BTC_VENDOR_OTHER
318 };
319 
320 enum btc_set_type {
321 	/* type bool */
322 	BTC_SET_BL_BT_DISABLE,
323 	BTC_SET_BL_BT_TRAFFIC_BUSY,
324 	BTC_SET_BL_BT_LIMITED_DIG,
325 	BTC_SET_BL_FORCE_TO_ROAM,
326 	BTC_SET_BL_TO_REJ_AP_AGG_PKT,
327 	BTC_SET_BL_BT_CTRL_AGG_SIZE,
328 	BTC_SET_BL_INC_SCAN_DEV_NUM,
329 	BTC_SET_BL_BT_TX_RX_MASK,
330 	BTC_SET_BL_MIRACAST_PLUS_BT,
331 
332 	/* type u1Byte */
333 	BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON,
334 	BTC_SET_UI_SCAN_SIG_COMPENSATION,
335 	BTC_SET_U1_AGG_BUF_SIZE,
336 
337 	/* type trigger some action */
338 	BTC_SET_ACT_GET_BT_RSSI,
339 	BTC_SET_ACT_AGGREGATE_CTRL,
340 	BTC_SET_ACT_ANTPOSREGRISTRY_CTRL,
341 
342 	/********* for 1Ant **********/
343 	/* type bool */
344 	BTC_SET_BL_BT_SCO_BUSY,
345 	/* type u1Byte */
346 	BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE,
347 	BTC_SET_U1_LPS_VAL,
348 	BTC_SET_U1_RPWM_VAL,
349 	BTC_SET_U1_1ANT_LPS,
350 	BTC_SET_U1_1ANT_RPWM,
351 	/* type trigger some action */
352 	BTC_SET_ACT_LEAVE_LPS,
353 	BTC_SET_ACT_ENTER_LPS,
354 	BTC_SET_ACT_NORMAL_LPS,
355 	BTC_SET_ACT_PRE_NORMAL_LPS,
356 	BTC_SET_ACT_POST_NORMAL_LPS,
357 	BTC_SET_ACT_INC_FORCE_EXEC_PWR_CMD_CNT,
358 	BTC_SET_ACT_DISABLE_LOW_POWER,
359 	BTC_SET_ACT_UPDATE_RAMASK,
360 	BTC_SET_ACT_SEND_MIMO_PS,
361 	/* BT Coex related */
362 	BTC_SET_ACT_CTRL_BT_INFO,
363 	BTC_SET_ACT_CTRL_BT_COEX,
364 	BTC_SET_ACT_CTRL_8723B_ANT,
365 	/***************************/
366 	BTC_SET_MAX
367 };
368 
369 enum btc_dbg_disp_type {
370 	BTC_DBG_DISP_COEX_STATISTICS = 0x0,
371 	BTC_DBG_DISP_BT_LINK_INFO = 0x1,
372 	BTC_DBG_DISP_BT_FW_VER = 0x2,
373 	BTC_DBG_DISP_FW_PWR_MODE_CMD = 0x3,
374 	BTC_DBG_DISP_WIFI_STATUS = 0x04,
375 	BTC_DBG_DISP_MAX
376 };
377 
378 enum btc_notify_type_ips {
379 	BTC_IPS_LEAVE = 0x0,
380 	BTC_IPS_ENTER = 0x1,
381 	BTC_IPS_MAX
382 };
383 
384 enum btc_notify_type_lps {
385 	BTC_LPS_DISABLE = 0x0,
386 	BTC_LPS_ENABLE = 0x1,
387 	BTC_LPS_MAX
388 };
389 
390 enum btc_notify_type_scan {
391 	BTC_SCAN_FINISH = 0x0,
392 	BTC_SCAN_START = 0x1,
393 	BTC_SCAN_START_2G = 0x2,
394 	BTC_SCAN_MAX
395 };
396 
397 enum btc_notify_type_switchband {
398 	BTC_NOT_SWITCH = 0x0,
399 	BTC_SWITCH_TO_24G = 0x1,
400 	BTC_SWITCH_TO_5G = 0x2,
401 	BTC_SWITCH_TO_24G_NOFORSCAN = 0x3,
402 	BTC_SWITCH_MAX
403 };
404 
405 enum btc_notify_type_associate {
406 	BTC_ASSOCIATE_FINISH = 0x0,
407 	BTC_ASSOCIATE_START = 0x1,
408 	BTC_ASSOCIATE_5G_FINISH = 0x2,
409 	BTC_ASSOCIATE_5G_START = 0x3,
410 	BTC_ASSOCIATE_MAX
411 };
412 
413 enum btc_notify_type_media_status {
414 	BTC_MEDIA_DISCONNECT = 0x0,
415 	BTC_MEDIA_CONNECT = 0x1,
416 	BTC_MEDIA_MAX
417 };
418 
419 enum btc_notify_type_special_packet {
420 	BTC_PACKET_UNKNOWN = 0x0,
421 	BTC_PACKET_DHCP = 0x1,
422 	BTC_PACKET_ARP = 0x2,
423 	BTC_PACKET_EAPOL = 0x3,
424 	BTC_PACKET_MAX
425 };
426 
427 enum hci_ext_bt_operation {
428 	HCI_BT_OP_NONE = 0x0,
429 	HCI_BT_OP_INQUIRY_START = 0x1,
430 	HCI_BT_OP_INQUIRY_FINISH = 0x2,
431 	HCI_BT_OP_PAGING_START = 0x3,
432 	HCI_BT_OP_PAGING_SUCCESS = 0x4,
433 	HCI_BT_OP_PAGING_UNSUCCESS = 0x5,
434 	HCI_BT_OP_PAIRING_START = 0x6,
435 	HCI_BT_OP_PAIRING_FINISH = 0x7,
436 	HCI_BT_OP_BT_DEV_ENABLE = 0x8,
437 	HCI_BT_OP_BT_DEV_DISABLE = 0x9,
438 	HCI_BT_OP_MAX
439 };
440 
441 enum btc_notify_type_stack_operation {
442 	BTC_STACK_OP_NONE = 0x0,
443 	BTC_STACK_OP_INQ_PAGE_PAIR_START = 0x1,
444 	BTC_STACK_OP_INQ_PAGE_PAIR_FINISH = 0x2,
445 	BTC_STACK_OP_MAX
446 };
447 
448 enum {
449 	BTC_CCK_1,
450 	BTC_CCK_2,
451 	BTC_CCK_5_5,
452 	BTC_CCK_11,
453 	BTC_OFDM_6,
454 	BTC_OFDM_9,
455 	BTC_OFDM_12,
456 	BTC_OFDM_18,
457 	BTC_OFDM_24,
458 	BTC_OFDM_36,
459 	BTC_OFDM_48,
460 	BTC_OFDM_54,
461 	BTC_MCS_0,
462 	BTC_MCS_1,
463 	BTC_MCS_2,
464 	BTC_MCS_3,
465 	BTC_MCS_4,
466 	BTC_MCS_5,
467 	BTC_MCS_6,
468 	BTC_MCS_7,
469 	BTC_MCS_8,
470 	BTC_MCS_9,
471 	BTC_MCS_10,
472 	BTC_MCS_11,
473 	BTC_MCS_12,
474 	BTC_MCS_13,
475 	BTC_MCS_14,
476 	BTC_MCS_15,
477 	BTC_MCS_16,
478 	BTC_MCS_17,
479 	BTC_MCS_18,
480 	BTC_MCS_19,
481 	BTC_MCS_20,
482 	BTC_MCS_21,
483 	BTC_MCS_22,
484 	BTC_MCS_23,
485 	BTC_MCS_24,
486 	BTC_MCS_25,
487 	BTC_MCS_26,
488 	BTC_MCS_27,
489 	BTC_MCS_28,
490 	BTC_MCS_29,
491 	BTC_MCS_30,
492 	BTC_MCS_31,
493 	BTC_VHT_1SS_MCS_0,
494 	BTC_VHT_1SS_MCS_1,
495 	BTC_VHT_1SS_MCS_2,
496 	BTC_VHT_1SS_MCS_3,
497 	BTC_VHT_1SS_MCS_4,
498 	BTC_VHT_1SS_MCS_5,
499 	BTC_VHT_1SS_MCS_6,
500 	BTC_VHT_1SS_MCS_7,
501 	BTC_VHT_1SS_MCS_8,
502 	BTC_VHT_1SS_MCS_9,
503 	BTC_VHT_2SS_MCS_0,
504 	BTC_VHT_2SS_MCS_1,
505 	BTC_VHT_2SS_MCS_2,
506 	BTC_VHT_2SS_MCS_3,
507 	BTC_VHT_2SS_MCS_4,
508 	BTC_VHT_2SS_MCS_5,
509 	BTC_VHT_2SS_MCS_6,
510 	BTC_VHT_2SS_MCS_7,
511 	BTC_VHT_2SS_MCS_8,
512 	BTC_VHT_2SS_MCS_9,
513 	BTC_VHT_3SS_MCS_0,
514 	BTC_VHT_3SS_MCS_1,
515 	BTC_VHT_3SS_MCS_2,
516 	BTC_VHT_3SS_MCS_3,
517 	BTC_VHT_3SS_MCS_4,
518 	BTC_VHT_3SS_MCS_5,
519 	BTC_VHT_3SS_MCS_6,
520 	BTC_VHT_3SS_MCS_7,
521 	BTC_VHT_3SS_MCS_8,
522 	BTC_VHT_3SS_MCS_9,
523 	BTC_VHT_4SS_MCS_0,
524 	BTC_VHT_4SS_MCS_1,
525 	BTC_VHT_4SS_MCS_2,
526 	BTC_VHT_4SS_MCS_3,
527 	BTC_VHT_4SS_MCS_4,
528 	BTC_VHT_4SS_MCS_5,
529 	BTC_VHT_4SS_MCS_6,
530 	BTC_VHT_4SS_MCS_7,
531 	BTC_VHT_4SS_MCS_8,
532 	BTC_VHT_4SS_MCS_9,
533 	BTC_MCS_32,
534 	BTC_UNKNOWN,
535 	BTC_PKT_MGNT,
536 	BTC_PKT_CTRL,
537 	BTC_PKT_UNKNOWN,
538 	BTC_PKT_NOT_FOR_ME,
539 	BTC_RATE_MAX
540 };
541 
542 enum {
543 	BTC_MULTIPORT_SCC,
544 	BTC_MULTIPORT_MCC_2CHANNEL,
545 	BTC_MULTIPORT_MCC_2BAND,
546 	BTC_MULTIPORT_MAX
547 };
548 
549 struct btc_bt_info {
550 	bool bt_disabled;
551 	u8 rssi_adjust_for_agc_table_on;
552 	u8 rssi_adjust_for_1ant_coex_type;
553 	bool pre_bt_ctrl_agg_buf_size;
554 	bool bt_busy;
555 	u8 pre_agg_buf_size;
556 	u8 agg_buf_size;
557 	bool limited_dig;
558 	bool pre_reject_agg_pkt;
559 	bool reject_agg_pkt;
560 	bool bt_ctrl_buf_size;
561 	bool increase_scan_dev_num;
562 	bool miracast_plus_bt;
563 	bool bt_ctrl_agg_buf_size;
564 	bool bt_tx_rx_mask;
565 	u16 bt_hci_ver;
566 	u16 bt_real_fw_ver;
567 	u8 bt_fw_ver;
568 	u32 bt_get_fw_ver;
569 
570 	bool bt_disable_low_pwr;
571 
572 	/* the following is for 1Ant solution */
573 	bool bt_ctrl_lps;
574 	bool bt_pwr_save_mode;
575 	bool bt_lps_on;
576 	bool force_to_roam;
577 	u8 force_exec_pwr_cmd_cnt;
578 	u8 lps_val;
579 	u8 rpwm_val;
580 	u32 ra_mask;
581 
582 	u32 afh_map_l;
583 	u32 afh_map_m;
584 	u16 afh_map_h;
585 	u32 bt_supported_feature;
586 	u32 bt_supported_version;
587 	u32 bt_device_info;
588 	u32 bt_forb_slot_val;
589 	u8 bt_ant_det_val;
590 	u8 bt_ble_scan_type;
591 	u32 bt_ble_scan_para;
592 };
593 
594 struct btc_stack_info {
595 	bool profile_notified;
596 	u16 hci_version;	/* stack hci version */
597 	u8 num_of_link;
598 	bool bt_link_exist;
599 	bool sco_exist;
600 	bool acl_exist;
601 	bool a2dp_exist;
602 	bool hid_exist;
603 	u8 num_of_hid;
604 	bool pan_exist;
605 	bool unknown_acl_exist;
606 	s8 min_bt_rssi;
607 };
608 
609 struct btc_statistics {
610 	u32 cnt_bind;
611 	u32 cnt_init_hw_config;
612 	u32 cnt_init_coex_dm;
613 	u32 cnt_ips_notify;
614 	u32 cnt_lps_notify;
615 	u32 cnt_scan_notify;
616 	u32 cnt_connect_notify;
617 	u32 cnt_media_status_notify;
618 	u32 cnt_special_packet_notify;
619 	u32 cnt_bt_info_notify;
620 	u32 cnt_periodical;
621 	u32 cnt_coex_dm_switch;
622 	u32 cnt_stack_operation_notify;
623 	u32 cnt_dbg_ctrl;
624 	u32 cnt_pre_load_firmware;
625 	u32 cnt_power_on;
626 };
627 
628 struct btc_bt_link_info {
629 	bool bt_link_exist;
630 	bool bt_hi_pri_link_exist;
631 	bool sco_exist;
632 	bool sco_only;
633 	bool a2dp_exist;
634 	bool a2dp_only;
635 	bool hid_exist;
636 	bool hid_only;
637 	bool pan_exist;
638 	bool pan_only;
639 	bool slave_role;
640 	bool acl_busy;
641 };
642 
643 enum btc_antenna_pos {
644 	BTC_ANTENNA_AT_MAIN_PORT = 0x1,
645 	BTC_ANTENNA_AT_AUX_PORT = 0x2,
646 };
647 
648 enum btc_mp_h2c_op_code {
649 	BT_OP_GET_BT_VERSION			= 0,
650 	BT_OP_WRITE_REG_ADDR			= 12,
651 	BT_OP_WRITE_REG_VALUE			= 13,
652 	BT_OP_READ_REG				= 17,
653 	BT_OP_GET_AFH_MAP_L			= 30,
654 	BT_OP_GET_AFH_MAP_M			= 31,
655 	BT_OP_GET_AFH_MAP_H			= 32,
656 	BT_OP_GET_BT_COEX_SUPPORTED_FEATURE	= 42,
657 	BT_OP_GET_BT_COEX_SUPPORTED_VERSION	= 43,
658 	BT_OP_GET_BT_ANT_DET_VAL		= 44,
659 	BT_OP_GET_BT_BLE_SCAN_PARA		= 45,
660 	BT_OP_GET_BT_BLE_SCAN_TYPE		= 46,
661 	BT_OP_GET_BT_DEVICE_INFO		= 48,
662 	BT_OP_GET_BT_FORBIDDEN_SLOT_VAL		= 49,
663 	BT_OP_MAX
664 };
665 
666 enum btc_mp_h2c_req_num {
667 	/* 4 bits only */
668 	BT_SEQ_DONT_CARE			= 0,
669 	BT_SEQ_GET_BT_VERSION			= 0xE,
670 	BT_SEQ_GET_AFH_MAP_L			= 0x5,
671 	BT_SEQ_GET_AFH_MAP_M			= 0x6,
672 	BT_SEQ_GET_AFH_MAP_H			= 0x9,
673 	BT_SEQ_GET_BT_COEX_SUPPORTED_FEATURE	= 0x7,
674 	BT_SEQ_GET_BT_COEX_SUPPORTED_VERSION	= 0x8,
675 	BT_SEQ_GET_BT_ANT_DET_VAL		= 0x2,
676 	BT_SEQ_GET_BT_BLE_SCAN_PARA		= 0x3,
677 	BT_SEQ_GET_BT_BLE_SCAN_TYPE		= 0x4,
678 	BT_SEQ_GET_BT_DEVICE_INFO		= 0xA,
679 	BT_SEQ_GET_BT_FORB_SLOT_VAL		= 0xB,
680 };
681 
682 struct btc_coexist {
683 	/* make sure only one adapter can bind the data context  */
684 	bool binded;
685 	/* default adapter */
686 	void *adapter;
687 	struct btc_board_info board_info;
688 	/* some bt info referenced by non-bt module */
689 	struct btc_bt_info bt_info;
690 	struct btc_stack_info stack_info;
691 	enum btc_chip_interface	chip_interface;
692 	struct btc_bt_link_info bt_link_info;
693 
694 	/* boolean variables to replace BT_AUTO_REPORT_ONLY_XXXXY_ZANT
695 	 * configuration parameters
696 	 */
697 	bool auto_report_1ant;
698 	bool auto_report_2ant;
699 	bool dbg_mode_1ant;
700 	bool dbg_mode_2ant;
701 	bool initilized;
702 	bool stop_coex_dm;
703 	bool manual_control;
704 	struct btc_statistics statistics;
705 	u8 pwr_mode_val[10];
706 
707 	struct completion bt_mp_comp;
708 
709 	/* function pointers - io related */
710 	u8 (*btc_read_1byte)(void *btc_context, u32 reg_addr);
711 	void (*btc_write_1byte)(void *btc_context, u32 reg_addr, u32 data);
712 	void (*btc_write_1byte_bitmask)(void *btc_context, u32 reg_addr,
713 					u32 bit_mask, u8 data1b);
714 	u16 (*btc_read_2byte)(void *btc_context, u32 reg_addr);
715 	void (*btc_write_2byte)(void *btc_context, u32 reg_addr, u16 data);
716 	u32 (*btc_read_4byte)(void *btc_context, u32 reg_addr);
717 	void (*btc_write_4byte)(void *btc_context, u32 reg_addr, u32 data);
718 
719 	void (*btc_write_local_reg_1byte)(void *btc_context, u32 reg_addr,
720 					  u8 data);
721 	void (*btc_set_bb_reg)(void *btc_context, u32 reg_addr,
722 			       u32 bit_mask, u32 data);
723 	u32 (*btc_get_bb_reg)(void *btc_context, u32 reg_addr,
724 			      u32 bit_mask);
725 	void (*btc_set_rf_reg)(void *btc_context, u8 rf_path, u32 reg_addr,
726 			       u32 bit_mask, u32 data);
727 	u32 (*btc_get_rf_reg)(void *btc_context, u8 rf_path,
728 			      u32 reg_addr, u32 bit_mask);
729 
730 	void (*btc_fill_h2c)(void *btc_context, u8 element_id,
731 			     u32 cmd_len, u8 *cmd_buffer);
732 
733 	void (*btc_disp_dbg_msg)(void *btcoexist, u8 disp_type,
734 				 struct seq_file *m);
735 
736 	bool (*btc_get)(void *btcoexist, u8 get_type, void *out_buf);
737 	bool (*btc_set)(void *btcoexist, u8 set_type, void *in_buf);
738 
739 	void (*btc_set_bt_reg)(void *btc_context, u8 reg_type, u32 offset,
740 			       u32 value);
741 	u32 (*btc_get_bt_coex_supported_feature)(void *btcoexist);
742 	u32 (*btc_get_bt_coex_supported_version)(void *btcoexist);
743 	u32 (*btc_get_bt_phydm_version)(void *btcoexist);
744 	void (*btc_phydm_modify_ra_pcr_threshold)(void *btcoexist,
745 						  u8 ra_offset_direction,
746 						  u8 ra_threshold_offset);
747 	u32 (*btc_phydm_query_phy_counter)(void *btcoexist,
748 					   enum dm_info_query dm_id);
749 	u8 (*btc_get_ant_det_val_from_bt)(void *btcoexist);
750 	u8 (*btc_get_ble_scan_type_from_bt)(void *btcoexist);
751 	u32 (*btc_get_ble_scan_para_from_bt)(void *btcoexist, u8 scan_type);
752 	bool (*btc_get_bt_afh_map_from_bt)(void *btcoexist, u8 map_type,
753 					   u8 *afh_map);
754 };
755 
756 bool halbtc_is_wifi_uplink(struct rtl_priv *adapter);
757 
758 #define rtl_btc_coexist(rtlpriv)				\
759 	((struct btc_coexist *)((rtlpriv)->btcoexist.btc_context))
760 #define rtl_btc_wifi_only(rtlpriv)				\
761 	((struct wifi_only_cfg *)((rtlpriv)->btcoexist.wifi_only_context))
762 
763 struct wifi_only_cfg;
764 
765 bool exhalbtc_initlize_variables(struct rtl_priv *rtlpriv);
766 bool exhalbtc_initlize_variables_wifi_only(struct rtl_priv *rtlpriv);
767 bool exhalbtc_bind_bt_coex_withadapter(void *adapter);
768 void exhalbtc_power_on_setting(struct btc_coexist *btcoexist);
769 void exhalbtc_pre_load_firmware(struct btc_coexist *btcoexist);
770 void exhalbtc_init_hw_config(struct btc_coexist *btcoexist, bool wifi_only);
771 void exhalbtc_init_hw_config_wifi_only(struct wifi_only_cfg *wifionly_cfg);
772 void exhalbtc_init_coex_dm(struct btc_coexist *btcoexist);
773 void exhalbtc_ips_notify(struct btc_coexist *btcoexist, u8 type);
774 void exhalbtc_lps_notify(struct btc_coexist *btcoexist, u8 type);
775 void exhalbtc_scan_notify(struct btc_coexist *btcoexist, u8 type);
776 void exhalbtc_scan_notify_wifi_only(struct wifi_only_cfg *wifionly_cfg,
777 				    u8 is_5g);
778 void exhalbtc_connect_notify(struct btc_coexist *btcoexist, u8 action);
779 void exhalbtc_mediastatus_notify(struct btc_coexist *btcoexist,
780 				 enum rt_media_status media_status);
781 void exhalbtc_special_packet_notify(struct btc_coexist *btcoexist, u8 pkt_type);
782 void exhalbtc_bt_info_notify(struct btc_coexist *btcoexist, u8 *tmp_buf,
783 			     u8 length);
784 void exhalbtc_rf_status_notify(struct btc_coexist *btcoexist, u8 type);
785 void exhalbtc_stack_operation_notify(struct btc_coexist *btcoexist, u8 type);
786 void exhalbtc_halt_notify(struct btc_coexist *btcoexist);
787 void exhalbtc_pnp_notify(struct btc_coexist *btcoexist, u8 pnp_state);
788 void exhalbtc_coex_dm_switch(struct btc_coexist *btcoexist);
789 void exhalbtc_periodical(struct btc_coexist *btcoexist);
790 void exhalbtc_dbg_control(struct btc_coexist *btcoexist, u8 code, u8 len,
791 			  u8 *data);
792 void exhalbtc_antenna_detection(struct btc_coexist *btcoexist, u32 cent_freq,
793 				u32 offset, u32 span, u32 seconds);
794 void exhalbtc_stack_update_profile_info(void);
795 void exhalbtc_set_hci_version(struct btc_coexist *btcoexist, u16 hci_version);
796 void exhalbtc_set_bt_patch_version(struct btc_coexist *btcoexist,
797 				   u16 bt_hci_version, u16 bt_patch_version);
798 void exhalbtc_update_min_bt_rssi(struct btc_coexist *btcoexist, s8 bt_rssi);
799 void exhalbtc_set_bt_exist(struct btc_coexist *btcoexist, bool bt_exist);
800 void exhalbtc_set_chip_type(struct btc_coexist *btcoexist, u8 chip_type);
801 void exhalbtc_set_ant_num(struct rtl_priv *rtlpriv, u8 type, u8 ant_num);
802 void exhalbtc_display_bt_coex_info(struct btc_coexist *btcoexist,
803 				   struct seq_file *m);
804 void exhalbtc_switch_band_notify(struct btc_coexist *btcoexist, u8 type);
805 void exhalbtc_switch_band_notify_wifi_only(struct wifi_only_cfg *wifionly_cfg,
806 					   u8 is_5g);
807 void exhalbtc_signal_compensation(struct btc_coexist *btcoexist,
808 				  u8 *rssi_wifi, u8 *rssi_bt);
809 void exhalbtc_lps_leave(struct btc_coexist *btcoexist);
810 void exhalbtc_low_wifi_traffic_notify(struct btc_coexist *btcoexist);
811 void exhalbtc_set_single_ant_path(struct btc_coexist *btcoexist,
812 				  u8 single_ant_path);
813 void halbtc_send_wifi_port_id_cmd(void *bt_context);
814 void halbtc_set_default_port_id_cmd(void *bt_context);
815 
816 /* The following are used by wifi_only case */
817 enum wifionly_chip_interface {
818 	WIFIONLY_INTF_UNKNOWN	= 0,
819 	WIFIONLY_INTF_PCI		= 1,
820 	WIFIONLY_INTF_USB		= 2,
821 	WIFIONLY_INTF_SDIO		= 3,
822 	WIFIONLY_INTF_MAX
823 };
824 
825 enum wifionly_customer_id {
826 	CUSTOMER_NORMAL			= 0,
827 	CUSTOMER_HP_1			= 1,
828 };
829 
830 struct wifi_only_haldata {
831 	u16		customer_id;
832 	u8		efuse_pg_antnum;
833 	u8		efuse_pg_antpath;
834 	u8		rfe_type;
835 	u8		ant_div_cfg;
836 };
837 
838 struct wifi_only_cfg {
839 	void				*adapter;
840 	struct wifi_only_haldata	haldata_info;
841 	enum wifionly_chip_interface	chip_interface;
842 };
843 
844 static inline
845 void halwifionly_phy_set_bb_reg(struct wifi_only_cfg *wifi_conly_cfg,
846 				u32 regaddr, u32 bitmask, u32 data)
847 {
848 	struct rtl_priv *rtlpriv = (struct rtl_priv *)wifi_conly_cfg->adapter;
849 
850 	rtl_set_bbreg(rtlpriv->hw, regaddr, bitmask, data);
851 }
852 
853 #endif
854