1 /******************************************************************************
2  *
3  * Copyright(c) 2009-2012  Realtek Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * The full GNU General Public License is included in this distribution in the
15  * file called LICENSE.
16  *
17  * Contact Information:
18  * wlanfae <wlanfae@realtek.com>
19  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20  * Hsinchu 300, Taiwan.
21  *
22  * Larry Finger <Larry.Finger@lwfinger.net>
23  *
24  *****************************************************************************/
25 #ifndef	__HALBTC_OUT_SRC_H__
26 #define __HALBTC_OUT_SRC_H__
27 
28 #include	"../wifi.h"
29 
30 #define		NORMAL_EXEC				false
31 #define		FORCE_EXEC				true
32 
33 #define		BTC_RF_A				RF90_PATH_A
34 #define		BTC_RF_B				RF90_PATH_B
35 #define		BTC_RF_C				RF90_PATH_C
36 #define		BTC_RF_D				RF90_PATH_D
37 
38 #define		BTC_SMSP				SINGLEMAC_SINGLEPHY
39 #define		BTC_DMDP				DUALMAC_DUALPHY
40 #define		BTC_DMSP				DUALMAC_SINGLEPHY
41 #define		BTC_MP_UNKNOWN				0xff
42 
43 #define		IN
44 #define		OUT
45 
46 #define		BT_TMP_BUF_SIZE				100
47 
48 #define		BT_COEX_ANT_TYPE_PG			0
49 #define		BT_COEX_ANT_TYPE_ANTDIV			1
50 #define		BT_COEX_ANT_TYPE_DETECTED		2
51 
52 #define		BTC_MIMO_PS_STATIC			0
53 #define		BTC_MIMO_PS_DYNAMIC			1
54 
55 #define		BTC_RATE_DISABLE			0
56 #define		BTC_RATE_ENABLE				1
57 
58 /* single Antenna definition */
59 #define		BTC_ANT_PATH_WIFI			0
60 #define		BTC_ANT_PATH_BT				1
61 #define		BTC_ANT_PATH_PTA			2
62 /* dual Antenna definition */
63 #define		BTC_ANT_WIFI_AT_MAIN			0
64 #define		BTC_ANT_WIFI_AT_AUX			1
65 /* coupler Antenna definition */
66 #define		BTC_ANT_WIFI_AT_CPL_MAIN		0
67 #define		BTC_ANT_WIFI_AT_CPL_AUX			1
68 
69 enum btc_chip_interface {
70 	BTC_INTF_UNKNOWN	= 0,
71 	BTC_INTF_PCI		= 1,
72 	BTC_INTF_USB		= 2,
73 	BTC_INTF_SDIO		= 3,
74 	BTC_INTF_GSPI		= 4,
75 	BTC_INTF_MAX
76 };
77 
78 enum btc_chip_type {
79 	BTC_CHIP_UNDEF		= 0,
80 	BTC_CHIP_CSR_BC4	= 1,
81 	BTC_CHIP_CSR_BC8	= 2,
82 	BTC_CHIP_RTL8723A	= 3,
83 	BTC_CHIP_RTL8821	= 4,
84 	BTC_CHIP_RTL8723B	= 5,
85 	BTC_CHIP_MAX
86 };
87 
88 enum btc_msg_type {
89 	BTC_MSG_INTERFACE	= 0x0,
90 	BTC_MSG_ALGORITHM	= 0x1,
91 	BTC_MSG_MAX
92 };
93 
94 extern u32 btc_dbg_type[];
95 
96 /* following is for BTC_MSG_INTERFACE */
97 #define		INTF_INIT				BIT0
98 #define		INTF_NOTIFY				BIT2
99 
100 /* following is for BTC_ALGORITHM */
101 #define		ALGO_BT_RSSI_STATE			BIT0
102 #define		ALGO_WIFI_RSSI_STATE			BIT1
103 #define		ALGO_BT_MONITOR				BIT2
104 #define		ALGO_TRACE				BIT3
105 #define		ALGO_TRACE_FW				BIT4
106 #define		ALGO_TRACE_FW_DETAIL			BIT5
107 #define		ALGO_TRACE_FW_EXEC			BIT6
108 #define		ALGO_TRACE_SW				BIT7
109 #define		ALGO_TRACE_SW_DETAIL			BIT8
110 #define		ALGO_TRACE_SW_EXEC			BIT9
111 
112 /* following is for wifi link status */
113 #define		WIFI_STA_CONNECTED			BIT0
114 #define		WIFI_AP_CONNECTED			BIT1
115 #define		WIFI_HS_CONNECTED			BIT2
116 #define		WIFI_P2P_GO_CONNECTED			BIT3
117 #define		WIFI_P2P_GC_CONNECTED			BIT4
118 
119 #define	BTC_RSSI_HIGH(_rssi_)	\
120 	((_rssi_ == BTC_RSSI_STATE_HIGH ||	\
121 	  _rssi_ == BTC_RSSI_STATE_STAY_HIGH) ? true : false)
122 #define	BTC_RSSI_MEDIUM(_rssi_)	\
123 	((_rssi_ == BTC_RSSI_STATE_MEDIUM ||	\
124 	  _rssi_ == BTC_RSSI_STATE_STAY_MEDIUM) ? true : false)
125 #define	BTC_RSSI_LOW(_rssi_)	\
126 	((_rssi_ == BTC_RSSI_STATE_LOW ||	\
127 	  _rssi_ == BTC_RSSI_STATE_STAY_LOW) ? true : false)
128 
129 enum btc_power_save_type {
130 	BTC_PS_WIFI_NATIVE = 0,
131 	BTC_PS_LPS_ON = 1,
132 	BTC_PS_LPS_OFF = 2,
133 	BTC_PS_LPS_MAX
134 };
135 
136 struct btc_board_info {
137 	/* The following is some board information */
138 	u8 bt_chip_type;
139 	u8 pg_ant_num;	/* pg ant number */
140 	u8 btdm_ant_num;	/* ant number for btdm */
141 	u8 btdm_ant_pos;
142 	bool bt_exist;
143 };
144 
145 enum btc_dbg_opcode {
146 	BTC_DBG_SET_COEX_NORMAL = 0x0,
147 	BTC_DBG_SET_COEX_WIFI_ONLY = 0x1,
148 	BTC_DBG_SET_COEX_BT_ONLY = 0x2,
149 	BTC_DBG_MAX
150 };
151 
152 enum btc_rssi_state {
153 	BTC_RSSI_STATE_HIGH = 0x0,
154 	BTC_RSSI_STATE_MEDIUM = 0x1,
155 	BTC_RSSI_STATE_LOW = 0x2,
156 	BTC_RSSI_STATE_STAY_HIGH = 0x3,
157 	BTC_RSSI_STATE_STAY_MEDIUM = 0x4,
158 	BTC_RSSI_STATE_STAY_LOW = 0x5,
159 	BTC_RSSI_MAX
160 };
161 
162 enum btc_wifi_role {
163 	BTC_ROLE_STATION = 0x0,
164 	BTC_ROLE_AP = 0x1,
165 	BTC_ROLE_IBSS = 0x2,
166 	BTC_ROLE_HS_MODE = 0x3,
167 	BTC_ROLE_MAX
168 };
169 
170 enum btc_wifi_bw_mode {
171 	BTC_WIFI_BW_LEGACY = 0x0,
172 	BTC_WIFI_BW_HT20 = 0x1,
173 	BTC_WIFI_BW_HT40 = 0x2,
174 	BTC_WIFI_BW_MAX
175 };
176 
177 enum btc_wifi_traffic_dir {
178 	BTC_WIFI_TRAFFIC_TX = 0x0,
179 	BTC_WIFI_TRAFFIC_RX = 0x1,
180 	BTC_WIFI_TRAFFIC_MAX
181 };
182 
183 enum btc_wifi_pnp {
184 	BTC_WIFI_PNP_WAKE_UP = 0x0,
185 	BTC_WIFI_PNP_SLEEP = 0x1,
186 	BTC_WIFI_PNP_MAX
187 };
188 
189 enum btc_get_type {
190 	/* type bool */
191 	BTC_GET_BL_HS_OPERATION,
192 	BTC_GET_BL_HS_CONNECTING,
193 	BTC_GET_BL_WIFI_CONNECTED,
194 	BTC_GET_BL_WIFI_BUSY,
195 	BTC_GET_BL_WIFI_SCAN,
196 	BTC_GET_BL_WIFI_LINK,
197 	BTC_GET_BL_WIFI_DHCP,
198 	BTC_GET_BL_WIFI_SOFTAP_IDLE,
199 	BTC_GET_BL_WIFI_SOFTAP_LINKING,
200 	BTC_GET_BL_WIFI_IN_EARLY_SUSPEND,
201 	BTC_GET_BL_WIFI_ROAM,
202 	BTC_GET_BL_WIFI_4_WAY_PROGRESS,
203 	BTC_GET_BL_WIFI_UNDER_5G,
204 	BTC_GET_BL_WIFI_AP_MODE_ENABLE,
205 	BTC_GET_BL_WIFI_ENABLE_ENCRYPTION,
206 	BTC_GET_BL_WIFI_UNDER_B_MODE,
207 	BTC_GET_BL_EXT_SWITCH,
208 
209 	/* type s4Byte */
210 	BTC_GET_S4_WIFI_RSSI,
211 	BTC_GET_S4_HS_RSSI,
212 
213 	/* type u32 */
214 	BTC_GET_U4_WIFI_BW,
215 	BTC_GET_U4_WIFI_TRAFFIC_DIRECTION,
216 	BTC_GET_U4_WIFI_FW_VER,
217 	BTC_GET_U4_WIFI_LINK_STATUS,
218 	BTC_GET_U4_BT_PATCH_VER,
219 	BTC_GET_U4_VENDOR,
220 
221 	/* type u1Byte */
222 	BTC_GET_U1_WIFI_DOT11_CHNL,
223 	BTC_GET_U1_WIFI_CENTRAL_CHNL,
224 	BTC_GET_U1_WIFI_HS_CHNL,
225 	BTC_GET_U1_MAC_PHY_MODE,
226 	BTC_GET_U1_AP_NUM,
227 
228 	/* for 1Ant */
229 	BTC_GET_U1_LPS_MODE,
230 	BTC_GET_BL_BT_SCO_BUSY,
231 
232 	/* for test mode */
233 	BTC_GET_DRIVER_TEST_CFG,
234 	BTC_GET_MAX
235 };
236 
237 enum btc_vendor {
238 	BTC_VENDOR_LENOVO,
239 	BTC_VENDOR_ASUS,
240 	BTC_VENDOR_OTHER
241 };
242 
243 enum btc_set_type {
244 	/* type bool */
245 	BTC_SET_BL_BT_DISABLE,
246 	BTC_SET_BL_BT_TRAFFIC_BUSY,
247 	BTC_SET_BL_BT_LIMITED_DIG,
248 	BTC_SET_BL_FORCE_TO_ROAM,
249 	BTC_SET_BL_TO_REJ_AP_AGG_PKT,
250 	BTC_SET_BL_BT_CTRL_AGG_SIZE,
251 	BTC_SET_BL_INC_SCAN_DEV_NUM,
252 
253 	/* type u1Byte */
254 	BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON,
255 	BTC_SET_UI_SCAN_SIG_COMPENSATION,
256 	BTC_SET_U1_AGG_BUF_SIZE,
257 
258 	/* type trigger some action */
259 	BTC_SET_ACT_GET_BT_RSSI,
260 	BTC_SET_ACT_AGGREGATE_CTRL,
261 	BTC_SET_ACT_ANTPOSREGRISTRY_CTRL,
262 
263 	/********* for 1Ant **********/
264 	/* type bool */
265 	BTC_SET_BL_BT_SCO_BUSY,
266 	/* type u1Byte */
267 	BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE,
268 	BTC_SET_U1_LPS_VAL,
269 	BTC_SET_U1_RPWM_VAL,
270 	BTC_SET_U1_1ANT_LPS,
271 	BTC_SET_U1_1ANT_RPWM,
272 	/* type trigger some action */
273 	BTC_SET_ACT_LEAVE_LPS,
274 	BTC_SET_ACT_ENTER_LPS,
275 	BTC_SET_ACT_NORMAL_LPS,
276 	BTC_SET_ACT_INC_FORCE_EXEC_PWR_CMD_CNT,
277 	BTC_SET_ACT_DISABLE_LOW_POWER,
278 	BTC_SET_ACT_UPDATE_ra_mask,
279 	BTC_SET_ACT_SEND_MIMO_PS,
280 	/* BT Coex related */
281 	BTC_SET_ACT_CTRL_BT_INFO,
282 	BTC_SET_ACT_CTRL_BT_COEX,
283 	/***************************/
284 	BTC_SET_MAX
285 };
286 
287 enum btc_dbg_disp_type {
288 	BTC_DBG_DISP_COEX_STATISTICS = 0x0,
289 	BTC_DBG_DISP_BT_LINK_INFO = 0x1,
290 	BTC_DBG_DISP_BT_FW_VER = 0x2,
291 	BTC_DBG_DISP_FW_PWR_MODE_CMD = 0x3,
292 	BTC_DBG_DISP_MAX
293 };
294 
295 enum btc_notify_type_ips {
296 	BTC_IPS_LEAVE = 0x0,
297 	BTC_IPS_ENTER = 0x1,
298 	BTC_IPS_MAX
299 };
300 
301 enum btc_notify_type_lps {
302 	BTC_LPS_DISABLE = 0x0,
303 	BTC_LPS_ENABLE = 0x1,
304 	BTC_LPS_MAX
305 };
306 
307 enum btc_notify_type_scan {
308 	BTC_SCAN_FINISH = 0x0,
309 	BTC_SCAN_START = 0x1,
310 	BTC_SCAN_MAX
311 };
312 
313 enum btc_notify_type_associate {
314 	BTC_ASSOCIATE_FINISH = 0x0,
315 	BTC_ASSOCIATE_START = 0x1,
316 	BTC_ASSOCIATE_MAX
317 };
318 
319 enum btc_notify_type_media_status {
320 	BTC_MEDIA_DISCONNECT = 0x0,
321 	BTC_MEDIA_CONNECT = 0x1,
322 	BTC_MEDIA_MAX
323 };
324 
325 enum btc_notify_type_special_packet {
326 	BTC_PACKET_UNKNOWN = 0x0,
327 	BTC_PACKET_DHCP = 0x1,
328 	BTC_PACKET_ARP = 0x2,
329 	BTC_PACKET_EAPOL = 0x3,
330 	BTC_PACKET_MAX
331 };
332 
333 enum hci_ext_bt_operation {
334 	HCI_BT_OP_NONE = 0x0,
335 	HCI_BT_OP_INQUIRY_START = 0x1,
336 	HCI_BT_OP_INQUIRY_FINISH = 0x2,
337 	HCI_BT_OP_PAGING_START = 0x3,
338 	HCI_BT_OP_PAGING_SUCCESS = 0x4,
339 	HCI_BT_OP_PAGING_UNSUCCESS = 0x5,
340 	HCI_BT_OP_PAIRING_START = 0x6,
341 	HCI_BT_OP_PAIRING_FINISH = 0x7,
342 	HCI_BT_OP_BT_DEV_ENABLE = 0x8,
343 	HCI_BT_OP_BT_DEV_DISABLE = 0x9,
344 	HCI_BT_OP_MAX
345 };
346 
347 enum btc_notify_type_stack_operation {
348 	BTC_STACK_OP_NONE = 0x0,
349 	BTC_STACK_OP_INQ_PAGE_PAIR_START = 0x1,
350 	BTC_STACK_OP_INQ_PAGE_PAIR_FINISH = 0x2,
351 	BTC_STACK_OP_MAX
352 };
353 
354 typedef u8 (*bfp_btc_r1)(void *btc_context, u32 reg_addr);
355 
356 typedef u16 (*bfp_btc_r2)(void *btc_context, u32 reg_addr);
357 
358 typedef u32 (*bfp_btc_r4)(void *btc_context, u32 reg_addr);
359 
360 typedef void (*bfp_btc_w1)(void *btc_context, u32 reg_addr, u32 data);
361 
362 typedef void (*bfp_btc_w1_bit_mak)(void *btc_context, u32 reg_addr,
363 				   u32 bit_mask, u8 data1b);
364 
365 typedef void (*bfp_btc_w2)(void *btc_context, u32 reg_addr, u16 data);
366 
367 typedef void (*bfp_btc_w4)(void *btc_context, u32 reg_addr, u32 data);
368 
369 typedef void (*bfp_btc_wr_1byte_bit_mask)(void *btc_context, u32 reg_addr,
370 					  u8 bit_mask, u8 data);
371 
372 typedef void (*bfp_btc_set_bb_reg)(void *btc_context, u32 reg_addr,
373 				   u32 bit_mask, u32 data);
374 
375 typedef u32 (*bfp_btc_get_bb_reg)(void *btc_context, u32 reg_addr,
376 				  u32 bit_mask);
377 
378 typedef void (*bfp_btc_set_rf_reg)(void *btc_context, u8 rf_path, u32 reg_addr,
379 				   u32 bit_mask, u32 data);
380 
381 typedef u32 (*bfp_btc_get_rf_reg)(void *btc_context, u8 rf_path,
382 				  u32 reg_addr, u32 bit_mask);
383 
384 typedef void (*bfp_btc_fill_h2c)(void *btc_context, u8 element_id,
385 				 u32 cmd_len, u8 *cmd_buffer);
386 
387 typedef	bool (*bfp_btc_get)(void *btcoexist, u8 get_type, void *out_buf);
388 
389 typedef	bool (*bfp_btc_set)(void *btcoexist, u8 set_type, void *in_buf);
390 
391 typedef void (*bfp_btc_disp_dbg_msg)(void *btcoexist, u8 disp_type);
392 
393 struct btc_bt_info {
394 	bool bt_disabled;
395 	u8 rssi_adjust_for_agc_table_on;
396 	u8 rssi_adjust_for_1ant_coex_type;
397 	bool bt_busy;
398 	u8 agg_buf_size;
399 	bool limited_dig;
400 	bool reject_agg_pkt;
401 	bool bt_ctrl_buf_size;
402 	bool increase_scan_dev_num;
403 	u16 bt_hci_ver;
404 	u16 bt_real_fw_ver;
405 	u8 bt_fw_ver;
406 
407 	bool bt_disable_low_pwr;
408 
409 	/* the following is for 1Ant solution */
410 	bool bt_ctrl_lps;
411 	bool bt_pwr_save_mode;
412 	bool bt_lps_on;
413 	bool force_to_roam;
414 	u8 force_exec_pwr_cmd_cnt;
415 	u8 lps_val;
416 	u8 rpwm_val;
417 	u32 ra_mask;
418 };
419 
420 struct btc_stack_info {
421 	bool profile_notified;
422 	u16 hci_version;	/* stack hci version */
423 	u8 num_of_link;
424 	bool bt_link_exist;
425 	bool sco_exist;
426 	bool acl_exist;
427 	bool a2dp_exist;
428 	bool hid_exist;
429 	u8 num_of_hid;
430 	bool pan_exist;
431 	bool unknown_acl_exist;
432 	s8 min_bt_rssi;
433 };
434 
435 struct btc_statistics {
436 	u32 cnt_bind;
437 	u32 cnt_init_hw_config;
438 	u32 cnt_init_coex_dm;
439 	u32 cnt_ips_notify;
440 	u32 cnt_lps_notify;
441 	u32 cnt_scan_notify;
442 	u32 cnt_connect_notify;
443 	u32 cnt_media_status_notify;
444 	u32 cnt_special_packet_notify;
445 	u32 cnt_bt_info_notify;
446 	u32 cnt_periodical;
447 	u32 cnt_coex_dm_switch;
448 	u32 cnt_stack_operation_notify;
449 	u32 cnt_dbg_ctrl;
450 };
451 
452 struct btc_bt_link_info {
453 	bool bt_link_exist;
454 	bool sco_exist;
455 	bool sco_only;
456 	bool a2dp_exist;
457 	bool a2dp_only;
458 	bool hid_exist;
459 	bool hid_only;
460 	bool pan_exist;
461 	bool pan_only;
462 };
463 
464 enum btc_antenna_pos {
465 	BTC_ANTENNA_AT_MAIN_PORT = 0x1,
466 	BTC_ANTENNA_AT_AUX_PORT = 0x2,
467 };
468 
469 struct btc_coexist {
470 	/* make sure only one adapter can bind the data context  */
471 	bool binded;
472 	/* default adapter */
473 	void *adapter;
474 	struct btc_board_info board_info;
475 	/* some bt info referenced by non-bt module */
476 	struct btc_bt_info bt_info;
477 	struct btc_stack_info stack_info;
478 	enum btc_chip_interface	chip_interface;
479 	struct btc_bt_link_info bt_link_info;
480 
481 	bool initilized;
482 	bool stop_coex_dm;
483 	bool manual_control;
484 	struct btc_statistics statistics;
485 	u8 pwr_mode_val[10];
486 
487 	/* function pointers - io related */
488 	bfp_btc_r1 btc_read_1byte;
489 	bfp_btc_w1 btc_write_1byte;
490 	bfp_btc_w1_bit_mak btc_write_1byte_bitmask;
491 	bfp_btc_r2 btc_read_2byte;
492 	bfp_btc_w2 btc_write_2byte;
493 	bfp_btc_r4 btc_read_4byte;
494 	bfp_btc_w4 btc_write_4byte;
495 
496 	bfp_btc_set_bb_reg btc_set_bb_reg;
497 	bfp_btc_get_bb_reg btc_get_bb_reg;
498 
499 	bfp_btc_set_rf_reg btc_set_rf_reg;
500 	bfp_btc_get_rf_reg btc_get_rf_reg;
501 
502 	bfp_btc_fill_h2c btc_fill_h2c;
503 
504 	bfp_btc_disp_dbg_msg btc_disp_dbg_msg;
505 
506 	bfp_btc_get btc_get;
507 	bfp_btc_set btc_set;
508 };
509 
510 bool halbtc_is_wifi_uplink(struct rtl_priv *adapter);
511 
512 extern struct btc_coexist gl_bt_coexist;
513 
514 bool exhalbtc_initlize_variables(struct rtl_priv *adapter);
515 void exhalbtc_init_hw_config(struct btc_coexist *btcoexist);
516 void exhalbtc_init_coex_dm(struct btc_coexist *btcoexist);
517 void exhalbtc_ips_notify(struct btc_coexist *btcoexist, u8 type);
518 void exhalbtc_lps_notify(struct btc_coexist *btcoexist, u8 type);
519 void exhalbtc_scan_notify(struct btc_coexist *btcoexist, u8 type);
520 void exhalbtc_connect_notify(struct btc_coexist *btcoexist, u8 action);
521 void exhalbtc_mediastatus_notify(struct btc_coexist *btcoexist,
522 				 enum rt_media_status media_status);
523 void exhalbtc_special_packet_notify(struct btc_coexist *btcoexist, u8 pkt_type);
524 void exhalbtc_bt_info_notify(struct btc_coexist *btcoexist, u8 *tmp_buf,
525 			     u8 length);
526 void exhalbtc_stack_operation_notify(struct btc_coexist *btcoexist, u8 type);
527 void exhalbtc_halt_notify(struct btc_coexist *btcoexist);
528 void exhalbtc_pnp_notify(struct btc_coexist *btcoexist, u8 pnp_state);
529 void exhalbtc_coex_dm_switch(struct btc_coexist *btcoexist);
530 void exhalbtc_periodical(struct btc_coexist *btcoexist);
531 void exhalbtc_dbg_control(struct btc_coexist *btcoexist, u8 code, u8 len,
532 			  u8 *data);
533 void exhalbtc_stack_update_profile_info(void);
534 void exhalbtc_set_hci_version(u16 hci_version);
535 void exhalbtc_set_bt_patch_version(u16 bt_hci_version, u16 bt_patch_version);
536 void exhalbtc_update_min_bt_rssi(s8 bt_rssi);
537 void exhalbtc_set_bt_exist(bool bt_exist);
538 void exhalbtc_set_chip_type(u8 chip_type);
539 void exhalbtc_set_ant_num(struct rtl_priv *rtlpriv, u8 type, u8 ant_num);
540 void exhalbtc_display_bt_coex_info(struct btc_coexist *btcoexist);
541 void exhalbtc_signal_compensation(struct btc_coexist *btcoexist,
542 				  u8 *rssi_wifi, u8 *rssi_bt);
543 void exhalbtc_lps_leave(struct btc_coexist *btcoexist);
544 void exhalbtc_low_wifi_traffic_notify(struct btc_coexist *btcoexist);
545 
546 #endif
547