1 /****************************************************************************** 2 * 3 * Copyright(c) 2012 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * The full GNU General Public License is included in this distribution in the 15 * file called LICENSE. 16 * 17 * Contact Information: 18 * wlanfae <wlanfae@realtek.com> 19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, 20 * Hsinchu 300, Taiwan. 21 * 22 * Larry Finger <Larry.Finger@lwfinger.net> 23 * 24 *****************************************************************************/ 25 26 /*============================================================ 27 * Description: 28 * 29 * This file is for RTL8821A Co-exist mechanism 30 * 31 * History 32 * 2012/08/22 Cosa first check in. 33 * 2012/11/14 Cosa Revise for 8821A 2Ant out sourcing. 34 * 35 *============================================================ 36 */ 37 38 /*============================================================ 39 * include files 40 *============================================================ 41 */ 42 #include "halbt_precomp.h" 43 /*============================================================ 44 * Global variables, these are static variables 45 *============================================================ 46 */ 47 static struct coex_dm_8821a_2ant glcoex_dm_8821a_2ant; 48 static struct coex_dm_8821a_2ant *coex_dm = &glcoex_dm_8821a_2ant; 49 static struct coex_sta_8821a_2ant glcoex_sta_8821a_2ant; 50 static struct coex_sta_8821a_2ant *coex_sta = &glcoex_sta_8821a_2ant; 51 52 static const char *const glbt_info_src_8821a_2ant[] = { 53 "BT Info[wifi fw]", 54 "BT Info[bt rsp]", 55 "BT Info[bt auto report]", 56 }; 57 58 static u32 glcoex_ver_date_8821a_2ant = 20130618; 59 static u32 glcoex_ver_8821a_2ant = 0x5050; 60 61 /*============================================================ 62 * local function proto type if needed 63 *============================================================ 64 *============================================================ 65 * local function start with halbtc8821a2ant_ 66 *============================================================ 67 */ 68 static u8 halbtc8821a2ant_bt_rssi_state(struct btc_coexist *btcoexist, 69 u8 level_num, u8 rssi_thresh, 70 u8 rssi_thresh1) 71 { 72 struct rtl_priv *rtlpriv = btcoexist->adapter; 73 long bt_rssi = 0; 74 u8 bt_rssi_state = coex_sta->pre_bt_rssi_state; 75 76 bt_rssi = coex_sta->bt_rssi; 77 78 if (level_num == 2) { 79 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || 80 (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 81 long tmp = rssi_thresh + 82 BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT; 83 if (bt_rssi >= tmp) { 84 bt_rssi_state = BTC_RSSI_STATE_HIGH; 85 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 86 "[BTCoex], BT Rssi state switch to High\n"); 87 } else { 88 bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; 89 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 90 "[BTCoex], BT Rssi state stay at Low\n"); 91 } 92 } else { 93 if (bt_rssi < rssi_thresh) { 94 bt_rssi_state = BTC_RSSI_STATE_LOW; 95 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 96 "[BTCoex], BT Rssi state switch to Low\n"); 97 } else { 98 bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH; 99 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 100 "[BTCoex], BT Rssi state stay at High\n"); 101 } 102 } 103 } else if (level_num == 3) { 104 if (rssi_thresh > rssi_thresh1) { 105 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 106 "[BTCoex], BT Rssi thresh error!!\n"); 107 return coex_sta->pre_bt_rssi_state; 108 } 109 110 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || 111 (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 112 if (bt_rssi >= 113 (rssi_thresh+BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) { 114 bt_rssi_state = BTC_RSSI_STATE_MEDIUM; 115 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 116 "[BTCoex], BT Rssi state switch to Medium\n"); 117 } else { 118 bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; 119 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 120 "[BTCoex], BT Rssi state stay at Low\n"); 121 } 122 } else if ((coex_sta->pre_bt_rssi_state == 123 BTC_RSSI_STATE_MEDIUM) || 124 (coex_sta->pre_bt_rssi_state == 125 BTC_RSSI_STATE_STAY_MEDIUM)) { 126 if (bt_rssi >= 127 (rssi_thresh1 + 128 BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) { 129 bt_rssi_state = BTC_RSSI_STATE_HIGH; 130 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 131 "[BTCoex], BT Rssi state switch to High\n"); 132 } else if (bt_rssi < rssi_thresh) { 133 bt_rssi_state = BTC_RSSI_STATE_LOW; 134 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 135 "[BTCoex], BT Rssi state switch to Low\n"); 136 } else { 137 bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM; 138 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 139 "[BTCoex], BT Rssi state stay at Medium\n"); 140 } 141 } else { 142 if (bt_rssi < rssi_thresh1) { 143 bt_rssi_state = BTC_RSSI_STATE_MEDIUM; 144 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 145 "[BTCoex], BT Rssi state switch to Medium\n"); 146 } else { 147 bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH; 148 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 149 "[BTCoex], BT Rssi state stay at High\n"); 150 } 151 } 152 } 153 154 coex_sta->pre_bt_rssi_state = bt_rssi_state; 155 156 return bt_rssi_state; 157 } 158 159 static u8 halbtc8821a2ant_wifi_rssi_state(struct btc_coexist *btcoexist, 160 u8 index, u8 level_num, 161 u8 rssi_thresh, u8 rssi_thresh1) 162 { 163 struct rtl_priv *rtlpriv = btcoexist->adapter; 164 long wifi_rssi = 0; 165 u8 wifi_rssi_state = coex_sta->pre_wifi_rssi_state[index]; 166 167 btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi); 168 169 if (level_num == 2) { 170 if ((coex_sta->pre_wifi_rssi_state[index] == 171 BTC_RSSI_STATE_LOW) || 172 (coex_sta->pre_wifi_rssi_state[index] == 173 BTC_RSSI_STATE_STAY_LOW)) { 174 if (wifi_rssi >= 175 (rssi_thresh+BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) { 176 wifi_rssi_state = BTC_RSSI_STATE_HIGH; 177 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 178 "[BTCoex], wifi RSSI state switch to High\n"); 179 } else { 180 wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW; 181 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 182 "[BTCoex], wifi RSSI state stay at Low\n"); 183 } 184 } else { 185 if (wifi_rssi < rssi_thresh) { 186 wifi_rssi_state = BTC_RSSI_STATE_LOW; 187 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 188 "[BTCoex], wifi RSSI state switch to Low\n"); 189 } else { 190 wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH; 191 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 192 "[BTCoex], wifi RSSI state stay at High\n"); 193 } 194 } 195 } else if (level_num == 3) { 196 if (rssi_thresh > rssi_thresh1) { 197 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 198 "[BTCoex], wifi RSSI thresh error!!\n"); 199 return coex_sta->pre_wifi_rssi_state[index]; 200 } 201 202 if ((coex_sta->pre_wifi_rssi_state[index] == 203 BTC_RSSI_STATE_LOW) || 204 (coex_sta->pre_wifi_rssi_state[index] == 205 BTC_RSSI_STATE_STAY_LOW)) { 206 if (wifi_rssi >= 207 (rssi_thresh+BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) { 208 wifi_rssi_state = BTC_RSSI_STATE_MEDIUM; 209 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 210 "[BTCoex], wifi RSSI state switch to Medium\n"); 211 } else { 212 wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW; 213 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 214 "[BTCoex], wifi RSSI state stay at Low\n"); 215 } 216 } else if ((coex_sta->pre_wifi_rssi_state[index] == 217 BTC_RSSI_STATE_MEDIUM) || 218 (coex_sta->pre_wifi_rssi_state[index] == 219 BTC_RSSI_STATE_STAY_MEDIUM)) { 220 if (wifi_rssi >= (rssi_thresh1 + 221 BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) { 222 wifi_rssi_state = BTC_RSSI_STATE_HIGH; 223 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 224 "[BTCoex], wifi RSSI state switch to High\n"); 225 } else if (wifi_rssi < rssi_thresh) { 226 wifi_rssi_state = BTC_RSSI_STATE_LOW; 227 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 228 "[BTCoex], wifi RSSI state switch to Low\n"); 229 } else { 230 wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM; 231 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 232 "[BTCoex], wifi RSSI state stay at Medium\n"); 233 } 234 } else { 235 if (wifi_rssi < rssi_thresh1) { 236 wifi_rssi_state = BTC_RSSI_STATE_MEDIUM; 237 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 238 "[BTCoex], wifi RSSI state switch to Medium\n"); 239 } else { 240 wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH; 241 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 242 "[BTCoex], wifi RSSI state stay at High\n"); 243 } 244 } 245 } 246 coex_sta->pre_wifi_rssi_state[index] = wifi_rssi_state; 247 248 return wifi_rssi_state; 249 } 250 251 static void btc8821a2ant_mon_bt_en_dis(struct btc_coexist *btcoexist) 252 { 253 struct rtl_priv *rtlpriv = btcoexist->adapter; 254 static bool pre_bt_disabled; 255 static u32 bt_disable_cnt; 256 bool bt_active = true, bt_disabled = false; 257 258 /* This function check if bt is disabled*/ 259 260 if (coex_sta->high_priority_tx == 0 && 261 coex_sta->high_priority_rx == 0 && 262 coex_sta->low_priority_tx == 0 && 263 coex_sta->low_priority_rx == 0) 264 bt_active = false; 265 if (coex_sta->high_priority_tx == 0xffff && 266 coex_sta->high_priority_rx == 0xffff && 267 coex_sta->low_priority_tx == 0xffff && 268 coex_sta->low_priority_rx == 0xffff) 269 bt_active = false; 270 if (bt_active) { 271 bt_disable_cnt = 0; 272 bt_disabled = false; 273 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE, 274 &bt_disabled); 275 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 276 "[BTCoex], BT is enabled !!\n"); 277 } else { 278 bt_disable_cnt++; 279 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 280 "[BTCoex], bt all counters = 0, %d times!!\n", 281 bt_disable_cnt); 282 if (bt_disable_cnt >= 2) { 283 bt_disabled = true; 284 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE, 285 &bt_disabled); 286 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 287 "[BTCoex], BT is disabled !!\n"); 288 } 289 } 290 if (pre_bt_disabled != bt_disabled) { 291 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 292 "[BTCoex], BT is from %s to %s!!\n", 293 (pre_bt_disabled ? "disabled" : "enabled"), 294 (bt_disabled ? "disabled" : "enabled")); 295 pre_bt_disabled = bt_disabled; 296 } 297 } 298 299 static void halbtc8821a2ant_monitor_bt_ctr(struct btc_coexist *btcoexist) 300 { 301 struct rtl_priv *rtlpriv = btcoexist->adapter; 302 u32 reg_hp_txrx, reg_lp_txrx, u4tmp; 303 u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0; 304 305 reg_hp_txrx = 0x770; 306 reg_lp_txrx = 0x774; 307 308 u4tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx); 309 reg_hp_tx = u4tmp & MASKLWORD; 310 reg_hp_rx = (u4tmp & MASKHWORD)>>16; 311 312 u4tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx); 313 reg_lp_tx = u4tmp & MASKLWORD; 314 reg_lp_rx = (u4tmp & MASKHWORD)>>16; 315 316 coex_sta->high_priority_tx = reg_hp_tx; 317 coex_sta->high_priority_rx = reg_hp_rx; 318 coex_sta->low_priority_tx = reg_lp_tx; 319 coex_sta->low_priority_rx = reg_lp_rx; 320 321 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 322 "[BTCoex], High Priority Tx/Rx (reg 0x%x) = 0x%x(%d)/0x%x(%d)\n", 323 reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx); 324 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 325 "[BTCoex], Low Priority Tx/Rx (reg 0x%x) = 0x%x(%d)/0x%x(%d)\n", 326 reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx); 327 328 /* reset counter */ 329 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc); 330 } 331 332 static void halbtc8821a2ant_query_bt_info(struct btc_coexist *btcoexist) 333 { 334 struct rtl_priv *rtlpriv = btcoexist->adapter; 335 u8 h2c_parameter[1] = {0}; 336 337 coex_sta->c2h_bt_info_req_sent = true; 338 339 h2c_parameter[0] |= BIT0; /* trigger */ 340 341 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 342 "[BTCoex], Query Bt Info, FW write 0x61 = 0x%x\n", 343 h2c_parameter[0]); 344 345 btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter); 346 } 347 348 static u8 halbtc8821a2ant_action_algorithm(struct btc_coexist *btcoexist) 349 { 350 struct rtl_priv *rtlpriv = btcoexist->adapter; 351 struct btc_stack_info *stack_info = &btcoexist->stack_info; 352 bool bt_hs_on = false; 353 u8 algorithm = BT_8821A_2ANT_COEX_ALGO_UNDEFINED; 354 u8 num_of_diff_profile = 0; 355 356 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); 357 358 /*for win-8 stack HID report error*/ 359 /* sync BTInfo with BT firmware and stack */ 360 if (!stack_info->hid_exist) 361 stack_info->hid_exist = coex_sta->hid_exist; 362 /* when stack HID report error, here we use the info from bt fw. */ 363 if (!stack_info->bt_link_exist) 364 stack_info->bt_link_exist = coex_sta->bt_link_exist; 365 366 if (!coex_sta->bt_link_exist) { 367 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 368 "[BTCoex], No profile exists!!!\n"); 369 return algorithm; 370 } 371 372 if (coex_sta->sco_exist) 373 num_of_diff_profile++; 374 if (coex_sta->hid_exist) 375 num_of_diff_profile++; 376 if (coex_sta->pan_exist) 377 num_of_diff_profile++; 378 if (coex_sta->a2dp_exist) 379 num_of_diff_profile++; 380 381 if (num_of_diff_profile == 1) { 382 if (coex_sta->sco_exist) { 383 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 384 "[BTCoex], SCO only\n"); 385 algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; 386 } else { 387 if (coex_sta->hid_exist) { 388 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 389 "[BTCoex], HID only\n"); 390 algorithm = BT_8821A_2ANT_COEX_ALGO_HID; 391 } else if (coex_sta->a2dp_exist) { 392 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 393 "[BTCoex], A2DP only\n"); 394 algorithm = BT_8821A_2ANT_COEX_ALGO_A2DP; 395 } else if (coex_sta->pan_exist) { 396 if (bt_hs_on) { 397 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 398 DBG_LOUD, 399 "[BTCoex], PAN(HS) only\n"); 400 algorithm = BT_8821A_2ANT_COEX_ALGO_PANHS; 401 } else { 402 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 403 DBG_LOUD, 404 "[BTCoex], PAN(EDR) only\n"); 405 algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR; 406 } 407 } 408 } 409 } else if (num_of_diff_profile == 2) { 410 if (coex_sta->sco_exist) { 411 if (coex_sta->hid_exist) { 412 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 413 "[BTCoex], SCO + HID\n"); 414 algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR_HID; 415 } else if (coex_sta->a2dp_exist) { 416 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 417 "[BTCoex], SCO + A2DP ==> SCO\n"); 418 algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR_HID; 419 } else if (coex_sta->pan_exist) { 420 if (bt_hs_on) { 421 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 422 DBG_LOUD, 423 "[BTCoex], SCO + PAN(HS)\n"); 424 algorithm = BT_8821A_2ANT_COEX_ALGO_SCO; 425 } else { 426 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 427 DBG_LOUD, 428 "[BTCoex], SCO + PAN(EDR)\n"); 429 algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR_HID; 430 } 431 } 432 } else { 433 if (coex_sta->hid_exist && 434 coex_sta->a2dp_exist) { 435 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 436 "[BTCoex], HID + A2DP\n"); 437 algorithm = BT_8821A_2ANT_COEX_ALGO_HID_A2DP; 438 } else if (coex_sta->hid_exist && 439 coex_sta->pan_exist) { 440 if (bt_hs_on) { 441 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 442 DBG_LOUD, 443 "[BTCoex], HID + PAN(HS)\n"); 444 algorithm = BT_8821A_2ANT_COEX_ALGO_HID; 445 } else { 446 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 447 DBG_LOUD, 448 "[BTCoex], HID + PAN(EDR)\n"); 449 algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR_HID; 450 } 451 } else if (coex_sta->pan_exist && 452 coex_sta->a2dp_exist) { 453 if (bt_hs_on) { 454 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 455 DBG_LOUD, 456 "[BTCoex], A2DP + PAN(HS)\n"); 457 algorithm = BT_8821A_2ANT_COEX_ALGO_A2DP_PANHS; 458 } else { 459 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 460 DBG_LOUD, 461 "[BTCoex], A2DP + PAN(EDR)\n"); 462 algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR_A2DP; 463 } 464 } 465 } 466 } else if (num_of_diff_profile == 3) { 467 if (coex_sta->sco_exist) { 468 if (coex_sta->hid_exist && 469 coex_sta->a2dp_exist) { 470 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 471 "[BTCoex], SCO + HID + A2DP ==> HID\n"); 472 algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR_HID; 473 } else if (coex_sta->hid_exist && 474 coex_sta->pan_exist) { 475 if (bt_hs_on) { 476 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 477 DBG_LOUD, 478 "[BTCoex], SCO + HID + PAN(HS)\n"); 479 algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR_HID; 480 } else { 481 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 482 DBG_LOUD, 483 "[BTCoex], SCO + HID + PAN(EDR)\n"); 484 algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR_HID; 485 } 486 } else if (coex_sta->pan_exist && 487 coex_sta->a2dp_exist) { 488 if (bt_hs_on) { 489 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 490 DBG_LOUD, 491 "[BTCoex], SCO + A2DP + PAN(HS)\n"); 492 algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR_HID; 493 } else { 494 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 495 DBG_LOUD, 496 "[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n"); 497 algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR_HID; 498 } 499 } 500 } else { 501 if (coex_sta->hid_exist && 502 coex_sta->pan_exist && 503 coex_sta->a2dp_exist) { 504 if (bt_hs_on) { 505 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 506 DBG_LOUD, 507 "[BTCoex], HID + A2DP + PAN(HS)\n"); 508 algorithm = BT_8821A_2ANT_COEX_ALGO_HID_A2DP; 509 } else { 510 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 511 DBG_LOUD, 512 "[BTCoex], HID + A2DP + PAN(EDR)\n"); 513 algorithm = BT_8821A_2ANT_COEX_ALGO_HID_A2DP_PANEDR; 514 } 515 } 516 } 517 } else if (num_of_diff_profile >= 3) { 518 if (coex_sta->sco_exist) { 519 if (coex_sta->hid_exist && 520 coex_sta->pan_exist && 521 coex_sta->a2dp_exist) { 522 if (bt_hs_on) { 523 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 524 DBG_LOUD, 525 "[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n"); 526 527 } else { 528 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 529 DBG_LOUD, 530 "[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n"); 531 algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR_HID; 532 } 533 } 534 } 535 } 536 return algorithm; 537 } 538 539 static bool halbtc8821a2ant_need_to_dec_bt_pwr(struct btc_coexist *btcoexist) 540 { 541 struct rtl_priv *rtlpriv = btcoexist->adapter; 542 bool ret = false; 543 bool bt_hs_on = false, wifi_connected = false; 544 long bt_hs_rssi = 0; 545 u8 bt_rssi_state; 546 547 if (!btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on)) 548 return false; 549 if (!btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, 550 &wifi_connected)) 551 return false; 552 if (!btcoexist->btc_get(btcoexist, BTC_GET_S4_HS_RSSI, &bt_hs_rssi)) 553 return false; 554 555 bt_rssi_state = halbtc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0); 556 557 if (wifi_connected) { 558 if (bt_hs_on) { 559 if (bt_hs_rssi > 37) { 560 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 561 "[BTCoex], Need to decrease bt power for HS mode!!\n"); 562 ret = true; 563 } 564 } else { 565 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 566 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 567 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 568 "[BTCoex], Need to decrease bt power for Wifi is connected!!\n"); 569 ret = true; 570 } 571 } 572 } 573 return ret; 574 } 575 576 static void btc8821a2ant_set_fw_dac_swing_lev(struct btc_coexist *btcoexist, 577 u8 dac_swing_lvl) 578 { 579 struct rtl_priv *rtlpriv = btcoexist->adapter; 580 u8 h2c_parameter[1] = {0}; 581 582 /* There are several type of dacswing 583 * 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 584 */ 585 h2c_parameter[0] = dac_swing_lvl; 586 587 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 588 "[BTCoex], Set Dac Swing Level = 0x%x\n", dac_swing_lvl); 589 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 590 "[BTCoex], FW write 0x64 = 0x%x\n", h2c_parameter[0]); 591 592 btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter); 593 } 594 595 static void halbtc8821a2ant_set_fw_dec_bt_pwr(struct btc_coexist *btcoexist, 596 bool dec_bt_pwr) 597 { 598 struct rtl_priv *rtlpriv = btcoexist->adapter; 599 u8 h2c_parameter[1] = {0}; 600 601 h2c_parameter[0] = 0; 602 603 if (dec_bt_pwr) 604 h2c_parameter[0] |= BIT1; 605 606 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 607 "[BTCoex], decrease Bt Power : %s, FW write 0x62 = 0x%x\n", 608 (dec_bt_pwr ? "Yes!!" : "No!!"), h2c_parameter[0]); 609 610 btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter); 611 } 612 613 static void halbtc8821a2ant_dec_bt_pwr(struct btc_coexist *btcoexist, 614 bool force_exec, bool dec_bt_pwr) 615 { 616 struct rtl_priv *rtlpriv = btcoexist->adapter; 617 618 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 619 "[BTCoex], %s Dec BT power = %s\n", 620 (force_exec ? "force to" : ""), 621 ((dec_bt_pwr) ? "ON" : "OFF")); 622 coex_dm->cur_dec_bt_pwr = dec_bt_pwr; 623 624 if (!force_exec) { 625 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 626 "[BTCoex], pre_dec_bt_pwr = %d, cur_dec_bt_pwr = %d\n", 627 coex_dm->pre_dec_bt_pwr, coex_dm->cur_dec_bt_pwr); 628 629 if (coex_dm->pre_dec_bt_pwr == coex_dm->cur_dec_bt_pwr) 630 return; 631 } 632 halbtc8821a2ant_set_fw_dec_bt_pwr(btcoexist, coex_dm->cur_dec_bt_pwr); 633 634 coex_dm->pre_dec_bt_pwr = coex_dm->cur_dec_bt_pwr; 635 } 636 637 static void btc8821a2ant_set_fw_bt_lna_constr(struct btc_coexist *btcoexist, 638 bool bt_lna_cons_on) 639 { 640 struct rtl_priv *rtlpriv = btcoexist->adapter; 641 u8 h2c_parameter[2] = {0}; 642 643 h2c_parameter[0] = 0x3; /* opCode, 0x3 = BT_SET_LNA_CONSTRAIN */ 644 645 if (bt_lna_cons_on) 646 h2c_parameter[1] |= BIT0; 647 648 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 649 "[BTCoex], set BT LNA Constrain: %s, FW write 0x69 = 0x%x\n", 650 bt_lna_cons_on ? "ON!!" : "OFF!!", 651 h2c_parameter[0] << 8 | h2c_parameter[1]); 652 653 btcoexist->btc_fill_h2c(btcoexist, 0x69, 2, h2c_parameter); 654 } 655 656 static void btc8821a2_set_bt_lna_const(struct btc_coexist *btcoexist, 657 bool force_exec, bool bt_lna_cons_on) 658 { 659 struct rtl_priv *rtlpriv = btcoexist->adapter; 660 661 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 662 "[BTCoex], %s BT Constrain = %s\n", 663 (force_exec ? "force" : ""), 664 ((bt_lna_cons_on) ? "ON" : "OFF")); 665 coex_dm->cur_bt_lna_constrain = bt_lna_cons_on; 666 667 if (!force_exec) { 668 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 669 "[BTCoex], pre_bt_lna_constrain = %d,cur_bt_lna_constrain = %d\n", 670 coex_dm->pre_bt_lna_constrain, 671 coex_dm->cur_bt_lna_constrain); 672 673 if (coex_dm->pre_bt_lna_constrain == 674 coex_dm->cur_bt_lna_constrain) 675 return; 676 } 677 btc8821a2ant_set_fw_bt_lna_constr(btcoexist, 678 coex_dm->cur_bt_lna_constrain); 679 680 coex_dm->pre_bt_lna_constrain = coex_dm->cur_bt_lna_constrain; 681 } 682 683 static void halbtc8821a2ant_set_fw_bt_psd_mode(struct btc_coexist *btcoexist, 684 u8 bt_psd_mode) 685 { 686 struct rtl_priv *rtlpriv = btcoexist->adapter; 687 u8 h2c_parameter[2] = {0}; 688 689 h2c_parameter[0] = 0x2; /* opCode, 0x2 = BT_SET_PSD_MODE */ 690 691 h2c_parameter[1] = bt_psd_mode; 692 693 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 694 "[BTCoex], set BT PSD mode = 0x%x, FW write 0x69 = 0x%x\n", 695 h2c_parameter[1], 696 h2c_parameter[0] << 8 | h2c_parameter[1]); 697 698 btcoexist->btc_fill_h2c(btcoexist, 0x69, 2, h2c_parameter); 699 } 700 701 static void halbtc8821a2ant_set_bt_psd_mode(struct btc_coexist *btcoexist, 702 bool force_exec, u8 bt_psd_mode) 703 { 704 struct rtl_priv *rtlpriv = btcoexist->adapter; 705 706 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 707 "[BTCoex], %s BT PSD mode = 0x%x\n", 708 (force_exec ? "force" : ""), bt_psd_mode); 709 coex_dm->cur_bt_psd_mode = bt_psd_mode; 710 711 if (!force_exec) { 712 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 713 "[BTCoex], pre_bt_psd_mode = 0x%x, cur_bt_psd_mode = 0x%x\n", 714 coex_dm->pre_bt_psd_mode, coex_dm->cur_bt_psd_mode); 715 716 if (coex_dm->pre_bt_psd_mode == coex_dm->cur_bt_psd_mode) 717 return; 718 } 719 halbtc8821a2ant_set_fw_bt_psd_mode(btcoexist, 720 coex_dm->cur_bt_psd_mode); 721 722 coex_dm->pre_bt_psd_mode = coex_dm->cur_bt_psd_mode; 723 } 724 725 static void halbtc8821a2ant_set_bt_auto_report(struct btc_coexist *btcoexist, 726 bool enable_auto_report) 727 { 728 struct rtl_priv *rtlpriv = btcoexist->adapter; 729 u8 h2c_parameter[1] = {0}; 730 731 h2c_parameter[0] = 0; 732 733 if (enable_auto_report) 734 h2c_parameter[0] |= BIT0; 735 736 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 737 "[BTCoex], BT FW auto report : %s, FW write 0x68 = 0x%x\n", 738 (enable_auto_report ? "Enabled!!" : "Disabled!!"), 739 h2c_parameter[0]); 740 741 btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter); 742 } 743 744 static void halbtc8821a2ant_bt_auto_report(struct btc_coexist *btcoexist, 745 bool force_exec, 746 bool enable_auto_report) 747 { 748 struct rtl_priv *rtlpriv = btcoexist->adapter; 749 750 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 751 "[BTCoex], %s BT Auto report = %s\n", 752 (force_exec ? "force to" : ""), 753 ((enable_auto_report) ? "Enabled" : "Disabled")); 754 coex_dm->cur_bt_auto_report = enable_auto_report; 755 756 if (!force_exec) { 757 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 758 "[BTCoex], pre_bt_auto_report = %d, cur_bt_auto_report = %d\n", 759 coex_dm->pre_bt_auto_report, 760 coex_dm->cur_bt_auto_report); 761 762 if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report) 763 return; 764 } 765 halbtc8821a2ant_set_bt_auto_report(btcoexist, 766 coex_dm->cur_bt_auto_report); 767 768 coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report; 769 } 770 771 static void halbtc8821a2ant_fw_dac_swing_lvl(struct btc_coexist *btcoexist, 772 bool force_exec, 773 u8 fw_dac_swing_lvl) 774 { 775 struct rtl_priv *rtlpriv = btcoexist->adapter; 776 777 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 778 "[BTCoex], %s set FW Dac Swing level = %d\n", 779 (force_exec ? "force to" : ""), fw_dac_swing_lvl); 780 coex_dm->cur_fw_dac_swing_lvl = fw_dac_swing_lvl; 781 782 if (!force_exec) { 783 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 784 "[BTCoex], pre_fw_dac_swing_lvl = %d, cur_fw_dac_swing_lvl = %d\n", 785 coex_dm->pre_fw_dac_swing_lvl, 786 coex_dm->cur_fw_dac_swing_lvl); 787 788 if (coex_dm->pre_fw_dac_swing_lvl == 789 coex_dm->cur_fw_dac_swing_lvl) 790 return; 791 } 792 793 btc8821a2ant_set_fw_dac_swing_lev(btcoexist, 794 coex_dm->cur_fw_dac_swing_lvl); 795 796 coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl; 797 } 798 799 static void btc8821a2ant_set_sw_rf_rx_lpf_corner(struct btc_coexist *btcoexist, 800 bool rx_rf_shrink_on) 801 { 802 struct rtl_priv *rtlpriv = btcoexist->adapter; 803 804 if (rx_rf_shrink_on) { 805 /* Shrink RF Rx LPF corner */ 806 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 807 "[BTCoex], Shrink RF Rx LPF corner!!\n"); 808 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, 809 0xfffff, 0xffffc); 810 } else { 811 /* Resume RF Rx LPF corner 812 * After initialized, we can use coex_dm->bt_rf0x1e_backup 813 */ 814 if (btcoexist->initilized) { 815 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 816 "[BTCoex], Resume RF Rx LPF corner!!\n"); 817 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 818 0x1e, 0xfffff, 819 coex_dm->bt_rf0x1e_backup); 820 } 821 } 822 } 823 824 static void halbtc8821a2ant_RfShrink(struct btc_coexist *btcoexist, 825 bool force_exec, bool rx_rf_shrink_on) 826 { 827 struct rtl_priv *rtlpriv = btcoexist->adapter; 828 829 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 830 "[BTCoex], %s turn Rx RF Shrink = %s\n", 831 (force_exec ? "force to" : ""), 832 ((rx_rf_shrink_on) ? "ON" : "OFF")); 833 coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on; 834 835 if (!force_exec) { 836 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 837 "[BTCoex], pre_rf_rx_lpf_shrink = %d, cur_rf_rx_lpf_shrink = %d\n", 838 coex_dm->pre_rf_rx_lpf_shrink, 839 coex_dm->cur_rf_rx_lpf_shrink); 840 841 if (coex_dm->pre_rf_rx_lpf_shrink == 842 coex_dm->cur_rf_rx_lpf_shrink) 843 return; 844 } 845 btc8821a2ant_set_sw_rf_rx_lpf_corner(btcoexist, 846 coex_dm->cur_rf_rx_lpf_shrink); 847 848 coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink; 849 } 850 851 static void btc8821a2ant_SetSwPenTxRateAdapt(struct btc_coexist *btcoexist, 852 bool low_penalty_ra) 853 { 854 struct rtl_priv *rtlpriv = btcoexist->adapter; 855 u8 h2c_parameter[6] = {0}; 856 857 h2c_parameter[0] = 0x6; /* opCode, 0x6 = Retry_Penalty */ 858 859 if (low_penalty_ra) { 860 h2c_parameter[1] |= BIT0; 861 /*normal rate except MCS7/6/5, OFDM54/48/36 */ 862 h2c_parameter[2] = 0x00; 863 /*MCS7 or OFDM54 */ 864 h2c_parameter[3] = 0xf7; 865 /*MCS6 or OFDM48 */ 866 h2c_parameter[4] = 0xf8; 867 /*MCS5 or OFDM36 */ 868 h2c_parameter[5] = 0xf9; 869 } 870 871 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 872 "[BTCoex], set WiFi Low-Penalty Retry: %s", 873 (low_penalty_ra ? "ON!!" : "OFF!!")); 874 875 btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter); 876 } 877 878 static void halbtc8821a2ant_low_penalty_ra(struct btc_coexist *btcoexist, 879 bool force_exec, bool low_penalty_ra) 880 { 881 struct rtl_priv *rtlpriv = btcoexist->adapter; 882 883 /*return;*/ 884 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 885 "[BTCoex], %s turn LowPenaltyRA = %s\n", 886 (force_exec ? "force to" : ""), 887 ((low_penalty_ra) ? "ON" : "OFF")); 888 coex_dm->cur_low_penalty_ra = low_penalty_ra; 889 890 if (!force_exec) { 891 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 892 "[BTCoex], pre_low_penalty_ra = %d, cur_low_penalty_ra = %d\n", 893 coex_dm->pre_low_penalty_ra, 894 coex_dm->cur_low_penalty_ra); 895 896 if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra) 897 return; 898 } 899 btc8821a2ant_SetSwPenTxRateAdapt(btcoexist, 900 coex_dm->cur_low_penalty_ra); 901 902 coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra; 903 } 904 905 static void halbtc8821a2ant_set_dac_swing_reg(struct btc_coexist *btcoexist, 906 u32 level) 907 { 908 struct rtl_priv *rtlpriv = btcoexist->adapter; 909 u8 val = (u8)level; 910 911 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 912 "[BTCoex], Write SwDacSwing = 0x%x\n", level); 913 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc5b, 0x3e, val); 914 } 915 916 static void btc8821a2ant_set_sw_full_dac_swing(struct btc_coexist *btcoexist, 917 bool sw_dac_swing_on, 918 u32 sw_dac_swing_lvl) 919 { 920 if (sw_dac_swing_on) 921 halbtc8821a2ant_set_dac_swing_reg(btcoexist, sw_dac_swing_lvl); 922 else 923 halbtc8821a2ant_set_dac_swing_reg(btcoexist, 0x18); 924 } 925 926 static void halbtc8821a2ant_dac_swing(struct btc_coexist *btcoexist, 927 bool force_exec, bool dac_swing_on, 928 u32 dac_swing_lvl) 929 { 930 struct rtl_priv *rtlpriv = btcoexist->adapter; 931 932 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 933 "[BTCoex], %s turn DacSwing = %s, dac_swing_lvl = 0x%x\n", 934 (force_exec ? "force to" : ""), 935 ((dac_swing_on) ? "ON" : "OFF"), 936 dac_swing_lvl); 937 coex_dm->cur_dac_swing_on = dac_swing_on; 938 coex_dm->cur_dac_swing_lvl = dac_swing_lvl; 939 940 if (!force_exec) { 941 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 942 "[BTCoex], pre_dac_swing_on = %d, pre_dac_swing_lvl = 0x%x, cur_dac_swing_on = %d, cur_dac_swing_lvl = 0x%x\n", 943 coex_dm->pre_dac_swing_on, 944 coex_dm->pre_dac_swing_lvl, 945 coex_dm->cur_dac_swing_on, 946 coex_dm->cur_dac_swing_lvl); 947 948 if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) && 949 (coex_dm->pre_dac_swing_lvl == 950 coex_dm->cur_dac_swing_lvl)) 951 return; 952 } 953 mdelay(30); 954 btc8821a2ant_set_sw_full_dac_swing(btcoexist, dac_swing_on, 955 dac_swing_lvl); 956 957 coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on; 958 coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl; 959 } 960 961 static void halbtc8821a2ant_set_adc_back_off(struct btc_coexist *btcoexist, 962 bool adc_back_off) 963 { 964 struct rtl_priv *rtlpriv = btcoexist->adapter; 965 966 if (adc_back_off) { 967 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 968 "[BTCoex], BB BackOff Level On!\n"); 969 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x8db, 0x60, 0x3); 970 } else { 971 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 972 "[BTCoex], BB BackOff Level Off!\n"); 973 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x8db, 0x60, 0x1); 974 } 975 } 976 977 static void halbtc8821a2ant_adc_back_off(struct btc_coexist *btcoexist, 978 bool force_exec, bool adc_back_off) 979 { 980 struct rtl_priv *rtlpriv = btcoexist->adapter; 981 982 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 983 "[BTCoex], %s turn AdcBackOff = %s\n", 984 (force_exec ? "force to" : ""), 985 ((adc_back_off) ? "ON" : "OFF")); 986 coex_dm->cur_adc_back_off = adc_back_off; 987 988 if (!force_exec) { 989 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 990 "[BTCoex], pre_adc_back_off = %d, cur_adc_back_off = %d\n", 991 coex_dm->pre_adc_back_off, 992 coex_dm->cur_adc_back_off); 993 994 if (coex_dm->pre_adc_back_off == coex_dm->cur_adc_back_off) 995 return; 996 } 997 halbtc8821a2ant_set_adc_back_off(btcoexist, coex_dm->cur_adc_back_off); 998 999 coex_dm->pre_adc_back_off = coex_dm->cur_adc_back_off; 1000 } 1001 1002 static void halbtc8821a2ant_set_coex_table(struct btc_coexist *btcoexist, 1003 u32 val0x6c0, u32 val0x6c4, 1004 u32 val0x6c8, u8 val0x6cc) 1005 { 1006 struct rtl_priv *rtlpriv = btcoexist->adapter; 1007 1008 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1009 "[BTCoex], set coex table, set 0x6c0 = 0x%x\n", val0x6c0); 1010 btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0); 1011 1012 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1013 "[BTCoex], set coex table, set 0x6c4 = 0x%x\n", val0x6c4); 1014 btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4); 1015 1016 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1017 "[BTCoex], set coex table, set 0x6c8 = 0x%x\n", val0x6c8); 1018 btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8); 1019 1020 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1021 "[BTCoex], set coex table, set 0x6cc = 0x%x\n", val0x6cc); 1022 btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc); 1023 } 1024 1025 static void halbtc8821a2ant_coex_table(struct btc_coexist *btcoexist, 1026 bool force_exec, u32 val0x6c0, 1027 u32 val0x6c4, u32 val0x6c8, u8 val0x6cc) 1028 { 1029 struct rtl_priv *rtlpriv = btcoexist->adapter; 1030 1031 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1032 "[BTCoex], %s write Coex Table 0x6c0 = 0x%x, 0x6c4 = 0x%x, 0x6c8 = 0x%x, 0x6cc = 0x%x\n", 1033 (force_exec ? "force to" : ""), 1034 val0x6c0, val0x6c4, val0x6c8, val0x6cc); 1035 coex_dm->cur_val0x6c0 = val0x6c0; 1036 coex_dm->cur_val0x6c4 = val0x6c4; 1037 coex_dm->cur_val0x6c8 = val0x6c8; 1038 coex_dm->cur_val0x6cc = val0x6cc; 1039 1040 if (!force_exec) { 1041 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1042 "[BTCoex], pre_val0x6c0 = 0x%x, pre_val0x6c4 = 0x%x, pre_val0x6c8 = 0x%x, pre_val0x6cc = 0x%x !!\n", 1043 coex_dm->pre_val0x6c0, 1044 coex_dm->pre_val0x6c4, 1045 coex_dm->pre_val0x6c8, 1046 coex_dm->pre_val0x6cc); 1047 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1048 "[BTCoex], cur_val0x6c0 = 0x%x, cur_val0x6c4 = 0x%x, cur_val0x6c8 = 0x%x, cur_val0x6cc = 0x%x !!\n", 1049 coex_dm->cur_val0x6c0, 1050 coex_dm->cur_val0x6c4, 1051 coex_dm->cur_val0x6c8, 1052 coex_dm->cur_val0x6cc); 1053 1054 if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) && 1055 (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) && 1056 (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) && 1057 (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc)) 1058 return; 1059 } 1060 halbtc8821a2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8, 1061 val0x6cc); 1062 1063 coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0; 1064 coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4; 1065 coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8; 1066 coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc; 1067 } 1068 1069 static void halbtc8821a2ant_set_fw_ignore_wlan_act(struct btc_coexist *btcoex, 1070 bool enable) 1071 { 1072 struct rtl_priv *rtlpriv = btcoex->adapter; 1073 u8 h2c_parameter[1] = {0}; 1074 1075 if (enable) 1076 h2c_parameter[0] |= BIT0;/* function enable */ 1077 1078 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1079 "[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63 = 0x%x\n", 1080 h2c_parameter[0]); 1081 1082 btcoex->btc_fill_h2c(btcoex, 0x63, 1, h2c_parameter); 1083 } 1084 1085 static void halbtc8821a2ant_ignore_wlan_act(struct btc_coexist *btcoexist, 1086 bool force_exec, bool enable) 1087 { 1088 struct rtl_priv *rtlpriv = btcoexist->adapter; 1089 1090 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1091 "[BTCoex], %s turn Ignore WlanAct %s\n", 1092 (force_exec ? "force to" : ""), (enable ? "ON" : "OFF")); 1093 coex_dm->cur_ignore_wlan_act = enable; 1094 1095 if (!force_exec) { 1096 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1097 "[BTCoex], pre_ignore_wlan_act = %d, cur_ignore_wlan_act = %d!!\n", 1098 coex_dm->pre_ignore_wlan_act, 1099 coex_dm->cur_ignore_wlan_act); 1100 1101 if (coex_dm->pre_ignore_wlan_act == 1102 coex_dm->cur_ignore_wlan_act) 1103 return; 1104 } 1105 halbtc8821a2ant_set_fw_ignore_wlan_act(btcoexist, enable); 1106 1107 coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act; 1108 } 1109 1110 static void halbtc8821a2ant_set_fw_pstdma(struct btc_coexist *btcoexist, 1111 u8 byte1, u8 byte2, u8 byte3, 1112 u8 byte4, u8 byte5) 1113 { 1114 struct rtl_priv *rtlpriv = btcoexist->adapter; 1115 u8 h2c_parameter[5]; 1116 1117 h2c_parameter[0] = byte1; 1118 h2c_parameter[1] = byte2; 1119 h2c_parameter[2] = byte3; 1120 h2c_parameter[3] = byte4; 1121 h2c_parameter[4] = byte5; 1122 1123 coex_dm->ps_tdma_para[0] = byte1; 1124 coex_dm->ps_tdma_para[1] = byte2; 1125 coex_dm->ps_tdma_para[2] = byte3; 1126 coex_dm->ps_tdma_para[3] = byte4; 1127 coex_dm->ps_tdma_para[4] = byte5; 1128 1129 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1130 "[BTCoex], FW write 0x60(5bytes) = 0x%x%08x\n", 1131 h2c_parameter[0], 1132 h2c_parameter[1] << 24 | 1133 h2c_parameter[2] << 16 | 1134 h2c_parameter[3] << 8 | 1135 h2c_parameter[4]); 1136 1137 btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter); 1138 } 1139 1140 static void btc8821a2ant_sw_mech1(struct btc_coexist *btcoexist, 1141 bool shrink_rx_lpf, 1142 bool low_penalty_ra, bool limited_dig, 1143 bool bt_lna_constrain) 1144 { 1145 u32 wifi_bw; 1146 1147 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 1148 1149 if (BTC_WIFI_BW_HT40 != wifi_bw) { 1150 /*only shrink RF Rx LPF for HT40*/ 1151 if (shrink_rx_lpf) 1152 shrink_rx_lpf = false; 1153 } 1154 1155 halbtc8821a2ant_RfShrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf); 1156 halbtc8821a2ant_low_penalty_ra(btcoexist, 1157 NORMAL_EXEC, low_penalty_ra); 1158 1159 /* no limited DIG 1160 * btc8821a2_set_bt_lna_const(btcoexist, 1161 NORMAL_EXEC, bBTLNAConstrain); 1162 */ 1163 } 1164 1165 static void btc8821a2ant_sw_mech2(struct btc_coexist *btcoexist, 1166 bool agc_table_shift, 1167 bool adc_back_off, bool sw_dac_swing, 1168 u32 dac_swing_lvl) 1169 { 1170 /* halbtc8821a2ant_AgcTable(btcoexist, NORMAL_EXEC, bAGCTableShift); */ 1171 halbtc8821a2ant_adc_back_off(btcoexist, NORMAL_EXEC, adc_back_off); 1172 halbtc8821a2ant_dac_swing(btcoexist, NORMAL_EXEC, sw_dac_swing, 1173 sw_dac_swing); 1174 } 1175 1176 static void halbtc8821a2ant_set_ant_path(struct btc_coexist *btcoexist, 1177 u8 ant_pos_type, bool init_hw_cfg, 1178 bool wifi_off) 1179 { 1180 struct btc_board_info *board_info = &btcoexist->board_info; 1181 u32 u4tmp = 0; 1182 u8 h2c_parameter[2] = {0}; 1183 1184 if (init_hw_cfg) { 1185 /* 0x4c[23] = 0, 0x4c[24] = 1 Antenna control by WL/BT */ 1186 u4tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c); 1187 u4tmp &= ~BIT23; 1188 u4tmp |= BIT24; 1189 btcoexist->btc_write_4byte(btcoexist, 0x4c, u4tmp); 1190 1191 btcoexist->btc_write_4byte(btcoexist, 0x974, 0x3ff); 1192 btcoexist->btc_write_1byte(btcoexist, 0xcb4, 0x77); 1193 1194 if (board_info->btdm_ant_pos == BTC_ANTENNA_AT_MAIN_PORT) { 1195 /* tell firmware "antenna inverse" ==> 1196 * WRONG firmware antenna control code. 1197 * ==>need fw to fix 1198 */ 1199 h2c_parameter[0] = 1; 1200 h2c_parameter[1] = 1; 1201 btcoexist->btc_fill_h2c(btcoexist, 0x65, 2, 1202 h2c_parameter); 1203 } else { 1204 /* tell firmware "no antenna inverse" 1205 * ==> WRONG firmware antenna control code. 1206 * ==>need fw to fix 1207 */ 1208 h2c_parameter[0] = 0; 1209 h2c_parameter[1] = 1; 1210 btcoexist->btc_fill_h2c(btcoexist, 0x65, 2, 1211 h2c_parameter); 1212 } 1213 } 1214 1215 /* ext switch setting */ 1216 switch (ant_pos_type) { 1217 case BTC_ANT_WIFI_AT_MAIN: 1218 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcb7, 0x30, 0x1); 1219 break; 1220 case BTC_ANT_WIFI_AT_AUX: 1221 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcb7, 0x30, 0x2); 1222 break; 1223 } 1224 } 1225 1226 static void halbtc8821a2ant_ps_tdma(struct btc_coexist *btcoexist, 1227 bool force_exec, bool turn_on, u8 type) 1228 { 1229 struct rtl_priv *rtlpriv = btcoexist->adapter; 1230 1231 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1232 "[BTCoex], %s turn %s PS TDMA, type = %d\n", 1233 (force_exec ? "force to" : ""), (turn_on ? "ON" : "OFF"), 1234 type); 1235 coex_dm->cur_ps_tdma_on = turn_on; 1236 coex_dm->cur_ps_tdma = type; 1237 1238 if (!force_exec) { 1239 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1240 "[BTCoex], pre_ps_tdma_on = %d, cur_ps_tdma_on = %d!!\n", 1241 coex_dm->pre_ps_tdma_on, coex_dm->cur_ps_tdma_on); 1242 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1243 "[BTCoex], pre_ps_tdma = %d, cur_ps_tdma = %d!!\n", 1244 coex_dm->pre_ps_tdma, coex_dm->cur_ps_tdma); 1245 1246 if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) && 1247 (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma)) 1248 return; 1249 } 1250 if (turn_on) { 1251 switch (type) { 1252 case 1: 1253 default: 1254 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1a, 1255 0x1a, 0xe1, 0x90); 1256 break; 1257 case 2: 1258 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x12, 1259 0x12, 0xe1, 0x90); 1260 break; 1261 case 3: 1262 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1c, 1263 0x3, 0xf1, 0x90); 1264 break; 1265 case 4: 1266 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x10, 1267 0x03, 0xf1, 0x90); 1268 break; 1269 case 5: 1270 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1a, 1271 0x1a, 0x60, 0x90); 1272 break; 1273 case 6: 1274 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x12, 1275 0x12, 0x60, 0x90); 1276 break; 1277 case 7: 1278 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1c, 1279 0x3, 0x70, 0x90); 1280 break; 1281 case 8: 1282 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xa3, 0x10, 1283 0x3, 0x70, 0x90); 1284 break; 1285 case 9: 1286 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1a, 1287 0x1a, 0xe1, 0x90); 1288 break; 1289 case 10: 1290 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x12, 1291 0x12, 0xe1, 0x90); 1292 break; 1293 case 11: 1294 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0xa, 1295 0xa, 0xe1, 0x90); 1296 break; 1297 case 12: 1298 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x5, 1299 0x5, 0xe1, 0x90); 1300 break; 1301 case 13: 1302 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1a, 1303 0x1a, 0x60, 0x90); 1304 break; 1305 case 14: 1306 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 1307 0x12, 0x12, 0x60, 0x90); 1308 break; 1309 case 15: 1310 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0xa, 1311 0xa, 0x60, 0x90); 1312 break; 1313 case 16: 1314 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x5, 1315 0x5, 0x60, 0x90); 1316 break; 1317 case 17: 1318 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xa3, 0x2f, 1319 0x2f, 0x60, 0x90); 1320 break; 1321 case 18: 1322 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x5, 1323 0x5, 0xe1, 0x90); 1324 break; 1325 case 19: 1326 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x25, 1327 0x25, 0xe1, 0x90); 1328 break; 1329 case 20: 1330 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x25, 1331 0x25, 0x60, 0x90); 1332 break; 1333 case 21: 1334 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x15, 1335 0x03, 0x70, 0x90); 1336 break; 1337 case 71: 1338 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1a, 1339 0x1a, 0xe1, 0x90); 1340 break; 1341 } 1342 } else { 1343 /* disable PS tdma */ 1344 switch (type) { 1345 case 0: 1346 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0x0, 0x0, 0x0, 1347 0x40, 0x0); 1348 break; 1349 case 1: 1350 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0x0, 0x0, 0x0, 1351 0x48, 0x0); 1352 break; 1353 default: 1354 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0x0, 0x0, 0x0, 1355 0x40, 0x0); 1356 break; 1357 } 1358 } 1359 1360 /* update pre state */ 1361 coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on; 1362 coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma; 1363 } 1364 1365 static void halbtc8821a2ant_coex_all_off(struct btc_coexist *btcoexist) 1366 { 1367 /* fw all off */ 1368 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); 1369 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 1370 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); 1371 1372 /* sw all off */ 1373 btc8821a2ant_sw_mech1(btcoexist, false, false, false, false); 1374 btc8821a2ant_sw_mech2(btcoexist, false, false, false, 0x18); 1375 1376 /* hw all off */ 1377 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 1378 0x55555555, 0x55555555, 0xffff, 0x3); 1379 } 1380 1381 static void halbtc8821a2ant_coex_under_5g(struct btc_coexist *btcoexist) 1382 { 1383 halbtc8821a2ant_coex_all_off(btcoexist); 1384 } 1385 1386 static void halbtc8821a2ant_init_coex_dm(struct btc_coexist *btcoexist) 1387 { 1388 /* force to reset coex mechanism */ 1389 halbtc8821a2ant_coex_table(btcoexist, FORCE_EXEC, 0x55555555, 1390 0x55555555, 0xffff, 0x3); 1391 1392 halbtc8821a2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1); 1393 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6); 1394 halbtc8821a2ant_dec_bt_pwr(btcoexist, FORCE_EXEC, false); 1395 1396 btc8821a2ant_sw_mech1(btcoexist, false, false, false, false); 1397 btc8821a2ant_sw_mech2(btcoexist, false, false, false, 0x18); 1398 } 1399 1400 static void halbtc8821a2ant_bt_inquiry_page(struct btc_coexist *btcoexist) 1401 { 1402 bool low_pwr_disable = true; 1403 1404 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER, 1405 &low_pwr_disable); 1406 1407 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff, 1408 0x5afa5afa, 0xffff, 0x3); 1409 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3); 1410 } 1411 1412 static bool halbtc8821a2ant_is_common_action(struct btc_coexist *btcoexist) 1413 { 1414 struct rtl_priv *rtlpriv = btcoexist->adapter; 1415 bool common = false, wifi_connected = false, wifi_busy = false; 1416 bool low_pwr_disable = false; 1417 1418 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, 1419 &wifi_connected); 1420 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); 1421 1422 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff, 1423 0x5afa5afa, 0xffff, 0x3); 1424 1425 if (!wifi_connected && 1426 BT_8821A_2ANT_BT_STATUS_IDLE == coex_dm->bt_status) { 1427 low_pwr_disable = false; 1428 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER, 1429 &low_pwr_disable); 1430 1431 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1432 "[BTCoex], Wifi IPS + BT IPS!!\n"); 1433 1434 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); 1435 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 1436 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); 1437 1438 btc8821a2ant_sw_mech1(btcoexist, false, false, false, false); 1439 btc8821a2ant_sw_mech2(btcoexist, false, false, false, 0x18); 1440 1441 common = true; 1442 } else if (wifi_connected && 1443 (BT_8821A_2ANT_BT_STATUS_IDLE == coex_dm->bt_status)) { 1444 low_pwr_disable = false; 1445 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER, 1446 &low_pwr_disable); 1447 1448 if (wifi_busy) { 1449 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1450 "[BTCoex], Wifi Busy + BT IPS!!\n"); 1451 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1452 false, 1); 1453 } else { 1454 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1455 "[BTCoex], Wifi LPS + BT IPS!!\n"); 1456 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1457 false, 1); 1458 } 1459 1460 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 1461 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); 1462 1463 btc8821a2ant_sw_mech1(btcoexist, false, false, false, false); 1464 btc8821a2ant_sw_mech2(btcoexist, false, false, false, 0x18); 1465 1466 common = true; 1467 } else if (!wifi_connected && 1468 (BT_8821A_2ANT_BT_STATUS_CON_IDLE == coex_dm->bt_status)) { 1469 low_pwr_disable = true; 1470 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER, 1471 &low_pwr_disable); 1472 1473 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1474 "[BTCoex], Wifi IPS + BT LPS!!\n"); 1475 1476 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); 1477 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 1478 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); 1479 1480 btc8821a2ant_sw_mech1(btcoexist, false, false, false, false); 1481 btc8821a2ant_sw_mech2(btcoexist, false, false, false, 0x18); 1482 common = true; 1483 } else if (wifi_connected && 1484 (BT_8821A_2ANT_BT_STATUS_CON_IDLE == coex_dm->bt_status)) { 1485 low_pwr_disable = true; 1486 btcoexist->btc_set(btcoexist, 1487 BTC_SET_ACT_DISABLE_LOW_POWER, &low_pwr_disable); 1488 1489 if (wifi_busy) { 1490 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1491 "[BTCoex], Wifi Busy + BT LPS!!\n"); 1492 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1493 false, 1); 1494 } else { 1495 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1496 "[BTCoex], Wifi LPS + BT LPS!!\n"); 1497 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1498 false, 1); 1499 } 1500 1501 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 1502 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); 1503 1504 btc8821a2ant_sw_mech1(btcoexist, true, true, true, true); 1505 btc8821a2ant_sw_mech2(btcoexist, false, false, false, 0x18); 1506 1507 common = true; 1508 } else if (!wifi_connected && 1509 (BT_8821A_2ANT_BT_STATUS_NON_IDLE == 1510 coex_dm->bt_status)) { 1511 low_pwr_disable = false; 1512 btcoexist->btc_set(btcoexist, 1513 BTC_SET_ACT_DISABLE_LOW_POWER, &low_pwr_disable); 1514 1515 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1516 "[BTCoex], Wifi IPS + BT Busy!!\n"); 1517 1518 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); 1519 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 1520 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); 1521 1522 btc8821a2ant_sw_mech1(btcoexist, false, false, 1523 false, false); 1524 btc8821a2ant_sw_mech2(btcoexist, false, false, 1525 false, 0x18); 1526 1527 common = true; 1528 } else { 1529 low_pwr_disable = true; 1530 btcoexist->btc_set(btcoexist, 1531 BTC_SET_ACT_DISABLE_LOW_POWER, 1532 &low_pwr_disable); 1533 1534 if (wifi_busy) { 1535 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1536 "[BTCoex], Wifi Busy + BT Busy!!\n"); 1537 common = false; 1538 } else { 1539 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1540 "[BTCoex], Wifi LPS + BT Busy!!\n"); 1541 halbtc8821a2ant_ps_tdma(btcoexist, 1542 NORMAL_EXEC, true, 21); 1543 1544 if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist)) 1545 halbtc8821a2ant_dec_bt_pwr(btcoexist, 1546 NORMAL_EXEC, true); 1547 else 1548 halbtc8821a2ant_dec_bt_pwr(btcoexist, 1549 NORMAL_EXEC, false); 1550 1551 common = true; 1552 } 1553 btc8821a2ant_sw_mech1(btcoexist, true, true, true, true); 1554 } 1555 return common; 1556 } 1557 1558 static void btc8821a2_int1(struct btc_coexist *btcoexist, bool tx_pause, 1559 int result) 1560 { 1561 struct rtl_priv *rtlpriv = btcoexist->adapter; 1562 1563 if (tx_pause) { 1564 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1565 "[BTCoex], TxPause = 1\n"); 1566 1567 if (coex_dm->cur_ps_tdma == 71) { 1568 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1569 true, 5); 1570 coex_dm->tdma_adj_type = 5; 1571 } else if (coex_dm->cur_ps_tdma == 1) { 1572 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1573 true, 5); 1574 coex_dm->tdma_adj_type = 5; 1575 } else if (coex_dm->cur_ps_tdma == 2) { 1576 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1577 true, 6); 1578 coex_dm->tdma_adj_type = 6; 1579 } else if (coex_dm->cur_ps_tdma == 3) { 1580 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1581 true, 7); 1582 coex_dm->tdma_adj_type = 7; 1583 } else if (coex_dm->cur_ps_tdma == 4) { 1584 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1585 true, 8); 1586 coex_dm->tdma_adj_type = 8; 1587 } 1588 if (coex_dm->cur_ps_tdma == 9) { 1589 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1590 true, 13); 1591 coex_dm->tdma_adj_type = 13; 1592 } else if (coex_dm->cur_ps_tdma == 10) { 1593 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1594 true, 14); 1595 coex_dm->tdma_adj_type = 14; 1596 } else if (coex_dm->cur_ps_tdma == 11) { 1597 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1598 true, 15); 1599 coex_dm->tdma_adj_type = 15; 1600 } else if (coex_dm->cur_ps_tdma == 12) { 1601 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1602 true, 16); 1603 coex_dm->tdma_adj_type = 16; 1604 } 1605 1606 if (result == -1) { 1607 if (coex_dm->cur_ps_tdma == 5) { 1608 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1609 true, 6); 1610 coex_dm->tdma_adj_type = 6; 1611 } else if (coex_dm->cur_ps_tdma == 6) { 1612 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1613 true, 7); 1614 coex_dm->tdma_adj_type = 7; 1615 } else if (coex_dm->cur_ps_tdma == 7) { 1616 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1617 true, 8); 1618 coex_dm->tdma_adj_type = 8; 1619 } else if (coex_dm->cur_ps_tdma == 13) { 1620 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1621 true, 14); 1622 coex_dm->tdma_adj_type = 14; 1623 } else if (coex_dm->cur_ps_tdma == 14) { 1624 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1625 true, 15); 1626 coex_dm->tdma_adj_type = 15; 1627 } else if (coex_dm->cur_ps_tdma == 15) { 1628 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1629 true, 16); 1630 coex_dm->tdma_adj_type = 16; 1631 } 1632 } else if (result == 1) { 1633 if (coex_dm->cur_ps_tdma == 8) { 1634 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1635 true, 7); 1636 coex_dm->tdma_adj_type = 7; 1637 } else if (coex_dm->cur_ps_tdma == 7) { 1638 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1639 true, 6); 1640 coex_dm->tdma_adj_type = 6; 1641 } else if (coex_dm->cur_ps_tdma == 6) { 1642 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1643 true, 5); 1644 coex_dm->tdma_adj_type = 5; 1645 } else if (coex_dm->cur_ps_tdma == 16) { 1646 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1647 true, 15); 1648 coex_dm->tdma_adj_type = 15; 1649 } else if (coex_dm->cur_ps_tdma == 15) { 1650 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1651 true, 14); 1652 coex_dm->tdma_adj_type = 14; 1653 } else if (coex_dm->cur_ps_tdma == 14) { 1654 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1655 true, 13); 1656 coex_dm->tdma_adj_type = 13; 1657 } 1658 } 1659 } else { 1660 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1661 "[BTCoex], TxPause = 0\n"); 1662 if (coex_dm->cur_ps_tdma == 5) { 1663 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1664 true, 71); 1665 coex_dm->tdma_adj_type = 71; 1666 } else if (coex_dm->cur_ps_tdma == 6) { 1667 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1668 true, 2); 1669 coex_dm->tdma_adj_type = 2; 1670 } else if (coex_dm->cur_ps_tdma == 7) { 1671 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1672 true, 3); 1673 coex_dm->tdma_adj_type = 3; 1674 } else if (coex_dm->cur_ps_tdma == 8) { 1675 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1676 true, 4); 1677 coex_dm->tdma_adj_type = 4; 1678 } 1679 if (coex_dm->cur_ps_tdma == 13) { 1680 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1681 true, 9); 1682 coex_dm->tdma_adj_type = 9; 1683 } else if (coex_dm->cur_ps_tdma == 14) { 1684 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1685 true, 10); 1686 coex_dm->tdma_adj_type = 10; 1687 } else if (coex_dm->cur_ps_tdma == 15) { 1688 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1689 true, 11); 1690 coex_dm->tdma_adj_type = 11; 1691 } else if (coex_dm->cur_ps_tdma == 16) { 1692 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1693 true, 12); 1694 coex_dm->tdma_adj_type = 12; 1695 } 1696 1697 if (result == -1) { 1698 if (coex_dm->cur_ps_tdma == 71) { 1699 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1700 true, 1); 1701 coex_dm->tdma_adj_type = 1; 1702 } else if (coex_dm->cur_ps_tdma == 1) { 1703 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1704 true, 2); 1705 coex_dm->tdma_adj_type = 2; 1706 } else if (coex_dm->cur_ps_tdma == 2) { 1707 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1708 true, 3); 1709 coex_dm->tdma_adj_type = 3; 1710 } else if (coex_dm->cur_ps_tdma == 3) { 1711 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1712 true, 4); 1713 coex_dm->tdma_adj_type = 4; 1714 } else if (coex_dm->cur_ps_tdma == 9) { 1715 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1716 true, 10); 1717 coex_dm->tdma_adj_type = 10; 1718 } else if (coex_dm->cur_ps_tdma == 10) { 1719 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1720 true, 11); 1721 coex_dm->tdma_adj_type = 11; 1722 } else if (coex_dm->cur_ps_tdma == 11) { 1723 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1724 true, 12); 1725 coex_dm->tdma_adj_type = 12; 1726 } 1727 } else if (result == 1) { 1728 if (coex_dm->cur_ps_tdma == 4) { 1729 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1730 true, 3); 1731 coex_dm->tdma_adj_type = 3; 1732 } else if (coex_dm->cur_ps_tdma == 3) { 1733 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1734 true, 2); 1735 coex_dm->tdma_adj_type = 2; 1736 } else if (coex_dm->cur_ps_tdma == 2) { 1737 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1738 true, 1); 1739 coex_dm->tdma_adj_type = 1; 1740 } else if (coex_dm->cur_ps_tdma == 1) { 1741 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1742 true, 71); 1743 coex_dm->tdma_adj_type = 71; 1744 } else if (coex_dm->cur_ps_tdma == 12) { 1745 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1746 true, 11); 1747 coex_dm->tdma_adj_type = 11; 1748 } else if (coex_dm->cur_ps_tdma == 11) { 1749 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1750 true, 10); 1751 coex_dm->tdma_adj_type = 10; 1752 } else if (coex_dm->cur_ps_tdma == 10) { 1753 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1754 true, 9); 1755 coex_dm->tdma_adj_type = 9; 1756 } 1757 } 1758 } 1759 } 1760 1761 static void btc8821a2_int2(struct btc_coexist *btcoexist, bool tx_pause, 1762 int result) 1763 { 1764 struct rtl_priv *rtlpriv = btcoexist->adapter; 1765 1766 if (tx_pause) { 1767 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1768 "[BTCoex], TxPause = 1\n"); 1769 if (coex_dm->cur_ps_tdma == 1) { 1770 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1771 true, 6); 1772 coex_dm->tdma_adj_type = 6; 1773 } else if (coex_dm->cur_ps_tdma == 2) { 1774 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1775 true, 6); 1776 coex_dm->tdma_adj_type = 6; 1777 } else if (coex_dm->cur_ps_tdma == 3) { 1778 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1779 true, 7); 1780 coex_dm->tdma_adj_type = 7; 1781 } else if (coex_dm->cur_ps_tdma == 4) { 1782 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1783 true, 8); 1784 coex_dm->tdma_adj_type = 8; 1785 } 1786 if (coex_dm->cur_ps_tdma == 9) { 1787 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1788 true, 14); 1789 coex_dm->tdma_adj_type = 14; 1790 } else if (coex_dm->cur_ps_tdma == 10) { 1791 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1792 true, 14); 1793 coex_dm->tdma_adj_type = 14; 1794 } else if (coex_dm->cur_ps_tdma == 11) { 1795 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1796 true, 15); 1797 coex_dm->tdma_adj_type = 15; 1798 } else if (coex_dm->cur_ps_tdma == 12) { 1799 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1800 true, 16); 1801 coex_dm->tdma_adj_type = 16; 1802 } 1803 if (result == -1) { 1804 if (coex_dm->cur_ps_tdma == 5) { 1805 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1806 true, 6); 1807 coex_dm->tdma_adj_type = 6; 1808 } else if (coex_dm->cur_ps_tdma == 6) { 1809 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1810 true, 7); 1811 coex_dm->tdma_adj_type = 7; 1812 } else if (coex_dm->cur_ps_tdma == 7) { 1813 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1814 true, 8); 1815 coex_dm->tdma_adj_type = 8; 1816 } else if (coex_dm->cur_ps_tdma == 13) { 1817 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1818 true, 14); 1819 coex_dm->tdma_adj_type = 14; 1820 } else if (coex_dm->cur_ps_tdma == 14) { 1821 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1822 true, 15); 1823 coex_dm->tdma_adj_type = 15; 1824 } else if (coex_dm->cur_ps_tdma == 15) { 1825 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1826 true, 16); 1827 coex_dm->tdma_adj_type = 16; 1828 } 1829 } else if (result == 1) { 1830 if (coex_dm->cur_ps_tdma == 8) { 1831 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1832 true, 7); 1833 coex_dm->tdma_adj_type = 7; 1834 } else if (coex_dm->cur_ps_tdma == 7) { 1835 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1836 true, 6); 1837 coex_dm->tdma_adj_type = 6; 1838 } else if (coex_dm->cur_ps_tdma == 6) { 1839 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1840 true, 6); 1841 coex_dm->tdma_adj_type = 6; 1842 } else if (coex_dm->cur_ps_tdma == 16) { 1843 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1844 true, 15); 1845 coex_dm->tdma_adj_type = 15; 1846 } else if (coex_dm->cur_ps_tdma == 15) { 1847 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1848 true, 14); 1849 coex_dm->tdma_adj_type = 14; 1850 } else if (coex_dm->cur_ps_tdma == 14) { 1851 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1852 true, 14); 1853 coex_dm->tdma_adj_type = 14; 1854 } 1855 } 1856 } else { 1857 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1858 "[BTCoex], TxPause = 0\n"); 1859 if (coex_dm->cur_ps_tdma == 5) { 1860 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1861 true, 2); 1862 coex_dm->tdma_adj_type = 2; 1863 } else if (coex_dm->cur_ps_tdma == 6) { 1864 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1865 true, 2); 1866 coex_dm->tdma_adj_type = 2; 1867 } else if (coex_dm->cur_ps_tdma == 7) { 1868 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1869 true, 3); 1870 coex_dm->tdma_adj_type = 3; 1871 } else if (coex_dm->cur_ps_tdma == 8) { 1872 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1873 true, 4); 1874 coex_dm->tdma_adj_type = 4; 1875 } 1876 if (coex_dm->cur_ps_tdma == 13) { 1877 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1878 true, 10); 1879 coex_dm->tdma_adj_type = 10; 1880 } else if (coex_dm->cur_ps_tdma == 14) { 1881 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1882 true, 10); 1883 coex_dm->tdma_adj_type = 10; 1884 } else if (coex_dm->cur_ps_tdma == 15) { 1885 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1886 true, 11); 1887 coex_dm->tdma_adj_type = 11; 1888 } else if (coex_dm->cur_ps_tdma == 16) { 1889 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1890 true, 12); 1891 coex_dm->tdma_adj_type = 12; 1892 } 1893 if (result == -1) { 1894 if (coex_dm->cur_ps_tdma == 1) { 1895 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1896 true, 2); 1897 coex_dm->tdma_adj_type = 2; 1898 } else if (coex_dm->cur_ps_tdma == 2) { 1899 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1900 true, 3); 1901 coex_dm->tdma_adj_type = 3; 1902 } else if (coex_dm->cur_ps_tdma == 3) { 1903 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1904 true, 4); 1905 coex_dm->tdma_adj_type = 4; 1906 } else if (coex_dm->cur_ps_tdma == 9) { 1907 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1908 true, 10); 1909 coex_dm->tdma_adj_type = 10; 1910 } else if (coex_dm->cur_ps_tdma == 10) { 1911 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1912 true, 11); 1913 coex_dm->tdma_adj_type = 11; 1914 } else if (coex_dm->cur_ps_tdma == 11) { 1915 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1916 true, 12); 1917 coex_dm->tdma_adj_type = 12; 1918 } 1919 } else if (result == 1) { 1920 if (coex_dm->cur_ps_tdma == 4) { 1921 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1922 true, 3); 1923 coex_dm->tdma_adj_type = 3; 1924 } else if (coex_dm->cur_ps_tdma == 3) { 1925 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1926 true, 2); 1927 coex_dm->tdma_adj_type = 2; 1928 } else if (coex_dm->cur_ps_tdma == 2) { 1929 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1930 true, 2); 1931 coex_dm->tdma_adj_type = 2; 1932 } else if (coex_dm->cur_ps_tdma == 12) { 1933 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1934 true, 11); 1935 coex_dm->tdma_adj_type = 11; 1936 } else if (coex_dm->cur_ps_tdma == 11) { 1937 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1938 true, 10); 1939 coex_dm->tdma_adj_type = 10; 1940 } else if (coex_dm->cur_ps_tdma == 10) { 1941 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1942 true, 10); 1943 coex_dm->tdma_adj_type = 10; 1944 } 1945 } 1946 } 1947 } 1948 1949 static void btc8821a2_int3(struct btc_coexist *btcoexist, bool tx_pause, 1950 int result) 1951 { 1952 struct rtl_priv *rtlpriv = btcoexist->adapter; 1953 1954 if (tx_pause) { 1955 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1956 "[BTCoex], TxPause = 1\n"); 1957 if (coex_dm->cur_ps_tdma == 1) { 1958 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1959 true, 7); 1960 coex_dm->tdma_adj_type = 7; 1961 } else if (coex_dm->cur_ps_tdma == 2) { 1962 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1963 true, 7); 1964 coex_dm->tdma_adj_type = 7; 1965 } else if (coex_dm->cur_ps_tdma == 3) { 1966 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1967 true, 7); 1968 coex_dm->tdma_adj_type = 7; 1969 } else if (coex_dm->cur_ps_tdma == 4) { 1970 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1971 true, 8); 1972 coex_dm->tdma_adj_type = 8; 1973 } 1974 if (coex_dm->cur_ps_tdma == 9) { 1975 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1976 true, 15); 1977 coex_dm->tdma_adj_type = 15; 1978 } else if (coex_dm->cur_ps_tdma == 10) { 1979 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1980 true, 15); 1981 coex_dm->tdma_adj_type = 15; 1982 } else if (coex_dm->cur_ps_tdma == 11) { 1983 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1984 true, 15); 1985 coex_dm->tdma_adj_type = 15; 1986 } else if (coex_dm->cur_ps_tdma == 12) { 1987 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1988 true, 16); 1989 coex_dm->tdma_adj_type = 16; 1990 } 1991 if (result == -1) { 1992 if (coex_dm->cur_ps_tdma == 5) { 1993 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1994 true, 7); 1995 coex_dm->tdma_adj_type = 7; 1996 } else if (coex_dm->cur_ps_tdma == 6) { 1997 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1998 true, 7); 1999 coex_dm->tdma_adj_type = 7; 2000 } else if (coex_dm->cur_ps_tdma == 7) { 2001 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2002 true, 8); 2003 coex_dm->tdma_adj_type = 8; 2004 } else if (coex_dm->cur_ps_tdma == 13) { 2005 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2006 true, 15); 2007 coex_dm->tdma_adj_type = 15; 2008 } else if (coex_dm->cur_ps_tdma == 14) { 2009 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2010 true, 15); 2011 coex_dm->tdma_adj_type = 15; 2012 } else if (coex_dm->cur_ps_tdma == 15) { 2013 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2014 true, 16); 2015 coex_dm->tdma_adj_type = 16; 2016 } 2017 } else if (result == 1) { 2018 if (coex_dm->cur_ps_tdma == 8) { 2019 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2020 true, 7); 2021 coex_dm->tdma_adj_type = 7; 2022 } else if (coex_dm->cur_ps_tdma == 7) { 2023 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2024 true, 7); 2025 coex_dm->tdma_adj_type = 7; 2026 } else if (coex_dm->cur_ps_tdma == 6) { 2027 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2028 true, 7); 2029 coex_dm->tdma_adj_type = 7; 2030 } else if (coex_dm->cur_ps_tdma == 16) { 2031 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2032 true, 15); 2033 coex_dm->tdma_adj_type = 15; 2034 } else if (coex_dm->cur_ps_tdma == 15) { 2035 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2036 true, 15); 2037 coex_dm->tdma_adj_type = 15; 2038 } else if (coex_dm->cur_ps_tdma == 14) { 2039 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2040 true, 15); 2041 coex_dm->tdma_adj_type = 15; 2042 } 2043 } 2044 } else { 2045 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2046 "[BTCoex], TxPause = 0\n"); 2047 if (coex_dm->cur_ps_tdma == 5) { 2048 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2049 true, 3); 2050 coex_dm->tdma_adj_type = 3; 2051 } else if (coex_dm->cur_ps_tdma == 6) { 2052 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2053 true, 3); 2054 coex_dm->tdma_adj_type = 3; 2055 } else if (coex_dm->cur_ps_tdma == 7) { 2056 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2057 true, 3); 2058 coex_dm->tdma_adj_type = 3; 2059 } else if (coex_dm->cur_ps_tdma == 8) { 2060 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2061 true, 4); 2062 coex_dm->tdma_adj_type = 4; 2063 } 2064 if (coex_dm->cur_ps_tdma == 13) { 2065 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2066 true, 11); 2067 coex_dm->tdma_adj_type = 11; 2068 } else if (coex_dm->cur_ps_tdma == 14) { 2069 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2070 true, 11); 2071 coex_dm->tdma_adj_type = 11; 2072 } else if (coex_dm->cur_ps_tdma == 15) { 2073 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2074 true, 11); 2075 coex_dm->tdma_adj_type = 11; 2076 } else if (coex_dm->cur_ps_tdma == 16) { 2077 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2078 true, 12); 2079 coex_dm->tdma_adj_type = 12; 2080 } 2081 if (result == -1) { 2082 if (coex_dm->cur_ps_tdma == 1) { 2083 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2084 true, 3); 2085 coex_dm->tdma_adj_type = 3; 2086 } else if (coex_dm->cur_ps_tdma == 2) { 2087 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2088 true, 3); 2089 coex_dm->tdma_adj_type = 3; 2090 } else if (coex_dm->cur_ps_tdma == 3) { 2091 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2092 true, 4); 2093 coex_dm->tdma_adj_type = 4; 2094 } else if (coex_dm->cur_ps_tdma == 9) { 2095 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2096 true, 11); 2097 coex_dm->tdma_adj_type = 11; 2098 } else if (coex_dm->cur_ps_tdma == 10) { 2099 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2100 true, 11); 2101 coex_dm->tdma_adj_type = 11; 2102 } else if (coex_dm->cur_ps_tdma == 11) { 2103 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2104 true, 12); 2105 coex_dm->tdma_adj_type = 12; 2106 } 2107 } else if (result == 1) { 2108 if (coex_dm->cur_ps_tdma == 4) { 2109 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2110 true, 3); 2111 coex_dm->tdma_adj_type = 3; 2112 } else if (coex_dm->cur_ps_tdma == 3) { 2113 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2114 true, 3); 2115 coex_dm->tdma_adj_type = 3; 2116 } else if (coex_dm->cur_ps_tdma == 2) { 2117 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2118 true, 3); 2119 coex_dm->tdma_adj_type = 3; 2120 } else if (coex_dm->cur_ps_tdma == 12) { 2121 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2122 true, 11); 2123 coex_dm->tdma_adj_type = 11; 2124 } else if (coex_dm->cur_ps_tdma == 11) { 2125 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2126 true, 11); 2127 coex_dm->tdma_adj_type = 11; 2128 } else if (coex_dm->cur_ps_tdma == 10) { 2129 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2130 true, 11); 2131 coex_dm->tdma_adj_type = 11; 2132 } 2133 } 2134 } 2135 } 2136 2137 static void btc8821a2ant_tdma_dur_adj(struct btc_coexist *btcoexist, 2138 bool sco_hid, bool tx_pause, 2139 u8 max_interval) 2140 { 2141 struct rtl_priv *rtlpriv = btcoexist->adapter; 2142 static long up, dn, m, n, wait_count; 2143 /* 0: no change, +1: increase WiFi duration, 2144 * -1: decrease WiFi duration 2145 */ 2146 int result; 2147 u8 retry_count = 0; 2148 2149 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2150 "[BTCoex], TdmaDurationAdjust()\n"); 2151 2152 if (coex_dm->reset_tdma_adjust) { 2153 coex_dm->reset_tdma_adjust = false; 2154 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2155 "[BTCoex], first run TdmaDurationAdjust()!!\n"); 2156 if (sco_hid) { 2157 if (tx_pause) { 2158 if (max_interval == 1) { 2159 halbtc8821a2ant_ps_tdma(btcoexist, 2160 NORMAL_EXEC, 2161 true, 13); 2162 coex_dm->tdma_adj_type = 13; 2163 } else if (max_interval == 2) { 2164 halbtc8821a2ant_ps_tdma(btcoexist, 2165 NORMAL_EXEC, 2166 true, 14); 2167 coex_dm->tdma_adj_type = 14; 2168 } else { 2169 halbtc8821a2ant_ps_tdma(btcoexist, 2170 NORMAL_EXEC, 2171 true, 15); 2172 coex_dm->tdma_adj_type = 15; 2173 } 2174 } else { 2175 if (max_interval == 1) { 2176 halbtc8821a2ant_ps_tdma(btcoexist, 2177 NORMAL_EXEC, 2178 true, 9); 2179 coex_dm->tdma_adj_type = 9; 2180 } else if (max_interval == 2) { 2181 halbtc8821a2ant_ps_tdma(btcoexist, 2182 NORMAL_EXEC, 2183 true, 10); 2184 coex_dm->tdma_adj_type = 10; 2185 } else { 2186 halbtc8821a2ant_ps_tdma(btcoexist, 2187 NORMAL_EXEC, 2188 true, 11); 2189 coex_dm->tdma_adj_type = 11; 2190 } 2191 } 2192 } else { 2193 if (tx_pause) { 2194 if (max_interval == 1) { 2195 halbtc8821a2ant_ps_tdma(btcoexist, 2196 NORMAL_EXEC, 2197 true, 5); 2198 coex_dm->tdma_adj_type = 5; 2199 } else if (max_interval == 2) { 2200 halbtc8821a2ant_ps_tdma(btcoexist, 2201 NORMAL_EXEC, 2202 true, 6); 2203 coex_dm->tdma_adj_type = 6; 2204 } else { 2205 halbtc8821a2ant_ps_tdma(btcoexist, 2206 NORMAL_EXEC, 2207 true, 7); 2208 coex_dm->tdma_adj_type = 7; 2209 } 2210 } else { 2211 if (max_interval == 1) { 2212 halbtc8821a2ant_ps_tdma(btcoexist, 2213 NORMAL_EXEC, 2214 true, 1); 2215 coex_dm->tdma_adj_type = 1; 2216 } else if (max_interval == 2) { 2217 halbtc8821a2ant_ps_tdma(btcoexist, 2218 NORMAL_EXEC, 2219 true, 2); 2220 coex_dm->tdma_adj_type = 2; 2221 } else { 2222 halbtc8821a2ant_ps_tdma(btcoexist, 2223 NORMAL_EXEC, 2224 true, 3); 2225 coex_dm->tdma_adj_type = 3; 2226 } 2227 } 2228 } 2229 2230 up = 0; 2231 dn = 0; 2232 m = 1; 2233 n = 3; 2234 result = 0; 2235 wait_count = 0; 2236 } else { 2237 /* accquire the BT TRx retry count from BT_Info byte2 */ 2238 retry_count = coex_sta->bt_retry_cnt; 2239 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2240 "[BTCoex], retry_count = %d\n", retry_count); 2241 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2242 "[BTCoex], up = %d, dn = %d, m = %d, n = %d, wait_count = %d\n", 2243 (int)up, (int)dn, (int)m, (int)n, (int)wait_count); 2244 result = 0; 2245 wait_count++; 2246 2247 if (retry_count == 0) { 2248 /* no retry in the last 2-second duration */ 2249 up++; 2250 dn--; 2251 2252 if (dn <= 0) 2253 dn = 0; 2254 2255 if (up >= n) { 2256 /* if (retry count == 0) for 2*n seconds, 2257 * make WiFi duration wider 2258 */ 2259 wait_count = 0; 2260 n = 3; 2261 up = 0; 2262 dn = 0; 2263 result = 1; 2264 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2265 "[BTCoex], Increase wifi duration!!\n"); 2266 } 2267 } else if (retry_count <= 3) { 2268 /* <=3 retry in the last 2-second duration */ 2269 up--; 2270 dn++; 2271 2272 if (up <= 0) 2273 up = 0; 2274 2275 if (dn == 2) { 2276 /* if retry count< 3 for 2*2 seconds, 2277 * shrink wifi duration 2278 */ 2279 if (wait_count <= 2) 2280 m++; /* avoid bounce in two levels */ 2281 else 2282 m = 1; 2283 /* m max value is 20, max time is 120 second, 2284 * recheck if adjust WiFi duration. 2285 */ 2286 if (m >= 20) 2287 m = 20; 2288 2289 n = 3*m; 2290 up = 0; 2291 dn = 0; 2292 wait_count = 0; 2293 result = -1; 2294 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2295 "[BTCoex], Decrease wifi duration for retryCounter<3!!\n"); 2296 } 2297 } else { 2298 /* retry count > 3, if retry count > 3 happens once, 2299 * shrink WiFi duration 2300 */ 2301 if (wait_count == 1) 2302 m++; /* avoid bounce in two levels */ 2303 else 2304 m = 1; 2305 /* m max value is 20, max time is 120 second, 2306 * recheck if adjust WiFi duration. 2307 */ 2308 if (m >= 20) 2309 m = 20; 2310 2311 n = 3*m; 2312 up = 0; 2313 dn = 0; 2314 wait_count = 0; 2315 result = -1; 2316 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2317 "[BTCoex], Decrease wifi duration for retryCounter>3!!\n"); 2318 } 2319 2320 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2321 "[BTCoex], max Interval = %d\n", max_interval); 2322 if (max_interval == 1) 2323 btc8821a2_int1(btcoexist, tx_pause, result); 2324 else if (max_interval == 2) 2325 btc8821a2_int2(btcoexist, tx_pause, result); 2326 else if (max_interval == 3) 2327 btc8821a2_int3(btcoexist, tx_pause, result); 2328 } 2329 2330 /* if current PsTdma not match with the recorded one 2331 * (when scan, dhcp...), then we have to adjust it back to 2332 * the previous recorded one. 2333 */ 2334 if (coex_dm->cur_ps_tdma != coex_dm->tdma_adj_type) { 2335 bool scan = false, link = false, roam = false; 2336 2337 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2338 "[BTCoex], PsTdma type dismatch!!!, cur_ps_tdma = %d, recordPsTdma = %d\n", 2339 coex_dm->cur_ps_tdma, coex_dm->tdma_adj_type); 2340 2341 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); 2342 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link); 2343 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); 2344 2345 if (!scan && !link && !roam) { 2346 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 2347 coex_dm->tdma_adj_type); 2348 } else { 2349 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2350 "[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n"); 2351 } 2352 } 2353 2354 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x6); 2355 } 2356 2357 /* SCO only or SCO+PAN(HS)*/ 2358 static void halbtc8821a2ant_action_sco(struct btc_coexist *btcoexist) 2359 { 2360 u8 wifi_rssi_state, bt_rssi_state; 2361 u32 wifi_bw; 2362 2363 wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2, 2364 15, 0); 2365 bt_rssi_state = halbtc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0); 2366 2367 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 4); 2368 2369 if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist)) 2370 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true); 2371 else 2372 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); 2373 2374 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2375 2376 if (BTC_WIFI_BW_LEGACY == wifi_bw) { 2377 /* for SCO quality at 11b/g mode */ 2378 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 2379 0x5a5a5a5a, 0x5a5a5a5a, 0xffff, 0x3); 2380 } else { 2381 /* for SCO quality & wifi performance balance at 11n mode */ 2382 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 2383 0x5aea5aea, 0x5aea5aea, 0xffff, 0x3); 2384 } 2385 2386 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2387 /* fw mechanism 2388 * halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5); 2389 */ 2390 2391 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2392 false, 0); /*for voice quality*/ 2393 2394 /* sw mechanism */ 2395 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2396 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2397 btc8821a2ant_sw_mech1(btcoexist, true, true, 2398 false, false); 2399 btc8821a2ant_sw_mech2(btcoexist, true, false, 2400 false, 0x18); 2401 } else { 2402 btc8821a2ant_sw_mech1(btcoexist, true, true, 2403 false, false); 2404 btc8821a2ant_sw_mech2(btcoexist, false, false, 2405 false, 0x18); 2406 } 2407 } else { 2408 /* fw mechanism 2409 * halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5); 2410 */ 2411 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2412 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2413 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2414 false, 0); /*for voice quality*/ 2415 } else { 2416 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2417 false, 0); /*for voice quality*/ 2418 } 2419 2420 /* sw mechanism */ 2421 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2422 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2423 btc8821a2ant_sw_mech1(btcoexist, false, true, 2424 false, false); 2425 btc8821a2ant_sw_mech2(btcoexist, true, false, 2426 false, 0x18); 2427 } else { 2428 btc8821a2ant_sw_mech1(btcoexist, false, true, 2429 false, false); 2430 btc8821a2ant_sw_mech2(btcoexist, false, false, 2431 false, 0x18); 2432 } 2433 } 2434 } 2435 2436 static void halbtc8821a2ant_action_hid(struct btc_coexist *btcoexist) 2437 { 2438 u8 wifi_rssi_state, bt_rssi_state; 2439 u32 wifi_bw; 2440 2441 wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 2442 0, 2, 15, 0); 2443 bt_rssi_state = halbtc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0); 2444 2445 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 2446 2447 if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist)) 2448 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true); 2449 else 2450 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); 2451 2452 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2453 2454 if (BTC_WIFI_BW_LEGACY == wifi_bw) { 2455 /* for HID at 11b/g mode */ 2456 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff, 2457 0x5a5a5a5a, 0xffff, 0x3); 2458 } else { 2459 /* for HID quality & wifi performance balance at 11n mode */ 2460 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff, 2461 0x5aea5aea, 0xffff, 0x3); 2462 } 2463 2464 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2465 /* fw mechanism */ 2466 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2467 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2468 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2469 true, 9); 2470 } else { 2471 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2472 true, 13); 2473 } 2474 2475 /* sw mechanism */ 2476 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2477 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2478 btc8821a2ant_sw_mech1(btcoexist, true, true, 2479 false, false); 2480 btc8821a2ant_sw_mech2(btcoexist, true, false, 2481 false, 0x18); 2482 } else { 2483 btc8821a2ant_sw_mech1(btcoexist, true, true, 2484 false, false); 2485 btc8821a2ant_sw_mech2(btcoexist, false, false, 2486 false, 0x18); 2487 } 2488 } else { 2489 /* fw mechanism */ 2490 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2491 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2492 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2493 true, 9); 2494 } else { 2495 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2496 true, 13); 2497 } 2498 2499 /* sw mechanism */ 2500 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2501 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2502 btc8821a2ant_sw_mech1(btcoexist, false, true, 2503 false, false); 2504 btc8821a2ant_sw_mech2(btcoexist, true, false, 2505 false, 0x18); 2506 } else { 2507 btc8821a2ant_sw_mech1(btcoexist, false, true, 2508 false, false); 2509 btc8821a2ant_sw_mech2(btcoexist, false, false, 2510 false, 0x18); 2511 } 2512 } 2513 } 2514 2515 /* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */ 2516 static void halbtc8821a2ant_action_a2dp(struct btc_coexist *btcoexist) 2517 { 2518 u8 wifi_rssi_state, bt_rssi_state; 2519 u32 wifi_bw; 2520 2521 wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2, 2522 15, 0); 2523 bt_rssi_state = halbtc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0); 2524 2525 /* fw dac swing is called in btc8821a2ant_tdma_dur_adj() 2526 * halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 2527 */ 2528 2529 if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist)) 2530 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true); 2531 else 2532 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); 2533 2534 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2535 2536 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2537 /* fw mechanism */ 2538 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2539 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2540 btc8821a2ant_tdma_dur_adj(btcoexist, false, false, 1); 2541 } else { 2542 btc8821a2ant_tdma_dur_adj(btcoexist, false, true, 1); 2543 } 2544 2545 /* sw mechanism */ 2546 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2547 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2548 btc8821a2ant_sw_mech1(btcoexist, true, false, 2549 false, false); 2550 btc8821a2ant_sw_mech2(btcoexist, true, false, 2551 false, 0x18); 2552 } else { 2553 btc8821a2ant_sw_mech1(btcoexist, true, false, 2554 false, false); 2555 btc8821a2ant_sw_mech2(btcoexist, false, false, 2556 false, 0x18); 2557 } 2558 } else { 2559 /* fw mechanism */ 2560 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2561 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2562 btc8821a2ant_tdma_dur_adj(btcoexist, false, false, 1); 2563 } else { 2564 btc8821a2ant_tdma_dur_adj(btcoexist, false, true, 1); 2565 } 2566 2567 /* sw mechanism */ 2568 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2569 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2570 btc8821a2ant_sw_mech1(btcoexist, false, false, 2571 false, false); 2572 btc8821a2ant_sw_mech2(btcoexist, true, false, 2573 false, 0x18); 2574 } else { 2575 btc8821a2ant_sw_mech1(btcoexist, false, false, 2576 false, false); 2577 btc8821a2ant_sw_mech2(btcoexist, false, false, 2578 false, 0x18); 2579 } 2580 } 2581 } 2582 2583 static void halbtc8821a2ant_action_a2dp_pan_hs(struct btc_coexist *btcoexist) 2584 { 2585 u8 wifi_rssi_state, bt_rssi_state, bt_info_ext; 2586 u32 wifi_bw; 2587 2588 bt_info_ext = coex_sta->bt_info_ext; 2589 wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2, 2590 15, 0); 2591 bt_rssi_state = halbtc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0); 2592 2593 /*fw dac swing is called in btc8821a2ant_tdma_dur_adj() 2594 *halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 2595 */ 2596 2597 if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist)) 2598 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true); 2599 else 2600 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); 2601 2602 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2603 2604 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2605 /* fw mechanism */ 2606 if (bt_info_ext&BIT0) { 2607 /*a2dp basic rate*/ 2608 btc8821a2ant_tdma_dur_adj(btcoexist, false, true, 2); 2609 } else { 2610 /*a2dp edr rate*/ 2611 btc8821a2ant_tdma_dur_adj(btcoexist, false, true, 1); 2612 } 2613 2614 /* sw mechanism */ 2615 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2616 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2617 btc8821a2ant_sw_mech1(btcoexist, true, false, 2618 false, false); 2619 btc8821a2ant_sw_mech2(btcoexist, true, false, 2620 false, 0x18); 2621 } else { 2622 btc8821a2ant_sw_mech1(btcoexist, true, false, 2623 false, false); 2624 btc8821a2ant_sw_mech2(btcoexist, false, false, 2625 false, 0x18); 2626 } 2627 } else { 2628 /* fw mechanism */ 2629 if (bt_info_ext&BIT0) { 2630 /* a2dp basic rate */ 2631 btc8821a2ant_tdma_dur_adj(btcoexist, false, true, 2); 2632 } else { 2633 /* a2dp edr rate */ 2634 btc8821a2ant_tdma_dur_adj(btcoexist, false, true, 1); 2635 } 2636 2637 /* sw mechanism */ 2638 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2639 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2640 btc8821a2ant_sw_mech1(btcoexist, false, false, 2641 false, false); 2642 btc8821a2ant_sw_mech2(btcoexist, true, false, 2643 false, 0x18); 2644 } else { 2645 btc8821a2ant_sw_mech1(btcoexist, false, false, 2646 false, false); 2647 btc8821a2ant_sw_mech2(btcoexist, false, false, 2648 false, 0x18); 2649 } 2650 } 2651 } 2652 2653 static void halbtc8821a2ant_action_pan_edr(struct btc_coexist *btcoexist) 2654 { 2655 u8 wifi_rssi_state, bt_rssi_state; 2656 u32 wifi_bw; 2657 2658 wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2, 2659 15, 0); 2660 bt_rssi_state = halbtc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0); 2661 2662 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 2663 2664 if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist)) 2665 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true); 2666 else 2667 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); 2668 2669 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2670 2671 if (BTC_WIFI_BW_LEGACY == wifi_bw) { 2672 /* for HID at 11b/g mode */ 2673 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff, 2674 0x5aff5aff, 0xffff, 0x3); 2675 } else { 2676 /* for HID quality & wifi performance balance at 11n mode */ 2677 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff, 2678 0x5aff5aff, 0xffff, 0x3); 2679 } 2680 2681 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2682 /* fw mechanism */ 2683 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2684 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2685 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2686 true, 1); 2687 } else { 2688 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2689 true, 5); 2690 } 2691 2692 /* sw mechanism */ 2693 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2694 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2695 btc8821a2ant_sw_mech1(btcoexist, true, false, 2696 false, false); 2697 btc8821a2ant_sw_mech2(btcoexist, true, false, 2698 false, 0x18); 2699 } else { 2700 btc8821a2ant_sw_mech1(btcoexist, true, false, 2701 false, false); 2702 btc8821a2ant_sw_mech2(btcoexist, false, false, 2703 false, 0x18); 2704 } 2705 } else { 2706 /* fw mechanism */ 2707 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2708 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2709 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2710 true, 1); 2711 } else { 2712 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2713 true, 5); 2714 } 2715 2716 /* sw mechanism */ 2717 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2718 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2719 btc8821a2ant_sw_mech1(btcoexist, false, false, 2720 false, false); 2721 btc8821a2ant_sw_mech2(btcoexist, true, false, 2722 false, 0x18); 2723 } else { 2724 btc8821a2ant_sw_mech1(btcoexist, false, false, 2725 false, false); 2726 btc8821a2ant_sw_mech2(btcoexist, false, false, 2727 false, 0x18); 2728 } 2729 } 2730 } 2731 2732 /* PAN(HS) only */ 2733 static void halbtc8821a2ant_action_pan_hs(struct btc_coexist *btcoexist) 2734 { 2735 u8 wifi_rssi_state, bt_rssi_state; 2736 u32 wifi_bw; 2737 2738 wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 2739 0, 2, 15, 0); 2740 bt_rssi_state = halbtc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0); 2741 2742 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 2743 2744 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2745 2746 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2747 /* fw mechanism */ 2748 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2749 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2750 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2751 true); 2752 } else { 2753 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2754 false); 2755 } 2756 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); 2757 2758 /* sw mechanism */ 2759 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2760 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2761 btc8821a2ant_sw_mech1(btcoexist, true, false, 2762 false, false); 2763 btc8821a2ant_sw_mech2(btcoexist, true, false, 2764 false, 0x18); 2765 } else { 2766 btc8821a2ant_sw_mech1(btcoexist, true, false, 2767 false, false); 2768 btc8821a2ant_sw_mech2(btcoexist, false, false, 2769 false, 0x18); 2770 } 2771 } else { 2772 /* fw mechanism */ 2773 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2774 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2775 halbtc8821a2ant_dec_bt_pwr(btcoexist, 2776 NORMAL_EXEC, true); 2777 } else { 2778 halbtc8821a2ant_dec_bt_pwr(btcoexist, 2779 NORMAL_EXEC, false); 2780 } 2781 2782 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); 2783 2784 /* sw mechanism */ 2785 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2786 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2787 btc8821a2ant_sw_mech1(btcoexist, false, false, 2788 false, false); 2789 btc8821a2ant_sw_mech2(btcoexist, true, false, 2790 false, 0x18); 2791 } else { 2792 btc8821a2ant_sw_mech1(btcoexist, false, false, 2793 false, false); 2794 btc8821a2ant_sw_mech2(btcoexist, false, false, 2795 false, 0x18); 2796 } 2797 } 2798 } 2799 2800 /* PAN(EDR)+A2DP */ 2801 static void halbtc8821a2ant_action_pan_edr_a2dp(struct btc_coexist *btcoexist) 2802 { 2803 u8 wifi_rssi_state, bt_rssi_state, bt_info_ext; 2804 u32 wifi_bw; 2805 2806 bt_info_ext = coex_sta->bt_info_ext; 2807 wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2, 2808 15, 0); 2809 bt_rssi_state = halbtc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0); 2810 2811 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 2812 2813 if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist)) 2814 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true); 2815 else 2816 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); 2817 2818 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2819 2820 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff, 2821 0x5afa5afa, 0xffff, 0x3); 2822 2823 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2824 /* fw mechanism */ 2825 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2826 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) 2827 btc8821a2ant_tdma_dur_adj(btcoexist, false, 2828 false, 3); 2829 else 2830 btc8821a2ant_tdma_dur_adj(btcoexist, false, 2831 true, 3); 2832 2833 /* sw mechanism */ 2834 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2835 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2836 btc8821a2ant_sw_mech1(btcoexist, true, false, 2837 false, false); 2838 btc8821a2ant_sw_mech2(btcoexist, true, false, 2839 false, 0x18); 2840 } else { 2841 btc8821a2ant_sw_mech1(btcoexist, true, false, 2842 false, false); 2843 btc8821a2ant_sw_mech2(btcoexist, false, false, 2844 false, 0x18); 2845 } 2846 } else { 2847 /* fw mechanism */ 2848 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2849 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) 2850 btc8821a2ant_tdma_dur_adj(btcoexist, false, false, 3); 2851 else 2852 btc8821a2ant_tdma_dur_adj(btcoexist, false, true, 3); 2853 2854 /* sw mechanism */ 2855 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2856 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2857 btc8821a2ant_sw_mech1(btcoexist, false, false, 2858 false, false); 2859 btc8821a2ant_sw_mech2(btcoexist, true, false, 2860 false, 0x18); 2861 } else { 2862 btc8821a2ant_sw_mech1(btcoexist, false, false, 2863 false, false); 2864 btc8821a2ant_sw_mech2(btcoexist, false, false, 2865 false, 0x18); 2866 } 2867 } 2868 } 2869 2870 static void halbtc8821a2ant_action_pan_edr_hid(struct btc_coexist *btcoexist) 2871 { 2872 u8 wifi_rssi_state, bt_rssi_state; 2873 u32 wifi_bw; 2874 2875 wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2, 2876 15, 0); 2877 bt_rssi_state = halbtc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0); 2878 2879 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 2880 2881 if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist)) 2882 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true); 2883 else 2884 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); 2885 2886 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2887 2888 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff, 2889 0x5a5f5a5f, 0xffff, 0x3); 2890 2891 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2892 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 3); 2893 /* fw mechanism */ 2894 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2895 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2896 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2897 true, 10); 2898 } else { 2899 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2900 true, 14); 2901 } 2902 2903 /* sw mechanism */ 2904 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2905 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2906 btc8821a2ant_sw_mech1(btcoexist, true, true, 2907 false, false); 2908 btc8821a2ant_sw_mech2(btcoexist, true, false, 2909 false, 0x18); 2910 } else { 2911 btc8821a2ant_sw_mech1(btcoexist, true, true, 2912 false, false); 2913 btc8821a2ant_sw_mech2(btcoexist, false, false, 2914 false, 0x18); 2915 } 2916 } else { 2917 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 2918 /* fw mechanism */ 2919 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2920 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2921 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2922 true, 10); 2923 } else { 2924 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2925 true, 14); 2926 } 2927 2928 /* sw mechanism */ 2929 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2930 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2931 btc8821a2ant_sw_mech1(btcoexist, false, true, 2932 false, false); 2933 btc8821a2ant_sw_mech2(btcoexist, true, false, 2934 false, 0x18); 2935 } else { 2936 btc8821a2ant_sw_mech1(btcoexist, false, true, 2937 false, false); 2938 btc8821a2ant_sw_mech2(btcoexist, false, false, 2939 false, 0x18); 2940 } 2941 } 2942 } 2943 2944 /* HID+A2DP+PAN(EDR) */ 2945 static void btc8821a2ant_act_hid_a2dp_pan_edr(struct btc_coexist *btcoexist) 2946 { 2947 u8 wifi_rssi_state, bt_rssi_state, bt_info_ext; 2948 u32 wifi_bw; 2949 2950 bt_info_ext = coex_sta->bt_info_ext; 2951 wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 2952 0, 2, 15, 0); 2953 bt_rssi_state = halbtc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0); 2954 2955 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 2956 2957 if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist)) 2958 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true); 2959 else 2960 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); 2961 2962 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2963 2964 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff, 2965 0x5a5a5a5a, 0xffff, 0x3); 2966 2967 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2968 /* fw mechanism */ 2969 btc8821a2ant_tdma_dur_adj(btcoexist, true, true, 3); 2970 2971 /* sw mechanism */ 2972 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2973 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2974 btc8821a2ant_sw_mech1(btcoexist, true, true, 2975 false, false); 2976 btc8821a2ant_sw_mech2(btcoexist, true, false, 2977 false, 0x18); 2978 } else { 2979 btc8821a2ant_sw_mech1(btcoexist, true, true, 2980 false, false); 2981 btc8821a2ant_sw_mech2(btcoexist, false, false, 2982 false, 0x18); 2983 } 2984 } else { 2985 /* fw mechanism */ 2986 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2987 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2988 if (bt_info_ext&BIT0) { 2989 /* a2dp basic rate */ 2990 btc8821a2ant_tdma_dur_adj(btcoexist, true, 2991 false, 3); 2992 } else { 2993 /* a2dp edr rate */ 2994 btc8821a2ant_tdma_dur_adj(btcoexist, true, 2995 false, 3); 2996 } 2997 } else { 2998 if (bt_info_ext&BIT0) { 2999 /* a2dp basic rate */ 3000 btc8821a2ant_tdma_dur_adj(btcoexist, true, 3001 true, 3); 3002 } else { 3003 /* a2dp edr rate */ 3004 btc8821a2ant_tdma_dur_adj(btcoexist, true, 3005 true, 3); 3006 } 3007 } 3008 3009 /* sw mechanism */ 3010 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 3011 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 3012 btc8821a2ant_sw_mech1(btcoexist, false, true, 3013 false, false); 3014 btc8821a2ant_sw_mech2(btcoexist, true, false, 3015 false, 0x18); 3016 } else { 3017 btc8821a2ant_sw_mech1(btcoexist, false, true, 3018 false, false); 3019 btc8821a2ant_sw_mech2(btcoexist, false, false, 3020 false, 0x18); 3021 } 3022 } 3023 } 3024 3025 static void halbtc8821a2ant_action_hid_a2dp(struct btc_coexist *btcoexist) 3026 { 3027 u8 wifi_rssi_state, bt_rssi_state, bt_info_ext; 3028 u32 wifi_bw; 3029 3030 bt_info_ext = coex_sta->bt_info_ext; 3031 wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2, 3032 15, 0); 3033 bt_rssi_state = halbtc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0); 3034 3035 if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist)) 3036 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true); 3037 else 3038 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false); 3039 3040 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 3041 3042 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff, 3043 0x5f5b5f5b, 0xffffff, 0x3); 3044 3045 if (BTC_WIFI_BW_HT40 == wifi_bw) { 3046 /* fw mechanism */ 3047 btc8821a2ant_tdma_dur_adj(btcoexist, true, true, 2); 3048 3049 /* sw mechanism */ 3050 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 3051 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 3052 btc8821a2ant_sw_mech1(btcoexist, true, true, 3053 false, false); 3054 btc8821a2ant_sw_mech2(btcoexist, true, false, 3055 false, 0x18); 3056 } else { 3057 btc8821a2ant_sw_mech1(btcoexist, true, true, 3058 false, false); 3059 btc8821a2ant_sw_mech2(btcoexist, false, false, 3060 false, 0x18); 3061 } 3062 } else { 3063 /* fw mechanism */ 3064 btc8821a2ant_tdma_dur_adj(btcoexist, true, true, 2); 3065 3066 /* sw mechanism */ 3067 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 3068 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 3069 btc8821a2ant_sw_mech1(btcoexist, false, true, 3070 false, false); 3071 btc8821a2ant_sw_mech2(btcoexist, true, false, 3072 false, 0x18); 3073 } else { 3074 btc8821a2ant_sw_mech1(btcoexist, false, true, 3075 false, false); 3076 btc8821a2ant_sw_mech2(btcoexist, false, false, 3077 false, 0x18); 3078 } 3079 } 3080 } 3081 3082 static void halbtc8821a2ant_run_coexist_mechanism(struct btc_coexist *btcoexist) 3083 { 3084 struct rtl_priv *rtlpriv = btcoexist->adapter; 3085 bool wifi_under_5g = false; 3086 u8 algorithm = 0; 3087 3088 if (btcoexist->manual_control) { 3089 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3090 "[BTCoex], Manual control!!!\n"); 3091 return; 3092 } 3093 3094 btcoexist->btc_get(btcoexist, 3095 BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g); 3096 3097 if (wifi_under_5g) { 3098 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3099 "[BTCoex], RunCoexistMechanism(), run 5G coex setting!!<===\n"); 3100 halbtc8821a2ant_coex_under_5g(btcoexist); 3101 return; 3102 } 3103 3104 algorithm = halbtc8821a2ant_action_algorithm(btcoexist); 3105 if (coex_sta->c2h_bt_inquiry_page && 3106 (BT_8821A_2ANT_COEX_ALGO_PANHS != algorithm)) { 3107 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3108 "[BTCoex], BT is under inquiry/page scan !!\n"); 3109 halbtc8821a2ant_bt_inquiry_page(btcoexist); 3110 return; 3111 } 3112 3113 coex_dm->cur_algorithm = algorithm; 3114 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3115 "[BTCoex], Algorithm = %d\n", coex_dm->cur_algorithm); 3116 3117 if (halbtc8821a2ant_is_common_action(btcoexist)) { 3118 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3119 "[BTCoex], Action 2-Ant common\n"); 3120 coex_dm->reset_tdma_adjust = true; 3121 } else { 3122 if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) { 3123 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3124 "[BTCoex], pre_algorithm = %d, cur_algorithm = %d\n", 3125 coex_dm->pre_algorithm, 3126 coex_dm->cur_algorithm); 3127 coex_dm->reset_tdma_adjust = true; 3128 } 3129 switch (coex_dm->cur_algorithm) { 3130 case BT_8821A_2ANT_COEX_ALGO_SCO: 3131 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3132 "[BTCoex], Action 2-Ant, algorithm = SCO\n"); 3133 halbtc8821a2ant_action_sco(btcoexist); 3134 break; 3135 case BT_8821A_2ANT_COEX_ALGO_HID: 3136 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3137 "[BTCoex], Action 2-Ant, algorithm = HID\n"); 3138 halbtc8821a2ant_action_hid(btcoexist); 3139 break; 3140 case BT_8821A_2ANT_COEX_ALGO_A2DP: 3141 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3142 "[BTCoex], Action 2-Ant, algorithm = A2DP\n"); 3143 halbtc8821a2ant_action_a2dp(btcoexist); 3144 break; 3145 case BT_8821A_2ANT_COEX_ALGO_A2DP_PANHS: 3146 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3147 "[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS)\n"); 3148 halbtc8821a2ant_action_a2dp_pan_hs(btcoexist); 3149 break; 3150 case BT_8821A_2ANT_COEX_ALGO_PANEDR: 3151 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3152 "[BTCoex], Action 2-Ant, algorithm = PAN(EDR)\n"); 3153 halbtc8821a2ant_action_pan_edr(btcoexist); 3154 break; 3155 case BT_8821A_2ANT_COEX_ALGO_PANHS: 3156 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3157 "[BTCoex], Action 2-Ant, algorithm = HS mode\n"); 3158 halbtc8821a2ant_action_pan_hs(btcoexist); 3159 break; 3160 case BT_8821A_2ANT_COEX_ALGO_PANEDR_A2DP: 3161 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3162 "[BTCoex], Action 2-Ant, algorithm = PAN+A2DP\n"); 3163 halbtc8821a2ant_action_pan_edr_a2dp(btcoexist); 3164 break; 3165 case BT_8821A_2ANT_COEX_ALGO_PANEDR_HID: 3166 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3167 "[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID\n"); 3168 halbtc8821a2ant_action_pan_edr_hid(btcoexist); 3169 break; 3170 case BT_8821A_2ANT_COEX_ALGO_HID_A2DP_PANEDR: 3171 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3172 "[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN\n"); 3173 btc8821a2ant_act_hid_a2dp_pan_edr(btcoexist); 3174 break; 3175 case BT_8821A_2ANT_COEX_ALGO_HID_A2DP: 3176 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3177 "[BTCoex], Action 2-Ant, algorithm = HID+A2DP\n"); 3178 halbtc8821a2ant_action_hid_a2dp(btcoexist); 3179 break; 3180 default: 3181 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3182 "[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n"); 3183 halbtc8821a2ant_coex_all_off(btcoexist); 3184 break; 3185 } 3186 coex_dm->pre_algorithm = coex_dm->cur_algorithm; 3187 } 3188 } 3189 3190 /*============================================================ 3191 *work around function start with wa_halbtc8821a2ant_ 3192 *============================================================ 3193 *============================================================ 3194 * extern function start with EXhalbtc8821a2ant_ 3195 *============================================================ 3196 */ 3197 void ex_halbtc8821a2ant_init_hwconfig(struct btc_coexist *btcoexist) 3198 { 3199 struct rtl_priv *rtlpriv = btcoexist->adapter; 3200 u8 u1tmp = 0; 3201 3202 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3203 "[BTCoex], 2Ant Init HW Config!!\n"); 3204 3205 /* backup rf 0x1e value */ 3206 coex_dm->bt_rf0x1e_backup = 3207 btcoexist->btc_get_rf_reg(btcoexist, BTC_RF_A, 0x1e, 0xfffff); 3208 3209 /* 0x790[5:0] = 0x5 */ 3210 u1tmp = btcoexist->btc_read_1byte(btcoexist, 0x790); 3211 u1tmp &= 0xc0; 3212 u1tmp |= 0x5; 3213 btcoexist->btc_write_1byte(btcoexist, 0x790, u1tmp); 3214 3215 /*Antenna config */ 3216 halbtc8821a2ant_set_ant_path(btcoexist, 3217 BTC_ANT_WIFI_AT_MAIN, true, false); 3218 3219 /* PTA parameter */ 3220 halbtc8821a2ant_coex_table(btcoexist, 3221 FORCE_EXEC, 0x55555555, 0x55555555, 3222 0xffff, 0x3); 3223 3224 /* Enable counter statistics */ 3225 /*0x76e[3] = 1, WLAN_Act control by PTA*/ 3226 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc); 3227 btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3); 3228 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x40, 0x20, 0x1); 3229 } 3230 3231 void ex_halbtc8821a2ant_init_coex_dm(struct btc_coexist *btcoexist) 3232 { 3233 struct rtl_priv *rtlpriv = btcoexist->adapter; 3234 3235 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3236 "[BTCoex], Coex Mechanism Init!!\n"); 3237 3238 halbtc8821a2ant_init_coex_dm(btcoexist); 3239 } 3240 3241 void 3242 ex_halbtc8821a2ant_display_coex_info( 3243 struct btc_coexist *btcoexist 3244 ) 3245 { 3246 struct btc_board_info *board_info = &btcoexist->board_info; 3247 struct btc_stack_info *stack_info = &btcoexist->stack_info; 3248 struct rtl_priv *rtlpriv = btcoexist->adapter; 3249 u8 u1tmp[4], i, bt_info_ext, ps_tdma_case = 0; 3250 u32 u4tmp[4]; 3251 bool roam = false, scan = false, link = false, wifi_under_5g = false; 3252 bool bt_hs_on = false, wifi_busy = false; 3253 long wifi_rssi = 0, bt_hs_rssi = 0; 3254 u32 wifi_bw, wifi_traffic_dir; 3255 u8 wifi_dot_11_chnl, wifi_hs_chnl; 3256 u32 fw_ver = 0, bt_patch_ver = 0; 3257 3258 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 3259 "\r\n ============[BT Coexist info]============"); 3260 3261 if (!board_info->bt_exist) { 3262 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n BT not exists !!!"); 3263 return; 3264 } 3265 3266 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 3267 "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", 3268 board_info->pg_ant_num, board_info->btdm_ant_num); 3269 3270 if (btcoexist->manual_control) { 3271 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 3272 "\r\n %-35s", "[Action Manual control]!!"); 3273 } 3274 3275 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 3276 "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", 3277 ((stack_info->profile_notified) ? "Yes" : "No"), 3278 stack_info->hci_version); 3279 3280 btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver); 3281 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver); 3282 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 3283 "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)", 3284 "CoexVer/ FwVer/ PatchVer", 3285 glcoex_ver_date_8821a_2ant, glcoex_ver_8821a_2ant, 3286 fw_ver, bt_patch_ver, bt_patch_ver); 3287 3288 btcoexist->btc_get(btcoexist, 3289 BTC_GET_BL_HS_OPERATION, &bt_hs_on); 3290 btcoexist->btc_get(btcoexist, 3291 BTC_GET_U1_WIFI_DOT11_CHNL, &wifi_dot_11_chnl); 3292 btcoexist->btc_get(btcoexist, 3293 BTC_GET_U1_WIFI_HS_CHNL, &wifi_hs_chnl); 3294 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 3295 "\r\n %-35s = %d / %d(%d)", 3296 "Dot11 channel / HsMode(HsChnl)", 3297 wifi_dot_11_chnl, bt_hs_on, wifi_hs_chnl); 3298 3299 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 3300 "\r\n %-35s = %3ph ", 3301 "H2C Wifi inform bt chnl Info", 3302 coex_dm->wifi_chnl_info); 3303 3304 btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi); 3305 btcoexist->btc_get(btcoexist, BTC_GET_S4_HS_RSSI, &bt_hs_rssi); 3306 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 3307 "\r\n %-35s = %ld/ %ld", "Wifi rssi/ HS rssi", 3308 wifi_rssi, bt_hs_rssi); 3309 3310 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); 3311 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link); 3312 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); 3313 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 3314 "\r\n %-35s = %d/ %d/ %d ", "Wifi link/ roam/ scan", 3315 link, roam, scan); 3316 3317 btcoexist->btc_get(btcoexist, 3318 BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g); 3319 btcoexist->btc_get(btcoexist, 3320 BTC_GET_U4_WIFI_BW, &wifi_bw); 3321 btcoexist->btc_get(btcoexist, 3322 BTC_GET_BL_WIFI_BUSY, &wifi_busy); 3323 btcoexist->btc_get(btcoexist, 3324 BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifi_traffic_dir); 3325 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 3326 "\r\n %-35s = %s / %s/ %s ", "Wifi status", 3327 (wifi_under_5g ? "5G" : "2.4G"), 3328 ((BTC_WIFI_BW_LEGACY == wifi_bw) ? "Legacy" : 3329 (((BTC_WIFI_BW_HT40 == wifi_bw) ? "HT40" : "HT20"))), 3330 ((!wifi_busy) ? "idle" : 3331 ((BTC_WIFI_TRAFFIC_TX == wifi_traffic_dir) ? 3332 "uplink" : "downlink"))); 3333 3334 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 3335 "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", 3336 ((coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page scan") : 3337 ((BT_8821A_2ANT_BT_STATUS_IDLE == coex_dm->bt_status) 3338 ? "idle" : ((BT_8821A_2ANT_BT_STATUS_CON_IDLE == 3339 coex_dm->bt_status) ? "connected-idle" : "busy"))), 3340 coex_sta->bt_rssi, coex_sta->bt_retry_cnt); 3341 3342 if (stack_info->profile_notified) { 3343 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 3344 "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", 3345 stack_info->sco_exist, stack_info->hid_exist, 3346 stack_info->pan_exist, stack_info->a2dp_exist); 3347 3348 btcoexist->btc_disp_dbg_msg(btcoexist, 3349 BTC_DBG_DISP_BT_LINK_INFO); 3350 } 3351 3352 bt_info_ext = coex_sta->bt_info_ext; 3353 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %s", 3354 "BT Info A2DP rate", 3355 (bt_info_ext&BIT0) ? "Basic rate" : "EDR rate"); 3356 3357 for (i = 0; i < BT_INFO_SRC_8821A_2ANT_MAX; i++) { 3358 if (coex_sta->bt_info_c2h_cnt[i]) { 3359 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 3360 "\r\n %-35s = %7ph(%d)", 3361 glbt_info_src_8821a_2ant[i], 3362 coex_sta->bt_info_c2h[i], 3363 coex_sta->bt_info_c2h_cnt[i]); 3364 } 3365 } 3366 3367 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %s/%s", 3368 "PS state, IPS/LPS", 3369 ((coex_sta->under_ips ? "IPS ON" : "IPS OFF")), 3370 ((coex_sta->under_lps ? "LPS ON" : "LPS OFF"))); 3371 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_FW_PWR_MODE_CMD); 3372 3373 /* Sw mechanism*/ 3374 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s", 3375 "============[Sw mechanism]============"); 3376 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 3377 "\r\n %-35s = %d/ %d/ %d/ %d ", 3378 "SM1[ShRf/ LpRA/ LimDig/ btLna]", 3379 coex_dm->cur_rf_rx_lpf_shrink, coex_dm->cur_low_penalty_ra, 3380 coex_dm->limited_dig, coex_dm->cur_bt_lna_constrain); 3381 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 3382 "\r\n %-35s = %d/ %d/ %d(0x%x) ", 3383 "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", 3384 coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off, 3385 coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl); 3386 3387 /* Fw mechanism*/ 3388 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s", 3389 "============[Fw mechanism]============"); 3390 3391 if (!btcoexist->manual_control) { 3392 ps_tdma_case = coex_dm->cur_ps_tdma; 3393 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 3394 "\r\n %-35s = %5ph case-%d", 3395 "PS TDMA", 3396 coex_dm->ps_tdma_para, ps_tdma_case); 3397 3398 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 3399 "\r\n %-35s = %d/ %d ", "DecBtPwr/ IgnWlanAct", 3400 coex_dm->cur_dec_bt_pwr, 3401 coex_dm->cur_ignore_wlan_act); 3402 } 3403 3404 /* Hw setting*/ 3405 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 3406 "\r\n %-35s", "============[Hw setting]============"); 3407 3408 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 3409 "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", 3410 coex_dm->bt_rf0x1e_backup); 3411 3412 u1tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778); 3413 u1tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x6cc); 3414 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x ", 3415 "0x778 (W_Act)/ 0x6cc (CoTab Sel)", 3416 u1tmp[0], u1tmp[1]); 3417 3418 u1tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x8db); 3419 u1tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0xc5b); 3420 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x", 3421 "0x8db(ADC)/0xc5b[29:25](DAC)", 3422 ((u1tmp[0] & 0x60) >> 5), ((u1tmp[1] & 0x3e) >> 1)); 3423 3424 u4tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xcb4); 3425 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x", 3426 "0xcb4[7:0](ctrl)/ 0xcb4[29:28](val)", 3427 u4tmp[0] & 0xff, ((u4tmp[0] & 0x30000000) >> 28)); 3428 3429 u1tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x40); 3430 u4tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x4c); 3431 u4tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x974); 3432 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", 3433 "0x40/ 0x4c[24:23]/ 0x974", 3434 u1tmp[0], ((u4tmp[0] & 0x01800000) >> 23), u4tmp[1]); 3435 3436 u4tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550); 3437 u1tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522); 3438 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x", 3439 "0x550(bcn ctrl)/0x522", 3440 u4tmp[0], u1tmp[0]); 3441 3442 u4tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50); 3443 u1tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0xa0a); 3444 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x", 3445 "0xc50(DIG)/0xa0a(CCK-TH)", 3446 u4tmp[0], u1tmp[0]); 3447 3448 u4tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xf48); 3449 u1tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0xa5b); 3450 u1tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0xa5c); 3451 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x", 3452 "OFDM-FA/ CCK-FA", 3453 u4tmp[0], (u1tmp[0] << 8) + u1tmp[1]); 3454 3455 u4tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0); 3456 u4tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4); 3457 u4tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8); 3458 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", 3459 "0x6c0/0x6c4/0x6c8", 3460 u4tmp[0], u4tmp[1], u4tmp[2]); 3461 3462 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d", 3463 "0x770 (hi-pri Rx/Tx)", 3464 coex_sta->high_priority_rx, coex_sta->high_priority_tx); 3465 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d", 3466 "0x774(low-pri Rx/Tx)", 3467 coex_sta->low_priority_rx, coex_sta->low_priority_tx); 3468 3469 /* Tx mgnt queue hang or not, 0x41b should = 0xf, ex: 0xd ==>hang*/ 3470 u1tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x41b); 3471 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x", 3472 "0x41b (mgntQ hang chk == 0xf)", 3473 u1tmp[0]); 3474 3475 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS); 3476 } 3477 3478 void ex_halbtc8821a2ant_ips_notify(struct btc_coexist *btcoexist, u8 type) 3479 { 3480 struct rtl_priv *rtlpriv = btcoexist->adapter; 3481 3482 if (BTC_IPS_ENTER == type) { 3483 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3484 "[BTCoex], IPS ENTER notify\n"); 3485 coex_sta->under_ips = true; 3486 halbtc8821a2ant_coex_all_off(btcoexist); 3487 } else if (BTC_IPS_LEAVE == type) { 3488 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3489 "[BTCoex], IPS LEAVE notify\n"); 3490 coex_sta->under_ips = false; 3491 /*halbtc8821a2ant_init_coex_dm(btcoexist);*/ 3492 } 3493 } 3494 3495 void ex_halbtc8821a2ant_lps_notify(struct btc_coexist *btcoexist, u8 type) 3496 { 3497 struct rtl_priv *rtlpriv = btcoexist->adapter; 3498 3499 if (BTC_LPS_ENABLE == type) { 3500 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3501 "[BTCoex], LPS ENABLE notify\n"); 3502 coex_sta->under_lps = true; 3503 } else if (BTC_LPS_DISABLE == type) { 3504 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3505 "[BTCoex], LPS DISABLE notify\n"); 3506 coex_sta->under_lps = false; 3507 } 3508 } 3509 3510 void ex_halbtc8821a2ant_scan_notify(struct btc_coexist *btcoexist, u8 type) 3511 { 3512 struct rtl_priv *rtlpriv = btcoexist->adapter; 3513 3514 if (BTC_SCAN_START == type) { 3515 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3516 "[BTCoex], SCAN START notify\n"); 3517 } else if (BTC_SCAN_FINISH == type) { 3518 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3519 "[BTCoex], SCAN FINISH notify\n"); 3520 } 3521 } 3522 3523 void ex_halbtc8821a2ant_connect_notify(struct btc_coexist *btcoexist, u8 type) 3524 { 3525 struct rtl_priv *rtlpriv = btcoexist->adapter; 3526 3527 if (BTC_ASSOCIATE_START == type) { 3528 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3529 "[BTCoex], CONNECT START notify\n"); 3530 } else if (BTC_ASSOCIATE_FINISH == type) { 3531 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3532 "[BTCoex], CONNECT FINISH notify\n"); 3533 } 3534 } 3535 3536 void ex_halbtc8821a2ant_media_status_notify(struct btc_coexist *btcoexist, 3537 u8 type) 3538 { 3539 struct rtl_priv *rtlpriv = btcoexist->adapter; 3540 u8 h2c_parameter[3] = {0}; 3541 u32 wifi_bw; 3542 u8 wifi_central_chnl; 3543 3544 if (BTC_MEDIA_CONNECT == type) { 3545 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3546 "[BTCoex], MEDIA connect notify\n"); 3547 } else { 3548 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3549 "[BTCoex], MEDIA disconnect notify\n"); 3550 } 3551 3552 /* only 2.4G we need to inform bt the chnl mask*/ 3553 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, 3554 &wifi_central_chnl); 3555 if ((BTC_MEDIA_CONNECT == type) && 3556 (wifi_central_chnl <= 14)) { 3557 h2c_parameter[0] = 0x1; 3558 h2c_parameter[1] = wifi_central_chnl; 3559 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 3560 if (BTC_WIFI_BW_HT40 == wifi_bw) 3561 h2c_parameter[2] = 0x30; 3562 else 3563 h2c_parameter[2] = 0x20; 3564 } 3565 3566 coex_dm->wifi_chnl_info[0] = h2c_parameter[0]; 3567 coex_dm->wifi_chnl_info[1] = h2c_parameter[1]; 3568 coex_dm->wifi_chnl_info[2] = h2c_parameter[2]; 3569 3570 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3571 "[BTCoex], FW write 0x66 = 0x%x\n", 3572 h2c_parameter[0] << 16 | 3573 h2c_parameter[1] << 8 | 3574 h2c_parameter[2]); 3575 3576 btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter); 3577 } 3578 3579 void ex_halbtc8821a2ant_special_packet_notify(struct btc_coexist *btcoexist, 3580 u8 type) { 3581 struct rtl_priv *rtlpriv = btcoexist->adapter; 3582 3583 if (type == BTC_PACKET_DHCP) { 3584 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3585 "[BTCoex], DHCP Packet notify\n"); 3586 } 3587 } 3588 3589 void ex_halbtc8821a2ant_bt_info_notify(struct btc_coexist *btcoexist, 3590 u8 *tmp_buf, u8 length) 3591 { 3592 struct rtl_priv *rtlpriv = btcoexist->adapter; 3593 u8 bt_info = 0; 3594 u8 i, rsp_source = 0; 3595 static u32 set_bt_lna_cnt, set_bt_psd_mode; 3596 bool bt_busy = false, limited_dig = false; 3597 bool wifi_connected = false, bt_hs_on = false; 3598 3599 coex_sta->c2h_bt_info_req_sent = false; 3600 3601 rsp_source = tmp_buf[0]&0xf; 3602 if (rsp_source >= BT_INFO_SRC_8821A_2ANT_MAX) 3603 rsp_source = BT_INFO_SRC_8821A_2ANT_WIFI_FW; 3604 coex_sta->bt_info_c2h_cnt[rsp_source]++; 3605 3606 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3607 "[BTCoex], Bt info[%d], length = %d, hex data = [", 3608 rsp_source, length); 3609 for (i = 0; i < length; i++) { 3610 coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i]; 3611 if (i == 1) 3612 bt_info = tmp_buf[i]; 3613 if (i == length-1) { 3614 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3615 "0x%02x]\n", tmp_buf[i]); 3616 } else { 3617 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3618 "0x%02x, ", tmp_buf[i]); 3619 } 3620 } 3621 3622 if (BT_INFO_SRC_8821A_2ANT_WIFI_FW != rsp_source) { 3623 coex_sta->bt_retry_cnt = /* [3:0]*/ 3624 coex_sta->bt_info_c2h[rsp_source][2]&0xf; 3625 3626 coex_sta->bt_rssi = 3627 coex_sta->bt_info_c2h[rsp_source][3]*2+10; 3628 3629 coex_sta->bt_info_ext = 3630 coex_sta->bt_info_c2h[rsp_source][4]; 3631 3632 /* Here we need to resend some wifi info to BT*/ 3633 /* because bt is reset and loss of the info.*/ 3634 if ((coex_sta->bt_info_ext & BIT1)) { 3635 btcoexist->btc_get(btcoexist, 3636 BTC_GET_BL_WIFI_CONNECTED, &wifi_connected); 3637 if (wifi_connected) { 3638 ex_halbtc8821a2ant_media_status_notify(btcoexist, 3639 BTC_MEDIA_CONNECT); 3640 } else { 3641 ex_halbtc8821a2ant_media_status_notify(btcoexist, 3642 BTC_MEDIA_DISCONNECT); 3643 } 3644 3645 set_bt_psd_mode = 0; 3646 } 3647 if (set_bt_psd_mode <= 3) { 3648 halbtc8821a2ant_set_bt_psd_mode(btcoexist, FORCE_EXEC, 3649 0x0); /*fix CH-BW mode*/ 3650 set_bt_psd_mode++; 3651 } 3652 3653 if (coex_dm->cur_bt_lna_constrain) { 3654 if (!(coex_sta->bt_info_ext & BIT2)) { 3655 if (set_bt_lna_cnt <= 3) { 3656 btc8821a2_set_bt_lna_const(btcoexist, 3657 FORCE_EXEC, 3658 true); 3659 set_bt_lna_cnt++; 3660 } 3661 } 3662 } else { 3663 set_bt_lna_cnt = 0; 3664 } 3665 3666 if ((coex_sta->bt_info_ext & BIT3)) { 3667 halbtc8821a2ant_ignore_wlan_act(btcoexist, 3668 FORCE_EXEC, false); 3669 } else { 3670 /* BT already NOT ignore Wlan active, do nothing here.*/ 3671 } 3672 3673 if ((coex_sta->bt_info_ext & BIT4)) { 3674 /* BT auto report already enabled, do nothing*/ 3675 } else { 3676 halbtc8821a2ant_bt_auto_report(btcoexist, 3677 FORCE_EXEC, true); 3678 } 3679 } 3680 3681 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); 3682 /* check BIT2 first ==> check if bt is under inquiry or page scan*/ 3683 if (bt_info & BT_INFO_8821A_2ANT_B_INQ_PAGE) { 3684 coex_sta->c2h_bt_inquiry_page = true; 3685 coex_dm->bt_status = BT_8821A_2ANT_BT_STATUS_NON_IDLE; 3686 } else { 3687 coex_sta->c2h_bt_inquiry_page = false; 3688 if (bt_info == 0x1) { 3689 /* connection exists but not busy*/ 3690 coex_sta->bt_link_exist = true; 3691 coex_dm->bt_status = BT_8821A_2ANT_BT_STATUS_CON_IDLE; 3692 } else if (bt_info & BT_INFO_8821A_2ANT_B_CONNECTION) { 3693 /* connection exists and some link is busy*/ 3694 coex_sta->bt_link_exist = true; 3695 if (bt_info & BT_INFO_8821A_2ANT_B_FTP) 3696 coex_sta->pan_exist = true; 3697 else 3698 coex_sta->pan_exist = false; 3699 if (bt_info & BT_INFO_8821A_2ANT_B_A2DP) 3700 coex_sta->a2dp_exist = true; 3701 else 3702 coex_sta->a2dp_exist = false; 3703 if (bt_info & BT_INFO_8821A_2ANT_B_HID) 3704 coex_sta->hid_exist = true; 3705 else 3706 coex_sta->hid_exist = false; 3707 if (bt_info & BT_INFO_8821A_2ANT_B_SCO_ESCO) 3708 coex_sta->sco_exist = true; 3709 else 3710 coex_sta->sco_exist = false; 3711 coex_dm->bt_status = BT_8821A_2ANT_BT_STATUS_NON_IDLE; 3712 } else { 3713 coex_sta->bt_link_exist = false; 3714 coex_sta->pan_exist = false; 3715 coex_sta->a2dp_exist = false; 3716 coex_sta->hid_exist = false; 3717 coex_sta->sco_exist = false; 3718 coex_dm->bt_status = BT_8821A_2ANT_BT_STATUS_IDLE; 3719 } 3720 3721 if (bt_hs_on) 3722 coex_dm->bt_status = BT_8821A_2ANT_BT_STATUS_NON_IDLE; 3723 } 3724 3725 if (BT_8821A_2ANT_BT_STATUS_NON_IDLE == coex_dm->bt_status) 3726 bt_busy = true; 3727 else 3728 bt_busy = false; 3729 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy); 3730 3731 if (BT_8821A_2ANT_BT_STATUS_IDLE != coex_dm->bt_status) 3732 limited_dig = true; 3733 else 3734 limited_dig = false; 3735 coex_dm->limited_dig = limited_dig; 3736 btcoexist->btc_set(btcoexist, 3737 BTC_SET_BL_BT_LIMITED_DIG, &limited_dig); 3738 3739 halbtc8821a2ant_run_coexist_mechanism(btcoexist); 3740 } 3741 3742 void ex_halbtc8821a2ant_halt_notify(struct btc_coexist *btcoexist) 3743 { 3744 struct rtl_priv *rtlpriv = btcoexist->adapter; 3745 3746 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3747 "[BTCoex], Halt notify\n"); 3748 3749 halbtc8821a2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true); 3750 ex_halbtc8821a2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT); 3751 } 3752 3753 void ex_halbtc8821a2ant_periodical(struct btc_coexist *btcoexist) 3754 { 3755 struct rtl_priv *rtlpriv = btcoexist->adapter; 3756 static u8 dis_ver_info_cnt; 3757 u32 fw_ver = 0, bt_patch_ver = 0; 3758 struct btc_board_info *board_info = &btcoexist->board_info; 3759 struct btc_stack_info *stack_info = &btcoexist->stack_info; 3760 3761 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3762 "[BTCoex], ==========================Periodical===========================\n"); 3763 3764 if (dis_ver_info_cnt <= 5) { 3765 dis_ver_info_cnt += 1; 3766 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3767 "[BTCoex], ****************************************************************\n"); 3768 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3769 "[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", 3770 board_info->pg_ant_num, 3771 board_info->btdm_ant_num, 3772 board_info->btdm_ant_pos); 3773 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3774 "[BTCoex], BT stack/ hci ext ver = %s / %d\n", 3775 stack_info->profile_notified ? "Yes" : "No", 3776 stack_info->hci_version); 3777 btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, 3778 &bt_patch_ver); 3779 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver); 3780 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3781 "[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", 3782 glcoex_ver_date_8821a_2ant, glcoex_ver_8821a_2ant, 3783 fw_ver, bt_patch_ver, bt_patch_ver); 3784 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3785 "[BTCoex], ****************************************************************\n"); 3786 } 3787 3788 halbtc8821a2ant_query_bt_info(btcoexist); 3789 halbtc8821a2ant_monitor_bt_ctr(btcoexist); 3790 btc8821a2ant_mon_bt_en_dis(btcoexist); 3791 } 3792