1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 2012 Realtek Corporation.*/ 3 4 /************************************************************** 5 * include files 6 **************************************************************/ 7 #include "halbt_precomp.h" 8 /************************************************************** 9 * Global variables, these are static variables 10 **************************************************************/ 11 static struct coex_dm_8192e_2ant glcoex_dm_8192e_2ant; 12 static struct coex_dm_8192e_2ant *coex_dm = &glcoex_dm_8192e_2ant; 13 static struct coex_sta_8192e_2ant glcoex_sta_8192e_2ant; 14 static struct coex_sta_8192e_2ant *coex_sta = &glcoex_sta_8192e_2ant; 15 16 static const char *const glbt_info_src_8192e_2ant[] = { 17 "BT Info[wifi fw]", 18 "BT Info[bt rsp]", 19 "BT Info[bt auto report]", 20 }; 21 22 static u32 glcoex_ver_date_8192e_2ant = 20130902; 23 static u32 glcoex_ver_8192e_2ant = 0x34; 24 25 /************************************************************** 26 * local function proto type if needed 27 **************************************************************/ 28 /************************************************************** 29 * local function start with btc8192e2ant_ 30 **************************************************************/ 31 static u8 btc8192e2ant_bt_rssi_state(struct btc_coexist *btcoexist, 32 u8 level_num, u8 rssi_thresh, 33 u8 rssi_thresh1) 34 { 35 struct rtl_priv *rtlpriv = btcoexist->adapter; 36 int bt_rssi = 0; 37 u8 bt_rssi_state = coex_sta->pre_bt_rssi_state; 38 39 bt_rssi = coex_sta->bt_rssi; 40 41 if (level_num == 2) { 42 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || 43 (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 44 if (bt_rssi >= 45 (rssi_thresh + BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) 46 bt_rssi_state = BTC_RSSI_STATE_HIGH; 47 else 48 bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; 49 } else { 50 if (bt_rssi < rssi_thresh) 51 bt_rssi_state = BTC_RSSI_STATE_LOW; 52 else 53 bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH; 54 } 55 } else if (level_num == 3) { 56 if (rssi_thresh > rssi_thresh1) { 57 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 58 "[BTCoex], BT Rssi thresh error!!\n"); 59 return coex_sta->pre_bt_rssi_state; 60 } 61 62 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || 63 (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 64 if (bt_rssi >= 65 (rssi_thresh + BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) 66 bt_rssi_state = BTC_RSSI_STATE_MEDIUM; 67 else 68 bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; 69 } else if ((coex_sta->pre_bt_rssi_state == 70 BTC_RSSI_STATE_MEDIUM) || 71 (coex_sta->pre_bt_rssi_state == 72 BTC_RSSI_STATE_STAY_MEDIUM)) { 73 if (bt_rssi >= (rssi_thresh1 + 74 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) 75 bt_rssi_state = BTC_RSSI_STATE_HIGH; 76 else if (bt_rssi < rssi_thresh) 77 bt_rssi_state = BTC_RSSI_STATE_LOW; 78 else 79 bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM; 80 } else { 81 if (bt_rssi < rssi_thresh1) 82 bt_rssi_state = BTC_RSSI_STATE_MEDIUM; 83 else 84 bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH; 85 } 86 } 87 88 coex_sta->pre_bt_rssi_state = bt_rssi_state; 89 90 return bt_rssi_state; 91 } 92 93 static u8 btc8192e2ant_wifi_rssi_state(struct btc_coexist *btcoexist, 94 u8 index, u8 level_num, u8 rssi_thresh, 95 u8 rssi_thresh1) 96 { 97 struct rtl_priv *rtlpriv = btcoexist->adapter; 98 int wifi_rssi = 0; 99 u8 wifi_rssi_state = coex_sta->pre_wifi_rssi_state[index]; 100 101 btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi); 102 103 if (level_num == 2) { 104 if ((coex_sta->pre_wifi_rssi_state[index] == 105 BTC_RSSI_STATE_LOW) || 106 (coex_sta->pre_wifi_rssi_state[index] == 107 BTC_RSSI_STATE_STAY_LOW)) { 108 if (wifi_rssi >= 109 (rssi_thresh + BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) 110 wifi_rssi_state = BTC_RSSI_STATE_HIGH; 111 else 112 wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW; 113 } else { 114 if (wifi_rssi < rssi_thresh) 115 wifi_rssi_state = BTC_RSSI_STATE_LOW; 116 else 117 wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH; 118 } 119 } else if (level_num == 3) { 120 if (rssi_thresh > rssi_thresh1) { 121 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 122 "[BTCoex], wifi RSSI thresh error!!\n"); 123 return coex_sta->pre_wifi_rssi_state[index]; 124 } 125 126 if ((coex_sta->pre_wifi_rssi_state[index] == 127 BTC_RSSI_STATE_LOW) || 128 (coex_sta->pre_wifi_rssi_state[index] == 129 BTC_RSSI_STATE_STAY_LOW)) { 130 if (wifi_rssi >= 131 (rssi_thresh + BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) 132 wifi_rssi_state = BTC_RSSI_STATE_MEDIUM; 133 else 134 wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW; 135 } else if ((coex_sta->pre_wifi_rssi_state[index] == 136 BTC_RSSI_STATE_MEDIUM) || 137 (coex_sta->pre_wifi_rssi_state[index] == 138 BTC_RSSI_STATE_STAY_MEDIUM)) { 139 if (wifi_rssi >= (rssi_thresh1 + 140 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) 141 wifi_rssi_state = BTC_RSSI_STATE_HIGH; 142 else if (wifi_rssi < rssi_thresh) 143 wifi_rssi_state = BTC_RSSI_STATE_LOW; 144 else 145 wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM; 146 } else { 147 if (wifi_rssi < rssi_thresh1) 148 wifi_rssi_state = BTC_RSSI_STATE_MEDIUM; 149 else 150 wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH; 151 } 152 } 153 154 coex_sta->pre_wifi_rssi_state[index] = wifi_rssi_state; 155 156 return wifi_rssi_state; 157 } 158 159 static void btc8192e2ant_monitor_bt_enable_disable(struct btc_coexist 160 *btcoexist) 161 { 162 struct rtl_priv *rtlpriv = btcoexist->adapter; 163 static bool pre_bt_disabled; 164 static u32 bt_disable_cnt; 165 bool bt_active = true, bt_disabled = false; 166 167 /* This function check if bt is disabled */ 168 169 if (coex_sta->high_priority_tx == 0 && 170 coex_sta->high_priority_rx == 0 && 171 coex_sta->low_priority_tx == 0 && 172 coex_sta->low_priority_rx == 0) 173 bt_active = false; 174 175 if (coex_sta->high_priority_tx == 0xffff && 176 coex_sta->high_priority_rx == 0xffff && 177 coex_sta->low_priority_tx == 0xffff && 178 coex_sta->low_priority_rx == 0xffff) 179 bt_active = false; 180 181 if (bt_active) { 182 bt_disable_cnt = 0; 183 bt_disabled = false; 184 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE, 185 &bt_disabled); 186 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 187 "[BTCoex], BT is enabled !!\n"); 188 } else { 189 bt_disable_cnt++; 190 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 191 "[BTCoex], bt all counters = 0, %d times!!\n", 192 bt_disable_cnt); 193 if (bt_disable_cnt >= 2) { 194 bt_disabled = true; 195 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE, 196 &bt_disabled); 197 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 198 "[BTCoex], BT is disabled !!\n"); 199 } 200 } 201 if (pre_bt_disabled != bt_disabled) { 202 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 203 "[BTCoex], BT is from %s to %s!!\n", 204 (pre_bt_disabled ? "disabled" : "enabled"), 205 (bt_disabled ? "disabled" : "enabled")); 206 pre_bt_disabled = bt_disabled; 207 } 208 } 209 210 static u32 btc8192e2ant_decide_ra_mask(struct btc_coexist *btcoexist, 211 u8 ss_type, u32 ra_mask_type) 212 { 213 u32 dis_ra_mask = 0x0; 214 215 switch (ra_mask_type) { 216 case 0: /* normal mode */ 217 if (ss_type == 2) 218 dis_ra_mask = 0x0; /* enable 2ss */ 219 else 220 dis_ra_mask = 0xfff00000; /* disable 2ss */ 221 break; 222 case 1: /* disable cck 1/2 */ 223 if (ss_type == 2) 224 dis_ra_mask = 0x00000003; /* enable 2ss */ 225 else 226 dis_ra_mask = 0xfff00003; /* disable 2ss */ 227 break; 228 case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */ 229 if (ss_type == 2) 230 dis_ra_mask = 0x0001f1f7; /* enable 2ss */ 231 else 232 dis_ra_mask = 0xfff1f1f7; /* disable 2ss */ 233 break; 234 default: 235 break; 236 } 237 238 return dis_ra_mask; 239 } 240 241 static void btc8192e2ant_update_ra_mask(struct btc_coexist *btcoexist, 242 bool force_exec, u32 dis_rate_mask) 243 { 244 coex_dm->cur_ra_mask = dis_rate_mask; 245 246 if (force_exec || (coex_dm->pre_ra_mask != coex_dm->cur_ra_mask)) 247 btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_RAMASK, 248 &coex_dm->cur_ra_mask); 249 coex_dm->pre_ra_mask = coex_dm->cur_ra_mask; 250 } 251 252 static void btc8192e2ant_auto_rate_fallback_retry(struct btc_coexist *btcoexist, 253 bool force_exec, u8 type) 254 { 255 bool wifi_under_b_mode = false; 256 257 coex_dm->cur_arfr_type = type; 258 259 if (force_exec || (coex_dm->pre_arfr_type != coex_dm->cur_arfr_type)) { 260 switch (coex_dm->cur_arfr_type) { 261 case 0: /* normal mode */ 262 btcoexist->btc_write_4byte(btcoexist, 0x430, 263 coex_dm->backup_arfr_cnt1); 264 btcoexist->btc_write_4byte(btcoexist, 0x434, 265 coex_dm->backup_arfr_cnt2); 266 break; 267 case 1: 268 btcoexist->btc_get(btcoexist, 269 BTC_GET_BL_WIFI_UNDER_B_MODE, 270 &wifi_under_b_mode); 271 if (wifi_under_b_mode) { 272 btcoexist->btc_write_4byte(btcoexist, 0x430, 273 0x0); 274 btcoexist->btc_write_4byte(btcoexist, 0x434, 275 0x01010101); 276 } else { 277 btcoexist->btc_write_4byte(btcoexist, 0x430, 278 0x0); 279 btcoexist->btc_write_4byte(btcoexist, 0x434, 280 0x04030201); 281 } 282 break; 283 default: 284 break; 285 } 286 } 287 288 coex_dm->pre_arfr_type = coex_dm->cur_arfr_type; 289 } 290 291 static void btc8192e2ant_retry_limit(struct btc_coexist *btcoexist, 292 bool force_exec, u8 type) 293 { 294 coex_dm->cur_retry_limit_type = type; 295 296 if (force_exec || (coex_dm->pre_retry_limit_type != 297 coex_dm->cur_retry_limit_type)) { 298 switch (coex_dm->cur_retry_limit_type) { 299 case 0: /* normal mode */ 300 btcoexist->btc_write_2byte(btcoexist, 0x42a, 301 coex_dm->backup_retry_limit); 302 break; 303 case 1: /* retry limit = 8 */ 304 btcoexist->btc_write_2byte(btcoexist, 0x42a, 0x0808); 305 break; 306 default: 307 break; 308 } 309 } 310 311 coex_dm->pre_retry_limit_type = coex_dm->cur_retry_limit_type; 312 } 313 314 static void btc8192e2ant_ampdu_maxtime(struct btc_coexist *btcoexist, 315 bool force_exec, u8 type) 316 { 317 coex_dm->cur_ampdu_time_type = type; 318 319 if (force_exec || (coex_dm->pre_ampdu_time_type != 320 coex_dm->cur_ampdu_time_type)) { 321 switch (coex_dm->cur_ampdu_time_type) { 322 case 0: /* normal mode */ 323 btcoexist->btc_write_1byte(btcoexist, 0x456, 324 coex_dm->backup_ampdu_maxtime); 325 break; 326 case 1: /* AMPDU time = 0x38 * 32us */ 327 btcoexist->btc_write_1byte(btcoexist, 0x456, 0x38); 328 break; 329 default: 330 break; 331 } 332 } 333 334 coex_dm->pre_ampdu_time_type = coex_dm->cur_ampdu_time_type; 335 } 336 337 static void btc8192e2ant_limited_tx(struct btc_coexist *btcoexist, 338 bool force_exec, u8 ra_mask_type, 339 u8 arfr_type, u8 retry_limit_type, 340 u8 ampdu_time_type) 341 { 342 u32 dis_ra_mask = 0x0; 343 344 coex_dm->cur_ra_mask_type = ra_mask_type; 345 dis_ra_mask = 346 btc8192e2ant_decide_ra_mask(btcoexist, coex_dm->cur_ss_type, 347 ra_mask_type); 348 btc8192e2ant_update_ra_mask(btcoexist, force_exec, dis_ra_mask); 349 btc8192e2ant_auto_rate_fallback_retry(btcoexist, force_exec, arfr_type); 350 btc8192e2ant_retry_limit(btcoexist, force_exec, retry_limit_type); 351 btc8192e2ant_ampdu_maxtime(btcoexist, force_exec, ampdu_time_type); 352 } 353 354 static void btc8192e2ant_limited_rx(struct btc_coexist *btcoexist, 355 bool force_exec, bool rej_ap_agg_pkt, 356 bool bt_ctrl_agg_buf_size, 357 u8 agg_buf_size) 358 { 359 bool reject_rx_agg = rej_ap_agg_pkt; 360 bool bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size; 361 u8 rx_agg_size = agg_buf_size; 362 363 /********************************************* 364 * Rx Aggregation related setting 365 *********************************************/ 366 btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, 367 &reject_rx_agg); 368 /* decide BT control aggregation buf size or not */ 369 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, 370 &bt_ctrl_rx_agg_size); 371 /* aggregation buf size, only work 372 * when BT control Rx aggregation size. 373 */ 374 btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size); 375 /* real update aggregation setting */ 376 btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); 377 } 378 379 static void btc8192e2ant_monitor_bt_ctr(struct btc_coexist *btcoexist) 380 { 381 struct rtl_priv *rtlpriv = btcoexist->adapter; 382 u32 reg_hp_txrx, reg_lp_txrx, u32tmp; 383 u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0; 384 385 reg_hp_txrx = 0x770; 386 reg_lp_txrx = 0x774; 387 388 u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx); 389 reg_hp_tx = u32tmp & MASKLWORD; 390 reg_hp_rx = (u32tmp & MASKHWORD) >> 16; 391 392 u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx); 393 reg_lp_tx = u32tmp & MASKLWORD; 394 reg_lp_rx = (u32tmp & MASKHWORD) >> 16; 395 396 coex_sta->high_priority_tx = reg_hp_tx; 397 coex_sta->high_priority_rx = reg_hp_rx; 398 coex_sta->low_priority_tx = reg_lp_tx; 399 coex_sta->low_priority_rx = reg_lp_rx; 400 401 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 402 "[BTCoex] High Priority Tx/Rx (reg 0x%x) = 0x%x(%d)/0x%x(%d)\n", 403 reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx); 404 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 405 "[BTCoex] Low Priority Tx/Rx (reg 0x%x) = 0x%x(%d)/0x%x(%d)\n", 406 reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx); 407 408 /* reset counter */ 409 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc); 410 } 411 412 static void btc8192e2ant_query_bt_info(struct btc_coexist *btcoexist) 413 { 414 struct rtl_priv *rtlpriv = btcoexist->adapter; 415 u8 h2c_parameter[1] = {0}; 416 417 coex_sta->c2h_bt_info_req_sent = true; 418 419 h2c_parameter[0] |= BIT0; /* trigger */ 420 421 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 422 "[BTCoex], Query Bt Info, FW write 0x61 = 0x%x\n", 423 h2c_parameter[0]); 424 425 btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter); 426 } 427 428 static 429 bool btc8192e2ant_is_wifi_status_changed(struct btc_coexist *btcoexist) 430 { 431 static bool pre_wifi_busy = false, pre_under_4way = false, 432 pre_bt_hs_on = false; 433 bool wifi_busy = false, under_4way = false, bt_hs_on = false; 434 bool wifi_connected = false; 435 436 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, 437 &wifi_connected); 438 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); 439 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); 440 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, 441 &under_4way); 442 443 if (wifi_connected) { 444 if (wifi_busy != pre_wifi_busy) { 445 pre_wifi_busy = wifi_busy; 446 return true; 447 } 448 if (under_4way != pre_under_4way) { 449 pre_under_4way = under_4way; 450 return true; 451 } 452 if (bt_hs_on != pre_bt_hs_on) { 453 pre_bt_hs_on = bt_hs_on; 454 return true; 455 } 456 } 457 458 return false; 459 } 460 461 static void btc8192e2ant_update_bt_link_info(struct btc_coexist *btcoexist) 462 { 463 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; 464 bool bt_hs_on = false; 465 466 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); 467 468 bt_link_info->bt_link_exist = coex_sta->bt_link_exist; 469 bt_link_info->sco_exist = coex_sta->sco_exist; 470 bt_link_info->a2dp_exist = coex_sta->a2dp_exist; 471 bt_link_info->pan_exist = coex_sta->pan_exist; 472 bt_link_info->hid_exist = coex_sta->hid_exist; 473 474 /* work around for HS mode. */ 475 if (bt_hs_on) { 476 bt_link_info->pan_exist = true; 477 bt_link_info->bt_link_exist = true; 478 } 479 480 /* check if Sco only */ 481 if (bt_link_info->sco_exist && 482 !bt_link_info->a2dp_exist && 483 !bt_link_info->pan_exist && 484 !bt_link_info->hid_exist) 485 bt_link_info->sco_only = true; 486 else 487 bt_link_info->sco_only = false; 488 489 /* check if A2dp only */ 490 if (!bt_link_info->sco_exist && 491 bt_link_info->a2dp_exist && 492 !bt_link_info->pan_exist && 493 !bt_link_info->hid_exist) 494 bt_link_info->a2dp_only = true; 495 else 496 bt_link_info->a2dp_only = false; 497 498 /* check if Pan only */ 499 if (!bt_link_info->sco_exist && 500 !bt_link_info->a2dp_exist && 501 bt_link_info->pan_exist && 502 !bt_link_info->hid_exist) 503 bt_link_info->pan_only = true; 504 else 505 bt_link_info->pan_only = false; 506 507 /* check if Hid only */ 508 if (!bt_link_info->sco_exist && 509 !bt_link_info->a2dp_exist && 510 !bt_link_info->pan_exist && 511 bt_link_info->hid_exist) 512 bt_link_info->hid_only = true; 513 else 514 bt_link_info->hid_only = false; 515 } 516 517 static u8 btc8192e2ant_action_algorithm(struct btc_coexist *btcoexist) 518 { 519 struct rtl_priv *rtlpriv = btcoexist->adapter; 520 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; 521 struct btc_stack_info *stack_info = &btcoexist->stack_info; 522 bool bt_hs_on = false; 523 u8 algorithm = BT_8192E_2ANT_COEX_ALGO_UNDEFINED; 524 u8 num_of_diff_profile = 0; 525 526 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); 527 528 if (!bt_link_info->bt_link_exist) { 529 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 530 "No BT link exists!!!\n"); 531 return algorithm; 532 } 533 534 if (bt_link_info->sco_exist) 535 num_of_diff_profile++; 536 if (bt_link_info->hid_exist) 537 num_of_diff_profile++; 538 if (bt_link_info->pan_exist) 539 num_of_diff_profile++; 540 if (bt_link_info->a2dp_exist) 541 num_of_diff_profile++; 542 543 if (num_of_diff_profile == 1) { 544 if (bt_link_info->sco_exist) { 545 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 546 "SCO only\n"); 547 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; 548 } else { 549 if (bt_link_info->hid_exist) { 550 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 551 "HID only\n"); 552 algorithm = BT_8192E_2ANT_COEX_ALGO_HID; 553 } else if (bt_link_info->a2dp_exist) { 554 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 555 "A2DP only\n"); 556 algorithm = BT_8192E_2ANT_COEX_ALGO_A2DP; 557 } else if (bt_link_info->pan_exist) { 558 if (bt_hs_on) { 559 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 560 DBG_LOUD, 561 "PAN(HS) only\n"); 562 algorithm = 563 BT_8192E_2ANT_COEX_ALGO_PANHS; 564 } else { 565 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 566 DBG_LOUD, 567 "PAN(EDR) only\n"); 568 algorithm = 569 BT_8192E_2ANT_COEX_ALGO_PANEDR; 570 } 571 } 572 } 573 } else if (num_of_diff_profile == 2) { 574 if (bt_link_info->sco_exist) { 575 if (bt_link_info->hid_exist) { 576 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 577 "SCO + HID\n"); 578 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; 579 } else if (bt_link_info->a2dp_exist) { 580 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 581 "SCO + A2DP ==> SCO\n"); 582 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; 583 } else if (bt_link_info->pan_exist) { 584 if (bt_hs_on) { 585 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 586 DBG_LOUD, 587 "SCO + PAN(HS)\n"); 588 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; 589 } else { 590 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 591 DBG_LOUD, 592 "SCO + PAN(EDR)\n"); 593 algorithm = 594 BT_8192E_2ANT_COEX_ALGO_SCO_PAN; 595 } 596 } 597 } else { 598 if (bt_link_info->hid_exist && 599 bt_link_info->a2dp_exist) { 600 if (stack_info->num_of_hid >= 2) { 601 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 602 DBG_LOUD, 603 "HID*2 + A2DP\n"); 604 algorithm = 605 BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR; 606 } else { 607 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 608 DBG_LOUD, 609 "HID + A2DP\n"); 610 algorithm = 611 BT_8192E_2ANT_COEX_ALGO_HID_A2DP; 612 } 613 } else if (bt_link_info->hid_exist && 614 bt_link_info->pan_exist) { 615 if (bt_hs_on) { 616 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 617 DBG_LOUD, 618 "HID + PAN(HS)\n"); 619 algorithm = BT_8192E_2ANT_COEX_ALGO_HID; 620 } else { 621 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 622 DBG_LOUD, 623 "HID + PAN(EDR)\n"); 624 algorithm = 625 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; 626 } 627 } else if (bt_link_info->pan_exist && 628 bt_link_info->a2dp_exist) { 629 if (bt_hs_on) { 630 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 631 DBG_LOUD, 632 "A2DP + PAN(HS)\n"); 633 algorithm = 634 BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS; 635 } else { 636 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 637 DBG_LOUD, 638 "A2DP + PAN(EDR)\n"); 639 algorithm = 640 BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP; 641 } 642 } 643 } 644 } else if (num_of_diff_profile == 3) { 645 if (bt_link_info->sco_exist) { 646 if (bt_link_info->hid_exist && 647 bt_link_info->a2dp_exist) { 648 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 649 "SCO + HID + A2DP ==> HID\n"); 650 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; 651 } else if (bt_link_info->hid_exist && 652 bt_link_info->pan_exist) { 653 if (bt_hs_on) { 654 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 655 DBG_LOUD, 656 "SCO + HID + PAN(HS)\n"); 657 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; 658 } else { 659 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 660 DBG_LOUD, 661 "SCO + HID + PAN(EDR)\n"); 662 algorithm = 663 BT_8192E_2ANT_COEX_ALGO_SCO_PAN; 664 } 665 } else if (bt_link_info->pan_exist && 666 bt_link_info->a2dp_exist) { 667 if (bt_hs_on) { 668 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 669 DBG_LOUD, 670 "SCO + A2DP + PAN(HS)\n"); 671 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; 672 } else { 673 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 674 DBG_LOUD, 675 "SCO + A2DP + PAN(EDR)\n"); 676 algorithm = 677 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; 678 } 679 } 680 } else { 681 if (bt_link_info->hid_exist && 682 bt_link_info->pan_exist && 683 bt_link_info->a2dp_exist) { 684 if (bt_hs_on) { 685 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 686 DBG_LOUD, 687 "HID + A2DP + PAN(HS)\n"); 688 algorithm = 689 BT_8192E_2ANT_COEX_ALGO_HID_A2DP; 690 } else { 691 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 692 DBG_LOUD, 693 "HID + A2DP + PAN(EDR)\n"); 694 algorithm = 695 BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR; 696 } 697 } 698 } 699 } else if (num_of_diff_profile >= 3) { 700 if (bt_link_info->sco_exist) { 701 if (bt_link_info->hid_exist && 702 bt_link_info->pan_exist && 703 bt_link_info->a2dp_exist) { 704 if (bt_hs_on) { 705 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 706 DBG_LOUD, 707 "ErrorSCO+HID+A2DP+PAN(HS)\n"); 708 709 } else { 710 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 711 DBG_LOUD, 712 "SCO+HID+A2DP+PAN(EDR)\n"); 713 algorithm = 714 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; 715 } 716 } 717 } 718 } 719 720 return algorithm; 721 } 722 723 static void btc8192e2ant_set_fw_dac_swing_level(struct btc_coexist *btcoexist, 724 u8 dac_swing_lvl) 725 { 726 struct rtl_priv *rtlpriv = btcoexist->adapter; 727 u8 h2c_parameter[1] = {0}; 728 729 /* There are several type of dacswing 730 * 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 731 */ 732 h2c_parameter[0] = dac_swing_lvl; 733 734 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 735 "[BTCoex], Set Dac Swing Level = 0x%x\n", dac_swing_lvl); 736 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 737 "[BTCoex], FW write 0x64 = 0x%x\n", h2c_parameter[0]); 738 739 btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter); 740 } 741 742 static void btc8192e2ant_set_fw_dec_bt_pwr(struct btc_coexist *btcoexist, 743 u8 dec_bt_pwr_lvl) 744 { 745 struct rtl_priv *rtlpriv = btcoexist->adapter; 746 u8 h2c_parameter[1] = {0}; 747 748 h2c_parameter[0] = dec_bt_pwr_lvl; 749 750 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 751 "[BTCoex] decrease Bt Power level = %d, FW write 0x62 = 0x%x\n", 752 dec_bt_pwr_lvl, h2c_parameter[0]); 753 754 btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter); 755 } 756 757 static void btc8192e2ant_dec_bt_pwr(struct btc_coexist *btcoexist, 758 bool force_exec, u8 dec_bt_pwr_lvl) 759 { 760 struct rtl_priv *rtlpriv = btcoexist->adapter; 761 762 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 763 "[BTCoex], %s Dec BT power level = %d\n", 764 force_exec ? "force to" : "", dec_bt_pwr_lvl); 765 coex_dm->cur_dec_bt_pwr = dec_bt_pwr_lvl; 766 767 if (!force_exec) { 768 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 769 "[BTCoex], preBtDecPwrLvl=%d, curBtDecPwrLvl=%d\n", 770 coex_dm->pre_dec_bt_pwr, coex_dm->cur_dec_bt_pwr); 771 } 772 btc8192e2ant_set_fw_dec_bt_pwr(btcoexist, coex_dm->cur_dec_bt_pwr); 773 774 coex_dm->pre_dec_bt_pwr = coex_dm->cur_dec_bt_pwr; 775 } 776 777 static void btc8192e2ant_set_bt_auto_report(struct btc_coexist *btcoexist, 778 bool enable_auto_report) 779 { 780 struct rtl_priv *rtlpriv = btcoexist->adapter; 781 u8 h2c_parameter[1] = {0}; 782 783 h2c_parameter[0] = 0; 784 785 if (enable_auto_report) 786 h2c_parameter[0] |= BIT0; 787 788 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 789 "[BTCoex], BT FW auto report : %s, FW write 0x68 = 0x%x\n", 790 (enable_auto_report ? "Enabled!!" : "Disabled!!"), 791 h2c_parameter[0]); 792 793 btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter); 794 } 795 796 static void btc8192e2ant_bt_auto_report(struct btc_coexist *btcoexist, 797 bool force_exec, 798 bool enable_auto_report) 799 { 800 struct rtl_priv *rtlpriv = btcoexist->adapter; 801 802 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 803 "[BTCoex], %s BT Auto report = %s\n", 804 (force_exec ? "force to" : ""), 805 ((enable_auto_report) ? "Enabled" : "Disabled")); 806 coex_dm->cur_bt_auto_report = enable_auto_report; 807 808 if (!force_exec) { 809 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 810 "[BTCoex] bPreBtAutoReport=%d, bCurBtAutoReport=%d\n", 811 coex_dm->pre_bt_auto_report, 812 coex_dm->cur_bt_auto_report); 813 814 if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report) 815 return; 816 } 817 btc8192e2ant_set_bt_auto_report(btcoexist, 818 coex_dm->cur_bt_auto_report); 819 820 coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report; 821 } 822 823 static void btc8192e2ant_fw_dac_swing_lvl(struct btc_coexist *btcoexist, 824 bool force_exec, u8 fw_dac_swing_lvl) 825 { 826 struct rtl_priv *rtlpriv = btcoexist->adapter; 827 828 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 829 "[BTCoex], %s set FW Dac Swing level = %d\n", 830 (force_exec ? "force to" : ""), fw_dac_swing_lvl); 831 coex_dm->cur_fw_dac_swing_lvl = fw_dac_swing_lvl; 832 833 if (!force_exec) { 834 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 835 "[BTCoex] preFwDacSwingLvl=%d, curFwDacSwingLvl=%d\n", 836 coex_dm->pre_fw_dac_swing_lvl, 837 coex_dm->cur_fw_dac_swing_lvl); 838 839 if (coex_dm->pre_fw_dac_swing_lvl == 840 coex_dm->cur_fw_dac_swing_lvl) 841 return; 842 } 843 844 btc8192e2ant_set_fw_dac_swing_level(btcoexist, 845 coex_dm->cur_fw_dac_swing_lvl); 846 847 coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl; 848 } 849 850 static void btc8192e2ant_set_sw_rf_rx_lpf_corner(struct btc_coexist *btcoexist, 851 bool rx_rf_shrink_on) 852 { 853 struct rtl_priv *rtlpriv = btcoexist->adapter; 854 855 if (rx_rf_shrink_on) { 856 /* Shrink RF Rx LPF corner */ 857 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 858 "[BTCoex], Shrink RF Rx LPF corner!!\n"); 859 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, 860 0xfffff, 0xffffc); 861 } else { 862 /* Resume RF Rx LPF corner 863 * After initialized, we can use coex_dm->btRf0x1eBackup 864 */ 865 if (btcoexist->initilized) { 866 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 867 "[BTCoex], Resume RF Rx LPF corner!!\n"); 868 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, 869 0xfffff, 870 coex_dm->bt_rf0x1e_backup); 871 } 872 } 873 } 874 875 static void btc8192e2ant_rf_shrink(struct btc_coexist *btcoexist, 876 bool force_exec, bool rx_rf_shrink_on) 877 { 878 struct rtl_priv *rtlpriv = btcoexist->adapter; 879 880 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 881 "[BTCoex], %s turn Rx RF Shrink = %s\n", 882 (force_exec ? "force to" : ""), 883 ((rx_rf_shrink_on) ? "ON" : "OFF")); 884 coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on; 885 886 if (!force_exec) { 887 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 888 "[BTCoex]bPreRfRxLpfShrink=%d,bCurRfRxLpfShrink=%d\n", 889 coex_dm->pre_rf_rx_lpf_shrink, 890 coex_dm->cur_rf_rx_lpf_shrink); 891 892 if (coex_dm->pre_rf_rx_lpf_shrink == 893 coex_dm->cur_rf_rx_lpf_shrink) 894 return; 895 } 896 btc8192e2ant_set_sw_rf_rx_lpf_corner(btcoexist, 897 coex_dm->cur_rf_rx_lpf_shrink); 898 899 coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink; 900 } 901 902 static void btc8192e2ant_set_dac_swing_reg(struct btc_coexist *btcoexist, 903 u32 level) 904 { 905 struct rtl_priv *rtlpriv = btcoexist->adapter; 906 u8 val = (u8)level; 907 908 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 909 "[BTCoex], Write SwDacSwing = 0x%x\n", level); 910 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x883, 0x3e, val); 911 } 912 913 static void btc8192e2ant_set_sw_full_swing(struct btc_coexist *btcoexist, 914 bool sw_dac_swing_on, 915 u32 sw_dac_swing_lvl) 916 { 917 if (sw_dac_swing_on) 918 btc8192e2ant_set_dac_swing_reg(btcoexist, sw_dac_swing_lvl); 919 else 920 btc8192e2ant_set_dac_swing_reg(btcoexist, 0x18); 921 } 922 923 static void btc8192e2ant_dac_swing(struct btc_coexist *btcoexist, 924 bool force_exec, bool dac_swing_on, 925 u32 dac_swing_lvl) 926 { 927 struct rtl_priv *rtlpriv = btcoexist->adapter; 928 929 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 930 "[BTCoex], %s turn DacSwing=%s, dac_swing_lvl = 0x%x\n", 931 (force_exec ? "force to" : ""), 932 ((dac_swing_on) ? "ON" : "OFF"), dac_swing_lvl); 933 coex_dm->cur_dac_swing_on = dac_swing_on; 934 coex_dm->cur_dac_swing_lvl = dac_swing_lvl; 935 936 if (!force_exec) { 937 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 938 "[BTCoex], bPreDacSwingOn=%d, preDacSwingLvl = 0x%x, ", 939 coex_dm->pre_dac_swing_on, 940 coex_dm->pre_dac_swing_lvl); 941 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 942 "bCurDacSwingOn=%d, curDacSwingLvl = 0x%x\n", 943 coex_dm->cur_dac_swing_on, 944 coex_dm->cur_dac_swing_lvl); 945 946 if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) && 947 (coex_dm->pre_dac_swing_lvl == coex_dm->cur_dac_swing_lvl)) 948 return; 949 } 950 mdelay(30); 951 btc8192e2ant_set_sw_full_swing(btcoexist, dac_swing_on, dac_swing_lvl); 952 953 coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on; 954 coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl; 955 } 956 957 static void btc8192e2ant_set_agc_table(struct btc_coexist *btcoexist, 958 bool agc_table_en) 959 { 960 struct rtl_priv *rtlpriv = btcoexist->adapter; 961 962 /* BB AGC Gain Table */ 963 if (agc_table_en) { 964 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 965 "[BTCoex], BB Agc Table On!\n"); 966 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x0a1A0001); 967 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x091B0001); 968 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x081C0001); 969 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x071D0001); 970 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x061E0001); 971 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x051F0001); 972 } else { 973 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 974 "[BTCoex], BB Agc Table Off!\n"); 975 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xaa1A0001); 976 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa91B0001); 977 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa81C0001); 978 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa71D0001); 979 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa61E0001); 980 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa51F0001); 981 } 982 } 983 984 static void btc8192e2ant_agc_table(struct btc_coexist *btcoexist, 985 bool force_exec, bool agc_table_en) 986 { 987 struct rtl_priv *rtlpriv = btcoexist->adapter; 988 989 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 990 "[BTCoex], %s %s Agc Table\n", 991 (force_exec ? "force to" : ""), 992 ((agc_table_en) ? "Enable" : "Disable")); 993 coex_dm->cur_agc_table_en = agc_table_en; 994 995 if (!force_exec) { 996 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 997 "[BTCoex], bPreAgcTableEn=%d, bCurAgcTableEn=%d\n", 998 coex_dm->pre_agc_table_en, 999 coex_dm->cur_agc_table_en); 1000 1001 if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en) 1002 return; 1003 } 1004 btc8192e2ant_set_agc_table(btcoexist, agc_table_en); 1005 1006 coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en; 1007 } 1008 1009 static void btc8192e2ant_set_coex_table(struct btc_coexist *btcoexist, 1010 u32 val0x6c0, u32 val0x6c4, 1011 u32 val0x6c8, u8 val0x6cc) 1012 { 1013 struct rtl_priv *rtlpriv = btcoexist->adapter; 1014 1015 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1016 "[BTCoex], set coex table, set 0x6c0 = 0x%x\n", val0x6c0); 1017 btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0); 1018 1019 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1020 "[BTCoex], set coex table, set 0x6c4 = 0x%x\n", val0x6c4); 1021 btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4); 1022 1023 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1024 "[BTCoex], set coex table, set 0x6c8 = 0x%x\n", val0x6c8); 1025 btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8); 1026 1027 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1028 "[BTCoex], set coex table, set 0x6cc = 0x%x\n", val0x6cc); 1029 btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc); 1030 } 1031 1032 static void btc8192e2ant_coex_table(struct btc_coexist *btcoexist, 1033 bool force_exec, u32 val0x6c0, u32 val0x6c4, 1034 u32 val0x6c8, u8 val0x6cc) 1035 { 1036 struct rtl_priv *rtlpriv = btcoexist->adapter; 1037 1038 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1039 "[BTCoex], %s write Coex Table 0x6c0 = 0x%x, ", 1040 (force_exec ? "force to" : ""), val0x6c0); 1041 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1042 "0x6c4 = 0x%x, 0x6c8 = 0x%x, 0x6cc = 0x%x\n", 1043 val0x6c4, val0x6c8, val0x6cc); 1044 coex_dm->cur_val0x6c0 = val0x6c0; 1045 coex_dm->cur_val0x6c4 = val0x6c4; 1046 coex_dm->cur_val0x6c8 = val0x6c8; 1047 coex_dm->cur_val0x6cc = val0x6cc; 1048 1049 if (!force_exec) { 1050 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1051 "[BTCoex], preVal0x6c0 = 0x%x, preVal0x6c4 = 0x%x, ", 1052 coex_dm->pre_val0x6c0, coex_dm->pre_val0x6c4); 1053 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1054 "preVal0x6c8 = 0x%x, preVal0x6cc = 0x%x !!\n", 1055 coex_dm->pre_val0x6c8, coex_dm->pre_val0x6cc); 1056 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1057 "[BTCoex], curVal0x6c0 = 0x%x, curVal0x6c4 = 0x%x\n", 1058 coex_dm->cur_val0x6c0, coex_dm->cur_val0x6c4); 1059 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1060 "curVal0x6c8 = 0x%x, curVal0x6cc = 0x%x !!\n", 1061 coex_dm->cur_val0x6c8, coex_dm->cur_val0x6cc); 1062 1063 if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) && 1064 (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) && 1065 (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) && 1066 (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc)) 1067 return; 1068 } 1069 btc8192e2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8, 1070 val0x6cc); 1071 1072 coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0; 1073 coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4; 1074 coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8; 1075 coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc; 1076 } 1077 1078 static void btc8192e2ant_coex_table_with_type(struct btc_coexist *btcoexist, 1079 bool force_exec, u8 type) 1080 { 1081 switch (type) { 1082 case 0: 1083 btc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555, 1084 0x5a5a5a5a, 0xffffff, 0x3); 1085 break; 1086 case 1: 1087 btc8192e2ant_coex_table(btcoexist, force_exec, 0x5a5a5a5a, 1088 0x5a5a5a5a, 0xffffff, 0x3); 1089 break; 1090 case 2: 1091 btc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555, 1092 0x5ffb5ffb, 0xffffff, 0x3); 1093 break; 1094 case 3: 1095 btc8192e2ant_coex_table(btcoexist, force_exec, 0xdfffdfff, 1096 0x5fdb5fdb, 0xffffff, 0x3); 1097 break; 1098 case 4: 1099 btc8192e2ant_coex_table(btcoexist, force_exec, 0xdfffdfff, 1100 0x5ffb5ffb, 0xffffff, 0x3); 1101 break; 1102 default: 1103 break; 1104 } 1105 } 1106 1107 static void btc8192e2ant_set_fw_ignore_wlan_act(struct btc_coexist *btcoexist, 1108 bool enable) 1109 { 1110 struct rtl_priv *rtlpriv = btcoexist->adapter; 1111 u8 h2c_parameter[1] = {0}; 1112 1113 if (enable) 1114 h2c_parameter[0] |= BIT0; /* function enable */ 1115 1116 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1117 "[BTCoex]set FW for BT Ignore Wlan_Act, FW write 0x63 = 0x%x\n", 1118 h2c_parameter[0]); 1119 1120 btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter); 1121 } 1122 1123 static void btc8192e2ant_ignore_wlan_act(struct btc_coexist *btcoexist, 1124 bool force_exec, bool enable) 1125 { 1126 struct rtl_priv *rtlpriv = btcoexist->adapter; 1127 1128 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1129 "[BTCoex], %s turn Ignore WlanAct %s\n", 1130 (force_exec ? "force to" : ""), (enable ? "ON" : "OFF")); 1131 coex_dm->cur_ignore_wlan_act = enable; 1132 1133 if (!force_exec) { 1134 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1135 "[BTCoex], bPreIgnoreWlanAct = %d ", 1136 coex_dm->pre_ignore_wlan_act); 1137 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1138 "bCurIgnoreWlanAct = %d!!\n", 1139 coex_dm->cur_ignore_wlan_act); 1140 1141 if (coex_dm->pre_ignore_wlan_act == 1142 coex_dm->cur_ignore_wlan_act) 1143 return; 1144 } 1145 btc8192e2ant_set_fw_ignore_wlan_act(btcoexist, enable); 1146 1147 coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act; 1148 } 1149 1150 static void btc8192e2ant_set_fw_ps_tdma(struct btc_coexist *btcoexist, u8 byte1, 1151 u8 byte2, u8 byte3, u8 byte4, u8 byte5) 1152 { 1153 struct rtl_priv *rtlpriv = btcoexist->adapter; 1154 1155 u8 h2c_parameter[5] = {0}; 1156 1157 h2c_parameter[0] = byte1; 1158 h2c_parameter[1] = byte2; 1159 h2c_parameter[2] = byte3; 1160 h2c_parameter[3] = byte4; 1161 h2c_parameter[4] = byte5; 1162 1163 coex_dm->ps_tdma_para[0] = byte1; 1164 coex_dm->ps_tdma_para[1] = byte2; 1165 coex_dm->ps_tdma_para[2] = byte3; 1166 coex_dm->ps_tdma_para[3] = byte4; 1167 coex_dm->ps_tdma_para[4] = byte5; 1168 1169 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1170 "[BTCoex], FW write 0x60(5bytes) = 0x%x%08x\n", 1171 h2c_parameter[0], 1172 h2c_parameter[1] << 24 | h2c_parameter[2] << 16 | 1173 h2c_parameter[3] << 8 | h2c_parameter[4]); 1174 1175 btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter); 1176 } 1177 1178 static void btc8192e2ant_sw_mechanism1(struct btc_coexist *btcoexist, 1179 bool shrink_rx_lpf, bool low_penalty_ra, 1180 bool limited_dig, bool btlan_constrain) 1181 { 1182 btc8192e2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf); 1183 } 1184 1185 static void btc8192e2ant_sw_mechanism2(struct btc_coexist *btcoexist, 1186 bool agc_table_shift, bool adc_backoff, 1187 bool sw_dac_swing, u32 dac_swing_lvl) 1188 { 1189 btc8192e2ant_agc_table(btcoexist, NORMAL_EXEC, agc_table_shift); 1190 btc8192e2ant_dac_swing(btcoexist, NORMAL_EXEC, sw_dac_swing, 1191 dac_swing_lvl); 1192 } 1193 1194 static void btc8192e2ant_ps_tdma(struct btc_coexist *btcoexist, 1195 bool force_exec, bool turn_on, u8 type) 1196 { 1197 struct rtl_priv *rtlpriv = btcoexist->adapter; 1198 1199 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1200 "[BTCoex], %s turn %s PS TDMA, type=%d\n", 1201 (force_exec ? "force to" : ""), 1202 (turn_on ? "ON" : "OFF"), type); 1203 coex_dm->cur_ps_tdma_on = turn_on; 1204 coex_dm->cur_ps_tdma = type; 1205 1206 if (!force_exec) { 1207 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1208 "[BTCoex], bPrePsTdmaOn = %d, bCurPsTdmaOn = %d!!\n", 1209 coex_dm->pre_ps_tdma_on, coex_dm->cur_ps_tdma_on); 1210 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1211 "[BTCoex], prePsTdma = %d, curPsTdma = %d!!\n", 1212 coex_dm->pre_ps_tdma, coex_dm->cur_ps_tdma); 1213 1214 if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) && 1215 (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma)) 1216 return; 1217 } 1218 if (turn_on) { 1219 switch (type) { 1220 case 1: 1221 default: 1222 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a, 1223 0x1a, 0xe1, 0x90); 1224 break; 1225 case 2: 1226 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12, 1227 0x12, 0xe1, 0x90); 1228 break; 1229 case 3: 1230 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c, 1231 0x3, 0xf1, 0x90); 1232 break; 1233 case 4: 1234 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x10, 1235 0x3, 0xf1, 0x90); 1236 break; 1237 case 5: 1238 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a, 1239 0x1a, 0x60, 0x90); 1240 break; 1241 case 6: 1242 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12, 1243 0x12, 0x60, 0x90); 1244 break; 1245 case 7: 1246 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c, 1247 0x3, 0x70, 0x90); 1248 break; 1249 case 8: 1250 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xa3, 0x10, 1251 0x3, 0x70, 0x90); 1252 break; 1253 case 9: 1254 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a, 1255 0x1a, 0xe1, 0x10); 1256 break; 1257 case 10: 1258 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12, 1259 0x12, 0xe1, 0x10); 1260 break; 1261 case 11: 1262 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c, 1263 0x3, 0xf1, 0x10); 1264 break; 1265 case 12: 1266 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x10, 1267 0x3, 0xf1, 0x10); 1268 break; 1269 case 13: 1270 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a, 1271 0x1a, 0xe0, 0x10); 1272 break; 1273 case 14: 1274 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12, 1275 0x12, 0xe0, 0x10); 1276 break; 1277 case 15: 1278 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c, 1279 0x3, 0xf0, 0x10); 1280 break; 1281 case 16: 1282 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12, 1283 0x3, 0xf0, 0x10); 1284 break; 1285 case 17: 1286 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0x61, 0x20, 1287 0x03, 0x10, 0x10); 1288 break; 1289 case 18: 1290 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x5, 1291 0x5, 0xe1, 0x90); 1292 break; 1293 case 19: 1294 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x25, 1295 0x25, 0xe1, 0x90); 1296 break; 1297 case 20: 1298 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x25, 1299 0x25, 0x60, 0x90); 1300 break; 1301 case 21: 1302 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x15, 1303 0x03, 0x70, 0x90); 1304 break; 1305 case 71: 1306 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a, 1307 0x1a, 0xe1, 0x90); 1308 break; 1309 } 1310 } else { 1311 /* disable PS tdma */ 1312 switch (type) { 1313 default: 1314 case 0: 1315 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0x8, 0x0, 0x0, 1316 0x0, 0x0); 1317 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x4); 1318 break; 1319 case 1: 1320 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0x0, 0x0, 0x0, 1321 0x8, 0x0); 1322 mdelay(5); 1323 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20); 1324 break; 1325 } 1326 } 1327 1328 /* update pre state */ 1329 coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on; 1330 coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma; 1331 } 1332 1333 static void btc8192e2ant_set_switch_ss_type(struct btc_coexist *btcoexist, 1334 u8 ss_type) 1335 { 1336 struct rtl_priv *rtlpriv = btcoexist->adapter; 1337 u8 mimops = BTC_MIMO_PS_DYNAMIC; 1338 u32 dis_ra_mask = 0x0; 1339 1340 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1341 "[BTCoex], REAL set SS Type = %d\n", ss_type); 1342 1343 dis_ra_mask = btc8192e2ant_decide_ra_mask(btcoexist, ss_type, 1344 coex_dm->cur_ra_mask_type); 1345 btc8192e2ant_update_ra_mask(btcoexist, FORCE_EXEC, dis_ra_mask); 1346 1347 if (ss_type == 1) { 1348 btc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1); 1349 /* switch ofdm path */ 1350 btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x11); 1351 btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x1); 1352 btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81111111); 1353 /* switch cck patch */ 1354 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x1); 1355 btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x81); 1356 mimops = BTC_MIMO_PS_STATIC; 1357 } else if (ss_type == 2) { 1358 btc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0); 1359 btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x33); 1360 btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x3); 1361 btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81121313); 1362 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x0); 1363 btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x41); 1364 mimops = BTC_MIMO_PS_DYNAMIC; 1365 } 1366 /* set rx 1ss or 2ss */ 1367 btcoexist->btc_set(btcoexist, BTC_SET_ACT_SEND_MIMO_PS, &mimops); 1368 } 1369 1370 static void btc8192e2ant_switch_ss_type(struct btc_coexist *btcoexist, 1371 bool force_exec, u8 new_ss_type) 1372 { 1373 struct rtl_priv *rtlpriv = btcoexist->adapter; 1374 1375 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1376 "[BTCoex], %s Switch SS Type = %d\n", 1377 (force_exec ? "force to" : ""), new_ss_type); 1378 coex_dm->cur_ss_type = new_ss_type; 1379 1380 if (!force_exec) { 1381 if (coex_dm->pre_ss_type == coex_dm->cur_ss_type) 1382 return; 1383 } 1384 btc8192e2ant_set_switch_ss_type(btcoexist, coex_dm->cur_ss_type); 1385 1386 coex_dm->pre_ss_type = coex_dm->cur_ss_type; 1387 } 1388 1389 static void btc8192e2ant_coex_all_off(struct btc_coexist *btcoexist) 1390 { 1391 /* fw all off */ 1392 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); 1393 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 1394 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 1395 1396 /* sw all off */ 1397 btc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false); 1398 btc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); 1399 1400 /* hw all off */ 1401 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); 1402 } 1403 1404 static void btc8192e2ant_init_coex_dm(struct btc_coexist *btcoexist) 1405 { 1406 /* force to reset coex mechanism */ 1407 1408 btc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1); 1409 btc8192e2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6); 1410 btc8192e2ant_dec_bt_pwr(btcoexist, FORCE_EXEC, 0); 1411 1412 btc8192e2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0); 1413 btc8192e2ant_switch_ss_type(btcoexist, FORCE_EXEC, 2); 1414 1415 btc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false); 1416 btc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); 1417 } 1418 1419 static void btc8192e2ant_action_bt_inquiry(struct btc_coexist *btcoexist) 1420 { 1421 bool low_pwr_disable = true; 1422 1423 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER, 1424 &low_pwr_disable); 1425 1426 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 1427 1428 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); 1429 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3); 1430 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 1431 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 1432 1433 btc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false); 1434 btc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); 1435 } 1436 1437 static bool btc8192e2ant_is_common_action(struct btc_coexist *btcoexist) 1438 { 1439 struct rtl_priv *rtlpriv = btcoexist->adapter; 1440 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; 1441 bool common = false, wifi_connected = false, wifi_busy = false; 1442 bool bt_hs_on = false, low_pwr_disable = false; 1443 1444 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); 1445 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, 1446 &wifi_connected); 1447 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); 1448 1449 if (bt_link_info->sco_exist || bt_link_info->hid_exist) 1450 btc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 0, 0, 0); 1451 else 1452 btc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0); 1453 1454 if (!wifi_connected) { 1455 low_pwr_disable = false; 1456 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER, 1457 &low_pwr_disable); 1458 1459 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1460 "[BTCoex], Wifi non-connected idle!!\n"); 1461 1462 if ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE == 1463 coex_dm->bt_status) || 1464 (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE == 1465 coex_dm->bt_status)) { 1466 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 2); 1467 btc8192e2ant_coex_table_with_type(btcoexist, 1468 NORMAL_EXEC, 1); 1469 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0); 1470 } else { 1471 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 1472 btc8192e2ant_coex_table_with_type(btcoexist, 1473 NORMAL_EXEC, 0); 1474 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); 1475 } 1476 1477 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 1478 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 1479 1480 btc8192e2ant_sw_mechanism1(btcoexist, false, false, false, 1481 false); 1482 btc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 1483 0x18); 1484 1485 common = true; 1486 } else { 1487 if (BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE == 1488 coex_dm->bt_status) { 1489 low_pwr_disable = false; 1490 btcoexist->btc_set(btcoexist, 1491 BTC_SET_ACT_DISABLE_LOW_POWER, 1492 &low_pwr_disable); 1493 1494 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1495 "Wifi connected + BT non connected-idle!!\n"); 1496 1497 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 2); 1498 btc8192e2ant_coex_table_with_type(btcoexist, 1499 NORMAL_EXEC, 1); 1500 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0); 1501 btc8192e2ant_fw_dac_swing_lvl(btcoexist, 1502 NORMAL_EXEC, 6); 1503 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 1504 1505 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 1506 false, false); 1507 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 1508 false, 0x18); 1509 1510 common = true; 1511 } else if (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE == 1512 coex_dm->bt_status) { 1513 low_pwr_disable = true; 1514 btcoexist->btc_set(btcoexist, 1515 BTC_SET_ACT_DISABLE_LOW_POWER, 1516 &low_pwr_disable); 1517 1518 if (bt_hs_on) 1519 return false; 1520 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1521 "Wifi connected + BT connected-idle!!\n"); 1522 1523 btc8192e2ant_switch_ss_type(btcoexist, 1524 NORMAL_EXEC, 2); 1525 btc8192e2ant_coex_table_with_type(btcoexist, 1526 NORMAL_EXEC, 1); 1527 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1528 false, 0); 1529 btc8192e2ant_fw_dac_swing_lvl(btcoexist, 1530 NORMAL_EXEC, 6); 1531 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 1532 1533 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 1534 false, false); 1535 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 1536 false, 0x18); 1537 1538 common = true; 1539 } else { 1540 low_pwr_disable = true; 1541 btcoexist->btc_set(btcoexist, 1542 BTC_SET_ACT_DISABLE_LOW_POWER, 1543 &low_pwr_disable); 1544 1545 if (wifi_busy) { 1546 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1547 "Wifi Connected-Busy + BT Busy!!\n"); 1548 common = false; 1549 } else { 1550 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1551 "Wifi Connected-Idle + BT Busy!!\n"); 1552 1553 btc8192e2ant_switch_ss_type(btcoexist, 1554 NORMAL_EXEC, 1); 1555 btc8192e2ant_coex_table_with_type(btcoexist, 1556 NORMAL_EXEC, 1557 2); 1558 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1559 true, 21); 1560 btc8192e2ant_fw_dac_swing_lvl(btcoexist, 1561 NORMAL_EXEC, 6); 1562 btc8192e2ant_dec_bt_pwr(btcoexist, 1563 NORMAL_EXEC, 0); 1564 btc8192e2ant_sw_mechanism1(btcoexist, false, 1565 false, false, false); 1566 btc8192e2ant_sw_mechanism2(btcoexist, false, 1567 false, false, 0x18); 1568 common = true; 1569 } 1570 } 1571 } 1572 return common; 1573 } 1574 1575 static void btc8192e2ant_tdma_duration_adjust(struct btc_coexist *btcoexist, 1576 bool sco_hid, bool tx_pause, 1577 u8 max_interval) 1578 { 1579 struct rtl_priv *rtlpriv = btcoexist->adapter; 1580 static int up, dn, m, n, wait_cnt; 1581 /* 0: no change, +1: increase WiFi duration, 1582 * -1: decrease WiFi duration 1583 */ 1584 int result; 1585 u8 retry_cnt = 0; 1586 1587 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1588 "[BTCoex], TdmaDurationAdjust()\n"); 1589 1590 if (!coex_dm->auto_tdma_adjust) { 1591 coex_dm->auto_tdma_adjust = true; 1592 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1593 "[BTCoex], first run TdmaDurationAdjust()!!\n"); 1594 if (sco_hid) { 1595 if (tx_pause) { 1596 if (max_interval == 1) { 1597 btc8192e2ant_ps_tdma(btcoexist, 1598 NORMAL_EXEC, 1599 true, 13); 1600 coex_dm->tdma_adj_type = 13; 1601 } else if (max_interval == 2) { 1602 btc8192e2ant_ps_tdma(btcoexist, 1603 NORMAL_EXEC, 1604 true, 14); 1605 coex_dm->tdma_adj_type = 14; 1606 } else { 1607 btc8192e2ant_ps_tdma(btcoexist, 1608 NORMAL_EXEC, 1609 true, 15); 1610 coex_dm->tdma_adj_type = 15; 1611 } 1612 } else { 1613 if (max_interval == 1) { 1614 btc8192e2ant_ps_tdma(btcoexist, 1615 NORMAL_EXEC, 1616 true, 9); 1617 coex_dm->tdma_adj_type = 9; 1618 } else if (max_interval == 2) { 1619 btc8192e2ant_ps_tdma(btcoexist, 1620 NORMAL_EXEC, 1621 true, 10); 1622 coex_dm->tdma_adj_type = 10; 1623 } else { 1624 btc8192e2ant_ps_tdma(btcoexist, 1625 NORMAL_EXEC, 1626 true, 11); 1627 coex_dm->tdma_adj_type = 11; 1628 } 1629 } 1630 } else { 1631 if (tx_pause) { 1632 if (max_interval == 1) { 1633 btc8192e2ant_ps_tdma(btcoexist, 1634 NORMAL_EXEC, 1635 true, 5); 1636 coex_dm->tdma_adj_type = 5; 1637 } else if (max_interval == 2) { 1638 btc8192e2ant_ps_tdma(btcoexist, 1639 NORMAL_EXEC, 1640 true, 6); 1641 coex_dm->tdma_adj_type = 6; 1642 } else { 1643 btc8192e2ant_ps_tdma(btcoexist, 1644 NORMAL_EXEC, 1645 true, 7); 1646 coex_dm->tdma_adj_type = 7; 1647 } 1648 } else { 1649 if (max_interval == 1) { 1650 btc8192e2ant_ps_tdma(btcoexist, 1651 NORMAL_EXEC, 1652 true, 1); 1653 coex_dm->tdma_adj_type = 1; 1654 } else if (max_interval == 2) { 1655 btc8192e2ant_ps_tdma(btcoexist, 1656 NORMAL_EXEC, 1657 true, 2); 1658 coex_dm->tdma_adj_type = 2; 1659 } else { 1660 btc8192e2ant_ps_tdma(btcoexist, 1661 NORMAL_EXEC, 1662 true, 3); 1663 coex_dm->tdma_adj_type = 3; 1664 } 1665 } 1666 } 1667 1668 up = 0; 1669 dn = 0; 1670 m = 1; 1671 n = 3; 1672 result = 0; 1673 wait_cnt = 0; 1674 } else { 1675 /* accquire the BT TRx retry count from BT_Info byte2 */ 1676 retry_cnt = coex_sta->bt_retry_cnt; 1677 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1678 "[BTCoex], retry_cnt = %d\n", retry_cnt); 1679 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1680 "[BTCoex], up=%d, dn=%d, m=%d, n=%d, wait_cnt=%d\n", 1681 up, dn, m, n, wait_cnt); 1682 result = 0; 1683 wait_cnt++; 1684 /* no retry in the last 2-second duration */ 1685 if (retry_cnt == 0) { 1686 up++; 1687 dn--; 1688 1689 if (dn <= 0) 1690 dn = 0; 1691 1692 if (up >= n) { 1693 wait_cnt = 0; 1694 n = 3; 1695 up = 0; 1696 dn = 0; 1697 result = 1; 1698 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1699 "[BTCoex]Increase wifi duration!!\n"); 1700 } 1701 } else if (retry_cnt <= 3) { 1702 up--; 1703 dn++; 1704 1705 if (up <= 0) 1706 up = 0; 1707 1708 if (dn == 2) { 1709 if (wait_cnt <= 2) 1710 m++; 1711 else 1712 m = 1; 1713 1714 if (m >= 20) 1715 m = 20; 1716 1717 n = 3 * m; 1718 up = 0; 1719 dn = 0; 1720 wait_cnt = 0; 1721 result = -1; 1722 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1723 "Reduce wifi duration for retry<3\n"); 1724 } 1725 } else { 1726 if (wait_cnt == 1) 1727 m++; 1728 else 1729 m = 1; 1730 1731 if (m >= 20) 1732 m = 20; 1733 1734 n = 3*m; 1735 up = 0; 1736 dn = 0; 1737 wait_cnt = 0; 1738 result = -1; 1739 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1740 "Decrease wifi duration for retryCounter>3!!\n"); 1741 } 1742 1743 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1744 "[BTCoex], max Interval = %d\n", max_interval); 1745 } 1746 1747 /* if current PsTdma not match with 1748 * the recorded one (when scan, dhcp...), 1749 * then we have to adjust it back to the previous record one. 1750 */ 1751 if (coex_dm->cur_ps_tdma != coex_dm->tdma_adj_type) { 1752 bool scan = false, link = false, roam = false; 1753 1754 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1755 "[BTCoex], PsTdma type mismatch!!!, "); 1756 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1757 "curPsTdma=%d, recordPsTdma=%d\n", 1758 coex_dm->cur_ps_tdma, coex_dm->tdma_adj_type); 1759 1760 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); 1761 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link); 1762 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); 1763 1764 if (!scan && !link && !roam) 1765 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1766 true, coex_dm->tdma_adj_type); 1767 else 1768 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1769 "[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n"); 1770 } 1771 } 1772 1773 /* SCO only or SCO+PAN(HS) */ 1774 static void btc8192e2ant_action_sco(struct btc_coexist *btcoexist) 1775 { 1776 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; 1777 u32 wifi_bw; 1778 1779 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 1780 1781 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 1782 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 1783 1784 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 1785 1786 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); 1787 1788 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 1789 1790 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 1791 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 1792 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 1793 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13); 1794 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 1795 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 1796 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 1797 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9); 1798 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 1799 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 1800 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 1801 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9); 1802 } 1803 1804 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 1805 1806 /* sw mechanism */ 1807 if (BTC_WIFI_BW_HT40 == wifi_bw) { 1808 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 1809 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 1810 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 1811 false, false); 1812 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 1813 false, 0x6); 1814 } else { 1815 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 1816 false, false); 1817 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 1818 false, 0x6); 1819 } 1820 } else { 1821 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 1822 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 1823 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 1824 false, false); 1825 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 1826 false, 0x6); 1827 } else { 1828 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 1829 false, false); 1830 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 1831 false, 0x6); 1832 } 1833 } 1834 } 1835 1836 static void btc8192e2ant_action_sco_pan(struct btc_coexist *btcoexist) 1837 { 1838 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; 1839 u32 wifi_bw; 1840 1841 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 1842 1843 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 1844 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 1845 1846 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 1847 1848 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); 1849 1850 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 1851 1852 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 1853 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 1854 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 1855 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14); 1856 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 1857 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 1858 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 1859 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10); 1860 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 1861 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 1862 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 1863 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10); 1864 } 1865 1866 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 1867 1868 /* sw mechanism */ 1869 if (BTC_WIFI_BW_HT40 == wifi_bw) { 1870 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 1871 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 1872 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 1873 false, false); 1874 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 1875 false, 0x6); 1876 } else { 1877 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 1878 false, false); 1879 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 1880 false, 0x6); 1881 } 1882 } else { 1883 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 1884 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 1885 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 1886 false, false); 1887 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 1888 false, 0x6); 1889 } else { 1890 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 1891 false, false); 1892 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 1893 false, 0x6); 1894 } 1895 } 1896 } 1897 1898 static void btc8192e2ant_action_hid(struct btc_coexist *btcoexist) 1899 { 1900 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; 1901 u32 wifi_bw; 1902 1903 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 1904 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 1905 1906 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 1907 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 1908 1909 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 1910 1911 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 1912 1913 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); 1914 1915 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 1916 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 1917 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 1918 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13); 1919 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 1920 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 1921 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 1922 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9); 1923 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 1924 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 1925 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 1926 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9); 1927 } 1928 1929 /* sw mechanism */ 1930 if (BTC_WIFI_BW_HT40 == wifi_bw) { 1931 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 1932 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 1933 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 1934 false, false); 1935 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 1936 false, 0x18); 1937 } else { 1938 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 1939 false, false); 1940 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 1941 false, 0x18); 1942 } 1943 } else { 1944 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 1945 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 1946 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 1947 false, false); 1948 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 1949 false, 0x18); 1950 } else { 1951 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 1952 false, false); 1953 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 1954 false, 0x18); 1955 } 1956 } 1957 } 1958 1959 /* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */ 1960 static void btc8192e2ant_action_a2dp(struct btc_coexist *btcoexist) 1961 { 1962 struct rtl_priv *rtlpriv = btcoexist->adapter; 1963 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; 1964 u32 wifi_bw; 1965 bool long_dist = false; 1966 1967 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 1968 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 1969 1970 if ((bt_rssi_state == BTC_RSSI_STATE_LOW || 1971 bt_rssi_state == BTC_RSSI_STATE_STAY_LOW) && 1972 (wifi_rssi_state == BTC_RSSI_STATE_LOW || 1973 wifi_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 1974 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1975 "[BTCoex], A2dp, wifi/bt rssi both LOW!!\n"); 1976 long_dist = true; 1977 } 1978 if (long_dist) { 1979 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 2); 1980 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true, 1981 0x4); 1982 } else { 1983 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 1984 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 1985 0x8); 1986 } 1987 1988 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 1989 1990 if (long_dist) 1991 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); 1992 else 1993 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); 1994 1995 if (long_dist) { 1996 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 17); 1997 coex_dm->auto_tdma_adjust = false; 1998 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 1999 } else { 2000 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 2001 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 2002 btc8192e2ant_tdma_duration_adjust(btcoexist, false, 2003 true, 1); 2004 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 2005 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 2006 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 2007 btc8192e2ant_tdma_duration_adjust(btcoexist, false, 2008 false, 1); 2009 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 2010 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2011 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2012 btc8192e2ant_tdma_duration_adjust(btcoexist, false, 2013 false, 1); 2014 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 2015 } 2016 } 2017 2018 /* sw mechanism */ 2019 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2020 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2021 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2022 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2023 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2024 false, false); 2025 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2026 false, 0x18); 2027 } else { 2028 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2029 false, false); 2030 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2031 false, 0x18); 2032 } 2033 } else { 2034 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2035 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2036 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2037 false, false); 2038 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2039 false, 0x18); 2040 } else { 2041 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2042 false, false); 2043 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2044 false, 0x18); 2045 } 2046 } 2047 } 2048 2049 static void btc8192e2ant_action_a2dp_pan_hs(struct btc_coexist *btcoexist) 2050 { 2051 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; 2052 u32 wifi_bw; 2053 2054 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 2055 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 2056 2057 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 2058 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 2059 2060 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 2061 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); 2062 2063 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 2064 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 2065 btc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 2); 2066 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 2067 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 2068 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 2069 btc8192e2ant_tdma_duration_adjust(btcoexist, false, false, 2); 2070 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 2071 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2072 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2073 btc8192e2ant_tdma_duration_adjust(btcoexist, false, false, 2); 2074 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 2075 } 2076 2077 /* sw mechanism */ 2078 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2079 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2080 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2081 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2082 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2083 false, false); 2084 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2085 true, 0x6); 2086 } else { 2087 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2088 false, false); 2089 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2090 true, 0x6); 2091 } 2092 } else { 2093 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2094 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2095 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2096 false, false); 2097 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2098 true, 0x6); 2099 } else { 2100 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2101 false, false); 2102 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2103 true, 0x6); 2104 } 2105 } 2106 } 2107 2108 static void btc8192e2ant_action_pan_edr(struct btc_coexist *btcoexist) 2109 { 2110 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; 2111 u32 wifi_bw; 2112 2113 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 2114 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 2115 2116 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 2117 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 2118 2119 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 2120 2121 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); 2122 2123 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 2124 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 2125 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 2126 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5); 2127 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 2128 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 2129 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 2130 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1); 2131 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2132 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2133 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 2134 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1); 2135 } 2136 2137 /* sw mechanism */ 2138 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2139 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2140 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2141 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2142 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2143 false, false); 2144 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2145 false, 0x18); 2146 } else { 2147 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2148 false, false); 2149 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2150 false, 0x18); 2151 } 2152 } else { 2153 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2154 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2155 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2156 false, false); 2157 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2158 false, 0x18); 2159 } else { 2160 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2161 false, false); 2162 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2163 false, 0x18); 2164 } 2165 } 2166 } 2167 2168 /* PAN(HS) only */ 2169 static void btc8192e2ant_action_pan_hs(struct btc_coexist *btcoexist) 2170 { 2171 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; 2172 u32 wifi_bw; 2173 2174 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 2175 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 2176 2177 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 2178 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 2179 2180 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 2181 2182 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); 2183 2184 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 2185 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 2186 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 2187 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 2188 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 2189 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 2190 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2191 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2192 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 2193 } 2194 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); 2195 2196 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2197 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2198 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2199 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2200 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2201 false, false); 2202 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2203 false, 0x18); 2204 } else { 2205 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2206 false, false); 2207 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2208 false, 0x18); 2209 } 2210 } else { 2211 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2212 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2213 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2214 false, false); 2215 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2216 false, 0x18); 2217 } else { 2218 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2219 false, false); 2220 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2221 false, 0x18); 2222 } 2223 } 2224 } 2225 2226 /* PAN(EDR)+A2DP */ 2227 static void btc8192e2ant_action_pan_edr_a2dp(struct btc_coexist *btcoexist) 2228 { 2229 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; 2230 u32 wifi_bw; 2231 2232 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 2233 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 2234 2235 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 2236 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 2237 2238 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 2239 2240 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); 2241 2242 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2243 2244 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 2245 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 2246 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 2247 btc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 3); 2248 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 2249 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 2250 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 2251 btc8192e2ant_tdma_duration_adjust(btcoexist, false, false, 3); 2252 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2253 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2254 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 2255 btc8192e2ant_tdma_duration_adjust(btcoexist, false, false, 3); 2256 } 2257 2258 /* sw mechanism */ 2259 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2260 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2261 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2262 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2263 false, false); 2264 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2265 false, 0x18); 2266 } else { 2267 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2268 false, false); 2269 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2270 false, 0x18); 2271 } 2272 } else { 2273 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2274 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2275 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2276 false, false); 2277 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2278 false, 0x18); 2279 } else { 2280 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2281 false, false); 2282 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2283 false, 0x18); 2284 } 2285 } 2286 } 2287 2288 static void btc8192e2ant_action_pan_edr_hid(struct btc_coexist *btcoexist) 2289 { 2290 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; 2291 u32 wifi_bw; 2292 2293 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 2294 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 2295 2296 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2297 2298 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 2299 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 2300 2301 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 2302 2303 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); 2304 2305 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 2306 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 2307 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 2308 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14); 2309 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 2310 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 2311 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 2312 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10); 2313 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2314 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2315 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 2316 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2317 true, 10); 2318 } 2319 2320 /* sw mechanism */ 2321 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2322 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2323 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2324 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 2325 false, false); 2326 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2327 false, 0x18); 2328 } else { 2329 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 2330 false, false); 2331 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2332 false, 0x18); 2333 } 2334 } else { 2335 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2336 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2337 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 2338 false, false); 2339 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2340 false, 0x18); 2341 } else { 2342 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 2343 false, false); 2344 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2345 false, 0x18); 2346 } 2347 } 2348 } 2349 2350 /* HID+A2DP+PAN(EDR) */ 2351 static void btc8192e2ant_action_hid_a2dp_pan_edr(struct btc_coexist *btcoexist) 2352 { 2353 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; 2354 u32 wifi_bw; 2355 2356 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 2357 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 2358 2359 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 2360 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 2361 2362 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 2363 2364 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2365 2366 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); 2367 2368 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 2369 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 2370 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 2371 btc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 3); 2372 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 2373 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 2374 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 2375 btc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3); 2376 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2377 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2378 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 2379 btc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3); 2380 } 2381 2382 /* sw mechanism */ 2383 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2384 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2385 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2386 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 2387 false, false); 2388 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2389 false, 0x18); 2390 } else { 2391 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 2392 false, false); 2393 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2394 false, 0x18); 2395 } 2396 } else { 2397 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2398 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2399 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 2400 false, false); 2401 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2402 false, 0x18); 2403 } else { 2404 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 2405 false, false); 2406 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2407 false, 0x18); 2408 } 2409 } 2410 } 2411 2412 static void btc8192e2ant_action_hid_a2dp(struct btc_coexist *btcoexist) 2413 { 2414 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; 2415 u32 wifi_bw; 2416 2417 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 2418 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 2419 2420 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 2421 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 2422 2423 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2424 2425 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); 2426 2427 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 2428 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 2429 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 2430 btc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 2); 2431 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 2432 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 2433 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 2434 btc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2); 2435 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2436 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2437 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 2438 btc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2); 2439 } 2440 2441 /* sw mechanism */ 2442 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2443 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2444 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2445 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 2446 false, false); 2447 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2448 false, 0x18); 2449 } else { 2450 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 2451 false, false); 2452 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2453 false, 0x18); 2454 } 2455 } else { 2456 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2457 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2458 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 2459 false, false); 2460 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2461 false, 0x18); 2462 } else { 2463 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 2464 false, false); 2465 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2466 false, 0x18); 2467 } 2468 } 2469 } 2470 2471 static void btc8192e2ant_run_coexist_mechanism(struct btc_coexist *btcoexist) 2472 { 2473 struct rtl_priv *rtlpriv = btcoexist->adapter; 2474 u8 algorithm = 0; 2475 2476 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2477 "[BTCoex], RunCoexistMechanism()===>\n"); 2478 2479 if (btcoexist->manual_control) { 2480 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2481 "[BTCoex], return for Manual CTRL <===\n"); 2482 return; 2483 } 2484 2485 if (coex_sta->under_ips) { 2486 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2487 "[BTCoex], wifi is under IPS !!!\n"); 2488 return; 2489 } 2490 2491 algorithm = btc8192e2ant_action_algorithm(btcoexist); 2492 if (coex_sta->c2h_bt_inquiry_page && 2493 (BT_8192E_2ANT_COEX_ALGO_PANHS != algorithm)) { 2494 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2495 "[BTCoex], BT is under inquiry/page scan !!\n"); 2496 btc8192e2ant_action_bt_inquiry(btcoexist); 2497 return; 2498 } 2499 2500 coex_dm->cur_algorithm = algorithm; 2501 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2502 "[BTCoex], Algorithm = %d\n", coex_dm->cur_algorithm); 2503 2504 if (btc8192e2ant_is_common_action(btcoexist)) { 2505 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2506 "[BTCoex], Action 2-Ant common\n"); 2507 coex_dm->auto_tdma_adjust = false; 2508 } else { 2509 if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) { 2510 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2511 "[BTCoex] preAlgorithm=%d, curAlgorithm=%d\n", 2512 coex_dm->pre_algorithm, 2513 coex_dm->cur_algorithm); 2514 coex_dm->auto_tdma_adjust = false; 2515 } 2516 switch (coex_dm->cur_algorithm) { 2517 case BT_8192E_2ANT_COEX_ALGO_SCO: 2518 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2519 "Action 2-Ant, algorithm = SCO\n"); 2520 btc8192e2ant_action_sco(btcoexist); 2521 break; 2522 case BT_8192E_2ANT_COEX_ALGO_SCO_PAN: 2523 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2524 "Action 2-Ant, algorithm = SCO+PAN(EDR)\n"); 2525 btc8192e2ant_action_sco_pan(btcoexist); 2526 break; 2527 case BT_8192E_2ANT_COEX_ALGO_HID: 2528 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2529 "Action 2-Ant, algorithm = HID\n"); 2530 btc8192e2ant_action_hid(btcoexist); 2531 break; 2532 case BT_8192E_2ANT_COEX_ALGO_A2DP: 2533 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2534 "Action 2-Ant, algorithm = A2DP\n"); 2535 btc8192e2ant_action_a2dp(btcoexist); 2536 break; 2537 case BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS: 2538 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2539 "Action 2-Ant, algorithm = A2DP+PAN(HS)\n"); 2540 btc8192e2ant_action_a2dp_pan_hs(btcoexist); 2541 break; 2542 case BT_8192E_2ANT_COEX_ALGO_PANEDR: 2543 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2544 "Action 2-Ant, algorithm = PAN(EDR)\n"); 2545 btc8192e2ant_action_pan_edr(btcoexist); 2546 break; 2547 case BT_8192E_2ANT_COEX_ALGO_PANHS: 2548 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2549 "Action 2-Ant, algorithm = HS mode\n"); 2550 btc8192e2ant_action_pan_hs(btcoexist); 2551 break; 2552 case BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP: 2553 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2554 "Action 2-Ant, algorithm = PAN+A2DP\n"); 2555 btc8192e2ant_action_pan_edr_a2dp(btcoexist); 2556 break; 2557 case BT_8192E_2ANT_COEX_ALGO_PANEDR_HID: 2558 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2559 "Action 2-Ant, algorithm = PAN(EDR)+HID\n"); 2560 btc8192e2ant_action_pan_edr_hid(btcoexist); 2561 break; 2562 case BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR: 2563 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2564 "Action 2-Ant, algorithm = HID+A2DP+PAN\n"); 2565 btc8192e2ant_action_hid_a2dp_pan_edr(btcoexist); 2566 break; 2567 case BT_8192E_2ANT_COEX_ALGO_HID_A2DP: 2568 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2569 "Action 2-Ant, algorithm = HID+A2DP\n"); 2570 btc8192e2ant_action_hid_a2dp(btcoexist); 2571 break; 2572 default: 2573 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2574 "Action 2-Ant, algorithm = unknown!!\n"); 2575 /* btc8192e2ant_coex_all_off(btcoexist); */ 2576 break; 2577 } 2578 coex_dm->pre_algorithm = coex_dm->cur_algorithm; 2579 } 2580 } 2581 2582 static void btc8192e2ant_init_hwconfig(struct btc_coexist *btcoexist, 2583 bool backup) 2584 { 2585 struct rtl_priv *rtlpriv = btcoexist->adapter; 2586 u16 u16tmp = 0; 2587 u8 u8tmp = 0; 2588 2589 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2590 "[BTCoex], 2Ant Init HW Config!!\n"); 2591 2592 if (backup) { 2593 /* backup rf 0x1e value */ 2594 coex_dm->bt_rf0x1e_backup = 2595 btcoexist->btc_get_rf_reg(btcoexist, BTC_RF_A, 2596 0x1e, 0xfffff); 2597 2598 coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist, 2599 0x430); 2600 coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist, 2601 0x434); 2602 coex_dm->backup_retry_limit = btcoexist->btc_read_2byte( 2603 btcoexist, 2604 0x42a); 2605 coex_dm->backup_ampdu_maxtime = btcoexist->btc_read_1byte( 2606 btcoexist, 2607 0x456); 2608 } 2609 2610 /* antenna sw ctrl to bt */ 2611 btcoexist->btc_write_1byte(btcoexist, 0x4f, 0x6); 2612 btcoexist->btc_write_1byte(btcoexist, 0x944, 0x24); 2613 btcoexist->btc_write_4byte(btcoexist, 0x930, 0x700700); 2614 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20); 2615 if (btcoexist->chip_interface == BTC_INTF_USB) 2616 btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30430004); 2617 else 2618 btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30030004); 2619 2620 btc8192e2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0); 2621 2622 /* antenna switch control parameter */ 2623 btcoexist->btc_write_4byte(btcoexist, 0x858, 0x55555555); 2624 2625 /* coex parameters */ 2626 btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3); 2627 /* 0x790[5:0] = 0x5 */ 2628 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790); 2629 u8tmp &= 0xc0; 2630 u8tmp |= 0x5; 2631 btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp); 2632 2633 /* enable counter statistics */ 2634 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4); 2635 2636 /* enable PTA */ 2637 btcoexist->btc_write_1byte(btcoexist, 0x40, 0x20); 2638 /* enable mailbox interface */ 2639 u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x40); 2640 u16tmp |= BIT9; 2641 btcoexist->btc_write_2byte(btcoexist, 0x40, u16tmp); 2642 2643 /* enable PTA I2C mailbox */ 2644 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x101); 2645 u8tmp |= BIT4; 2646 btcoexist->btc_write_1byte(btcoexist, 0x101, u8tmp); 2647 2648 /* enable bt clock when wifi is disabled. */ 2649 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x93); 2650 u8tmp |= BIT0; 2651 btcoexist->btc_write_1byte(btcoexist, 0x93, u8tmp); 2652 /* enable bt clock when suspend. */ 2653 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x7); 2654 u8tmp |= BIT0; 2655 btcoexist->btc_write_1byte(btcoexist, 0x7, u8tmp); 2656 } 2657 2658 /************************************************************ 2659 * extern function start with ex_btc8192e2ant_ 2660 ************************************************************/ 2661 2662 void ex_btc8192e2ant_init_hwconfig(struct btc_coexist *btcoexist) 2663 { 2664 btc8192e2ant_init_hwconfig(btcoexist, true); 2665 } 2666 2667 void ex_btc8192e2ant_init_coex_dm(struct btc_coexist *btcoexist) 2668 { 2669 struct rtl_priv *rtlpriv = btcoexist->adapter; 2670 2671 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2672 "[BTCoex], Coex Mechanism Init!!\n"); 2673 btc8192e2ant_init_coex_dm(btcoexist); 2674 } 2675 2676 void ex_btc8192e2ant_display_coex_info(struct btc_coexist *btcoexist, 2677 struct seq_file *m) 2678 { 2679 struct btc_board_info *board_info = &btcoexist->board_info; 2680 struct btc_stack_info *stack_info = &btcoexist->stack_info; 2681 u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0; 2682 u16 u16tmp[4]; 2683 u32 u32tmp[4]; 2684 bool roam = false, scan = false, link = false, wifi_under_5g = false; 2685 bool bt_hs_on = false, wifi_busy = false; 2686 int wifi_rssi = 0, bt_hs_rssi = 0; 2687 u32 wifi_bw, wifi_traffic_dir; 2688 u8 wifi_dot11_chnl, wifi_hs_chnl; 2689 u32 fw_ver = 0, bt_patch_ver = 0; 2690 2691 seq_puts(m, "\n ============[BT Coexist info]============"); 2692 2693 if (btcoexist->manual_control) { 2694 seq_puts(m, "\n ===========[Under Manual Control]==========="); 2695 seq_puts(m, "\n =========================================="); 2696 } 2697 2698 seq_printf(m, "\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", 2699 board_info->pg_ant_num, board_info->btdm_ant_num); 2700 2701 seq_printf(m, "\n %-35s = %s / %d", "BT stack/ hci ext ver", 2702 ((stack_info->profile_notified) ? "Yes" : "No"), 2703 stack_info->hci_version); 2704 2705 btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver); 2706 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver); 2707 seq_printf(m, "\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)", 2708 "CoexVer/ FwVer/ PatchVer", 2709 glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant, 2710 fw_ver, bt_patch_ver, bt_patch_ver); 2711 2712 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); 2713 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_DOT11_CHNL, 2714 &wifi_dot11_chnl); 2715 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifi_hs_chnl); 2716 seq_printf(m, "\n %-35s = %d / %d(%d)", 2717 "Dot11 channel / HsMode(HsChnl)", 2718 wifi_dot11_chnl, bt_hs_on, wifi_hs_chnl); 2719 2720 seq_printf(m, "\n %-35s = %3ph ", 2721 "H2C Wifi inform bt chnl Info", coex_dm->wifi_chnl_info); 2722 2723 btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi); 2724 btcoexist->btc_get(btcoexist, BTC_GET_S4_HS_RSSI, &bt_hs_rssi); 2725 seq_printf(m, "\n %-35s = %d/ %d", 2726 "Wifi rssi/ HS rssi", wifi_rssi, bt_hs_rssi); 2727 2728 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); 2729 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link); 2730 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); 2731 seq_printf(m, "\n %-35s = %d/ %d/ %d ", 2732 "Wifi link/ roam/ scan", link, roam, scan); 2733 2734 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g); 2735 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2736 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); 2737 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, 2738 &wifi_traffic_dir); 2739 seq_printf(m, "\n %-35s = %s / %s/ %s ", 2740 "Wifi status", (wifi_under_5g ? "5G" : "2.4G"), 2741 ((BTC_WIFI_BW_LEGACY == wifi_bw) ? "Legacy" : 2742 (((BTC_WIFI_BW_HT40 == wifi_bw) ? "HT40" : "HT20"))), 2743 ((!wifi_busy) ? "idle" : 2744 ((BTC_WIFI_TRAFFIC_TX == wifi_traffic_dir) ? 2745 "uplink" : "downlink"))); 2746 2747 seq_printf(m, "\n %-35s = [%s/ %d/ %d] ", 2748 "BT [status/ rssi/ retryCnt]", 2749 ((btcoexist->bt_info.bt_disabled) ? ("disabled") : 2750 ((coex_sta->c2h_bt_inquiry_page) ? 2751 ("inquiry/page scan") : 2752 ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE == 2753 coex_dm->bt_status) ? "non-connected idle" : 2754 ((BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE == 2755 coex_dm->bt_status) ? "connected-idle" : "busy")))), 2756 coex_sta->bt_rssi, coex_sta->bt_retry_cnt); 2757 2758 seq_printf(m, "\n %-35s = %d / %d / %d / %d", 2759 "SCO/HID/PAN/A2DP", stack_info->sco_exist, 2760 stack_info->hid_exist, stack_info->pan_exist, 2761 stack_info->a2dp_exist); 2762 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_BT_LINK_INFO, m); 2763 2764 bt_info_ext = coex_sta->bt_info_ext; 2765 seq_printf(m, "\n %-35s = %s", 2766 "BT Info A2DP rate", 2767 (bt_info_ext&BIT0) ? "Basic rate" : "EDR rate"); 2768 2769 for (i = 0; i < BT_INFO_SRC_8192E_2ANT_MAX; i++) { 2770 if (coex_sta->bt_info_c2h_cnt[i]) { 2771 seq_printf(m, "\n %-35s = %7ph(%d)", 2772 glbt_info_src_8192e_2ant[i], 2773 coex_sta->bt_info_c2h[i], 2774 coex_sta->bt_info_c2h_cnt[i]); 2775 } 2776 } 2777 2778 seq_printf(m, "\n %-35s = %s/%s", 2779 "PS state, IPS/LPS", 2780 ((coex_sta->under_ips ? "IPS ON" : "IPS OFF")), 2781 ((coex_sta->under_lps ? "LPS ON" : "LPS OFF"))); 2782 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_FW_PWR_MODE_CMD, m); 2783 2784 seq_printf(m, "\n %-35s = 0x%x ", "SS Type", 2785 coex_dm->cur_ss_type); 2786 2787 /* Sw mechanism */ 2788 seq_printf(m, "\n %-35s", 2789 "============[Sw mechanism]============"); 2790 seq_printf(m, "\n %-35s = %d/ %d/ %d ", 2791 "SM1[ShRf/ LpRA/ LimDig]", coex_dm->cur_rf_rx_lpf_shrink, 2792 coex_dm->cur_low_penalty_ra, coex_dm->limited_dig); 2793 seq_printf(m, "\n %-35s = %d/ %d/ %d(0x%x) ", 2794 "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", 2795 coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off, 2796 coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl); 2797 2798 seq_printf(m, "\n %-35s = 0x%x ", "Rate Mask", 2799 btcoexist->bt_info.ra_mask); 2800 2801 /* Fw mechanism */ 2802 seq_printf(m, "\n %-35s", 2803 "============[Fw mechanism]============"); 2804 2805 ps_tdma_case = coex_dm->cur_ps_tdma; 2806 seq_printf(m, 2807 "\n %-35s = %5ph case-%d (auto:%d)", 2808 "PS TDMA", coex_dm->ps_tdma_para, 2809 ps_tdma_case, coex_dm->auto_tdma_adjust); 2810 2811 seq_printf(m, "\n %-35s = %d/ %d ", 2812 "DecBtPwr/ IgnWlanAct", 2813 coex_dm->cur_dec_bt_pwr, coex_dm->cur_ignore_wlan_act); 2814 2815 /* Hw setting */ 2816 seq_printf(m, "\n %-35s", 2817 "============[Hw setting]============"); 2818 2819 seq_printf(m, "\n %-35s = 0x%x", 2820 "RF-A, 0x1e initVal", coex_dm->bt_rf0x1e_backup); 2821 2822 seq_printf(m, "\n %-35s = 0x%x/0x%x/0x%x/0x%x", 2823 "backup ARFR1/ARFR2/RL/AMaxTime", coex_dm->backup_arfr_cnt1, 2824 coex_dm->backup_arfr_cnt2, coex_dm->backup_retry_limit, 2825 coex_dm->backup_ampdu_maxtime); 2826 2827 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430); 2828 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434); 2829 u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a); 2830 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456); 2831 seq_printf(m, "\n %-35s = 0x%x/0x%x/0x%x/0x%x", 2832 "0x430/0x434/0x42a/0x456", 2833 u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]); 2834 2835 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc04); 2836 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xd04); 2837 u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x90c); 2838 seq_printf(m, "\n %-35s = 0x%x/ 0x%x/ 0x%x", 2839 "0xc04/ 0xd04/ 0x90c", u32tmp[0], u32tmp[1], u32tmp[2]); 2840 2841 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778); 2842 seq_printf(m, "\n %-35s = 0x%x", "0x778", u8tmp[0]); 2843 2844 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x92c); 2845 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x930); 2846 seq_printf(m, "\n %-35s = 0x%x/ 0x%x", 2847 "0x92c/ 0x930", (u8tmp[0]), u32tmp[0]); 2848 2849 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x40); 2850 u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x4f); 2851 seq_printf(m, "\n %-35s = 0x%x/ 0x%x", 2852 "0x40/ 0x4f", u8tmp[0], u8tmp[1]); 2853 2854 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550); 2855 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522); 2856 seq_printf(m, "\n %-35s = 0x%x/ 0x%x", 2857 "0x550(bcn ctrl)/0x522", u32tmp[0], u8tmp[0]); 2858 2859 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50); 2860 seq_printf(m, "\n %-35s = 0x%x", "0xc50(dig)", 2861 u32tmp[0]); 2862 2863 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0); 2864 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4); 2865 u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8); 2866 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x6cc); 2867 seq_printf(m, 2868 "\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", 2869 "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", 2870 u32tmp[0], u32tmp[1], u32tmp[2], u8tmp[0]); 2871 2872 seq_printf(m, "\n %-35s = %d/ %d", 2873 "0x770(hp rx[31:16]/tx[15:0])", 2874 coex_sta->high_priority_rx, coex_sta->high_priority_tx); 2875 seq_printf(m, "\n %-35s = %d/ %d", 2876 "0x774(lp rx[31:16]/tx[15:0])", 2877 coex_sta->low_priority_rx, coex_sta->low_priority_tx); 2878 if (btcoexist->auto_report_2ant) 2879 btc8192e2ant_monitor_bt_ctr(btcoexist); 2880 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS, m); 2881 } 2882 2883 void ex_btc8192e2ant_ips_notify(struct btc_coexist *btcoexist, u8 type) 2884 { 2885 struct rtl_priv *rtlpriv = btcoexist->adapter; 2886 2887 if (BTC_IPS_ENTER == type) { 2888 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2889 "[BTCoex], IPS ENTER notify\n"); 2890 coex_sta->under_ips = true; 2891 btc8192e2ant_coex_all_off(btcoexist); 2892 } else if (BTC_IPS_LEAVE == type) { 2893 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2894 "[BTCoex], IPS LEAVE notify\n"); 2895 coex_sta->under_ips = false; 2896 } 2897 } 2898 2899 void ex_btc8192e2ant_lps_notify(struct btc_coexist *btcoexist, u8 type) 2900 { 2901 struct rtl_priv *rtlpriv = btcoexist->adapter; 2902 2903 if (BTC_LPS_ENABLE == type) { 2904 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2905 "[BTCoex], LPS ENABLE notify\n"); 2906 coex_sta->under_lps = true; 2907 } else if (BTC_LPS_DISABLE == type) { 2908 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2909 "[BTCoex], LPS DISABLE notify\n"); 2910 coex_sta->under_lps = false; 2911 } 2912 } 2913 2914 void ex_btc8192e2ant_scan_notify(struct btc_coexist *btcoexist, u8 type) 2915 { 2916 struct rtl_priv *rtlpriv = btcoexist->adapter; 2917 2918 if (BTC_SCAN_START == type) 2919 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2920 "[BTCoex], SCAN START notify\n"); 2921 else if (BTC_SCAN_FINISH == type) 2922 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2923 "[BTCoex], SCAN FINISH notify\n"); 2924 } 2925 2926 void ex_btc8192e2ant_connect_notify(struct btc_coexist *btcoexist, u8 type) 2927 { 2928 struct rtl_priv *rtlpriv = btcoexist->adapter; 2929 2930 if (BTC_ASSOCIATE_START == type) 2931 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2932 "[BTCoex], CONNECT START notify\n"); 2933 else if (BTC_ASSOCIATE_FINISH == type) 2934 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2935 "[BTCoex], CONNECT FINISH notify\n"); 2936 } 2937 2938 void ex_btc8192e2ant_media_status_notify(struct btc_coexist *btcoexist, 2939 u8 type) 2940 { 2941 struct rtl_priv *rtlpriv = btcoexist->adapter; 2942 u8 h2c_parameter[3] = {0}; 2943 u32 wifi_bw; 2944 u8 wifi_center_chnl; 2945 2946 if (btcoexist->manual_control || 2947 btcoexist->stop_coex_dm || 2948 btcoexist->bt_info.bt_disabled) 2949 return; 2950 2951 if (BTC_MEDIA_CONNECT == type) 2952 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2953 "[BTCoex], MEDIA connect notify\n"); 2954 else 2955 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2956 "[BTCoex], MEDIA disconnect notify\n"); 2957 2958 /* only 2.4G we need to inform bt the chnl mask */ 2959 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, 2960 &wifi_center_chnl); 2961 if ((BTC_MEDIA_CONNECT == type) && 2962 (wifi_center_chnl <= 14)) { 2963 h2c_parameter[0] = 0x1; 2964 h2c_parameter[1] = wifi_center_chnl; 2965 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2966 if (BTC_WIFI_BW_HT40 == wifi_bw) 2967 h2c_parameter[2] = 0x30; 2968 else 2969 h2c_parameter[2] = 0x20; 2970 } 2971 2972 coex_dm->wifi_chnl_info[0] = h2c_parameter[0]; 2973 coex_dm->wifi_chnl_info[1] = h2c_parameter[1]; 2974 coex_dm->wifi_chnl_info[2] = h2c_parameter[2]; 2975 2976 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2977 "[BTCoex], FW write 0x66 = 0x%x\n", 2978 h2c_parameter[0] << 16 | h2c_parameter[1] << 8 | 2979 h2c_parameter[2]); 2980 2981 btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter); 2982 } 2983 2984 void ex_btc8192e2ant_special_packet_notify(struct btc_coexist *btcoexist, 2985 u8 type) 2986 { 2987 struct rtl_priv *rtlpriv = btcoexist->adapter; 2988 2989 if (type == BTC_PACKET_DHCP) 2990 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2991 "[BTCoex], DHCP Packet notify\n"); 2992 } 2993 2994 void ex_btc8192e2ant_bt_info_notify(struct btc_coexist *btcoexist, 2995 u8 *tmp_buf, u8 length) 2996 { 2997 struct rtl_priv *rtlpriv = btcoexist->adapter; 2998 u8 bt_info = 0; 2999 u8 i, rsp_source = 0; 3000 bool bt_busy = false, limited_dig = false; 3001 bool wifi_connected = false; 3002 3003 coex_sta->c2h_bt_info_req_sent = false; 3004 3005 rsp_source = tmp_buf[0] & 0xf; 3006 if (rsp_source >= BT_INFO_SRC_8192E_2ANT_MAX) 3007 rsp_source = BT_INFO_SRC_8192E_2ANT_WIFI_FW; 3008 coex_sta->bt_info_c2h_cnt[rsp_source]++; 3009 3010 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3011 "[BTCoex], Bt info[%d], length=%d, hex data = [", 3012 rsp_source, length); 3013 for (i = 0; i < length; i++) { 3014 coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i]; 3015 if (i == 1) 3016 bt_info = tmp_buf[i]; 3017 if (i == length-1) 3018 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3019 "0x%02x]\n", tmp_buf[i]); 3020 else 3021 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3022 "0x%02x, ", tmp_buf[i]); 3023 } 3024 3025 if (BT_INFO_SRC_8192E_2ANT_WIFI_FW != rsp_source) { 3026 /* [3:0] */ 3027 coex_sta->bt_retry_cnt = 3028 coex_sta->bt_info_c2h[rsp_source][2] & 0xf; 3029 3030 coex_sta->bt_rssi = 3031 coex_sta->bt_info_c2h[rsp_source][3] * 2 + 10; 3032 3033 coex_sta->bt_info_ext = 3034 coex_sta->bt_info_c2h[rsp_source][4]; 3035 3036 /* Here we need to resend some wifi info to BT 3037 * because bt is reset and loss of the info. 3038 */ 3039 if ((coex_sta->bt_info_ext & BIT1)) { 3040 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3041 "bit1, send wifi BW&Chnl to BT!!\n"); 3042 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, 3043 &wifi_connected); 3044 if (wifi_connected) 3045 ex_btc8192e2ant_media_status_notify( 3046 btcoexist, 3047 BTC_MEDIA_CONNECT); 3048 else 3049 ex_btc8192e2ant_media_status_notify( 3050 btcoexist, 3051 BTC_MEDIA_DISCONNECT); 3052 } 3053 3054 if ((coex_sta->bt_info_ext & BIT3)) { 3055 if (!btcoexist->manual_control && 3056 !btcoexist->stop_coex_dm) { 3057 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3058 "bit3, BT NOT ignore Wlan active!\n"); 3059 btc8192e2ant_ignore_wlan_act(btcoexist, 3060 FORCE_EXEC, 3061 false); 3062 } 3063 } else { 3064 /* BT already NOT ignore Wlan active, 3065 * do nothing here. 3066 */ 3067 } 3068 3069 if (!btcoexist->auto_report_2ant) { 3070 if (!(coex_sta->bt_info_ext & BIT4)) 3071 btc8192e2ant_bt_auto_report(btcoexist, 3072 FORCE_EXEC, 3073 true); 3074 } 3075 } 3076 3077 /* check BIT2 first ==> check if bt is under inquiry or page scan */ 3078 if (bt_info & BT_INFO_8192E_2ANT_B_INQ_PAGE) 3079 coex_sta->c2h_bt_inquiry_page = true; 3080 else 3081 coex_sta->c2h_bt_inquiry_page = false; 3082 3083 /* set link exist status */ 3084 if (!(bt_info&BT_INFO_8192E_2ANT_B_CONNECTION)) { 3085 coex_sta->bt_link_exist = false; 3086 coex_sta->pan_exist = false; 3087 coex_sta->a2dp_exist = false; 3088 coex_sta->hid_exist = false; 3089 coex_sta->sco_exist = false; 3090 } else {/* connection exists */ 3091 coex_sta->bt_link_exist = true; 3092 if (bt_info & BT_INFO_8192E_2ANT_B_FTP) 3093 coex_sta->pan_exist = true; 3094 else 3095 coex_sta->pan_exist = false; 3096 if (bt_info & BT_INFO_8192E_2ANT_B_A2DP) 3097 coex_sta->a2dp_exist = true; 3098 else 3099 coex_sta->a2dp_exist = false; 3100 if (bt_info & BT_INFO_8192E_2ANT_B_HID) 3101 coex_sta->hid_exist = true; 3102 else 3103 coex_sta->hid_exist = false; 3104 if (bt_info & BT_INFO_8192E_2ANT_B_SCO_ESCO) 3105 coex_sta->sco_exist = true; 3106 else 3107 coex_sta->sco_exist = false; 3108 } 3109 3110 btc8192e2ant_update_bt_link_info(btcoexist); 3111 3112 if (!(bt_info & BT_INFO_8192E_2ANT_B_CONNECTION)) { 3113 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE; 3114 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3115 "[BTCoex], BT Non-Connected idle!!!\n"); 3116 } else if (bt_info == BT_INFO_8192E_2ANT_B_CONNECTION) { 3117 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE; 3118 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3119 "[BTCoex], bt_infoNotify(), BT Connected-idle!!!\n"); 3120 } else if ((bt_info & BT_INFO_8192E_2ANT_B_SCO_ESCO) || 3121 (bt_info & BT_INFO_8192E_2ANT_B_SCO_BUSY)) { 3122 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_SCO_BUSY; 3123 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3124 "[BTCoex], bt_infoNotify(), BT SCO busy!!!\n"); 3125 } else if (bt_info & BT_INFO_8192E_2ANT_B_ACL_BUSY) { 3126 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_ACL_BUSY; 3127 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3128 "[BTCoex], bt_infoNotify(), BT ACL busy!!!\n"); 3129 } else { 3130 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_MAX; 3131 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3132 "[BTCoex]bt_infoNotify(), BT Non-Defined state!!!\n"); 3133 } 3134 3135 if ((BT_8192E_2ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) || 3136 (BT_8192E_2ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || 3137 (BT_8192E_2ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) { 3138 bt_busy = true; 3139 limited_dig = true; 3140 } else { 3141 bt_busy = false; 3142 limited_dig = false; 3143 } 3144 3145 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy); 3146 3147 coex_dm->limited_dig = limited_dig; 3148 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig); 3149 3150 btc8192e2ant_run_coexist_mechanism(btcoexist); 3151 } 3152 3153 void ex_btc8192e2ant_halt_notify(struct btc_coexist *btcoexist) 3154 { 3155 struct rtl_priv *rtlpriv = btcoexist->adapter; 3156 3157 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, "[BTCoex], Halt notify\n"); 3158 3159 btc8192e2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true); 3160 ex_btc8192e2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT); 3161 } 3162 3163 void ex_btc8192e2ant_periodical(struct btc_coexist *btcoexist) 3164 { 3165 struct rtl_priv *rtlpriv = btcoexist->adapter; 3166 static u8 dis_ver_info_cnt; 3167 u32 fw_ver = 0, bt_patch_ver = 0; 3168 struct btc_board_info *board_info = &btcoexist->board_info; 3169 struct btc_stack_info *stack_info = &btcoexist->stack_info; 3170 3171 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3172 "=======================Periodical=======================\n"); 3173 if (dis_ver_info_cnt <= 5) { 3174 dis_ver_info_cnt += 1; 3175 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3176 "************************************************\n"); 3177 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3178 "Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", 3179 board_info->pg_ant_num, board_info->btdm_ant_num, 3180 board_info->btdm_ant_pos); 3181 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3182 "BT stack/ hci ext ver = %s / %d\n", 3183 ((stack_info->profile_notified) ? "Yes" : "No"), 3184 stack_info->hci_version); 3185 btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, 3186 &bt_patch_ver); 3187 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver); 3188 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3189 "CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", 3190 glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant, 3191 fw_ver, bt_patch_ver, bt_patch_ver); 3192 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3193 "************************************************\n"); 3194 } 3195 3196 if (!btcoexist->auto_report_2ant) { 3197 btc8192e2ant_query_bt_info(btcoexist); 3198 btc8192e2ant_monitor_bt_ctr(btcoexist); 3199 btc8192e2ant_monitor_bt_enable_disable(btcoexist); 3200 } else { 3201 if (btc8192e2ant_is_wifi_status_changed(btcoexist) || 3202 coex_dm->auto_tdma_adjust) 3203 btc8192e2ant_run_coexist_mechanism(btcoexist); 3204 } 3205 } 3206