1 /****************************************************************************** 2 * 3 * Copyright(c) 2012 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * The full GNU General Public License is included in this distribution in the 15 * file called LICENSE. 16 * 17 * Contact Information: 18 * wlanfae <wlanfae@realtek.com> 19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, 20 * Hsinchu 300, Taiwan. 21 * 22 * Larry Finger <Larry.Finger@lwfinger.net> 23 * 24 *****************************************************************************/ 25 /************************************************************** 26 * Description: 27 * 28 * This file is for RTL8192E Co-exist mechanism 29 * 30 * History 31 * 2012/11/15 Cosa first check in. 32 * 33 **************************************************************/ 34 35 /************************************************************** 36 * include files 37 **************************************************************/ 38 #include "halbt_precomp.h" 39 /************************************************************** 40 * Global variables, these are static variables 41 **************************************************************/ 42 static struct coex_dm_8192e_2ant glcoex_dm_8192e_2ant; 43 static struct coex_dm_8192e_2ant *coex_dm = &glcoex_dm_8192e_2ant; 44 static struct coex_sta_8192e_2ant glcoex_sta_8192e_2ant; 45 static struct coex_sta_8192e_2ant *coex_sta = &glcoex_sta_8192e_2ant; 46 47 static const char *const glbt_info_src_8192e_2ant[] = { 48 "BT Info[wifi fw]", 49 "BT Info[bt rsp]", 50 "BT Info[bt auto report]", 51 }; 52 53 static u32 glcoex_ver_date_8192e_2ant = 20130902; 54 static u32 glcoex_ver_8192e_2ant = 0x34; 55 56 /************************************************************** 57 * local function proto type if needed 58 **************************************************************/ 59 /************************************************************** 60 * local function start with btc8192e2ant_ 61 **************************************************************/ 62 static u8 btc8192e2ant_bt_rssi_state(struct btc_coexist *btcoexist, 63 u8 level_num, u8 rssi_thresh, 64 u8 rssi_thresh1) 65 { 66 struct rtl_priv *rtlpriv = btcoexist->adapter; 67 int bt_rssi = 0; 68 u8 bt_rssi_state = coex_sta->pre_bt_rssi_state; 69 70 bt_rssi = coex_sta->bt_rssi; 71 72 if (level_num == 2) { 73 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || 74 (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 75 if (bt_rssi >= 76 (rssi_thresh + BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) 77 bt_rssi_state = BTC_RSSI_STATE_HIGH; 78 else 79 bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; 80 } else { 81 if (bt_rssi < rssi_thresh) 82 bt_rssi_state = BTC_RSSI_STATE_LOW; 83 else 84 bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH; 85 } 86 } else if (level_num == 3) { 87 if (rssi_thresh > rssi_thresh1) { 88 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 89 "[BTCoex], BT Rssi thresh error!!\n"); 90 return coex_sta->pre_bt_rssi_state; 91 } 92 93 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || 94 (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 95 if (bt_rssi >= 96 (rssi_thresh + BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) 97 bt_rssi_state = BTC_RSSI_STATE_MEDIUM; 98 else 99 bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; 100 } else if ((coex_sta->pre_bt_rssi_state == 101 BTC_RSSI_STATE_MEDIUM) || 102 (coex_sta->pre_bt_rssi_state == 103 BTC_RSSI_STATE_STAY_MEDIUM)) { 104 if (bt_rssi >= (rssi_thresh1 + 105 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) 106 bt_rssi_state = BTC_RSSI_STATE_HIGH; 107 else if (bt_rssi < rssi_thresh) 108 bt_rssi_state = BTC_RSSI_STATE_LOW; 109 else 110 bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM; 111 } else { 112 if (bt_rssi < rssi_thresh1) 113 bt_rssi_state = BTC_RSSI_STATE_MEDIUM; 114 else 115 bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH; 116 } 117 } 118 119 coex_sta->pre_bt_rssi_state = bt_rssi_state; 120 121 return bt_rssi_state; 122 } 123 124 static u8 btc8192e2ant_wifi_rssi_state(struct btc_coexist *btcoexist, 125 u8 index, u8 level_num, u8 rssi_thresh, 126 u8 rssi_thresh1) 127 { 128 struct rtl_priv *rtlpriv = btcoexist->adapter; 129 int wifi_rssi = 0; 130 u8 wifi_rssi_state = coex_sta->pre_wifi_rssi_state[index]; 131 132 btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi); 133 134 if (level_num == 2) { 135 if ((coex_sta->pre_wifi_rssi_state[index] == 136 BTC_RSSI_STATE_LOW) || 137 (coex_sta->pre_wifi_rssi_state[index] == 138 BTC_RSSI_STATE_STAY_LOW)) { 139 if (wifi_rssi >= 140 (rssi_thresh + BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) 141 wifi_rssi_state = BTC_RSSI_STATE_HIGH; 142 else 143 wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW; 144 } else { 145 if (wifi_rssi < rssi_thresh) 146 wifi_rssi_state = BTC_RSSI_STATE_LOW; 147 else 148 wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH; 149 } 150 } else if (level_num == 3) { 151 if (rssi_thresh > rssi_thresh1) { 152 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 153 "[BTCoex], wifi RSSI thresh error!!\n"); 154 return coex_sta->pre_wifi_rssi_state[index]; 155 } 156 157 if ((coex_sta->pre_wifi_rssi_state[index] == 158 BTC_RSSI_STATE_LOW) || 159 (coex_sta->pre_wifi_rssi_state[index] == 160 BTC_RSSI_STATE_STAY_LOW)) { 161 if (wifi_rssi >= 162 (rssi_thresh + BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) 163 wifi_rssi_state = BTC_RSSI_STATE_MEDIUM; 164 else 165 wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW; 166 } else if ((coex_sta->pre_wifi_rssi_state[index] == 167 BTC_RSSI_STATE_MEDIUM) || 168 (coex_sta->pre_wifi_rssi_state[index] == 169 BTC_RSSI_STATE_STAY_MEDIUM)) { 170 if (wifi_rssi >= (rssi_thresh1 + 171 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) 172 wifi_rssi_state = BTC_RSSI_STATE_HIGH; 173 else if (wifi_rssi < rssi_thresh) 174 wifi_rssi_state = BTC_RSSI_STATE_LOW; 175 else 176 wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM; 177 } else { 178 if (wifi_rssi < rssi_thresh1) 179 wifi_rssi_state = BTC_RSSI_STATE_MEDIUM; 180 else 181 wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH; 182 } 183 } 184 185 coex_sta->pre_wifi_rssi_state[index] = wifi_rssi_state; 186 187 return wifi_rssi_state; 188 } 189 190 static void btc8192e2ant_monitor_bt_enable_disable(struct btc_coexist 191 *btcoexist) 192 { 193 struct rtl_priv *rtlpriv = btcoexist->adapter; 194 static bool pre_bt_disabled; 195 static u32 bt_disable_cnt; 196 bool bt_active = true, bt_disabled = false; 197 198 /* This function check if bt is disabled */ 199 200 if (coex_sta->high_priority_tx == 0 && 201 coex_sta->high_priority_rx == 0 && 202 coex_sta->low_priority_tx == 0 && 203 coex_sta->low_priority_rx == 0) 204 bt_active = false; 205 206 if (coex_sta->high_priority_tx == 0xffff && 207 coex_sta->high_priority_rx == 0xffff && 208 coex_sta->low_priority_tx == 0xffff && 209 coex_sta->low_priority_rx == 0xffff) 210 bt_active = false; 211 212 if (bt_active) { 213 bt_disable_cnt = 0; 214 bt_disabled = false; 215 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE, 216 &bt_disabled); 217 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 218 "[BTCoex], BT is enabled !!\n"); 219 } else { 220 bt_disable_cnt++; 221 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 222 "[BTCoex], bt all counters = 0, %d times!!\n", 223 bt_disable_cnt); 224 if (bt_disable_cnt >= 2) { 225 bt_disabled = true; 226 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE, 227 &bt_disabled); 228 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 229 "[BTCoex], BT is disabled !!\n"); 230 } 231 } 232 if (pre_bt_disabled != bt_disabled) { 233 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 234 "[BTCoex], BT is from %s to %s!!\n", 235 (pre_bt_disabled ? "disabled" : "enabled"), 236 (bt_disabled ? "disabled" : "enabled")); 237 pre_bt_disabled = bt_disabled; 238 } 239 } 240 241 static u32 btc8192e2ant_decide_ra_mask(struct btc_coexist *btcoexist, 242 u8 ss_type, u32 ra_mask_type) 243 { 244 u32 dis_ra_mask = 0x0; 245 246 switch (ra_mask_type) { 247 case 0: /* normal mode */ 248 if (ss_type == 2) 249 dis_ra_mask = 0x0; /* enable 2ss */ 250 else 251 dis_ra_mask = 0xfff00000; /* disable 2ss */ 252 break; 253 case 1: /* disable cck 1/2 */ 254 if (ss_type == 2) 255 dis_ra_mask = 0x00000003; /* enable 2ss */ 256 else 257 dis_ra_mask = 0xfff00003; /* disable 2ss */ 258 break; 259 case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */ 260 if (ss_type == 2) 261 dis_ra_mask = 0x0001f1f7; /* enable 2ss */ 262 else 263 dis_ra_mask = 0xfff1f1f7; /* disable 2ss */ 264 break; 265 default: 266 break; 267 } 268 269 return dis_ra_mask; 270 } 271 272 static void btc8192e2ant_update_ra_mask(struct btc_coexist *btcoexist, 273 bool force_exec, u32 dis_rate_mask) 274 { 275 coex_dm->cur_ra_mask = dis_rate_mask; 276 277 if (force_exec || (coex_dm->pre_ra_mask != coex_dm->cur_ra_mask)) 278 btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_RAMASK, 279 &coex_dm->cur_ra_mask); 280 coex_dm->pre_ra_mask = coex_dm->cur_ra_mask; 281 } 282 283 static void btc8192e2ant_auto_rate_fallback_retry(struct btc_coexist *btcoexist, 284 bool force_exec, u8 type) 285 { 286 bool wifi_under_b_mode = false; 287 288 coex_dm->cur_arfr_type = type; 289 290 if (force_exec || (coex_dm->pre_arfr_type != coex_dm->cur_arfr_type)) { 291 switch (coex_dm->cur_arfr_type) { 292 case 0: /* normal mode */ 293 btcoexist->btc_write_4byte(btcoexist, 0x430, 294 coex_dm->backup_arfr_cnt1); 295 btcoexist->btc_write_4byte(btcoexist, 0x434, 296 coex_dm->backup_arfr_cnt2); 297 break; 298 case 1: 299 btcoexist->btc_get(btcoexist, 300 BTC_GET_BL_WIFI_UNDER_B_MODE, 301 &wifi_under_b_mode); 302 if (wifi_under_b_mode) { 303 btcoexist->btc_write_4byte(btcoexist, 0x430, 304 0x0); 305 btcoexist->btc_write_4byte(btcoexist, 0x434, 306 0x01010101); 307 } else { 308 btcoexist->btc_write_4byte(btcoexist, 0x430, 309 0x0); 310 btcoexist->btc_write_4byte(btcoexist, 0x434, 311 0x04030201); 312 } 313 break; 314 default: 315 break; 316 } 317 } 318 319 coex_dm->pre_arfr_type = coex_dm->cur_arfr_type; 320 } 321 322 static void btc8192e2ant_retry_limit(struct btc_coexist *btcoexist, 323 bool force_exec, u8 type) 324 { 325 coex_dm->cur_retry_limit_type = type; 326 327 if (force_exec || (coex_dm->pre_retry_limit_type != 328 coex_dm->cur_retry_limit_type)) { 329 switch (coex_dm->cur_retry_limit_type) { 330 case 0: /* normal mode */ 331 btcoexist->btc_write_2byte(btcoexist, 0x42a, 332 coex_dm->backup_retry_limit); 333 break; 334 case 1: /* retry limit = 8 */ 335 btcoexist->btc_write_2byte(btcoexist, 0x42a, 0x0808); 336 break; 337 default: 338 break; 339 } 340 } 341 342 coex_dm->pre_retry_limit_type = coex_dm->cur_retry_limit_type; 343 } 344 345 static void btc8192e2ant_ampdu_maxtime(struct btc_coexist *btcoexist, 346 bool force_exec, u8 type) 347 { 348 coex_dm->cur_ampdu_time_type = type; 349 350 if (force_exec || (coex_dm->pre_ampdu_time_type != 351 coex_dm->cur_ampdu_time_type)) { 352 switch (coex_dm->cur_ampdu_time_type) { 353 case 0: /* normal mode */ 354 btcoexist->btc_write_1byte(btcoexist, 0x456, 355 coex_dm->backup_ampdu_maxtime); 356 break; 357 case 1: /* AMPDU time = 0x38 * 32us */ 358 btcoexist->btc_write_1byte(btcoexist, 0x456, 0x38); 359 break; 360 default: 361 break; 362 } 363 } 364 365 coex_dm->pre_ampdu_time_type = coex_dm->cur_ampdu_time_type; 366 } 367 368 static void btc8192e2ant_limited_tx(struct btc_coexist *btcoexist, 369 bool force_exec, u8 ra_mask_type, 370 u8 arfr_type, u8 retry_limit_type, 371 u8 ampdu_time_type) 372 { 373 u32 dis_ra_mask = 0x0; 374 375 coex_dm->cur_ra_mask_type = ra_mask_type; 376 dis_ra_mask = 377 btc8192e2ant_decide_ra_mask(btcoexist, coex_dm->cur_ss_type, 378 ra_mask_type); 379 btc8192e2ant_update_ra_mask(btcoexist, force_exec, dis_ra_mask); 380 btc8192e2ant_auto_rate_fallback_retry(btcoexist, force_exec, arfr_type); 381 btc8192e2ant_retry_limit(btcoexist, force_exec, retry_limit_type); 382 btc8192e2ant_ampdu_maxtime(btcoexist, force_exec, ampdu_time_type); 383 } 384 385 static void btc8192e2ant_limited_rx(struct btc_coexist *btcoexist, 386 bool force_exec, bool rej_ap_agg_pkt, 387 bool bt_ctrl_agg_buf_size, 388 u8 agg_buf_size) 389 { 390 bool reject_rx_agg = rej_ap_agg_pkt; 391 bool bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size; 392 u8 rx_agg_size = agg_buf_size; 393 394 /********************************************* 395 * Rx Aggregation related setting 396 *********************************************/ 397 btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, 398 &reject_rx_agg); 399 /* decide BT control aggregation buf size or not */ 400 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, 401 &bt_ctrl_rx_agg_size); 402 /* aggregation buf size, only work 403 * when BT control Rx aggregation size. 404 */ 405 btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size); 406 /* real update aggregation setting */ 407 btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); 408 } 409 410 static void btc8192e2ant_monitor_bt_ctr(struct btc_coexist *btcoexist) 411 { 412 struct rtl_priv *rtlpriv = btcoexist->adapter; 413 u32 reg_hp_txrx, reg_lp_txrx, u32tmp; 414 u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0; 415 416 reg_hp_txrx = 0x770; 417 reg_lp_txrx = 0x774; 418 419 u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx); 420 reg_hp_tx = u32tmp & MASKLWORD; 421 reg_hp_rx = (u32tmp & MASKHWORD) >> 16; 422 423 u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx); 424 reg_lp_tx = u32tmp & MASKLWORD; 425 reg_lp_rx = (u32tmp & MASKHWORD) >> 16; 426 427 coex_sta->high_priority_tx = reg_hp_tx; 428 coex_sta->high_priority_rx = reg_hp_rx; 429 coex_sta->low_priority_tx = reg_lp_tx; 430 coex_sta->low_priority_rx = reg_lp_rx; 431 432 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 433 "[BTCoex] High Priority Tx/Rx (reg 0x%x) = 0x%x(%d)/0x%x(%d)\n", 434 reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx); 435 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 436 "[BTCoex] Low Priority Tx/Rx (reg 0x%x) = 0x%x(%d)/0x%x(%d)\n", 437 reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx); 438 439 /* reset counter */ 440 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc); 441 } 442 443 static void btc8192e2ant_query_bt_info(struct btc_coexist *btcoexist) 444 { 445 struct rtl_priv *rtlpriv = btcoexist->adapter; 446 u8 h2c_parameter[1] = {0}; 447 448 coex_sta->c2h_bt_info_req_sent = true; 449 450 h2c_parameter[0] |= BIT0; /* trigger */ 451 452 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 453 "[BTCoex], Query Bt Info, FW write 0x61 = 0x%x\n", 454 h2c_parameter[0]); 455 456 btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter); 457 } 458 459 static void btc8192e2ant_update_bt_link_info(struct btc_coexist *btcoexist) 460 { 461 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; 462 bool bt_hs_on = false; 463 464 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); 465 466 bt_link_info->bt_link_exist = coex_sta->bt_link_exist; 467 bt_link_info->sco_exist = coex_sta->sco_exist; 468 bt_link_info->a2dp_exist = coex_sta->a2dp_exist; 469 bt_link_info->pan_exist = coex_sta->pan_exist; 470 bt_link_info->hid_exist = coex_sta->hid_exist; 471 472 /* work around for HS mode. */ 473 if (bt_hs_on) { 474 bt_link_info->pan_exist = true; 475 bt_link_info->bt_link_exist = true; 476 } 477 478 /* check if Sco only */ 479 if (bt_link_info->sco_exist && 480 !bt_link_info->a2dp_exist && 481 !bt_link_info->pan_exist && 482 !bt_link_info->hid_exist) 483 bt_link_info->sco_only = true; 484 else 485 bt_link_info->sco_only = false; 486 487 /* check if A2dp only */ 488 if (!bt_link_info->sco_exist && 489 bt_link_info->a2dp_exist && 490 !bt_link_info->pan_exist && 491 !bt_link_info->hid_exist) 492 bt_link_info->a2dp_only = true; 493 else 494 bt_link_info->a2dp_only = false; 495 496 /* check if Pan only */ 497 if (!bt_link_info->sco_exist && 498 !bt_link_info->a2dp_exist && 499 bt_link_info->pan_exist && 500 !bt_link_info->hid_exist) 501 bt_link_info->pan_only = true; 502 else 503 bt_link_info->pan_only = false; 504 505 /* check if Hid only */ 506 if (!bt_link_info->sco_exist && 507 !bt_link_info->a2dp_exist && 508 !bt_link_info->pan_exist && 509 bt_link_info->hid_exist) 510 bt_link_info->hid_only = true; 511 else 512 bt_link_info->hid_only = false; 513 } 514 515 static u8 btc8192e2ant_action_algorithm(struct btc_coexist *btcoexist) 516 { 517 struct rtl_priv *rtlpriv = btcoexist->adapter; 518 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; 519 struct btc_stack_info *stack_info = &btcoexist->stack_info; 520 bool bt_hs_on = false; 521 u8 algorithm = BT_8192E_2ANT_COEX_ALGO_UNDEFINED; 522 u8 num_of_diff_profile = 0; 523 524 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); 525 526 if (!bt_link_info->bt_link_exist) { 527 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 528 "No BT link exists!!!\n"); 529 return algorithm; 530 } 531 532 if (bt_link_info->sco_exist) 533 num_of_diff_profile++; 534 if (bt_link_info->hid_exist) 535 num_of_diff_profile++; 536 if (bt_link_info->pan_exist) 537 num_of_diff_profile++; 538 if (bt_link_info->a2dp_exist) 539 num_of_diff_profile++; 540 541 if (num_of_diff_profile == 1) { 542 if (bt_link_info->sco_exist) { 543 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 544 "SCO only\n"); 545 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; 546 } else { 547 if (bt_link_info->hid_exist) { 548 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 549 "HID only\n"); 550 algorithm = BT_8192E_2ANT_COEX_ALGO_HID; 551 } else if (bt_link_info->a2dp_exist) { 552 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 553 "A2DP only\n"); 554 algorithm = BT_8192E_2ANT_COEX_ALGO_A2DP; 555 } else if (bt_link_info->pan_exist) { 556 if (bt_hs_on) { 557 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 558 DBG_LOUD, 559 "PAN(HS) only\n"); 560 algorithm = 561 BT_8192E_2ANT_COEX_ALGO_PANHS; 562 } else { 563 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 564 DBG_LOUD, 565 "PAN(EDR) only\n"); 566 algorithm = 567 BT_8192E_2ANT_COEX_ALGO_PANEDR; 568 } 569 } 570 } 571 } else if (num_of_diff_profile == 2) { 572 if (bt_link_info->sco_exist) { 573 if (bt_link_info->hid_exist) { 574 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 575 "SCO + HID\n"); 576 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; 577 } else if (bt_link_info->a2dp_exist) { 578 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 579 "SCO + A2DP ==> SCO\n"); 580 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; 581 } else if (bt_link_info->pan_exist) { 582 if (bt_hs_on) { 583 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 584 DBG_LOUD, 585 "SCO + PAN(HS)\n"); 586 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; 587 } else { 588 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 589 DBG_LOUD, 590 "SCO + PAN(EDR)\n"); 591 algorithm = 592 BT_8192E_2ANT_COEX_ALGO_SCO_PAN; 593 } 594 } 595 } else { 596 if (bt_link_info->hid_exist && 597 bt_link_info->a2dp_exist) { 598 if (stack_info->num_of_hid >= 2) { 599 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 600 DBG_LOUD, 601 "HID*2 + A2DP\n"); 602 algorithm = 603 BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR; 604 } else { 605 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 606 DBG_LOUD, 607 "HID + A2DP\n"); 608 algorithm = 609 BT_8192E_2ANT_COEX_ALGO_HID_A2DP; 610 } 611 } else if (bt_link_info->hid_exist && 612 bt_link_info->pan_exist) { 613 if (bt_hs_on) { 614 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 615 DBG_LOUD, 616 "HID + PAN(HS)\n"); 617 algorithm = BT_8192E_2ANT_COEX_ALGO_HID; 618 } else { 619 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 620 DBG_LOUD, 621 "HID + PAN(EDR)\n"); 622 algorithm = 623 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; 624 } 625 } else if (bt_link_info->pan_exist && 626 bt_link_info->a2dp_exist) { 627 if (bt_hs_on) { 628 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 629 DBG_LOUD, 630 "A2DP + PAN(HS)\n"); 631 algorithm = 632 BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS; 633 } else { 634 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 635 DBG_LOUD, 636 "A2DP + PAN(EDR)\n"); 637 algorithm = 638 BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP; 639 } 640 } 641 } 642 } else if (num_of_diff_profile == 3) { 643 if (bt_link_info->sco_exist) { 644 if (bt_link_info->hid_exist && 645 bt_link_info->a2dp_exist) { 646 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 647 "SCO + HID + A2DP ==> HID\n"); 648 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; 649 } else if (bt_link_info->hid_exist && 650 bt_link_info->pan_exist) { 651 if (bt_hs_on) { 652 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 653 DBG_LOUD, 654 "SCO + HID + PAN(HS)\n"); 655 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; 656 } else { 657 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 658 DBG_LOUD, 659 "SCO + HID + PAN(EDR)\n"); 660 algorithm = 661 BT_8192E_2ANT_COEX_ALGO_SCO_PAN; 662 } 663 } else if (bt_link_info->pan_exist && 664 bt_link_info->a2dp_exist) { 665 if (bt_hs_on) { 666 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 667 DBG_LOUD, 668 "SCO + A2DP + PAN(HS)\n"); 669 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO; 670 } else { 671 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 672 DBG_LOUD, 673 "SCO + A2DP + PAN(EDR)\n"); 674 algorithm = 675 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; 676 } 677 } 678 } else { 679 if (bt_link_info->hid_exist && 680 bt_link_info->pan_exist && 681 bt_link_info->a2dp_exist) { 682 if (bt_hs_on) { 683 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 684 DBG_LOUD, 685 "HID + A2DP + PAN(HS)\n"); 686 algorithm = 687 BT_8192E_2ANT_COEX_ALGO_HID_A2DP; 688 } else { 689 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 690 DBG_LOUD, 691 "HID + A2DP + PAN(EDR)\n"); 692 algorithm = 693 BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR; 694 } 695 } 696 } 697 } else if (num_of_diff_profile >= 3) { 698 if (bt_link_info->sco_exist) { 699 if (bt_link_info->hid_exist && 700 bt_link_info->pan_exist && 701 bt_link_info->a2dp_exist) { 702 if (bt_hs_on) { 703 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 704 DBG_LOUD, 705 "ErrorSCO+HID+A2DP+PAN(HS)\n"); 706 707 } else { 708 RT_TRACE(rtlpriv, COMP_BT_COEXIST, 709 DBG_LOUD, 710 "SCO+HID+A2DP+PAN(EDR)\n"); 711 algorithm = 712 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID; 713 } 714 } 715 } 716 } 717 718 return algorithm; 719 } 720 721 static void btc8192e2ant_set_fw_dac_swing_level(struct btc_coexist *btcoexist, 722 u8 dac_swing_lvl) 723 { 724 struct rtl_priv *rtlpriv = btcoexist->adapter; 725 u8 h2c_parameter[1] = {0}; 726 727 /* There are several type of dacswing 728 * 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 729 */ 730 h2c_parameter[0] = dac_swing_lvl; 731 732 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 733 "[BTCoex], Set Dac Swing Level = 0x%x\n", dac_swing_lvl); 734 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 735 "[BTCoex], FW write 0x64 = 0x%x\n", h2c_parameter[0]); 736 737 btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter); 738 } 739 740 static void btc8192e2ant_set_fw_dec_bt_pwr(struct btc_coexist *btcoexist, 741 u8 dec_bt_pwr_lvl) 742 { 743 struct rtl_priv *rtlpriv = btcoexist->adapter; 744 u8 h2c_parameter[1] = {0}; 745 746 h2c_parameter[0] = dec_bt_pwr_lvl; 747 748 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 749 "[BTCoex] decrease Bt Power level = %d, FW write 0x62 = 0x%x\n", 750 dec_bt_pwr_lvl, h2c_parameter[0]); 751 752 btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter); 753 } 754 755 static void btc8192e2ant_dec_bt_pwr(struct btc_coexist *btcoexist, 756 bool force_exec, u8 dec_bt_pwr_lvl) 757 { 758 struct rtl_priv *rtlpriv = btcoexist->adapter; 759 760 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 761 "[BTCoex], %s Dec BT power level = %d\n", 762 force_exec ? "force to" : "", dec_bt_pwr_lvl); 763 coex_dm->cur_dec_bt_pwr = dec_bt_pwr_lvl; 764 765 if (!force_exec) { 766 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 767 "[BTCoex], preBtDecPwrLvl=%d, curBtDecPwrLvl=%d\n", 768 coex_dm->pre_dec_bt_pwr, coex_dm->cur_dec_bt_pwr); 769 } 770 btc8192e2ant_set_fw_dec_bt_pwr(btcoexist, coex_dm->cur_dec_bt_pwr); 771 772 coex_dm->pre_dec_bt_pwr = coex_dm->cur_dec_bt_pwr; 773 } 774 775 static void btc8192e2ant_set_bt_auto_report(struct btc_coexist *btcoexist, 776 bool enable_auto_report) 777 { 778 struct rtl_priv *rtlpriv = btcoexist->adapter; 779 u8 h2c_parameter[1] = {0}; 780 781 h2c_parameter[0] = 0; 782 783 if (enable_auto_report) 784 h2c_parameter[0] |= BIT0; 785 786 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 787 "[BTCoex], BT FW auto report : %s, FW write 0x68 = 0x%x\n", 788 (enable_auto_report ? "Enabled!!" : "Disabled!!"), 789 h2c_parameter[0]); 790 791 btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter); 792 } 793 794 static void btc8192e2ant_bt_auto_report(struct btc_coexist *btcoexist, 795 bool force_exec, 796 bool enable_auto_report) 797 { 798 struct rtl_priv *rtlpriv = btcoexist->adapter; 799 800 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 801 "[BTCoex], %s BT Auto report = %s\n", 802 (force_exec ? "force to" : ""), 803 ((enable_auto_report) ? "Enabled" : "Disabled")); 804 coex_dm->cur_bt_auto_report = enable_auto_report; 805 806 if (!force_exec) { 807 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 808 "[BTCoex] bPreBtAutoReport=%d, bCurBtAutoReport=%d\n", 809 coex_dm->pre_bt_auto_report, 810 coex_dm->cur_bt_auto_report); 811 812 if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report) 813 return; 814 } 815 btc8192e2ant_set_bt_auto_report(btcoexist, 816 coex_dm->cur_bt_auto_report); 817 818 coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report; 819 } 820 821 static void btc8192e2ant_fw_dac_swing_lvl(struct btc_coexist *btcoexist, 822 bool force_exec, u8 fw_dac_swing_lvl) 823 { 824 struct rtl_priv *rtlpriv = btcoexist->adapter; 825 826 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 827 "[BTCoex], %s set FW Dac Swing level = %d\n", 828 (force_exec ? "force to" : ""), fw_dac_swing_lvl); 829 coex_dm->cur_fw_dac_swing_lvl = fw_dac_swing_lvl; 830 831 if (!force_exec) { 832 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 833 "[BTCoex] preFwDacSwingLvl=%d, curFwDacSwingLvl=%d\n", 834 coex_dm->pre_fw_dac_swing_lvl, 835 coex_dm->cur_fw_dac_swing_lvl); 836 837 if (coex_dm->pre_fw_dac_swing_lvl == 838 coex_dm->cur_fw_dac_swing_lvl) 839 return; 840 } 841 842 btc8192e2ant_set_fw_dac_swing_level(btcoexist, 843 coex_dm->cur_fw_dac_swing_lvl); 844 845 coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl; 846 } 847 848 static void btc8192e2ant_set_sw_rf_rx_lpf_corner(struct btc_coexist *btcoexist, 849 bool rx_rf_shrink_on) 850 { 851 struct rtl_priv *rtlpriv = btcoexist->adapter; 852 853 if (rx_rf_shrink_on) { 854 /* Shrink RF Rx LPF corner */ 855 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 856 "[BTCoex], Shrink RF Rx LPF corner!!\n"); 857 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, 858 0xfffff, 0xffffc); 859 } else { 860 /* Resume RF Rx LPF corner 861 * After initialized, we can use coex_dm->btRf0x1eBackup 862 */ 863 if (btcoexist->initilized) { 864 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 865 "[BTCoex], Resume RF Rx LPF corner!!\n"); 866 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, 867 0xfffff, 868 coex_dm->bt_rf0x1e_backup); 869 } 870 } 871 } 872 873 static void btc8192e2ant_rf_shrink(struct btc_coexist *btcoexist, 874 bool force_exec, bool rx_rf_shrink_on) 875 { 876 struct rtl_priv *rtlpriv = btcoexist->adapter; 877 878 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 879 "[BTCoex], %s turn Rx RF Shrink = %s\n", 880 (force_exec ? "force to" : ""), 881 ((rx_rf_shrink_on) ? "ON" : "OFF")); 882 coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on; 883 884 if (!force_exec) { 885 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 886 "[BTCoex]bPreRfRxLpfShrink=%d,bCurRfRxLpfShrink=%d\n", 887 coex_dm->pre_rf_rx_lpf_shrink, 888 coex_dm->cur_rf_rx_lpf_shrink); 889 890 if (coex_dm->pre_rf_rx_lpf_shrink == 891 coex_dm->cur_rf_rx_lpf_shrink) 892 return; 893 } 894 btc8192e2ant_set_sw_rf_rx_lpf_corner(btcoexist, 895 coex_dm->cur_rf_rx_lpf_shrink); 896 897 coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink; 898 } 899 900 static void btc8192e2ant_set_dac_swing_reg(struct btc_coexist *btcoexist, 901 u32 level) 902 { 903 struct rtl_priv *rtlpriv = btcoexist->adapter; 904 u8 val = (u8)level; 905 906 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 907 "[BTCoex], Write SwDacSwing = 0x%x\n", level); 908 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x883, 0x3e, val); 909 } 910 911 static void btc8192e2ant_set_sw_full_swing(struct btc_coexist *btcoexist, 912 bool sw_dac_swing_on, 913 u32 sw_dac_swing_lvl) 914 { 915 if (sw_dac_swing_on) 916 btc8192e2ant_set_dac_swing_reg(btcoexist, sw_dac_swing_lvl); 917 else 918 btc8192e2ant_set_dac_swing_reg(btcoexist, 0x18); 919 } 920 921 static void btc8192e2ant_dac_swing(struct btc_coexist *btcoexist, 922 bool force_exec, bool dac_swing_on, 923 u32 dac_swing_lvl) 924 { 925 struct rtl_priv *rtlpriv = btcoexist->adapter; 926 927 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 928 "[BTCoex], %s turn DacSwing=%s, dac_swing_lvl = 0x%x\n", 929 (force_exec ? "force to" : ""), 930 ((dac_swing_on) ? "ON" : "OFF"), dac_swing_lvl); 931 coex_dm->cur_dac_swing_on = dac_swing_on; 932 coex_dm->cur_dac_swing_lvl = dac_swing_lvl; 933 934 if (!force_exec) { 935 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 936 "[BTCoex], bPreDacSwingOn=%d, preDacSwingLvl = 0x%x, ", 937 coex_dm->pre_dac_swing_on, 938 coex_dm->pre_dac_swing_lvl); 939 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 940 "bCurDacSwingOn=%d, curDacSwingLvl = 0x%x\n", 941 coex_dm->cur_dac_swing_on, 942 coex_dm->cur_dac_swing_lvl); 943 944 if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) && 945 (coex_dm->pre_dac_swing_lvl == coex_dm->cur_dac_swing_lvl)) 946 return; 947 } 948 mdelay(30); 949 btc8192e2ant_set_sw_full_swing(btcoexist, dac_swing_on, dac_swing_lvl); 950 951 coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on; 952 coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl; 953 } 954 955 static void btc8192e2ant_set_agc_table(struct btc_coexist *btcoexist, 956 bool agc_table_en) 957 { 958 struct rtl_priv *rtlpriv = btcoexist->adapter; 959 960 /* BB AGC Gain Table */ 961 if (agc_table_en) { 962 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 963 "[BTCoex], BB Agc Table On!\n"); 964 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x0a1A0001); 965 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x091B0001); 966 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x081C0001); 967 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x071D0001); 968 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x061E0001); 969 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x051F0001); 970 } else { 971 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 972 "[BTCoex], BB Agc Table Off!\n"); 973 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xaa1A0001); 974 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa91B0001); 975 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa81C0001); 976 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa71D0001); 977 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa61E0001); 978 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa51F0001); 979 } 980 } 981 982 static void btc8192e2ant_agc_table(struct btc_coexist *btcoexist, 983 bool force_exec, bool agc_table_en) 984 { 985 struct rtl_priv *rtlpriv = btcoexist->adapter; 986 987 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 988 "[BTCoex], %s %s Agc Table\n", 989 (force_exec ? "force to" : ""), 990 ((agc_table_en) ? "Enable" : "Disable")); 991 coex_dm->cur_agc_table_en = agc_table_en; 992 993 if (!force_exec) { 994 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 995 "[BTCoex], bPreAgcTableEn=%d, bCurAgcTableEn=%d\n", 996 coex_dm->pre_agc_table_en, 997 coex_dm->cur_agc_table_en); 998 999 if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en) 1000 return; 1001 } 1002 btc8192e2ant_set_agc_table(btcoexist, agc_table_en); 1003 1004 coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en; 1005 } 1006 1007 static void btc8192e2ant_set_coex_table(struct btc_coexist *btcoexist, 1008 u32 val0x6c0, u32 val0x6c4, 1009 u32 val0x6c8, u8 val0x6cc) 1010 { 1011 struct rtl_priv *rtlpriv = btcoexist->adapter; 1012 1013 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1014 "[BTCoex], set coex table, set 0x6c0 = 0x%x\n", val0x6c0); 1015 btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0); 1016 1017 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1018 "[BTCoex], set coex table, set 0x6c4 = 0x%x\n", val0x6c4); 1019 btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4); 1020 1021 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1022 "[BTCoex], set coex table, set 0x6c8 = 0x%x\n", val0x6c8); 1023 btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8); 1024 1025 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1026 "[BTCoex], set coex table, set 0x6cc = 0x%x\n", val0x6cc); 1027 btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc); 1028 } 1029 1030 static void btc8192e2ant_coex_table(struct btc_coexist *btcoexist, 1031 bool force_exec, u32 val0x6c0, u32 val0x6c4, 1032 u32 val0x6c8, u8 val0x6cc) 1033 { 1034 struct rtl_priv *rtlpriv = btcoexist->adapter; 1035 1036 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1037 "[BTCoex], %s write Coex Table 0x6c0 = 0x%x, ", 1038 (force_exec ? "force to" : ""), val0x6c0); 1039 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1040 "0x6c4 = 0x%x, 0x6c8 = 0x%x, 0x6cc = 0x%x\n", 1041 val0x6c4, val0x6c8, val0x6cc); 1042 coex_dm->cur_val0x6c0 = val0x6c0; 1043 coex_dm->cur_val0x6c4 = val0x6c4; 1044 coex_dm->cur_val0x6c8 = val0x6c8; 1045 coex_dm->cur_val0x6cc = val0x6cc; 1046 1047 if (!force_exec) { 1048 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1049 "[BTCoex], preVal0x6c0 = 0x%x, preVal0x6c4 = 0x%x, ", 1050 coex_dm->pre_val0x6c0, coex_dm->pre_val0x6c4); 1051 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1052 "preVal0x6c8 = 0x%x, preVal0x6cc = 0x%x !!\n", 1053 coex_dm->pre_val0x6c8, coex_dm->pre_val0x6cc); 1054 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1055 "[BTCoex], curVal0x6c0 = 0x%x, curVal0x6c4 = 0x%x\n", 1056 coex_dm->cur_val0x6c0, coex_dm->cur_val0x6c4); 1057 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1058 "curVal0x6c8 = 0x%x, curVal0x6cc = 0x%x !!\n", 1059 coex_dm->cur_val0x6c8, coex_dm->cur_val0x6cc); 1060 1061 if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) && 1062 (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) && 1063 (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) && 1064 (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc)) 1065 return; 1066 } 1067 btc8192e2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8, 1068 val0x6cc); 1069 1070 coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0; 1071 coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4; 1072 coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8; 1073 coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc; 1074 } 1075 1076 static void btc8192e2ant_coex_table_with_type(struct btc_coexist *btcoexist, 1077 bool force_exec, u8 type) 1078 { 1079 switch (type) { 1080 case 0: 1081 btc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555, 1082 0x5a5a5a5a, 0xffffff, 0x3); 1083 break; 1084 case 1: 1085 btc8192e2ant_coex_table(btcoexist, force_exec, 0x5a5a5a5a, 1086 0x5a5a5a5a, 0xffffff, 0x3); 1087 break; 1088 case 2: 1089 btc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555, 1090 0x5ffb5ffb, 0xffffff, 0x3); 1091 break; 1092 case 3: 1093 btc8192e2ant_coex_table(btcoexist, force_exec, 0xdfffdfff, 1094 0x5fdb5fdb, 0xffffff, 0x3); 1095 break; 1096 case 4: 1097 btc8192e2ant_coex_table(btcoexist, force_exec, 0xdfffdfff, 1098 0x5ffb5ffb, 0xffffff, 0x3); 1099 break; 1100 default: 1101 break; 1102 } 1103 } 1104 1105 static void btc8192e2ant_set_fw_ignore_wlan_act(struct btc_coexist *btcoexist, 1106 bool enable) 1107 { 1108 struct rtl_priv *rtlpriv = btcoexist->adapter; 1109 u8 h2c_parameter[1] = {0}; 1110 1111 if (enable) 1112 h2c_parameter[0] |= BIT0; /* function enable */ 1113 1114 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1115 "[BTCoex]set FW for BT Ignore Wlan_Act, FW write 0x63 = 0x%x\n", 1116 h2c_parameter[0]); 1117 1118 btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter); 1119 } 1120 1121 static void btc8192e2ant_ignore_wlan_act(struct btc_coexist *btcoexist, 1122 bool force_exec, bool enable) 1123 { 1124 struct rtl_priv *rtlpriv = btcoexist->adapter; 1125 1126 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1127 "[BTCoex], %s turn Ignore WlanAct %s\n", 1128 (force_exec ? "force to" : ""), (enable ? "ON" : "OFF")); 1129 coex_dm->cur_ignore_wlan_act = enable; 1130 1131 if (!force_exec) { 1132 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1133 "[BTCoex], bPreIgnoreWlanAct = %d ", 1134 coex_dm->pre_ignore_wlan_act); 1135 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1136 "bCurIgnoreWlanAct = %d!!\n", 1137 coex_dm->cur_ignore_wlan_act); 1138 1139 if (coex_dm->pre_ignore_wlan_act == 1140 coex_dm->cur_ignore_wlan_act) 1141 return; 1142 } 1143 btc8192e2ant_set_fw_ignore_wlan_act(btcoexist, enable); 1144 1145 coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act; 1146 } 1147 1148 static void btc8192e2ant_set_fw_ps_tdma(struct btc_coexist *btcoexist, u8 byte1, 1149 u8 byte2, u8 byte3, u8 byte4, u8 byte5) 1150 { 1151 struct rtl_priv *rtlpriv = btcoexist->adapter; 1152 1153 u8 h2c_parameter[5] = {0}; 1154 1155 h2c_parameter[0] = byte1; 1156 h2c_parameter[1] = byte2; 1157 h2c_parameter[2] = byte3; 1158 h2c_parameter[3] = byte4; 1159 h2c_parameter[4] = byte5; 1160 1161 coex_dm->ps_tdma_para[0] = byte1; 1162 coex_dm->ps_tdma_para[1] = byte2; 1163 coex_dm->ps_tdma_para[2] = byte3; 1164 coex_dm->ps_tdma_para[3] = byte4; 1165 coex_dm->ps_tdma_para[4] = byte5; 1166 1167 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1168 "[BTCoex], FW write 0x60(5bytes) = 0x%x%08x\n", 1169 h2c_parameter[0], 1170 h2c_parameter[1] << 24 | h2c_parameter[2] << 16 | 1171 h2c_parameter[3] << 8 | h2c_parameter[4]); 1172 1173 btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter); 1174 } 1175 1176 static void btc8192e2ant_sw_mechanism1(struct btc_coexist *btcoexist, 1177 bool shrink_rx_lpf, bool low_penalty_ra, 1178 bool limited_dig, bool btlan_constrain) 1179 { 1180 btc8192e2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf); 1181 } 1182 1183 static void btc8192e2ant_sw_mechanism2(struct btc_coexist *btcoexist, 1184 bool agc_table_shift, bool adc_backoff, 1185 bool sw_dac_swing, u32 dac_swing_lvl) 1186 { 1187 btc8192e2ant_agc_table(btcoexist, NORMAL_EXEC, agc_table_shift); 1188 btc8192e2ant_dac_swing(btcoexist, NORMAL_EXEC, sw_dac_swing, 1189 dac_swing_lvl); 1190 } 1191 1192 static void btc8192e2ant_ps_tdma(struct btc_coexist *btcoexist, 1193 bool force_exec, bool turn_on, u8 type) 1194 { 1195 struct rtl_priv *rtlpriv = btcoexist->adapter; 1196 1197 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1198 "[BTCoex], %s turn %s PS TDMA, type=%d\n", 1199 (force_exec ? "force to" : ""), 1200 (turn_on ? "ON" : "OFF"), type); 1201 coex_dm->cur_ps_tdma_on = turn_on; 1202 coex_dm->cur_ps_tdma = type; 1203 1204 if (!force_exec) { 1205 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1206 "[BTCoex], bPrePsTdmaOn = %d, bCurPsTdmaOn = %d!!\n", 1207 coex_dm->pre_ps_tdma_on, coex_dm->cur_ps_tdma_on); 1208 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1209 "[BTCoex], prePsTdma = %d, curPsTdma = %d!!\n", 1210 coex_dm->pre_ps_tdma, coex_dm->cur_ps_tdma); 1211 1212 if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) && 1213 (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma)) 1214 return; 1215 } 1216 if (turn_on) { 1217 switch (type) { 1218 case 1: 1219 default: 1220 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a, 1221 0x1a, 0xe1, 0x90); 1222 break; 1223 case 2: 1224 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12, 1225 0x12, 0xe1, 0x90); 1226 break; 1227 case 3: 1228 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c, 1229 0x3, 0xf1, 0x90); 1230 break; 1231 case 4: 1232 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x10, 1233 0x3, 0xf1, 0x90); 1234 break; 1235 case 5: 1236 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a, 1237 0x1a, 0x60, 0x90); 1238 break; 1239 case 6: 1240 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12, 1241 0x12, 0x60, 0x90); 1242 break; 1243 case 7: 1244 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c, 1245 0x3, 0x70, 0x90); 1246 break; 1247 case 8: 1248 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xa3, 0x10, 1249 0x3, 0x70, 0x90); 1250 break; 1251 case 9: 1252 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a, 1253 0x1a, 0xe1, 0x10); 1254 break; 1255 case 10: 1256 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12, 1257 0x12, 0xe1, 0x10); 1258 break; 1259 case 11: 1260 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c, 1261 0x3, 0xf1, 0x10); 1262 break; 1263 case 12: 1264 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x10, 1265 0x3, 0xf1, 0x10); 1266 break; 1267 case 13: 1268 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a, 1269 0x1a, 0xe0, 0x10); 1270 break; 1271 case 14: 1272 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12, 1273 0x12, 0xe0, 0x10); 1274 break; 1275 case 15: 1276 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c, 1277 0x3, 0xf0, 0x10); 1278 break; 1279 case 16: 1280 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12, 1281 0x3, 0xf0, 0x10); 1282 break; 1283 case 17: 1284 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0x61, 0x20, 1285 0x03, 0x10, 0x10); 1286 break; 1287 case 18: 1288 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x5, 1289 0x5, 0xe1, 0x90); 1290 break; 1291 case 19: 1292 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x25, 1293 0x25, 0xe1, 0x90); 1294 break; 1295 case 20: 1296 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x25, 1297 0x25, 0x60, 0x90); 1298 break; 1299 case 21: 1300 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x15, 1301 0x03, 0x70, 0x90); 1302 break; 1303 case 71: 1304 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a, 1305 0x1a, 0xe1, 0x90); 1306 break; 1307 } 1308 } else { 1309 /* disable PS tdma */ 1310 switch (type) { 1311 default: 1312 case 0: 1313 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0x8, 0x0, 0x0, 1314 0x0, 0x0); 1315 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x4); 1316 break; 1317 case 1: 1318 btc8192e2ant_set_fw_ps_tdma(btcoexist, 0x0, 0x0, 0x0, 1319 0x8, 0x0); 1320 mdelay(5); 1321 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20); 1322 break; 1323 } 1324 } 1325 1326 /* update pre state */ 1327 coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on; 1328 coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma; 1329 } 1330 1331 static void btc8192e2ant_set_switch_ss_type(struct btc_coexist *btcoexist, 1332 u8 ss_type) 1333 { 1334 struct rtl_priv *rtlpriv = btcoexist->adapter; 1335 u8 mimops = BTC_MIMO_PS_DYNAMIC; 1336 u32 dis_ra_mask = 0x0; 1337 1338 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1339 "[BTCoex], REAL set SS Type = %d\n", ss_type); 1340 1341 dis_ra_mask = btc8192e2ant_decide_ra_mask(btcoexist, ss_type, 1342 coex_dm->cur_ra_mask_type); 1343 btc8192e2ant_update_ra_mask(btcoexist, FORCE_EXEC, dis_ra_mask); 1344 1345 if (ss_type == 1) { 1346 btc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1); 1347 /* switch ofdm path */ 1348 btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x11); 1349 btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x1); 1350 btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81111111); 1351 /* switch cck patch */ 1352 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x1); 1353 btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x81); 1354 mimops = BTC_MIMO_PS_STATIC; 1355 } else if (ss_type == 2) { 1356 btc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0); 1357 btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x33); 1358 btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x3); 1359 btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81121313); 1360 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x0); 1361 btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x41); 1362 mimops = BTC_MIMO_PS_DYNAMIC; 1363 } 1364 /* set rx 1ss or 2ss */ 1365 btcoexist->btc_set(btcoexist, BTC_SET_ACT_SEND_MIMO_PS, &mimops); 1366 } 1367 1368 static void btc8192e2ant_switch_ss_type(struct btc_coexist *btcoexist, 1369 bool force_exec, u8 new_ss_type) 1370 { 1371 struct rtl_priv *rtlpriv = btcoexist->adapter; 1372 1373 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1374 "[BTCoex], %s Switch SS Type = %d\n", 1375 (force_exec ? "force to" : ""), new_ss_type); 1376 coex_dm->cur_ss_type = new_ss_type; 1377 1378 if (!force_exec) { 1379 if (coex_dm->pre_ss_type == coex_dm->cur_ss_type) 1380 return; 1381 } 1382 btc8192e2ant_set_switch_ss_type(btcoexist, coex_dm->cur_ss_type); 1383 1384 coex_dm->pre_ss_type = coex_dm->cur_ss_type; 1385 } 1386 1387 static void btc8192e2ant_coex_all_off(struct btc_coexist *btcoexist) 1388 { 1389 /* fw all off */ 1390 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); 1391 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 1392 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 1393 1394 /* sw all off */ 1395 btc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false); 1396 btc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); 1397 1398 /* hw all off */ 1399 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); 1400 } 1401 1402 static void btc8192e2ant_init_coex_dm(struct btc_coexist *btcoexist) 1403 { 1404 /* force to reset coex mechanism */ 1405 1406 btc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1); 1407 btc8192e2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6); 1408 btc8192e2ant_dec_bt_pwr(btcoexist, FORCE_EXEC, 0); 1409 1410 btc8192e2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0); 1411 btc8192e2ant_switch_ss_type(btcoexist, FORCE_EXEC, 2); 1412 1413 btc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false); 1414 btc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); 1415 } 1416 1417 static void btc8192e2ant_action_bt_inquiry(struct btc_coexist *btcoexist) 1418 { 1419 bool low_pwr_disable = true; 1420 1421 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER, 1422 &low_pwr_disable); 1423 1424 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 1425 1426 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); 1427 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3); 1428 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 1429 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 1430 1431 btc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false); 1432 btc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18); 1433 } 1434 1435 static bool btc8192e2ant_is_common_action(struct btc_coexist *btcoexist) 1436 { 1437 struct rtl_priv *rtlpriv = btcoexist->adapter; 1438 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info; 1439 bool common = false, wifi_connected = false, wifi_busy = false; 1440 bool bt_hs_on = false, low_pwr_disable = false; 1441 1442 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); 1443 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, 1444 &wifi_connected); 1445 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); 1446 1447 if (bt_link_info->sco_exist || bt_link_info->hid_exist) 1448 btc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 0, 0, 0); 1449 else 1450 btc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0); 1451 1452 if (!wifi_connected) { 1453 low_pwr_disable = false; 1454 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER, 1455 &low_pwr_disable); 1456 1457 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1458 "[BTCoex], Wifi non-connected idle!!\n"); 1459 1460 if ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE == 1461 coex_dm->bt_status) || 1462 (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE == 1463 coex_dm->bt_status)) { 1464 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 2); 1465 btc8192e2ant_coex_table_with_type(btcoexist, 1466 NORMAL_EXEC, 1); 1467 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0); 1468 } else { 1469 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 1470 btc8192e2ant_coex_table_with_type(btcoexist, 1471 NORMAL_EXEC, 0); 1472 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); 1473 } 1474 1475 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 1476 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 1477 1478 btc8192e2ant_sw_mechanism1(btcoexist, false, false, false, 1479 false); 1480 btc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 1481 0x18); 1482 1483 common = true; 1484 } else { 1485 if (BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE == 1486 coex_dm->bt_status) { 1487 low_pwr_disable = false; 1488 btcoexist->btc_set(btcoexist, 1489 BTC_SET_ACT_DISABLE_LOW_POWER, 1490 &low_pwr_disable); 1491 1492 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1493 "Wifi connected + BT non connected-idle!!\n"); 1494 1495 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 2); 1496 btc8192e2ant_coex_table_with_type(btcoexist, 1497 NORMAL_EXEC, 1); 1498 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0); 1499 btc8192e2ant_fw_dac_swing_lvl(btcoexist, 1500 NORMAL_EXEC, 6); 1501 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 1502 1503 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 1504 false, false); 1505 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 1506 false, 0x18); 1507 1508 common = true; 1509 } else if (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE == 1510 coex_dm->bt_status) { 1511 low_pwr_disable = true; 1512 btcoexist->btc_set(btcoexist, 1513 BTC_SET_ACT_DISABLE_LOW_POWER, 1514 &low_pwr_disable); 1515 1516 if (bt_hs_on) 1517 return false; 1518 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1519 "Wifi connected + BT connected-idle!!\n"); 1520 1521 btc8192e2ant_switch_ss_type(btcoexist, 1522 NORMAL_EXEC, 2); 1523 btc8192e2ant_coex_table_with_type(btcoexist, 1524 NORMAL_EXEC, 1); 1525 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1526 false, 0); 1527 btc8192e2ant_fw_dac_swing_lvl(btcoexist, 1528 NORMAL_EXEC, 6); 1529 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 1530 1531 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 1532 false, false); 1533 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 1534 false, 0x18); 1535 1536 common = true; 1537 } else { 1538 low_pwr_disable = true; 1539 btcoexist->btc_set(btcoexist, 1540 BTC_SET_ACT_DISABLE_LOW_POWER, 1541 &low_pwr_disable); 1542 1543 if (wifi_busy) { 1544 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1545 "Wifi Connected-Busy + BT Busy!!\n"); 1546 common = false; 1547 } else { 1548 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1549 "Wifi Connected-Idle + BT Busy!!\n"); 1550 1551 btc8192e2ant_switch_ss_type(btcoexist, 1552 NORMAL_EXEC, 1); 1553 btc8192e2ant_coex_table_with_type(btcoexist, 1554 NORMAL_EXEC, 1555 2); 1556 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1557 true, 21); 1558 btc8192e2ant_fw_dac_swing_lvl(btcoexist, 1559 NORMAL_EXEC, 6); 1560 btc8192e2ant_dec_bt_pwr(btcoexist, 1561 NORMAL_EXEC, 0); 1562 btc8192e2ant_sw_mechanism1(btcoexist, false, 1563 false, false, false); 1564 btc8192e2ant_sw_mechanism2(btcoexist, false, 1565 false, false, 0x18); 1566 common = true; 1567 } 1568 } 1569 } 1570 return common; 1571 } 1572 1573 static void btc8192e2ant_tdma_duration_adjust(struct btc_coexist *btcoexist, 1574 bool sco_hid, bool tx_pause, 1575 u8 max_interval) 1576 { 1577 struct rtl_priv *rtlpriv = btcoexist->adapter; 1578 static int up, dn, m, n, wait_cnt; 1579 /* 0: no change, +1: increase WiFi duration, 1580 * -1: decrease WiFi duration 1581 */ 1582 int result; 1583 u8 retry_cnt = 0; 1584 1585 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1586 "[BTCoex], TdmaDurationAdjust()\n"); 1587 1588 if (!coex_dm->auto_tdma_adjust) { 1589 coex_dm->auto_tdma_adjust = true; 1590 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1591 "[BTCoex], first run TdmaDurationAdjust()!!\n"); 1592 if (sco_hid) { 1593 if (tx_pause) { 1594 if (max_interval == 1) { 1595 btc8192e2ant_ps_tdma(btcoexist, 1596 NORMAL_EXEC, 1597 true, 13); 1598 coex_dm->tdma_adj_type = 13; 1599 } else if (max_interval == 2) { 1600 btc8192e2ant_ps_tdma(btcoexist, 1601 NORMAL_EXEC, 1602 true, 14); 1603 coex_dm->tdma_adj_type = 14; 1604 } else { 1605 btc8192e2ant_ps_tdma(btcoexist, 1606 NORMAL_EXEC, 1607 true, 15); 1608 coex_dm->tdma_adj_type = 15; 1609 } 1610 } else { 1611 if (max_interval == 1) { 1612 btc8192e2ant_ps_tdma(btcoexist, 1613 NORMAL_EXEC, 1614 true, 9); 1615 coex_dm->tdma_adj_type = 9; 1616 } else if (max_interval == 2) { 1617 btc8192e2ant_ps_tdma(btcoexist, 1618 NORMAL_EXEC, 1619 true, 10); 1620 coex_dm->tdma_adj_type = 10; 1621 } else { 1622 btc8192e2ant_ps_tdma(btcoexist, 1623 NORMAL_EXEC, 1624 true, 11); 1625 coex_dm->tdma_adj_type = 11; 1626 } 1627 } 1628 } else { 1629 if (tx_pause) { 1630 if (max_interval == 1) { 1631 btc8192e2ant_ps_tdma(btcoexist, 1632 NORMAL_EXEC, 1633 true, 5); 1634 coex_dm->tdma_adj_type = 5; 1635 } else if (max_interval == 2) { 1636 btc8192e2ant_ps_tdma(btcoexist, 1637 NORMAL_EXEC, 1638 true, 6); 1639 coex_dm->tdma_adj_type = 6; 1640 } else { 1641 btc8192e2ant_ps_tdma(btcoexist, 1642 NORMAL_EXEC, 1643 true, 7); 1644 coex_dm->tdma_adj_type = 7; 1645 } 1646 } else { 1647 if (max_interval == 1) { 1648 btc8192e2ant_ps_tdma(btcoexist, 1649 NORMAL_EXEC, 1650 true, 1); 1651 coex_dm->tdma_adj_type = 1; 1652 } else if (max_interval == 2) { 1653 btc8192e2ant_ps_tdma(btcoexist, 1654 NORMAL_EXEC, 1655 true, 2); 1656 coex_dm->tdma_adj_type = 2; 1657 } else { 1658 btc8192e2ant_ps_tdma(btcoexist, 1659 NORMAL_EXEC, 1660 true, 3); 1661 coex_dm->tdma_adj_type = 3; 1662 } 1663 } 1664 } 1665 1666 up = 0; 1667 dn = 0; 1668 m = 1; 1669 n = 3; 1670 result = 0; 1671 wait_cnt = 0; 1672 } else { 1673 /* accquire the BT TRx retry count from BT_Info byte2 */ 1674 retry_cnt = coex_sta->bt_retry_cnt; 1675 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1676 "[BTCoex], retry_cnt = %d\n", retry_cnt); 1677 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1678 "[BTCoex], up=%d, dn=%d, m=%d, n=%d, wait_cnt=%d\n", 1679 up, dn, m, n, wait_cnt); 1680 result = 0; 1681 wait_cnt++; 1682 /* no retry in the last 2-second duration */ 1683 if (retry_cnt == 0) { 1684 up++; 1685 dn--; 1686 1687 if (dn <= 0) 1688 dn = 0; 1689 1690 if (up >= n) { 1691 wait_cnt = 0; 1692 n = 3; 1693 up = 0; 1694 dn = 0; 1695 result = 1; 1696 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1697 "[BTCoex]Increase wifi duration!!\n"); 1698 } 1699 } else if (retry_cnt <= 3) { 1700 up--; 1701 dn++; 1702 1703 if (up <= 0) 1704 up = 0; 1705 1706 if (dn == 2) { 1707 if (wait_cnt <= 2) 1708 m++; 1709 else 1710 m = 1; 1711 1712 if (m >= 20) 1713 m = 20; 1714 1715 n = 3 * m; 1716 up = 0; 1717 dn = 0; 1718 wait_cnt = 0; 1719 result = -1; 1720 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1721 "Reduce wifi duration for retry<3\n"); 1722 } 1723 } else { 1724 if (wait_cnt == 1) 1725 m++; 1726 else 1727 m = 1; 1728 1729 if (m >= 20) 1730 m = 20; 1731 1732 n = 3*m; 1733 up = 0; 1734 dn = 0; 1735 wait_cnt = 0; 1736 result = -1; 1737 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1738 "Decrease wifi duration for retryCounter>3!!\n"); 1739 } 1740 1741 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1742 "[BTCoex], max Interval = %d\n", max_interval); 1743 } 1744 1745 /* if current PsTdma not match with 1746 * the recorded one (when scan, dhcp...), 1747 * then we have to adjust it back to the previous record one. 1748 */ 1749 if (coex_dm->cur_ps_tdma != coex_dm->tdma_adj_type) { 1750 bool scan = false, link = false, roam = false; 1751 1752 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1753 "[BTCoex], PsTdma type dismatch!!!, "); 1754 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1755 "curPsTdma=%d, recordPsTdma=%d\n", 1756 coex_dm->cur_ps_tdma, coex_dm->tdma_adj_type); 1757 1758 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); 1759 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link); 1760 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); 1761 1762 if (!scan && !link && !roam) 1763 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, 1764 true, coex_dm->tdma_adj_type); 1765 else 1766 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1767 "[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n"); 1768 } 1769 } 1770 1771 /* SCO only or SCO+PAN(HS) */ 1772 static void btc8192e2ant_action_sco(struct btc_coexist *btcoexist) 1773 { 1774 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; 1775 u32 wifi_bw; 1776 1777 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 1778 1779 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 1780 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 1781 1782 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 1783 1784 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); 1785 1786 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 1787 1788 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 1789 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 1790 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 1791 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13); 1792 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 1793 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 1794 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 1795 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9); 1796 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 1797 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 1798 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 1799 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9); 1800 } 1801 1802 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 1803 1804 /* sw mechanism */ 1805 if (BTC_WIFI_BW_HT40 == wifi_bw) { 1806 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 1807 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 1808 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 1809 false, false); 1810 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 1811 false, 0x6); 1812 } else { 1813 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 1814 false, false); 1815 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 1816 false, 0x6); 1817 } 1818 } else { 1819 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 1820 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 1821 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 1822 false, false); 1823 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 1824 false, 0x6); 1825 } else { 1826 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 1827 false, false); 1828 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 1829 false, 0x6); 1830 } 1831 } 1832 } 1833 1834 static void btc8192e2ant_action_sco_pan(struct btc_coexist *btcoexist) 1835 { 1836 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_STAY_LOW; 1837 u32 wifi_bw; 1838 1839 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 1840 1841 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 1842 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 1843 1844 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 1845 1846 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4); 1847 1848 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 1849 1850 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 1851 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 1852 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 1853 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14); 1854 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 1855 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 1856 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 1857 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10); 1858 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 1859 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 1860 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 1861 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10); 1862 } 1863 1864 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 1865 1866 /* sw mechanism */ 1867 if (BTC_WIFI_BW_HT40 == wifi_bw) { 1868 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 1869 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 1870 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 1871 false, false); 1872 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 1873 false, 0x6); 1874 } else { 1875 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 1876 false, false); 1877 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 1878 false, 0x6); 1879 } 1880 } else { 1881 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 1882 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 1883 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 1884 false, false); 1885 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 1886 false, 0x6); 1887 } else { 1888 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 1889 false, false); 1890 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 1891 false, 0x6); 1892 } 1893 } 1894 } 1895 1896 static void btc8192e2ant_action_hid(struct btc_coexist *btcoexist) 1897 { 1898 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; 1899 u32 wifi_bw; 1900 1901 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 1902 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 1903 1904 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 1905 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 1906 1907 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 1908 1909 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 1910 1911 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); 1912 1913 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 1914 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 1915 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 1916 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13); 1917 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 1918 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 1919 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 1920 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9); 1921 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 1922 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 1923 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 1924 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9); 1925 } 1926 1927 /* sw mechanism */ 1928 if (BTC_WIFI_BW_HT40 == wifi_bw) { 1929 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 1930 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 1931 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 1932 false, false); 1933 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 1934 false, 0x18); 1935 } else { 1936 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 1937 false, false); 1938 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 1939 false, 0x18); 1940 } 1941 } else { 1942 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 1943 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 1944 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 1945 false, false); 1946 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 1947 false, 0x18); 1948 } else { 1949 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 1950 false, false); 1951 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 1952 false, 0x18); 1953 } 1954 } 1955 } 1956 1957 /* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */ 1958 static void btc8192e2ant_action_a2dp(struct btc_coexist *btcoexist) 1959 { 1960 struct rtl_priv *rtlpriv = btcoexist->adapter; 1961 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; 1962 u32 wifi_bw; 1963 bool long_dist = false; 1964 1965 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 1966 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 1967 1968 if ((bt_rssi_state == BTC_RSSI_STATE_LOW || 1969 bt_rssi_state == BTC_RSSI_STATE_STAY_LOW) && 1970 (wifi_rssi_state == BTC_RSSI_STATE_LOW || 1971 wifi_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 1972 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 1973 "[BTCoex], A2dp, wifi/bt rssi both LOW!!\n"); 1974 long_dist = true; 1975 } 1976 if (long_dist) { 1977 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 2); 1978 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true, 1979 0x4); 1980 } else { 1981 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 1982 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 1983 0x8); 1984 } 1985 1986 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 1987 1988 if (long_dist) 1989 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0); 1990 else 1991 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); 1992 1993 if (long_dist) { 1994 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 17); 1995 coex_dm->auto_tdma_adjust = false; 1996 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 1997 } else { 1998 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 1999 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 2000 btc8192e2ant_tdma_duration_adjust(btcoexist, false, 2001 true, 1); 2002 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 2003 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 2004 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 2005 btc8192e2ant_tdma_duration_adjust(btcoexist, false, 2006 false, 1); 2007 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 2008 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2009 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2010 btc8192e2ant_tdma_duration_adjust(btcoexist, false, 2011 false, 1); 2012 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 2013 } 2014 } 2015 2016 /* sw mechanism */ 2017 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2018 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2019 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2020 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2021 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2022 false, false); 2023 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2024 false, 0x18); 2025 } else { 2026 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2027 false, false); 2028 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2029 false, 0x18); 2030 } 2031 } else { 2032 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2033 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2034 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2035 false, false); 2036 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2037 false, 0x18); 2038 } else { 2039 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2040 false, false); 2041 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2042 false, 0x18); 2043 } 2044 } 2045 } 2046 2047 static void btc8192e2ant_action_a2dp_pan_hs(struct btc_coexist *btcoexist) 2048 { 2049 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; 2050 u32 wifi_bw; 2051 2052 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 2053 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 2054 2055 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 2056 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 2057 2058 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 2059 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); 2060 2061 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 2062 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 2063 btc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 2); 2064 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 2065 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 2066 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 2067 btc8192e2ant_tdma_duration_adjust(btcoexist, false, false, 2); 2068 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 2069 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2070 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2071 btc8192e2ant_tdma_duration_adjust(btcoexist, false, false, 2); 2072 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 2073 } 2074 2075 /* sw mechanism */ 2076 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2077 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2078 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2079 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2080 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2081 false, false); 2082 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2083 true, 0x6); 2084 } else { 2085 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2086 false, false); 2087 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2088 true, 0x6); 2089 } 2090 } else { 2091 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2092 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2093 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2094 false, false); 2095 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2096 true, 0x6); 2097 } else { 2098 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2099 false, false); 2100 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2101 true, 0x6); 2102 } 2103 } 2104 } 2105 2106 static void btc8192e2ant_action_pan_edr(struct btc_coexist *btcoexist) 2107 { 2108 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; 2109 u32 wifi_bw; 2110 2111 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 2112 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 2113 2114 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 2115 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 2116 2117 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 2118 2119 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); 2120 2121 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 2122 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 2123 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 2124 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5); 2125 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 2126 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 2127 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 2128 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1); 2129 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2130 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2131 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 2132 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1); 2133 } 2134 2135 /* sw mechanism */ 2136 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2137 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2138 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2139 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2140 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2141 false, false); 2142 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2143 false, 0x18); 2144 } else { 2145 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2146 false, false); 2147 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2148 false, 0x18); 2149 } 2150 } else { 2151 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2152 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2153 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2154 false, false); 2155 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2156 false, 0x18); 2157 } else { 2158 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2159 false, false); 2160 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2161 false, 0x18); 2162 } 2163 } 2164 } 2165 2166 /* PAN(HS) only */ 2167 static void btc8192e2ant_action_pan_hs(struct btc_coexist *btcoexist) 2168 { 2169 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; 2170 u32 wifi_bw; 2171 2172 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 2173 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 2174 2175 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 2176 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 2177 2178 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 2179 2180 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); 2181 2182 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 2183 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 2184 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 2185 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 2186 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 2187 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 2188 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2189 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2190 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 2191 } 2192 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1); 2193 2194 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2195 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2196 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2197 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2198 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2199 false, false); 2200 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2201 false, 0x18); 2202 } else { 2203 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2204 false, false); 2205 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2206 false, 0x18); 2207 } 2208 } else { 2209 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2210 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2211 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2212 false, false); 2213 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2214 false, 0x18); 2215 } else { 2216 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2217 false, false); 2218 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2219 false, 0x18); 2220 } 2221 } 2222 } 2223 2224 /* PAN(EDR)+A2DP */ 2225 static void btc8192e2ant_action_pan_edr_a2dp(struct btc_coexist *btcoexist) 2226 { 2227 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; 2228 u32 wifi_bw; 2229 2230 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 2231 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 2232 2233 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 2234 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 2235 2236 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 2237 2238 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2); 2239 2240 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2241 2242 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 2243 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 2244 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 2245 btc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 3); 2246 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 2247 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 2248 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 2249 btc8192e2ant_tdma_duration_adjust(btcoexist, false, false, 3); 2250 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2251 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2252 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 2253 btc8192e2ant_tdma_duration_adjust(btcoexist, false, false, 3); 2254 } 2255 2256 /* sw mechanism */ 2257 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2258 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2259 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2260 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2261 false, false); 2262 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2263 false, 0x18); 2264 } else { 2265 btc8192e2ant_sw_mechanism1(btcoexist, true, false, 2266 false, false); 2267 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2268 false, 0x18); 2269 } 2270 } else { 2271 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2272 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2273 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2274 false, false); 2275 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2276 false, 0x18); 2277 } else { 2278 btc8192e2ant_sw_mechanism1(btcoexist, false, false, 2279 false, false); 2280 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2281 false, 0x18); 2282 } 2283 } 2284 } 2285 2286 static void btc8192e2ant_action_pan_edr_hid(struct btc_coexist *btcoexist) 2287 { 2288 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; 2289 u32 wifi_bw; 2290 2291 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 2292 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 2293 2294 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2295 2296 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 2297 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 2298 2299 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 2300 2301 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); 2302 2303 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 2304 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 2305 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 2306 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14); 2307 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 2308 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 2309 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 2310 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10); 2311 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2312 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2313 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 2314 btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, 2315 true, 10); 2316 } 2317 2318 /* sw mechanism */ 2319 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2320 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2321 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2322 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 2323 false, false); 2324 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2325 false, 0x18); 2326 } else { 2327 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 2328 false, false); 2329 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2330 false, 0x18); 2331 } 2332 } else { 2333 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2334 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2335 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 2336 false, false); 2337 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2338 false, 0x18); 2339 } else { 2340 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 2341 false, false); 2342 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2343 false, 0x18); 2344 } 2345 } 2346 } 2347 2348 /* HID+A2DP+PAN(EDR) */ 2349 static void btc8192e2ant_action_hid_a2dp_pan_edr(struct btc_coexist *btcoexist) 2350 { 2351 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; 2352 u32 wifi_bw; 2353 2354 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 2355 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 2356 2357 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 2358 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 2359 2360 btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6); 2361 2362 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2363 2364 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); 2365 2366 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 2367 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 2368 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 2369 btc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 3); 2370 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 2371 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 2372 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 2373 btc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3); 2374 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2375 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2376 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 2377 btc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3); 2378 } 2379 2380 /* sw mechanism */ 2381 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2382 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2383 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2384 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 2385 false, false); 2386 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2387 false, 0x18); 2388 } else { 2389 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 2390 false, false); 2391 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2392 false, 0x18); 2393 } 2394 } else { 2395 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2396 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2397 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 2398 false, false); 2399 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2400 false, 0x18); 2401 } else { 2402 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 2403 false, false); 2404 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2405 false, 0x18); 2406 } 2407 } 2408 } 2409 2410 static void btc8192e2ant_action_hid_a2dp(struct btc_coexist *btcoexist) 2411 { 2412 u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH; 2413 u32 wifi_bw; 2414 2415 wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0); 2416 bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42); 2417 2418 btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1); 2419 btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8); 2420 2421 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2422 2423 btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3); 2424 2425 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) || 2426 (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { 2427 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0); 2428 btc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 2); 2429 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) || 2430 (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) { 2431 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2); 2432 btc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2); 2433 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) || 2434 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2435 btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4); 2436 btc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2); 2437 } 2438 2439 /* sw mechanism */ 2440 if (BTC_WIFI_BW_HT40 == wifi_bw) { 2441 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2442 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2443 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 2444 false, false); 2445 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2446 false, 0x18); 2447 } else { 2448 btc8192e2ant_sw_mechanism1(btcoexist, true, true, 2449 false, false); 2450 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2451 false, 0x18); 2452 } 2453 } else { 2454 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) || 2455 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) { 2456 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 2457 false, false); 2458 btc8192e2ant_sw_mechanism2(btcoexist, true, false, 2459 false, 0x18); 2460 } else { 2461 btc8192e2ant_sw_mechanism1(btcoexist, false, true, 2462 false, false); 2463 btc8192e2ant_sw_mechanism2(btcoexist, false, false, 2464 false, 0x18); 2465 } 2466 } 2467 } 2468 2469 static void btc8192e2ant_run_coexist_mechanism(struct btc_coexist *btcoexist) 2470 { 2471 struct rtl_priv *rtlpriv = btcoexist->adapter; 2472 u8 algorithm = 0; 2473 2474 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2475 "[BTCoex], RunCoexistMechanism()===>\n"); 2476 2477 if (btcoexist->manual_control) { 2478 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2479 "[BTCoex], return for Manual CTRL <===\n"); 2480 return; 2481 } 2482 2483 if (coex_sta->under_ips) { 2484 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2485 "[BTCoex], wifi is under IPS !!!\n"); 2486 return; 2487 } 2488 2489 algorithm = btc8192e2ant_action_algorithm(btcoexist); 2490 if (coex_sta->c2h_bt_inquiry_page && 2491 (BT_8192E_2ANT_COEX_ALGO_PANHS != algorithm)) { 2492 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2493 "[BTCoex], BT is under inquiry/page scan !!\n"); 2494 btc8192e2ant_action_bt_inquiry(btcoexist); 2495 return; 2496 } 2497 2498 coex_dm->cur_algorithm = algorithm; 2499 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2500 "[BTCoex], Algorithm = %d\n", coex_dm->cur_algorithm); 2501 2502 if (btc8192e2ant_is_common_action(btcoexist)) { 2503 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2504 "[BTCoex], Action 2-Ant common\n"); 2505 coex_dm->auto_tdma_adjust = false; 2506 } else { 2507 if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) { 2508 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2509 "[BTCoex] preAlgorithm=%d, curAlgorithm=%d\n", 2510 coex_dm->pre_algorithm, 2511 coex_dm->cur_algorithm); 2512 coex_dm->auto_tdma_adjust = false; 2513 } 2514 switch (coex_dm->cur_algorithm) { 2515 case BT_8192E_2ANT_COEX_ALGO_SCO: 2516 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2517 "Action 2-Ant, algorithm = SCO\n"); 2518 btc8192e2ant_action_sco(btcoexist); 2519 break; 2520 case BT_8192E_2ANT_COEX_ALGO_SCO_PAN: 2521 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2522 "Action 2-Ant, algorithm = SCO+PAN(EDR)\n"); 2523 btc8192e2ant_action_sco_pan(btcoexist); 2524 break; 2525 case BT_8192E_2ANT_COEX_ALGO_HID: 2526 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2527 "Action 2-Ant, algorithm = HID\n"); 2528 btc8192e2ant_action_hid(btcoexist); 2529 break; 2530 case BT_8192E_2ANT_COEX_ALGO_A2DP: 2531 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2532 "Action 2-Ant, algorithm = A2DP\n"); 2533 btc8192e2ant_action_a2dp(btcoexist); 2534 break; 2535 case BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS: 2536 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2537 "Action 2-Ant, algorithm = A2DP+PAN(HS)\n"); 2538 btc8192e2ant_action_a2dp_pan_hs(btcoexist); 2539 break; 2540 case BT_8192E_2ANT_COEX_ALGO_PANEDR: 2541 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2542 "Action 2-Ant, algorithm = PAN(EDR)\n"); 2543 btc8192e2ant_action_pan_edr(btcoexist); 2544 break; 2545 case BT_8192E_2ANT_COEX_ALGO_PANHS: 2546 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2547 "Action 2-Ant, algorithm = HS mode\n"); 2548 btc8192e2ant_action_pan_hs(btcoexist); 2549 break; 2550 case BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP: 2551 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2552 "Action 2-Ant, algorithm = PAN+A2DP\n"); 2553 btc8192e2ant_action_pan_edr_a2dp(btcoexist); 2554 break; 2555 case BT_8192E_2ANT_COEX_ALGO_PANEDR_HID: 2556 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2557 "Action 2-Ant, algorithm = PAN(EDR)+HID\n"); 2558 btc8192e2ant_action_pan_edr_hid(btcoexist); 2559 break; 2560 case BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR: 2561 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2562 "Action 2-Ant, algorithm = HID+A2DP+PAN\n"); 2563 btc8192e2ant_action_hid_a2dp_pan_edr(btcoexist); 2564 break; 2565 case BT_8192E_2ANT_COEX_ALGO_HID_A2DP: 2566 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2567 "Action 2-Ant, algorithm = HID+A2DP\n"); 2568 btc8192e2ant_action_hid_a2dp(btcoexist); 2569 break; 2570 default: 2571 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2572 "Action 2-Ant, algorithm = unknown!!\n"); 2573 /* btc8192e2ant_coex_all_off(btcoexist); */ 2574 break; 2575 } 2576 coex_dm->pre_algorithm = coex_dm->cur_algorithm; 2577 } 2578 } 2579 2580 static void btc8192e2ant_init_hwconfig(struct btc_coexist *btcoexist, 2581 bool backup) 2582 { 2583 struct rtl_priv *rtlpriv = btcoexist->adapter; 2584 u16 u16tmp = 0; 2585 u8 u8tmp = 0; 2586 2587 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2588 "[BTCoex], 2Ant Init HW Config!!\n"); 2589 2590 if (backup) { 2591 /* backup rf 0x1e value */ 2592 coex_dm->bt_rf0x1e_backup = 2593 btcoexist->btc_get_rf_reg(btcoexist, BTC_RF_A, 2594 0x1e, 0xfffff); 2595 2596 coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist, 2597 0x430); 2598 coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist, 2599 0x434); 2600 coex_dm->backup_retry_limit = btcoexist->btc_read_2byte( 2601 btcoexist, 2602 0x42a); 2603 coex_dm->backup_ampdu_maxtime = btcoexist->btc_read_1byte( 2604 btcoexist, 2605 0x456); 2606 } 2607 2608 /* antenna sw ctrl to bt */ 2609 btcoexist->btc_write_1byte(btcoexist, 0x4f, 0x6); 2610 btcoexist->btc_write_1byte(btcoexist, 0x944, 0x24); 2611 btcoexist->btc_write_4byte(btcoexist, 0x930, 0x700700); 2612 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20); 2613 if (btcoexist->chip_interface == BTC_INTF_USB) 2614 btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30430004); 2615 else 2616 btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30030004); 2617 2618 btc8192e2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0); 2619 2620 /* antenna switch control parameter */ 2621 btcoexist->btc_write_4byte(btcoexist, 0x858, 0x55555555); 2622 2623 /* coex parameters */ 2624 btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3); 2625 /* 0x790[5:0] = 0x5 */ 2626 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790); 2627 u8tmp &= 0xc0; 2628 u8tmp |= 0x5; 2629 btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp); 2630 2631 /* enable counter statistics */ 2632 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4); 2633 2634 /* enable PTA */ 2635 btcoexist->btc_write_1byte(btcoexist, 0x40, 0x20); 2636 /* enable mailbox interface */ 2637 u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x40); 2638 u16tmp |= BIT9; 2639 btcoexist->btc_write_2byte(btcoexist, 0x40, u16tmp); 2640 2641 /* enable PTA I2C mailbox */ 2642 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x101); 2643 u8tmp |= BIT4; 2644 btcoexist->btc_write_1byte(btcoexist, 0x101, u8tmp); 2645 2646 /* enable bt clock when wifi is disabled. */ 2647 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x93); 2648 u8tmp |= BIT0; 2649 btcoexist->btc_write_1byte(btcoexist, 0x93, u8tmp); 2650 /* enable bt clock when suspend. */ 2651 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x7); 2652 u8tmp |= BIT0; 2653 btcoexist->btc_write_1byte(btcoexist, 0x7, u8tmp); 2654 } 2655 2656 /************************************************************ 2657 * extern function start with ex_btc8192e2ant_ 2658 ************************************************************/ 2659 2660 void ex_btc8192e2ant_init_hwconfig(struct btc_coexist *btcoexist) 2661 { 2662 btc8192e2ant_init_hwconfig(btcoexist, true); 2663 } 2664 2665 void ex_btc8192e2ant_init_coex_dm(struct btc_coexist *btcoexist) 2666 { 2667 struct rtl_priv *rtlpriv = btcoexist->adapter; 2668 2669 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2670 "[BTCoex], Coex Mechanism Init!!\n"); 2671 btc8192e2ant_init_coex_dm(btcoexist); 2672 } 2673 2674 void ex_btc8192e2ant_display_coex_info(struct btc_coexist *btcoexist) 2675 { 2676 struct btc_board_info *board_info = &btcoexist->board_info; 2677 struct btc_stack_info *stack_info = &btcoexist->stack_info; 2678 struct rtl_priv *rtlpriv = btcoexist->adapter; 2679 u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0; 2680 u16 u16tmp[4]; 2681 u32 u32tmp[4]; 2682 bool roam = false, scan = false, link = false, wifi_under_5g = false; 2683 bool bt_hs_on = false, wifi_busy = false; 2684 int wifi_rssi = 0, bt_hs_rssi = 0; 2685 u32 wifi_bw, wifi_traffic_dir; 2686 u8 wifi_dot11_chnl, wifi_hs_chnl; 2687 u32 fw_ver = 0, bt_patch_ver = 0; 2688 2689 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 2690 "\r\n ============[BT Coexist info]============"); 2691 2692 if (btcoexist->manual_control) { 2693 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 2694 "\r\n ===========[Under Manual Control]==========="); 2695 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 2696 "\r\n =========================================="); 2697 } 2698 2699 if (!board_info->bt_exist) { 2700 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n BT not exists !!!"); 2701 return; 2702 } 2703 2704 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 2705 "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", 2706 board_info->pg_ant_num, board_info->btdm_ant_num); 2707 2708 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %s / %d", 2709 "BT stack/ hci ext ver", 2710 ((stack_info->profile_notified) ? "Yes" : "No"), 2711 stack_info->hci_version); 2712 2713 btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver); 2714 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver); 2715 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 2716 "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)", 2717 "CoexVer/ FwVer/ PatchVer", 2718 glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant, 2719 fw_ver, bt_patch_ver, bt_patch_ver); 2720 2721 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on); 2722 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_DOT11_CHNL, 2723 &wifi_dot11_chnl); 2724 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifi_hs_chnl); 2725 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d / %d(%d)", 2726 "Dot11 channel / HsMode(HsChnl)", 2727 wifi_dot11_chnl, bt_hs_on, wifi_hs_chnl); 2728 2729 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %3ph ", 2730 "H2C Wifi inform bt chnl Info", coex_dm->wifi_chnl_info); 2731 2732 btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi); 2733 btcoexist->btc_get(btcoexist, BTC_GET_S4_HS_RSSI, &bt_hs_rssi); 2734 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d", 2735 "Wifi rssi/ HS rssi", wifi_rssi, bt_hs_rssi); 2736 2737 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan); 2738 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link); 2739 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam); 2740 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d/ %d ", 2741 "Wifi link/ roam/ scan", link, roam, scan); 2742 2743 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g); 2744 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2745 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy); 2746 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, 2747 &wifi_traffic_dir); 2748 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %s / %s/ %s ", 2749 "Wifi status", (wifi_under_5g ? "5G" : "2.4G"), 2750 ((BTC_WIFI_BW_LEGACY == wifi_bw) ? "Legacy" : 2751 (((BTC_WIFI_BW_HT40 == wifi_bw) ? "HT40" : "HT20"))), 2752 ((!wifi_busy) ? "idle" : 2753 ((BTC_WIFI_TRAFFIC_TX == wifi_traffic_dir) ? 2754 "uplink" : "downlink"))); 2755 2756 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = [%s/ %d/ %d] ", 2757 "BT [status/ rssi/ retryCnt]", 2758 ((btcoexist->bt_info.bt_disabled) ? ("disabled") : 2759 ((coex_sta->c2h_bt_inquiry_page) ? 2760 ("inquiry/page scan") : 2761 ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE == 2762 coex_dm->bt_status) ? "non-connected idle" : 2763 ((BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE == 2764 coex_dm->bt_status) ? "connected-idle" : "busy")))), 2765 coex_sta->bt_rssi, coex_sta->bt_retry_cnt); 2766 2767 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d / %d / %d / %d", 2768 "SCO/HID/PAN/A2DP", stack_info->sco_exist, 2769 stack_info->hid_exist, stack_info->pan_exist, 2770 stack_info->a2dp_exist); 2771 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_BT_LINK_INFO); 2772 2773 bt_info_ext = coex_sta->bt_info_ext; 2774 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %s", 2775 "BT Info A2DP rate", 2776 (bt_info_ext&BIT0) ? "Basic rate" : "EDR rate"); 2777 2778 for (i = 0; i < BT_INFO_SRC_8192E_2ANT_MAX; i++) { 2779 if (coex_sta->bt_info_c2h_cnt[i]) { 2780 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 2781 "\r\n %-35s = %7ph(%d)", 2782 glbt_info_src_8192e_2ant[i], 2783 coex_sta->bt_info_c2h[i], 2784 coex_sta->bt_info_c2h_cnt[i]); 2785 } 2786 } 2787 2788 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %s/%s", 2789 "PS state, IPS/LPS", 2790 ((coex_sta->under_ips ? "IPS ON" : "IPS OFF")), 2791 ((coex_sta->under_lps ? "LPS ON" : "LPS OFF"))); 2792 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_FW_PWR_MODE_CMD); 2793 2794 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x ", "SS Type", 2795 coex_dm->cur_ss_type); 2796 2797 /* Sw mechanism */ 2798 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s", 2799 "============[Sw mechanism]============"); 2800 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d/ %d ", 2801 "SM1[ShRf/ LpRA/ LimDig]", coex_dm->cur_rf_rx_lpf_shrink, 2802 coex_dm->cur_low_penalty_ra, coex_dm->limited_dig); 2803 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d/ %d(0x%x) ", 2804 "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", 2805 coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off, 2806 coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl); 2807 2808 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x ", "Rate Mask", 2809 btcoexist->bt_info.ra_mask); 2810 2811 /* Fw mechanism */ 2812 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s", 2813 "============[Fw mechanism]============"); 2814 2815 ps_tdma_case = coex_dm->cur_ps_tdma; 2816 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 2817 "\r\n %-35s = %5ph case-%d (auto:%d)", 2818 "PS TDMA", coex_dm->ps_tdma_para, 2819 ps_tdma_case, coex_dm->auto_tdma_adjust); 2820 2821 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d ", 2822 "DecBtPwr/ IgnWlanAct", 2823 coex_dm->cur_dec_bt_pwr, coex_dm->cur_ignore_wlan_act); 2824 2825 /* Hw setting */ 2826 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s", 2827 "============[Hw setting]============"); 2828 2829 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x", 2830 "RF-A, 0x1e initVal", coex_dm->bt_rf0x1e_backup); 2831 2832 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", 2833 "backup ARFR1/ARFR2/RL/AMaxTime", coex_dm->backup_arfr_cnt1, 2834 coex_dm->backup_arfr_cnt2, coex_dm->backup_retry_limit, 2835 coex_dm->backup_ampdu_maxtime); 2836 2837 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430); 2838 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434); 2839 u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a); 2840 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456); 2841 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", 2842 "0x430/0x434/0x42a/0x456", 2843 u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]); 2844 2845 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc04); 2846 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xd04); 2847 u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x90c); 2848 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", 2849 "0xc04/ 0xd04/ 0x90c", u32tmp[0], u32tmp[1], u32tmp[2]); 2850 2851 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778); 2852 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x", "0x778", 2853 u8tmp[0]); 2854 2855 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x92c); 2856 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x930); 2857 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x", 2858 "0x92c/ 0x930", (u8tmp[0]), u32tmp[0]); 2859 2860 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x40); 2861 u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x4f); 2862 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x", 2863 "0x40/ 0x4f", u8tmp[0], u8tmp[1]); 2864 2865 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550); 2866 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522); 2867 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x", 2868 "0x550(bcn ctrl)/0x522", u32tmp[0], u8tmp[0]); 2869 2870 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50); 2871 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x", "0xc50(dig)", 2872 u32tmp[0]); 2873 2874 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0); 2875 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4); 2876 u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8); 2877 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x6cc); 2878 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, 2879 "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", 2880 "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", 2881 u32tmp[0], u32tmp[1], u32tmp[2], u8tmp[0]); 2882 2883 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d", 2884 "0x770(hp rx[31:16]/tx[15:0])", 2885 coex_sta->high_priority_rx, coex_sta->high_priority_tx); 2886 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d", 2887 "0x774(lp rx[31:16]/tx[15:0])", 2888 coex_sta->low_priority_rx, coex_sta->low_priority_tx); 2889 #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 1) 2890 btc8192e2ant_monitor_bt_ctr(btcoexist); 2891 #endif 2892 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS); 2893 } 2894 2895 void ex_btc8192e2ant_ips_notify(struct btc_coexist *btcoexist, u8 type) 2896 { 2897 struct rtl_priv *rtlpriv = btcoexist->adapter; 2898 2899 if (BTC_IPS_ENTER == type) { 2900 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2901 "[BTCoex], IPS ENTER notify\n"); 2902 coex_sta->under_ips = true; 2903 btc8192e2ant_coex_all_off(btcoexist); 2904 } else if (BTC_IPS_LEAVE == type) { 2905 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2906 "[BTCoex], IPS LEAVE notify\n"); 2907 coex_sta->under_ips = false; 2908 } 2909 } 2910 2911 void ex_btc8192e2ant_lps_notify(struct btc_coexist *btcoexist, u8 type) 2912 { 2913 struct rtl_priv *rtlpriv = btcoexist->adapter; 2914 2915 if (BTC_LPS_ENABLE == type) { 2916 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2917 "[BTCoex], LPS ENABLE notify\n"); 2918 coex_sta->under_lps = true; 2919 } else if (BTC_LPS_DISABLE == type) { 2920 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2921 "[BTCoex], LPS DISABLE notify\n"); 2922 coex_sta->under_lps = false; 2923 } 2924 } 2925 2926 void ex_btc8192e2ant_scan_notify(struct btc_coexist *btcoexist, u8 type) 2927 { 2928 struct rtl_priv *rtlpriv = btcoexist->adapter; 2929 2930 if (BTC_SCAN_START == type) 2931 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2932 "[BTCoex], SCAN START notify\n"); 2933 else if (BTC_SCAN_FINISH == type) 2934 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2935 "[BTCoex], SCAN FINISH notify\n"); 2936 } 2937 2938 void ex_btc8192e2ant_connect_notify(struct btc_coexist *btcoexist, u8 type) 2939 { 2940 struct rtl_priv *rtlpriv = btcoexist->adapter; 2941 2942 if (BTC_ASSOCIATE_START == type) 2943 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2944 "[BTCoex], CONNECT START notify\n"); 2945 else if (BTC_ASSOCIATE_FINISH == type) 2946 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2947 "[BTCoex], CONNECT FINISH notify\n"); 2948 } 2949 2950 void ex_btc8192e2ant_media_status_notify(struct btc_coexist *btcoexist, 2951 u8 type) 2952 { 2953 struct rtl_priv *rtlpriv = btcoexist->adapter; 2954 u8 h2c_parameter[3] = {0}; 2955 u32 wifi_bw; 2956 u8 wifi_center_chnl; 2957 2958 if (btcoexist->manual_control || 2959 btcoexist->stop_coex_dm || 2960 btcoexist->bt_info.bt_disabled) 2961 return; 2962 2963 if (BTC_MEDIA_CONNECT == type) 2964 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2965 "[BTCoex], MEDIA connect notify\n"); 2966 else 2967 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2968 "[BTCoex], MEDIA disconnect notify\n"); 2969 2970 /* only 2.4G we need to inform bt the chnl mask */ 2971 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, 2972 &wifi_center_chnl); 2973 if ((BTC_MEDIA_CONNECT == type) && 2974 (wifi_center_chnl <= 14)) { 2975 h2c_parameter[0] = 0x1; 2976 h2c_parameter[1] = wifi_center_chnl; 2977 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw); 2978 if (BTC_WIFI_BW_HT40 == wifi_bw) 2979 h2c_parameter[2] = 0x30; 2980 else 2981 h2c_parameter[2] = 0x20; 2982 } 2983 2984 coex_dm->wifi_chnl_info[0] = h2c_parameter[0]; 2985 coex_dm->wifi_chnl_info[1] = h2c_parameter[1]; 2986 coex_dm->wifi_chnl_info[2] = h2c_parameter[2]; 2987 2988 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 2989 "[BTCoex], FW write 0x66 = 0x%x\n", 2990 h2c_parameter[0] << 16 | h2c_parameter[1] << 8 | 2991 h2c_parameter[2]); 2992 2993 btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter); 2994 } 2995 2996 void ex_btc8192e2ant_special_packet_notify(struct btc_coexist *btcoexist, 2997 u8 type) 2998 { 2999 struct rtl_priv *rtlpriv = btcoexist->adapter; 3000 3001 if (type == BTC_PACKET_DHCP) 3002 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3003 "[BTCoex], DHCP Packet notify\n"); 3004 } 3005 3006 void ex_btc8192e2ant_bt_info_notify(struct btc_coexist *btcoexist, 3007 u8 *tmp_buf, u8 length) 3008 { 3009 struct rtl_priv *rtlpriv = btcoexist->adapter; 3010 u8 bt_info = 0; 3011 u8 i, rsp_source = 0; 3012 bool bt_busy = false, limited_dig = false; 3013 bool wifi_connected = false; 3014 3015 coex_sta->c2h_bt_info_req_sent = false; 3016 3017 rsp_source = tmp_buf[0] & 0xf; 3018 if (rsp_source >= BT_INFO_SRC_8192E_2ANT_MAX) 3019 rsp_source = BT_INFO_SRC_8192E_2ANT_WIFI_FW; 3020 coex_sta->bt_info_c2h_cnt[rsp_source]++; 3021 3022 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3023 "[BTCoex], Bt info[%d], length=%d, hex data = [", 3024 rsp_source, length); 3025 for (i = 0; i < length; i++) { 3026 coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i]; 3027 if (i == 1) 3028 bt_info = tmp_buf[i]; 3029 if (i == length-1) 3030 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3031 "0x%02x]\n", tmp_buf[i]); 3032 else 3033 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3034 "0x%02x, ", tmp_buf[i]); 3035 } 3036 3037 if (BT_INFO_SRC_8192E_2ANT_WIFI_FW != rsp_source) { 3038 /* [3:0] */ 3039 coex_sta->bt_retry_cnt = 3040 coex_sta->bt_info_c2h[rsp_source][2] & 0xf; 3041 3042 coex_sta->bt_rssi = 3043 coex_sta->bt_info_c2h[rsp_source][3] * 2 + 10; 3044 3045 coex_sta->bt_info_ext = 3046 coex_sta->bt_info_c2h[rsp_source][4]; 3047 3048 /* Here we need to resend some wifi info to BT 3049 * because bt is reset and loss of the info. 3050 */ 3051 if ((coex_sta->bt_info_ext & BIT1)) { 3052 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3053 "bit1, send wifi BW&Chnl to BT!!\n"); 3054 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, 3055 &wifi_connected); 3056 if (wifi_connected) 3057 ex_btc8192e2ant_media_status_notify( 3058 btcoexist, 3059 BTC_MEDIA_CONNECT); 3060 else 3061 ex_btc8192e2ant_media_status_notify( 3062 btcoexist, 3063 BTC_MEDIA_DISCONNECT); 3064 } 3065 3066 if ((coex_sta->bt_info_ext & BIT3)) { 3067 if (!btcoexist->manual_control && 3068 !btcoexist->stop_coex_dm) { 3069 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3070 "bit3, BT NOT ignore Wlan active!\n"); 3071 btc8192e2ant_ignore_wlan_act(btcoexist, 3072 FORCE_EXEC, 3073 false); 3074 } 3075 } else { 3076 /* BT already NOT ignore Wlan active, 3077 * do nothing here. 3078 */ 3079 } 3080 3081 #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 0) 3082 if ((coex_sta->bt_info_ext & BIT4)) { 3083 /* BT auto report already enabled, do nothing */ 3084 } else { 3085 btc8192e2ant_bt_auto_report(btcoexist, FORCE_EXEC, 3086 true); 3087 } 3088 #endif 3089 } 3090 3091 /* check BIT2 first ==> check if bt is under inquiry or page scan */ 3092 if (bt_info & BT_INFO_8192E_2ANT_B_INQ_PAGE) 3093 coex_sta->c2h_bt_inquiry_page = true; 3094 else 3095 coex_sta->c2h_bt_inquiry_page = false; 3096 3097 /* set link exist status */ 3098 if (!(bt_info&BT_INFO_8192E_2ANT_B_CONNECTION)) { 3099 coex_sta->bt_link_exist = false; 3100 coex_sta->pan_exist = false; 3101 coex_sta->a2dp_exist = false; 3102 coex_sta->hid_exist = false; 3103 coex_sta->sco_exist = false; 3104 } else {/* connection exists */ 3105 coex_sta->bt_link_exist = true; 3106 if (bt_info & BT_INFO_8192E_2ANT_B_FTP) 3107 coex_sta->pan_exist = true; 3108 else 3109 coex_sta->pan_exist = false; 3110 if (bt_info & BT_INFO_8192E_2ANT_B_A2DP) 3111 coex_sta->a2dp_exist = true; 3112 else 3113 coex_sta->a2dp_exist = false; 3114 if (bt_info & BT_INFO_8192E_2ANT_B_HID) 3115 coex_sta->hid_exist = true; 3116 else 3117 coex_sta->hid_exist = false; 3118 if (bt_info & BT_INFO_8192E_2ANT_B_SCO_ESCO) 3119 coex_sta->sco_exist = true; 3120 else 3121 coex_sta->sco_exist = false; 3122 } 3123 3124 btc8192e2ant_update_bt_link_info(btcoexist); 3125 3126 if (!(bt_info & BT_INFO_8192E_2ANT_B_CONNECTION)) { 3127 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE; 3128 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3129 "[BTCoex], BT Non-Connected idle!!!\n"); 3130 } else if (bt_info == BT_INFO_8192E_2ANT_B_CONNECTION) { 3131 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE; 3132 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3133 "[BTCoex], bt_infoNotify(), BT Connected-idle!!!\n"); 3134 } else if ((bt_info & BT_INFO_8192E_2ANT_B_SCO_ESCO) || 3135 (bt_info & BT_INFO_8192E_2ANT_B_SCO_BUSY)) { 3136 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_SCO_BUSY; 3137 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3138 "[BTCoex], bt_infoNotify(), BT SCO busy!!!\n"); 3139 } else if (bt_info & BT_INFO_8192E_2ANT_B_ACL_BUSY) { 3140 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_ACL_BUSY; 3141 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3142 "[BTCoex], bt_infoNotify(), BT ACL busy!!!\n"); 3143 } else { 3144 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_MAX; 3145 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3146 "[BTCoex]bt_infoNotify(), BT Non-Defined state!!!\n"); 3147 } 3148 3149 if ((BT_8192E_2ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) || 3150 (BT_8192E_2ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) || 3151 (BT_8192E_2ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) { 3152 bt_busy = true; 3153 limited_dig = true; 3154 } else { 3155 bt_busy = false; 3156 limited_dig = false; 3157 } 3158 3159 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy); 3160 3161 coex_dm->limited_dig = limited_dig; 3162 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig); 3163 3164 btc8192e2ant_run_coexist_mechanism(btcoexist); 3165 } 3166 3167 void ex_halbtc8192e2ant_halt_notify(struct btc_coexist *btcoexist) 3168 { 3169 struct rtl_priv *rtlpriv = btcoexist->adapter; 3170 3171 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, "[BTCoex], Halt notify\n"); 3172 3173 btc8192e2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true); 3174 ex_btc8192e2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT); 3175 } 3176 3177 void ex_btc8192e2ant_periodical(struct btc_coexist *btcoexist) 3178 { 3179 struct rtl_priv *rtlpriv = btcoexist->adapter; 3180 static u8 dis_ver_info_cnt; 3181 u32 fw_ver = 0, bt_patch_ver = 0; 3182 struct btc_board_info *board_info = &btcoexist->board_info; 3183 struct btc_stack_info *stack_info = &btcoexist->stack_info; 3184 3185 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3186 "=======================Periodical=======================\n"); 3187 if (dis_ver_info_cnt <= 5) { 3188 dis_ver_info_cnt += 1; 3189 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3190 "************************************************\n"); 3191 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3192 "Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", 3193 board_info->pg_ant_num, board_info->btdm_ant_num, 3194 board_info->btdm_ant_pos); 3195 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3196 "BT stack/ hci ext ver = %s / %d\n", 3197 ((stack_info->profile_notified) ? "Yes" : "No"), 3198 stack_info->hci_version); 3199 btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, 3200 &bt_patch_ver); 3201 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver); 3202 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3203 "CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", 3204 glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant, 3205 fw_ver, bt_patch_ver, bt_patch_ver); 3206 RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, 3207 "************************************************\n"); 3208 } 3209 3210 #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 0) 3211 btc8192e2ant_query_bt_info(btcoexist); 3212 btc8192e2ant_monitor_bt_ctr(btcoexist); 3213 btc8192e2ant_monitor_bt_enable_disable(btcoexist); 3214 #else 3215 if (btc8192e2ant_is_wifi_status_changed(btcoexist) || 3216 coex_dm->auto_tdma_adjust) 3217 btc8192e2ant_run_coexist_mechanism(btcoexist); 3218 #endif 3219 } 3220