1 /* 2 * Linux device driver for RTL8187 3 * 4 * Copyright 2007 Michael Wu <flamingice@sourmilk.net> 5 * Copyright 2007 Andrea Merello <andrea.merello@gmail.com> 6 * 7 * Based on the r8187 driver, which is: 8 * Copyright 2005 Andrea Merello <andrea.merello@gmail.com>, et al. 9 * 10 * The driver was extended to the RTL8187B in 2008 by: 11 * Herton Ronaldo Krzesinski <herton@mandriva.com.br> 12 * Hin-Tak Leung <htl10@users.sourceforge.net> 13 * Larry Finger <Larry.Finger@lwfinger.net> 14 * 15 * Magic delays and register offsets below are taken from the original 16 * r8187 driver sources. Thanks to Realtek for their support! 17 * 18 * This program is free software; you can redistribute it and/or modify 19 * it under the terms of the GNU General Public License version 2 as 20 * published by the Free Software Foundation. 21 */ 22 23 #include <linux/usb.h> 24 #include <linux/slab.h> 25 #include <linux/delay.h> 26 #include <linux/etherdevice.h> 27 #include <linux/eeprom_93cx6.h> 28 #include <linux/module.h> 29 #include <net/mac80211.h> 30 31 #include "rtl8187.h" 32 #include "rtl8225.h" 33 #ifdef CONFIG_RTL8187_LEDS 34 #include "leds.h" 35 #endif 36 #include "rfkill.h" 37 38 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>"); 39 MODULE_AUTHOR("Andrea Merello <andrea.merello@gmail.com>"); 40 MODULE_AUTHOR("Herton Ronaldo Krzesinski <herton@mandriva.com.br>"); 41 MODULE_AUTHOR("Hin-Tak Leung <htl10@users.sourceforge.net>"); 42 MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>"); 43 MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver"); 44 MODULE_LICENSE("GPL"); 45 46 static const struct usb_device_id rtl8187_table[] = { 47 /* Asus */ 48 {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187}, 49 /* Belkin */ 50 {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B}, 51 /* Realtek */ 52 {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187}, 53 {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B}, 54 {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B}, 55 {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B}, 56 /* Surecom */ 57 {USB_DEVICE(0x0769, 0x11F2), .driver_info = DEVICE_RTL8187}, 58 /* Logitech */ 59 {USB_DEVICE(0x0789, 0x010C), .driver_info = DEVICE_RTL8187}, 60 /* Netgear */ 61 {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187}, 62 {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187}, 63 {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B}, 64 /* HP */ 65 {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187}, 66 /* Sitecom */ 67 {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187}, 68 {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B}, 69 {USB_DEVICE(0x0df6, 0x0029), .driver_info = DEVICE_RTL8187B}, 70 /* Sphairon Access Systems GmbH */ 71 {USB_DEVICE(0x114B, 0x0150), .driver_info = DEVICE_RTL8187}, 72 /* Dick Smith Electronics */ 73 {USB_DEVICE(0x1371, 0x9401), .driver_info = DEVICE_RTL8187}, 74 /* Abocom */ 75 {USB_DEVICE(0x13d1, 0xabe6), .driver_info = DEVICE_RTL8187}, 76 /* Qcom */ 77 {USB_DEVICE(0x18E8, 0x6232), .driver_info = DEVICE_RTL8187}, 78 /* AirLive */ 79 {USB_DEVICE(0x1b75, 0x8187), .driver_info = DEVICE_RTL8187}, 80 /* Linksys */ 81 {USB_DEVICE(0x1737, 0x0073), .driver_info = DEVICE_RTL8187B}, 82 {} 83 }; 84 85 MODULE_DEVICE_TABLE(usb, rtl8187_table); 86 87 static const struct ieee80211_rate rtl818x_rates[] = { 88 { .bitrate = 10, .hw_value = 0, }, 89 { .bitrate = 20, .hw_value = 1, }, 90 { .bitrate = 55, .hw_value = 2, }, 91 { .bitrate = 110, .hw_value = 3, }, 92 { .bitrate = 60, .hw_value = 4, }, 93 { .bitrate = 90, .hw_value = 5, }, 94 { .bitrate = 120, .hw_value = 6, }, 95 { .bitrate = 180, .hw_value = 7, }, 96 { .bitrate = 240, .hw_value = 8, }, 97 { .bitrate = 360, .hw_value = 9, }, 98 { .bitrate = 480, .hw_value = 10, }, 99 { .bitrate = 540, .hw_value = 11, }, 100 }; 101 102 static const struct ieee80211_channel rtl818x_channels[] = { 103 { .center_freq = 2412 }, 104 { .center_freq = 2417 }, 105 { .center_freq = 2422 }, 106 { .center_freq = 2427 }, 107 { .center_freq = 2432 }, 108 { .center_freq = 2437 }, 109 { .center_freq = 2442 }, 110 { .center_freq = 2447 }, 111 { .center_freq = 2452 }, 112 { .center_freq = 2457 }, 113 { .center_freq = 2462 }, 114 { .center_freq = 2467 }, 115 { .center_freq = 2472 }, 116 { .center_freq = 2484 }, 117 }; 118 119 static void rtl8187_iowrite_async_cb(struct urb *urb) 120 { 121 kfree(urb->context); 122 } 123 124 static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr, 125 void *data, u16 len) 126 { 127 struct usb_ctrlrequest *dr; 128 struct urb *urb; 129 struct rtl8187_async_write_data { 130 u8 data[4]; 131 struct usb_ctrlrequest dr; 132 } *buf; 133 int rc; 134 135 buf = kmalloc(sizeof(*buf), GFP_ATOMIC); 136 if (!buf) 137 return; 138 139 urb = usb_alloc_urb(0, GFP_ATOMIC); 140 if (!urb) { 141 kfree(buf); 142 return; 143 } 144 145 dr = &buf->dr; 146 147 dr->bRequestType = RTL8187_REQT_WRITE; 148 dr->bRequest = RTL8187_REQ_SET_REG; 149 dr->wValue = addr; 150 dr->wIndex = 0; 151 dr->wLength = cpu_to_le16(len); 152 153 memcpy(buf, data, len); 154 155 usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0), 156 (unsigned char *)dr, buf, len, 157 rtl8187_iowrite_async_cb, buf); 158 usb_anchor_urb(urb, &priv->anchored); 159 rc = usb_submit_urb(urb, GFP_ATOMIC); 160 if (rc < 0) { 161 kfree(buf); 162 usb_unanchor_urb(urb); 163 } 164 usb_free_urb(urb); 165 } 166 167 static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv, 168 __le32 *addr, u32 val) 169 { 170 __le32 buf = cpu_to_le32(val); 171 172 rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr), 173 &buf, sizeof(buf)); 174 } 175 176 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data) 177 { 178 struct rtl8187_priv *priv = dev->priv; 179 180 data <<= 8; 181 data |= addr | 0x80; 182 183 rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF); 184 rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF); 185 rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF); 186 rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF); 187 } 188 189 static void rtl8187_tx_cb(struct urb *urb) 190 { 191 struct sk_buff *skb = (struct sk_buff *)urb->context; 192 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 193 struct ieee80211_hw *hw = info->rate_driver_data[0]; 194 struct rtl8187_priv *priv = hw->priv; 195 196 skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) : 197 sizeof(struct rtl8187_tx_hdr)); 198 ieee80211_tx_info_clear_status(info); 199 200 if (!(urb->status) && !(info->flags & IEEE80211_TX_CTL_NO_ACK)) { 201 if (priv->is_rtl8187b) { 202 skb_queue_tail(&priv->b_tx_status.queue, skb); 203 204 /* queue is "full", discard last items */ 205 while (skb_queue_len(&priv->b_tx_status.queue) > 5) { 206 struct sk_buff *old_skb; 207 208 dev_dbg(&priv->udev->dev, 209 "transmit status queue full\n"); 210 211 old_skb = skb_dequeue(&priv->b_tx_status.queue); 212 ieee80211_tx_status_irqsafe(hw, old_skb); 213 } 214 return; 215 } else { 216 info->flags |= IEEE80211_TX_STAT_ACK; 217 } 218 } 219 if (priv->is_rtl8187b) 220 ieee80211_tx_status_irqsafe(hw, skb); 221 else { 222 /* Retry information for the RTI8187 is only available by 223 * reading a register in the device. We are in interrupt mode 224 * here, thus queue the skb and finish on a work queue. */ 225 skb_queue_tail(&priv->b_tx_status.queue, skb); 226 ieee80211_queue_delayed_work(hw, &priv->work, 0); 227 } 228 } 229 230 static void rtl8187_tx(struct ieee80211_hw *dev, 231 struct ieee80211_tx_control *control, 232 struct sk_buff *skb) 233 { 234 struct rtl8187_priv *priv = dev->priv; 235 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 236 struct ieee80211_hdr *tx_hdr = (struct ieee80211_hdr *)(skb->data); 237 unsigned int ep; 238 void *buf; 239 struct urb *urb; 240 __le16 rts_dur = 0; 241 u32 flags; 242 int rc; 243 244 urb = usb_alloc_urb(0, GFP_ATOMIC); 245 if (!urb) { 246 kfree_skb(skb); 247 return; 248 } 249 250 flags = skb->len; 251 flags |= RTL818X_TX_DESC_FLAG_NO_ENC; 252 253 flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24; 254 if (ieee80211_has_morefrags(tx_hdr->frame_control)) 255 flags |= RTL818X_TX_DESC_FLAG_MOREFRAG; 256 257 /* HW will perform RTS-CTS when only RTS flags is set. 258 * HW will perform CTS-to-self when both RTS and CTS flags are set. 259 * RTS rate and RTS duration will be used also for CTS-to-self. 260 */ 261 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) { 262 flags |= RTL818X_TX_DESC_FLAG_RTS; 263 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; 264 rts_dur = ieee80211_rts_duration(dev, priv->vif, 265 skb->len, info); 266 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) { 267 flags |= RTL818X_TX_DESC_FLAG_RTS | RTL818X_TX_DESC_FLAG_CTS; 268 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; 269 rts_dur = ieee80211_ctstoself_duration(dev, priv->vif, 270 skb->len, info); 271 } 272 273 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { 274 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) 275 priv->seqno += 0x10; 276 tx_hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); 277 tx_hdr->seq_ctrl |= cpu_to_le16(priv->seqno); 278 } 279 280 if (!priv->is_rtl8187b) { 281 struct rtl8187_tx_hdr *hdr = skb_push(skb, sizeof(*hdr)); 282 hdr->flags = cpu_to_le32(flags); 283 hdr->len = 0; 284 hdr->rts_duration = rts_dur; 285 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8); 286 buf = hdr; 287 288 ep = 2; 289 } else { 290 /* fc needs to be calculated before skb_push() */ 291 unsigned int epmap[4] = { 6, 7, 5, 4 }; 292 u16 fc = le16_to_cpu(tx_hdr->frame_control); 293 294 struct rtl8187b_tx_hdr *hdr = skb_push(skb, sizeof(*hdr)); 295 struct ieee80211_rate *txrate = 296 ieee80211_get_tx_rate(dev, info); 297 memset(hdr, 0, sizeof(*hdr)); 298 hdr->flags = cpu_to_le32(flags); 299 hdr->rts_duration = rts_dur; 300 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8); 301 hdr->tx_duration = 302 ieee80211_generic_frame_duration(dev, priv->vif, 303 info->band, 304 skb->len, txrate); 305 buf = hdr; 306 307 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) 308 ep = 12; 309 else 310 ep = epmap[skb_get_queue_mapping(skb)]; 311 } 312 313 info->rate_driver_data[0] = dev; 314 info->rate_driver_data[1] = urb; 315 316 usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep), 317 buf, skb->len, rtl8187_tx_cb, skb); 318 urb->transfer_flags |= URB_ZERO_PACKET; 319 usb_anchor_urb(urb, &priv->anchored); 320 rc = usb_submit_urb(urb, GFP_ATOMIC); 321 if (rc < 0) { 322 usb_unanchor_urb(urb); 323 kfree_skb(skb); 324 } 325 usb_free_urb(urb); 326 } 327 328 static void rtl8187_rx_cb(struct urb *urb) 329 { 330 struct sk_buff *skb = (struct sk_buff *)urb->context; 331 struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb; 332 struct ieee80211_hw *dev = info->dev; 333 struct rtl8187_priv *priv = dev->priv; 334 struct ieee80211_rx_status rx_status = { 0 }; 335 int rate, signal; 336 u32 flags; 337 unsigned long f; 338 339 spin_lock_irqsave(&priv->rx_queue.lock, f); 340 __skb_unlink(skb, &priv->rx_queue); 341 spin_unlock_irqrestore(&priv->rx_queue.lock, f); 342 skb_put(skb, urb->actual_length); 343 344 if (unlikely(urb->status)) { 345 dev_kfree_skb_irq(skb); 346 return; 347 } 348 349 if (!priv->is_rtl8187b) { 350 struct rtl8187_rx_hdr *hdr = 351 (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr)); 352 flags = le32_to_cpu(hdr->flags); 353 /* As with the RTL8187B below, the AGC is used to calculate 354 * signal strength. In this case, the scaling 355 * constants are derived from the output of p54usb. 356 */ 357 signal = -4 - ((27 * hdr->agc) >> 6); 358 rx_status.antenna = (hdr->signal >> 7) & 1; 359 rx_status.mactime = le64_to_cpu(hdr->mac_time); 360 } else { 361 struct rtl8187b_rx_hdr *hdr = 362 (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr)); 363 /* The Realtek datasheet for the RTL8187B shows that the RX 364 * header contains the following quantities: signal quality, 365 * RSSI, AGC, the received power in dB, and the measured SNR. 366 * In testing, none of these quantities show qualitative 367 * agreement with AP signal strength, except for the AGC, 368 * which is inversely proportional to the strength of the 369 * signal. In the following, the signal strength 370 * is derived from the AGC. The arbitrary scaling constants 371 * are chosen to make the results close to the values obtained 372 * for a BCM4312 using b43 as the driver. The noise is ignored 373 * for now. 374 */ 375 flags = le32_to_cpu(hdr->flags); 376 signal = 14 - hdr->agc / 2; 377 rx_status.antenna = (hdr->rssi >> 7) & 1; 378 rx_status.mactime = le64_to_cpu(hdr->mac_time); 379 } 380 381 rx_status.signal = signal; 382 priv->signal = signal; 383 rate = (flags >> 20) & 0xF; 384 skb_trim(skb, flags & 0x0FFF); 385 rx_status.rate_idx = rate; 386 rx_status.freq = dev->conf.chandef.chan->center_freq; 387 rx_status.band = dev->conf.chandef.chan->band; 388 rx_status.flag |= RX_FLAG_MACTIME_START; 389 if (flags & RTL818X_RX_DESC_FLAG_SPLCP) 390 rx_status.enc_flags |= RX_ENC_FLAG_SHORTPRE; 391 if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR) 392 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC; 393 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status)); 394 ieee80211_rx_irqsafe(dev, skb); 395 396 skb = dev_alloc_skb(RTL8187_MAX_RX); 397 if (unlikely(!skb)) { 398 /* TODO check rx queue length and refill *somewhere* */ 399 return; 400 } 401 402 info = (struct rtl8187_rx_info *)skb->cb; 403 info->urb = urb; 404 info->dev = dev; 405 urb->transfer_buffer = skb_tail_pointer(skb); 406 urb->context = skb; 407 skb_queue_tail(&priv->rx_queue, skb); 408 409 usb_anchor_urb(urb, &priv->anchored); 410 if (usb_submit_urb(urb, GFP_ATOMIC)) { 411 usb_unanchor_urb(urb); 412 skb_unlink(skb, &priv->rx_queue); 413 dev_kfree_skb_irq(skb); 414 } 415 } 416 417 static int rtl8187_init_urbs(struct ieee80211_hw *dev) 418 { 419 struct rtl8187_priv *priv = dev->priv; 420 struct urb *entry = NULL; 421 struct sk_buff *skb; 422 struct rtl8187_rx_info *info; 423 int ret = 0; 424 425 while (skb_queue_len(&priv->rx_queue) < 32) { 426 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL); 427 if (!skb) { 428 ret = -ENOMEM; 429 goto err; 430 } 431 entry = usb_alloc_urb(0, GFP_KERNEL); 432 if (!entry) { 433 ret = -ENOMEM; 434 goto err; 435 } 436 usb_fill_bulk_urb(entry, priv->udev, 437 usb_rcvbulkpipe(priv->udev, 438 priv->is_rtl8187b ? 3 : 1), 439 skb_tail_pointer(skb), 440 RTL8187_MAX_RX, rtl8187_rx_cb, skb); 441 info = (struct rtl8187_rx_info *)skb->cb; 442 info->urb = entry; 443 info->dev = dev; 444 skb_queue_tail(&priv->rx_queue, skb); 445 usb_anchor_urb(entry, &priv->anchored); 446 ret = usb_submit_urb(entry, GFP_KERNEL); 447 if (ret) { 448 skb_unlink(skb, &priv->rx_queue); 449 usb_unanchor_urb(entry); 450 usb_put_urb(entry); 451 goto err; 452 } 453 usb_put_urb(entry); 454 } 455 return ret; 456 457 err: 458 kfree_skb(skb); 459 usb_kill_anchored_urbs(&priv->anchored); 460 return ret; 461 } 462 463 static void rtl8187b_status_cb(struct urb *urb) 464 { 465 struct ieee80211_hw *hw = (struct ieee80211_hw *)urb->context; 466 struct rtl8187_priv *priv = hw->priv; 467 u64 val; 468 unsigned int cmd_type; 469 470 if (unlikely(urb->status)) 471 return; 472 473 /* 474 * Read from status buffer: 475 * 476 * bits [30:31] = cmd type: 477 * - 0 indicates tx beacon interrupt 478 * - 1 indicates tx close descriptor 479 * 480 * In the case of tx beacon interrupt: 481 * [0:9] = Last Beacon CW 482 * [10:29] = reserved 483 * [30:31] = 00b 484 * [32:63] = Last Beacon TSF 485 * 486 * If it's tx close descriptor: 487 * [0:7] = Packet Retry Count 488 * [8:14] = RTS Retry Count 489 * [15] = TOK 490 * [16:27] = Sequence No 491 * [28] = LS 492 * [29] = FS 493 * [30:31] = 01b 494 * [32:47] = unused (reserved?) 495 * [48:63] = MAC Used Time 496 */ 497 val = le64_to_cpu(priv->b_tx_status.buf); 498 499 cmd_type = (val >> 30) & 0x3; 500 if (cmd_type == 1) { 501 unsigned int pkt_rc, seq_no; 502 bool tok; 503 struct sk_buff *skb, *iter; 504 struct ieee80211_hdr *ieee80211hdr; 505 unsigned long flags; 506 507 pkt_rc = val & 0xFF; 508 tok = val & (1 << 15); 509 seq_no = (val >> 16) & 0xFFF; 510 511 spin_lock_irqsave(&priv->b_tx_status.queue.lock, flags); 512 skb = NULL; 513 skb_queue_reverse_walk(&priv->b_tx_status.queue, iter) { 514 ieee80211hdr = (struct ieee80211_hdr *)iter->data; 515 516 /* 517 * While testing, it was discovered that the seq_no 518 * doesn't actually contains the sequence number. 519 * Instead of returning just the 12 bits of sequence 520 * number, hardware is returning entire sequence control 521 * (fragment number plus sequence number) in a 12 bit 522 * only field overflowing after some time. As a 523 * workaround, just consider the lower bits, and expect 524 * it's unlikely we wrongly ack some sent data 525 */ 526 if ((le16_to_cpu(ieee80211hdr->seq_ctrl) 527 & 0xFFF) == seq_no) { 528 skb = iter; 529 break; 530 } 531 } 532 if (skb) { 533 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 534 535 __skb_unlink(skb, &priv->b_tx_status.queue); 536 if (tok) 537 info->flags |= IEEE80211_TX_STAT_ACK; 538 info->status.rates[0].count = pkt_rc + 1; 539 540 ieee80211_tx_status_irqsafe(hw, skb); 541 } 542 spin_unlock_irqrestore(&priv->b_tx_status.queue.lock, flags); 543 } 544 545 usb_anchor_urb(urb, &priv->anchored); 546 if (usb_submit_urb(urb, GFP_ATOMIC)) 547 usb_unanchor_urb(urb); 548 } 549 550 static int rtl8187b_init_status_urb(struct ieee80211_hw *dev) 551 { 552 struct rtl8187_priv *priv = dev->priv; 553 struct urb *entry; 554 int ret = 0; 555 556 entry = usb_alloc_urb(0, GFP_KERNEL); 557 if (!entry) 558 return -ENOMEM; 559 560 usb_fill_bulk_urb(entry, priv->udev, usb_rcvbulkpipe(priv->udev, 9), 561 &priv->b_tx_status.buf, sizeof(priv->b_tx_status.buf), 562 rtl8187b_status_cb, dev); 563 564 usb_anchor_urb(entry, &priv->anchored); 565 ret = usb_submit_urb(entry, GFP_KERNEL); 566 if (ret) 567 usb_unanchor_urb(entry); 568 usb_free_urb(entry); 569 570 return ret; 571 } 572 573 static void rtl8187_set_anaparam(struct rtl8187_priv *priv, bool rfon) 574 { 575 u32 anaparam, anaparam2; 576 u8 anaparam3, reg; 577 578 if (!priv->is_rtl8187b) { 579 if (rfon) { 580 anaparam = RTL8187_RTL8225_ANAPARAM_ON; 581 anaparam2 = RTL8187_RTL8225_ANAPARAM2_ON; 582 } else { 583 anaparam = RTL8187_RTL8225_ANAPARAM_OFF; 584 anaparam2 = RTL8187_RTL8225_ANAPARAM2_OFF; 585 } 586 } else { 587 if (rfon) { 588 anaparam = RTL8187B_RTL8225_ANAPARAM_ON; 589 anaparam2 = RTL8187B_RTL8225_ANAPARAM2_ON; 590 anaparam3 = RTL8187B_RTL8225_ANAPARAM3_ON; 591 } else { 592 anaparam = RTL8187B_RTL8225_ANAPARAM_OFF; 593 anaparam2 = RTL8187B_RTL8225_ANAPARAM2_OFF; 594 anaparam3 = RTL8187B_RTL8225_ANAPARAM3_OFF; 595 } 596 } 597 598 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, 599 RTL818X_EEPROM_CMD_CONFIG); 600 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); 601 reg |= RTL818X_CONFIG3_ANAPARAM_WRITE; 602 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg); 603 rtl818x_iowrite32(priv, &priv->map->ANAPARAM, anaparam); 604 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, anaparam2); 605 if (priv->is_rtl8187b) 606 rtl818x_iowrite8(priv, &priv->map->ANAPARAM3A, anaparam3); 607 reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE; 608 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg); 609 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, 610 RTL818X_EEPROM_CMD_NORMAL); 611 } 612 613 static int rtl8187_cmd_reset(struct ieee80211_hw *dev) 614 { 615 struct rtl8187_priv *priv = dev->priv; 616 u8 reg; 617 int i; 618 619 reg = rtl818x_ioread8(priv, &priv->map->CMD); 620 reg &= (1 << 1); 621 reg |= RTL818X_CMD_RESET; 622 rtl818x_iowrite8(priv, &priv->map->CMD, reg); 623 624 i = 10; 625 do { 626 msleep(2); 627 if (!(rtl818x_ioread8(priv, &priv->map->CMD) & 628 RTL818X_CMD_RESET)) 629 break; 630 } while (--i); 631 632 if (!i) { 633 wiphy_err(dev->wiphy, "Reset timeout!\n"); 634 return -ETIMEDOUT; 635 } 636 637 /* reload registers from eeprom */ 638 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD); 639 640 i = 10; 641 do { 642 msleep(4); 643 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) & 644 RTL818X_EEPROM_CMD_CONFIG)) 645 break; 646 } while (--i); 647 648 if (!i) { 649 wiphy_err(dev->wiphy, "eeprom reset timeout!\n"); 650 return -ETIMEDOUT; 651 } 652 653 return 0; 654 } 655 656 static int rtl8187_init_hw(struct ieee80211_hw *dev) 657 { 658 struct rtl8187_priv *priv = dev->priv; 659 u8 reg; 660 int res; 661 662 /* reset */ 663 rtl8187_set_anaparam(priv, true); 664 665 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0); 666 667 msleep(200); 668 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10); 669 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11); 670 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00); 671 msleep(200); 672 673 res = rtl8187_cmd_reset(dev); 674 if (res) 675 return res; 676 677 rtl8187_set_anaparam(priv, true); 678 679 /* setup card */ 680 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0); 681 rtl818x_iowrite8(priv, &priv->map->GPIO0, 0); 682 683 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8)); 684 rtl818x_iowrite8(priv, &priv->map->GPIO0, 1); 685 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0); 686 687 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 688 689 rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF); 690 reg = rtl818x_ioread8(priv, &priv->map->CONFIG1); 691 reg &= 0x3F; 692 reg |= 0x80; 693 rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg); 694 695 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 696 697 rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0); 698 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0); 699 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0); 700 701 // TODO: set RESP_RATE and BRSR properly 702 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0); 703 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3); 704 705 /* host_usb_init */ 706 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0); 707 rtl818x_iowrite8(priv, &priv->map->GPIO0, 0); 708 reg = rtl818x_ioread8(priv, (u8 *)0xFE53); 709 rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7)); 710 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8)); 711 rtl818x_iowrite8(priv, &priv->map->GPIO0, 0x20); 712 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0); 713 rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80); 714 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80); 715 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80); 716 msleep(100); 717 718 rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008); 719 rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF); 720 rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044); 721 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, 722 RTL818X_EEPROM_CMD_CONFIG); 723 rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44); 724 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, 725 RTL818X_EEPROM_CMD_NORMAL); 726 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7); 727 msleep(100); 728 729 priv->rf->init(dev); 730 731 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3); 732 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1; 733 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1); 734 rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10); 735 rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80); 736 rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60); 737 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg); 738 739 return 0; 740 } 741 742 static const u8 rtl8187b_reg_table[][3] = { 743 {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0}, 744 {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0}, 745 {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0}, 746 {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0}, 747 748 {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1}, 749 {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1}, 750 {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, 751 {0xF2, 0x02, 1}, {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, 752 {0xF6, 0x06, 1}, {0xF7, 0x07, 1}, {0xF8, 0x08, 1}, 753 754 {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2}, 755 {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2}, 756 {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2}, 757 {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2}, 758 {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2}, 759 {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2}, 760 {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, 761 762 {0x5B, 0x40, 0}, {0x84, 0x88, 0}, {0x85, 0x24, 0}, {0x88, 0x54, 0}, 763 {0x8B, 0xB8, 0}, {0x8C, 0x07, 0}, {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, 764 {0x95, 0x12, 0}, {0x96, 0x00, 0}, {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, 765 {0x9F, 0x10, 0}, {0xB4, 0x22, 0}, {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, 766 {0xEE, 0x00, 0}, {0x4C, 0x00, 2}, 767 768 {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0}, {0x8E, 0x08, 0}, 769 {0x8F, 0x00, 0} 770 }; 771 772 static int rtl8187b_init_hw(struct ieee80211_hw *dev) 773 { 774 struct rtl8187_priv *priv = dev->priv; 775 int res, i; 776 u8 reg; 777 778 rtl8187_set_anaparam(priv, true); 779 780 /* Reset PLL sequence on 8187B. Realtek note: reduces power 781 * consumption about 30 mA */ 782 rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10); 783 reg = rtl818x_ioread8(priv, (u8 *)0xFF62); 784 rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5)); 785 rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5)); 786 787 res = rtl8187_cmd_reset(dev); 788 if (res) 789 return res; 790 791 rtl8187_set_anaparam(priv, true); 792 793 /* BRSR (Basic Rate Set Register) on 8187B looks to be the same as 794 * RESP_RATE on 8187L in Realtek sources: each bit should be each 795 * one of the 12 rates, all are enabled */ 796 rtl818x_iowrite16(priv, (__le16 *)0xFF34, 0x0FFF); 797 798 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF); 799 reg |= RTL818X_CW_CONF_PERPACKET_RETRY; 800 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg); 801 802 /* Auto Rate Fallback Register (ARFR): 1M-54M setting */ 803 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1); 804 rtl818x_iowrite8_idx(priv, (u8 *)0xFFE2, 0x00, 1); 805 806 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1); 807 808 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, 809 RTL818X_EEPROM_CMD_CONFIG); 810 reg = rtl818x_ioread8(priv, &priv->map->CONFIG1); 811 rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80); 812 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, 813 RTL818X_EEPROM_CMD_NORMAL); 814 815 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0); 816 for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) { 817 rtl818x_iowrite8_idx(priv, 818 (u8 *)(uintptr_t) 819 (rtl8187b_reg_table[i][0] | 0xFF00), 820 rtl8187b_reg_table[i][1], 821 rtl8187b_reg_table[i][2]); 822 } 823 824 rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50); 825 rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0); 826 827 rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1); 828 rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1); 829 rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1); 830 831 rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001); 832 833 /* RFSW_CTRL register */ 834 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2); 835 836 rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480); 837 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488); 838 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF); 839 msleep(100); 840 841 priv->rf->init(dev); 842 843 reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE; 844 rtl818x_iowrite8(priv, &priv->map->CMD, reg); 845 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF); 846 847 rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4); 848 rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00); 849 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00); 850 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01); 851 rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F); 852 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00); 853 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01); 854 855 reg = rtl818x_ioread8(priv, (u8 *)0xFFDB); 856 rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2)); 857 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3); 858 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3); 859 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3); 860 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3); 861 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3); 862 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3); 863 rtl818x_iowrite8(priv, (u8 *)0xFF61, 0); 864 rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1); 865 rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1); 866 rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10); 867 rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2); 868 869 rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B); 870 871 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1); 872 873 priv->slot_time = 0x9; 874 priv->aifsn[0] = 2; /* AIFSN[AC_VO] */ 875 priv->aifsn[1] = 2; /* AIFSN[AC_VI] */ 876 priv->aifsn[2] = 7; /* AIFSN[AC_BK] */ 877 priv->aifsn[3] = 3; /* AIFSN[AC_BE] */ 878 rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0); 879 880 /* ENEDCA flag must always be set, transmit issues? */ 881 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_ENEDCA); 882 883 return 0; 884 } 885 886 static void rtl8187_work(struct work_struct *work) 887 { 888 /* The RTL8187 returns the retry count through register 0xFFFA. In 889 * addition, it appears to be a cumulative retry count, not the 890 * value for the current TX packet. When multiple TX entries are 891 * waiting in the queue, the retry count will be the total for all. 892 * The "error" may matter for purposes of rate setting, but there is 893 * no other choice with this hardware. 894 */ 895 struct rtl8187_priv *priv = container_of(work, struct rtl8187_priv, 896 work.work); 897 struct ieee80211_tx_info *info; 898 struct ieee80211_hw *dev = priv->dev; 899 static u16 retry; 900 u16 tmp; 901 u16 avg_retry; 902 int length; 903 904 mutex_lock(&priv->conf_mutex); 905 tmp = rtl818x_ioread16(priv, (__le16 *)0xFFFA); 906 length = skb_queue_len(&priv->b_tx_status.queue); 907 if (unlikely(!length)) 908 length = 1; 909 if (unlikely(tmp < retry)) 910 tmp = retry; 911 avg_retry = (tmp - retry) / length; 912 while (skb_queue_len(&priv->b_tx_status.queue) > 0) { 913 struct sk_buff *old_skb; 914 915 old_skb = skb_dequeue(&priv->b_tx_status.queue); 916 info = IEEE80211_SKB_CB(old_skb); 917 info->status.rates[0].count = avg_retry + 1; 918 if (info->status.rates[0].count > RETRY_COUNT) 919 info->flags &= ~IEEE80211_TX_STAT_ACK; 920 ieee80211_tx_status_irqsafe(dev, old_skb); 921 } 922 retry = tmp; 923 mutex_unlock(&priv->conf_mutex); 924 } 925 926 static int rtl8187_start(struct ieee80211_hw *dev) 927 { 928 struct rtl8187_priv *priv = dev->priv; 929 u32 reg; 930 int ret; 931 932 mutex_lock(&priv->conf_mutex); 933 934 ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) : 935 rtl8187b_init_hw(dev); 936 if (ret) 937 goto rtl8187_start_exit; 938 939 init_usb_anchor(&priv->anchored); 940 priv->dev = dev; 941 942 if (priv->is_rtl8187b) { 943 reg = RTL818X_RX_CONF_MGMT | 944 RTL818X_RX_CONF_DATA | 945 RTL818X_RX_CONF_BROADCAST | 946 RTL818X_RX_CONF_NICMAC | 947 RTL818X_RX_CONF_BSSID | 948 (7 << 13 /* RX FIFO threshold NONE */) | 949 (7 << 10 /* MAX RX DMA */) | 950 RTL818X_RX_CONF_RX_AUTORESETPHY | 951 RTL818X_RX_CONF_ONLYERLPKT; 952 priv->rx_conf = reg; 953 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg); 954 955 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL); 956 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN; 957 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL; 958 reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT; 959 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg); 960 961 rtl818x_iowrite32(priv, &priv->map->TX_CONF, 962 RTL818X_TX_CONF_HW_SEQNUM | 963 RTL818X_TX_CONF_DISREQQSIZE | 964 (RETRY_COUNT << 8 /* short retry limit */) | 965 (RETRY_COUNT << 0 /* long retry limit */) | 966 (7 << 21 /* MAX TX DMA */)); 967 ret = rtl8187_init_urbs(dev); 968 if (ret) 969 goto rtl8187_start_exit; 970 ret = rtl8187b_init_status_urb(dev); 971 if (ret) 972 usb_kill_anchored_urbs(&priv->anchored); 973 goto rtl8187_start_exit; 974 } 975 976 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF); 977 978 rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0); 979 rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0); 980 981 ret = rtl8187_init_urbs(dev); 982 if (ret) 983 goto rtl8187_start_exit; 984 985 reg = RTL818X_RX_CONF_ONLYERLPKT | 986 RTL818X_RX_CONF_RX_AUTORESETPHY | 987 RTL818X_RX_CONF_BSSID | 988 RTL818X_RX_CONF_MGMT | 989 RTL818X_RX_CONF_DATA | 990 (7 << 13 /* RX FIFO threshold NONE */) | 991 (7 << 10 /* MAX RX DMA */) | 992 RTL818X_RX_CONF_BROADCAST | 993 RTL818X_RX_CONF_NICMAC; 994 995 priv->rx_conf = reg; 996 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg); 997 998 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF); 999 reg &= ~RTL818X_CW_CONF_PERPACKET_CW; 1000 reg |= RTL818X_CW_CONF_PERPACKET_RETRY; 1001 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg); 1002 1003 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL); 1004 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN; 1005 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL; 1006 reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT; 1007 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg); 1008 1009 reg = RTL818X_TX_CONF_CW_MIN | 1010 (7 << 21 /* MAX TX DMA */) | 1011 RTL818X_TX_CONF_NO_ICV; 1012 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg); 1013 1014 reg = rtl818x_ioread8(priv, &priv->map->CMD); 1015 reg |= RTL818X_CMD_TX_ENABLE; 1016 reg |= RTL818X_CMD_RX_ENABLE; 1017 rtl818x_iowrite8(priv, &priv->map->CMD, reg); 1018 INIT_DELAYED_WORK(&priv->work, rtl8187_work); 1019 1020 rtl8187_start_exit: 1021 mutex_unlock(&priv->conf_mutex); 1022 return ret; 1023 } 1024 1025 static void rtl8187_stop(struct ieee80211_hw *dev) 1026 { 1027 struct rtl8187_priv *priv = dev->priv; 1028 struct sk_buff *skb; 1029 u32 reg; 1030 1031 mutex_lock(&priv->conf_mutex); 1032 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0); 1033 1034 reg = rtl818x_ioread8(priv, &priv->map->CMD); 1035 reg &= ~RTL818X_CMD_TX_ENABLE; 1036 reg &= ~RTL818X_CMD_RX_ENABLE; 1037 rtl818x_iowrite8(priv, &priv->map->CMD, reg); 1038 1039 priv->rf->stop(dev); 1040 rtl8187_set_anaparam(priv, false); 1041 1042 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 1043 reg = rtl818x_ioread8(priv, &priv->map->CONFIG4); 1044 rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF); 1045 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 1046 1047 while ((skb = skb_dequeue(&priv->b_tx_status.queue))) 1048 dev_kfree_skb_any(skb); 1049 1050 usb_kill_anchored_urbs(&priv->anchored); 1051 mutex_unlock(&priv->conf_mutex); 1052 1053 if (!priv->is_rtl8187b) 1054 cancel_delayed_work_sync(&priv->work); 1055 } 1056 1057 static u64 rtl8187_get_tsf(struct ieee80211_hw *dev, struct ieee80211_vif *vif) 1058 { 1059 struct rtl8187_priv *priv = dev->priv; 1060 1061 return rtl818x_ioread32(priv, &priv->map->TSFT[0]) | 1062 (u64)(rtl818x_ioread32(priv, &priv->map->TSFT[1])) << 32; 1063 } 1064 1065 1066 static void rtl8187_beacon_work(struct work_struct *work) 1067 { 1068 struct rtl8187_vif *vif_priv = 1069 container_of(work, struct rtl8187_vif, beacon_work.work); 1070 struct ieee80211_vif *vif = 1071 container_of((void *)vif_priv, struct ieee80211_vif, drv_priv); 1072 struct ieee80211_hw *dev = vif_priv->dev; 1073 struct ieee80211_mgmt *mgmt; 1074 struct sk_buff *skb; 1075 1076 /* don't overflow the tx ring */ 1077 if (ieee80211_queue_stopped(dev, 0)) 1078 goto resched; 1079 1080 /* grab a fresh beacon */ 1081 skb = ieee80211_beacon_get(dev, vif); 1082 if (!skb) 1083 goto resched; 1084 1085 /* 1086 * update beacon timestamp w/ TSF value 1087 * TODO: make hardware update beacon timestamp 1088 */ 1089 mgmt = (struct ieee80211_mgmt *)skb->data; 1090 mgmt->u.beacon.timestamp = cpu_to_le64(rtl8187_get_tsf(dev, vif)); 1091 1092 /* TODO: use actual beacon queue */ 1093 skb_set_queue_mapping(skb, 0); 1094 1095 rtl8187_tx(dev, NULL, skb); 1096 1097 resched: 1098 /* 1099 * schedule next beacon 1100 * TODO: use hardware support for beacon timing 1101 */ 1102 schedule_delayed_work(&vif_priv->beacon_work, 1103 usecs_to_jiffies(1024 * vif->bss_conf.beacon_int)); 1104 } 1105 1106 1107 static int rtl8187_add_interface(struct ieee80211_hw *dev, 1108 struct ieee80211_vif *vif) 1109 { 1110 struct rtl8187_priv *priv = dev->priv; 1111 struct rtl8187_vif *vif_priv; 1112 int i; 1113 int ret = -EOPNOTSUPP; 1114 1115 mutex_lock(&priv->conf_mutex); 1116 if (priv->vif) 1117 goto exit; 1118 1119 switch (vif->type) { 1120 case NL80211_IFTYPE_STATION: 1121 case NL80211_IFTYPE_ADHOC: 1122 break; 1123 default: 1124 goto exit; 1125 } 1126 1127 ret = 0; 1128 priv->vif = vif; 1129 1130 /* Initialize driver private area */ 1131 vif_priv = (struct rtl8187_vif *)&vif->drv_priv; 1132 vif_priv->dev = dev; 1133 INIT_DELAYED_WORK(&vif_priv->beacon_work, rtl8187_beacon_work); 1134 vif_priv->enable_beacon = false; 1135 1136 1137 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 1138 for (i = 0; i < ETH_ALEN; i++) 1139 rtl818x_iowrite8(priv, &priv->map->MAC[i], 1140 ((u8 *)vif->addr)[i]); 1141 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 1142 1143 exit: 1144 mutex_unlock(&priv->conf_mutex); 1145 return ret; 1146 } 1147 1148 static void rtl8187_remove_interface(struct ieee80211_hw *dev, 1149 struct ieee80211_vif *vif) 1150 { 1151 struct rtl8187_priv *priv = dev->priv; 1152 mutex_lock(&priv->conf_mutex); 1153 priv->vif = NULL; 1154 mutex_unlock(&priv->conf_mutex); 1155 } 1156 1157 static int rtl8187_config(struct ieee80211_hw *dev, u32 changed) 1158 { 1159 struct rtl8187_priv *priv = dev->priv; 1160 struct ieee80211_conf *conf = &dev->conf; 1161 u32 reg; 1162 1163 mutex_lock(&priv->conf_mutex); 1164 reg = rtl818x_ioread32(priv, &priv->map->TX_CONF); 1165 /* Enable TX loopback on MAC level to avoid TX during channel 1166 * changes, as this has be seen to causes problems and the 1167 * card will stop work until next reset 1168 */ 1169 rtl818x_iowrite32(priv, &priv->map->TX_CONF, 1170 reg | RTL818X_TX_CONF_LOOPBACK_MAC); 1171 priv->rf->set_chan(dev, conf); 1172 msleep(10); 1173 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg); 1174 1175 rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2); 1176 rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100); 1177 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100); 1178 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100); 1179 mutex_unlock(&priv->conf_mutex); 1180 return 0; 1181 } 1182 1183 /* 1184 * With 8187B, AC_*_PARAM clashes with FEMR definition in struct rtl818x_csr for 1185 * example. Thus we have to use raw values for AC_*_PARAM register addresses. 1186 */ 1187 static __le32 *rtl8187b_ac_addr[4] = { 1188 (__le32 *) 0xFFF0, /* AC_VO */ 1189 (__le32 *) 0xFFF4, /* AC_VI */ 1190 (__le32 *) 0xFFFC, /* AC_BK */ 1191 (__le32 *) 0xFFF8, /* AC_BE */ 1192 }; 1193 1194 #define SIFS_TIME 0xa 1195 1196 static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot, 1197 bool use_short_preamble) 1198 { 1199 if (priv->is_rtl8187b) { 1200 u8 difs, eifs; 1201 u16 ack_timeout; 1202 int queue; 1203 1204 if (use_short_slot) { 1205 priv->slot_time = 0x9; 1206 difs = 0x1c; 1207 eifs = 0x53; 1208 } else { 1209 priv->slot_time = 0x14; 1210 difs = 0x32; 1211 eifs = 0x5b; 1212 } 1213 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22); 1214 rtl818x_iowrite8(priv, &priv->map->SLOT, priv->slot_time); 1215 rtl818x_iowrite8(priv, &priv->map->DIFS, difs); 1216 1217 /* 1218 * BRSR+1 on 8187B is in fact EIFS register 1219 * Value in units of 4 us 1220 */ 1221 rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs); 1222 1223 /* 1224 * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout 1225 * register. In units of 4 us like eifs register 1226 * ack_timeout = ack duration + plcp + difs + preamble 1227 */ 1228 ack_timeout = 112 + 48 + difs; 1229 if (use_short_preamble) 1230 ack_timeout += 72; 1231 else 1232 ack_timeout += 144; 1233 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER, 1234 DIV_ROUND_UP(ack_timeout, 4)); 1235 1236 for (queue = 0; queue < 4; queue++) 1237 rtl818x_iowrite8(priv, (u8 *) rtl8187b_ac_addr[queue], 1238 priv->aifsn[queue] * priv->slot_time + 1239 SIFS_TIME); 1240 } else { 1241 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22); 1242 if (use_short_slot) { 1243 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9); 1244 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14); 1245 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14); 1246 } else { 1247 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14); 1248 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24); 1249 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24); 1250 } 1251 } 1252 } 1253 1254 static void rtl8187_bss_info_changed(struct ieee80211_hw *dev, 1255 struct ieee80211_vif *vif, 1256 struct ieee80211_bss_conf *info, 1257 u32 changed) 1258 { 1259 struct rtl8187_priv *priv = dev->priv; 1260 struct rtl8187_vif *vif_priv; 1261 int i; 1262 u8 reg; 1263 1264 vif_priv = (struct rtl8187_vif *)&vif->drv_priv; 1265 1266 if (changed & BSS_CHANGED_BSSID) { 1267 mutex_lock(&priv->conf_mutex); 1268 for (i = 0; i < ETH_ALEN; i++) 1269 rtl818x_iowrite8(priv, &priv->map->BSSID[i], 1270 info->bssid[i]); 1271 1272 if (priv->is_rtl8187b) 1273 reg = RTL818X_MSR_ENEDCA; 1274 else 1275 reg = 0; 1276 1277 if (is_valid_ether_addr(info->bssid)) { 1278 if (vif->type == NL80211_IFTYPE_ADHOC) 1279 reg |= RTL818X_MSR_ADHOC; 1280 else 1281 reg |= RTL818X_MSR_INFRA; 1282 } 1283 else 1284 reg |= RTL818X_MSR_NO_LINK; 1285 1286 rtl818x_iowrite8(priv, &priv->map->MSR, reg); 1287 1288 mutex_unlock(&priv->conf_mutex); 1289 } 1290 1291 if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE)) 1292 rtl8187_conf_erp(priv, info->use_short_slot, 1293 info->use_short_preamble); 1294 1295 if (changed & BSS_CHANGED_BEACON_ENABLED) 1296 vif_priv->enable_beacon = info->enable_beacon; 1297 1298 if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON)) { 1299 cancel_delayed_work_sync(&vif_priv->beacon_work); 1300 if (vif_priv->enable_beacon) 1301 schedule_work(&vif_priv->beacon_work.work); 1302 } 1303 1304 } 1305 1306 static u64 rtl8187_prepare_multicast(struct ieee80211_hw *dev, 1307 struct netdev_hw_addr_list *mc_list) 1308 { 1309 return netdev_hw_addr_list_count(mc_list); 1310 } 1311 1312 static void rtl8187_configure_filter(struct ieee80211_hw *dev, 1313 unsigned int changed_flags, 1314 unsigned int *total_flags, 1315 u64 multicast) 1316 { 1317 struct rtl8187_priv *priv = dev->priv; 1318 1319 if (changed_flags & FIF_FCSFAIL) 1320 priv->rx_conf ^= RTL818X_RX_CONF_FCS; 1321 if (changed_flags & FIF_CONTROL) 1322 priv->rx_conf ^= RTL818X_RX_CONF_CTRL; 1323 if (*total_flags & FIF_OTHER_BSS || 1324 *total_flags & FIF_ALLMULTI || multicast > 0) 1325 priv->rx_conf |= RTL818X_RX_CONF_MONITOR; 1326 else 1327 priv->rx_conf &= ~RTL818X_RX_CONF_MONITOR; 1328 1329 *total_flags = 0; 1330 1331 if (priv->rx_conf & RTL818X_RX_CONF_FCS) 1332 *total_flags |= FIF_FCSFAIL; 1333 if (priv->rx_conf & RTL818X_RX_CONF_CTRL) 1334 *total_flags |= FIF_CONTROL; 1335 if (priv->rx_conf & RTL818X_RX_CONF_MONITOR) { 1336 *total_flags |= FIF_OTHER_BSS; 1337 *total_flags |= FIF_ALLMULTI; 1338 } 1339 1340 rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf); 1341 } 1342 1343 static int rtl8187_conf_tx(struct ieee80211_hw *dev, 1344 struct ieee80211_vif *vif, u16 queue, 1345 const struct ieee80211_tx_queue_params *params) 1346 { 1347 struct rtl8187_priv *priv = dev->priv; 1348 u8 cw_min, cw_max; 1349 1350 if (queue > 3) 1351 return -EINVAL; 1352 1353 cw_min = fls(params->cw_min); 1354 cw_max = fls(params->cw_max); 1355 1356 if (priv->is_rtl8187b) { 1357 priv->aifsn[queue] = params->aifs; 1358 1359 /* 1360 * This is the structure of AC_*_PARAM registers in 8187B: 1361 * - TXOP limit field, bit offset = 16 1362 * - ECWmax, bit offset = 12 1363 * - ECWmin, bit offset = 8 1364 * - AIFS, bit offset = 0 1365 */ 1366 rtl818x_iowrite32(priv, rtl8187b_ac_addr[queue], 1367 (params->txop << 16) | (cw_max << 12) | 1368 (cw_min << 8) | (params->aifs * 1369 priv->slot_time + SIFS_TIME)); 1370 } else { 1371 if (queue != 0) 1372 return -EINVAL; 1373 1374 rtl818x_iowrite8(priv, &priv->map->CW_VAL, 1375 cw_min | (cw_max << 4)); 1376 } 1377 return 0; 1378 } 1379 1380 1381 static const struct ieee80211_ops rtl8187_ops = { 1382 .tx = rtl8187_tx, 1383 .start = rtl8187_start, 1384 .stop = rtl8187_stop, 1385 .add_interface = rtl8187_add_interface, 1386 .remove_interface = rtl8187_remove_interface, 1387 .config = rtl8187_config, 1388 .bss_info_changed = rtl8187_bss_info_changed, 1389 .prepare_multicast = rtl8187_prepare_multicast, 1390 .configure_filter = rtl8187_configure_filter, 1391 .conf_tx = rtl8187_conf_tx, 1392 .rfkill_poll = rtl8187_rfkill_poll, 1393 .get_tsf = rtl8187_get_tsf, 1394 }; 1395 1396 static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom) 1397 { 1398 struct ieee80211_hw *dev = eeprom->data; 1399 struct rtl8187_priv *priv = dev->priv; 1400 u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 1401 1402 eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE; 1403 eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ; 1404 eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK; 1405 eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS; 1406 } 1407 1408 static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom) 1409 { 1410 struct ieee80211_hw *dev = eeprom->data; 1411 struct rtl8187_priv *priv = dev->priv; 1412 u8 reg = RTL818X_EEPROM_CMD_PROGRAM; 1413 1414 if (eeprom->reg_data_in) 1415 reg |= RTL818X_EEPROM_CMD_WRITE; 1416 if (eeprom->reg_data_out) 1417 reg |= RTL818X_EEPROM_CMD_READ; 1418 if (eeprom->reg_data_clock) 1419 reg |= RTL818X_EEPROM_CMD_CK; 1420 if (eeprom->reg_chip_select) 1421 reg |= RTL818X_EEPROM_CMD_CS; 1422 1423 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg); 1424 udelay(10); 1425 } 1426 1427 static int rtl8187_probe(struct usb_interface *intf, 1428 const struct usb_device_id *id) 1429 { 1430 struct usb_device *udev = interface_to_usbdev(intf); 1431 struct ieee80211_hw *dev; 1432 struct rtl8187_priv *priv; 1433 struct eeprom_93cx6 eeprom; 1434 struct ieee80211_channel *channel; 1435 const char *chip_name; 1436 u16 txpwr, reg; 1437 u16 product_id = le16_to_cpu(udev->descriptor.idProduct); 1438 int err, i; 1439 u8 mac_addr[ETH_ALEN]; 1440 1441 dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops); 1442 if (!dev) { 1443 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n"); 1444 return -ENOMEM; 1445 } 1446 1447 priv = dev->priv; 1448 priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B); 1449 1450 /* allocate "DMA aware" buffer for register accesses */ 1451 priv->io_dmabuf = kmalloc(sizeof(*priv->io_dmabuf), GFP_KERNEL); 1452 if (!priv->io_dmabuf) { 1453 err = -ENOMEM; 1454 goto err_free_dev; 1455 } 1456 mutex_init(&priv->io_mutex); 1457 mutex_init(&priv->conf_mutex); 1458 1459 SET_IEEE80211_DEV(dev, &intf->dev); 1460 usb_set_intfdata(intf, dev); 1461 priv->udev = udev; 1462 1463 usb_get_dev(udev); 1464 1465 skb_queue_head_init(&priv->rx_queue); 1466 1467 BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels)); 1468 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates)); 1469 1470 memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels)); 1471 memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates)); 1472 priv->map = (struct rtl818x_csr *)0xFF00; 1473 1474 priv->band.band = NL80211_BAND_2GHZ; 1475 priv->band.channels = priv->channels; 1476 priv->band.n_channels = ARRAY_SIZE(rtl818x_channels); 1477 priv->band.bitrates = priv->rates; 1478 priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates); 1479 dev->wiphy->bands[NL80211_BAND_2GHZ] = &priv->band; 1480 1481 1482 ieee80211_hw_set(dev, RX_INCLUDES_FCS); 1483 ieee80211_hw_set(dev, HOST_BROADCAST_PS_BUFFERING); 1484 ieee80211_hw_set(dev, SIGNAL_DBM); 1485 /* Initialize rate-control variables */ 1486 dev->max_rates = 1; 1487 dev->max_rate_tries = RETRY_COUNT; 1488 1489 eeprom.data = dev; 1490 eeprom.register_read = rtl8187_eeprom_register_read; 1491 eeprom.register_write = rtl8187_eeprom_register_write; 1492 if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6)) 1493 eeprom.width = PCI_EEPROM_WIDTH_93C66; 1494 else 1495 eeprom.width = PCI_EEPROM_WIDTH_93C46; 1496 1497 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 1498 udelay(10); 1499 1500 eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR, 1501 (__le16 __force *)mac_addr, 3); 1502 if (!is_valid_ether_addr(mac_addr)) { 1503 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly " 1504 "generated MAC address\n"); 1505 eth_random_addr(mac_addr); 1506 } 1507 SET_IEEE80211_PERM_ADDR(dev, mac_addr); 1508 1509 channel = priv->channels; 1510 for (i = 0; i < 3; i++) { 1511 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i, 1512 &txpwr); 1513 (*channel++).hw_value = txpwr & 0xFF; 1514 (*channel++).hw_value = txpwr >> 8; 1515 } 1516 for (i = 0; i < 2; i++) { 1517 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i, 1518 &txpwr); 1519 (*channel++).hw_value = txpwr & 0xFF; 1520 (*channel++).hw_value = txpwr >> 8; 1521 } 1522 1523 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE, 1524 &priv->txpwr_base); 1525 1526 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1; 1527 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1); 1528 /* 0 means asic B-cut, we should use SW 3 wire 1529 * bit-by-bit banging for radio. 1 means we can use 1530 * USB specific request to write radio registers */ 1531 priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3; 1532 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg); 1533 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 1534 1535 if (!priv->is_rtl8187b) { 1536 u32 reg32; 1537 reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF); 1538 reg32 &= RTL818X_TX_CONF_HWVER_MASK; 1539 switch (reg32) { 1540 case RTL818X_TX_CONF_R8187vD_B: 1541 /* Some RTL8187B devices have a USB ID of 0x8187 1542 * detect them here */ 1543 chip_name = "RTL8187BvB(early)"; 1544 priv->is_rtl8187b = 1; 1545 priv->hw_rev = RTL8187BvB; 1546 break; 1547 case RTL818X_TX_CONF_R8187vD: 1548 chip_name = "RTL8187vD"; 1549 break; 1550 default: 1551 chip_name = "RTL8187vB (default)"; 1552 } 1553 } else { 1554 /* 1555 * Force USB request to write radio registers for 8187B, Realtek 1556 * only uses it in their sources 1557 */ 1558 /*if (priv->asic_rev == 0) { 1559 printk(KERN_WARNING "rtl8187: Forcing use of USB " 1560 "requests to write to radio registers\n"); 1561 priv->asic_rev = 1; 1562 }*/ 1563 switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) { 1564 case RTL818X_R8187B_B: 1565 chip_name = "RTL8187BvB"; 1566 priv->hw_rev = RTL8187BvB; 1567 break; 1568 case RTL818X_R8187B_D: 1569 chip_name = "RTL8187BvD"; 1570 priv->hw_rev = RTL8187BvD; 1571 break; 1572 case RTL818X_R8187B_E: 1573 chip_name = "RTL8187BvE"; 1574 priv->hw_rev = RTL8187BvE; 1575 break; 1576 default: 1577 chip_name = "RTL8187BvB (default)"; 1578 priv->hw_rev = RTL8187BvB; 1579 } 1580 } 1581 1582 if (!priv->is_rtl8187b) { 1583 for (i = 0; i < 2; i++) { 1584 eeprom_93cx6_read(&eeprom, 1585 RTL8187_EEPROM_TXPWR_CHAN_6 + i, 1586 &txpwr); 1587 (*channel++).hw_value = txpwr & 0xFF; 1588 (*channel++).hw_value = txpwr >> 8; 1589 } 1590 } else { 1591 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6, 1592 &txpwr); 1593 (*channel++).hw_value = txpwr & 0xFF; 1594 1595 eeprom_93cx6_read(&eeprom, 0x0A, &txpwr); 1596 (*channel++).hw_value = txpwr & 0xFF; 1597 1598 eeprom_93cx6_read(&eeprom, 0x1C, &txpwr); 1599 (*channel++).hw_value = txpwr & 0xFF; 1600 (*channel++).hw_value = txpwr >> 8; 1601 } 1602 /* Handle the differing rfkill GPIO bit in different models */ 1603 priv->rfkill_mask = RFKILL_MASK_8187_89_97; 1604 if (product_id == 0x8197 || product_id == 0x8198) { 1605 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_SELECT_GPIO, ®); 1606 if (reg & 0xFF00) 1607 priv->rfkill_mask = RFKILL_MASK_8198; 1608 } 1609 dev->vif_data_size = sizeof(struct rtl8187_vif); 1610 dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | 1611 BIT(NL80211_IFTYPE_ADHOC) ; 1612 1613 wiphy_ext_feature_set(dev->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST); 1614 1615 if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b) 1616 printk(KERN_INFO "rtl8187: inconsistency between id with OEM" 1617 " info!\n"); 1618 1619 priv->rf = rtl8187_detect_rf(dev); 1620 dev->extra_tx_headroom = (!priv->is_rtl8187b) ? 1621 sizeof(struct rtl8187_tx_hdr) : 1622 sizeof(struct rtl8187b_tx_hdr); 1623 if (!priv->is_rtl8187b) 1624 dev->queues = 1; 1625 else 1626 dev->queues = 4; 1627 1628 err = ieee80211_register_hw(dev); 1629 if (err) { 1630 printk(KERN_ERR "rtl8187: Cannot register device\n"); 1631 goto err_free_dmabuf; 1632 } 1633 skb_queue_head_init(&priv->b_tx_status.queue); 1634 1635 wiphy_info(dev->wiphy, "hwaddr %pM, %s V%d + %s, rfkill mask %d\n", 1636 mac_addr, chip_name, priv->asic_rev, priv->rf->name, 1637 priv->rfkill_mask); 1638 1639 #ifdef CONFIG_RTL8187_LEDS 1640 eeprom_93cx6_read(&eeprom, 0x3F, ®); 1641 reg &= 0xFF; 1642 rtl8187_leds_init(dev, reg); 1643 #endif 1644 rtl8187_rfkill_init(dev); 1645 1646 return 0; 1647 1648 err_free_dmabuf: 1649 kfree(priv->io_dmabuf); 1650 usb_set_intfdata(intf, NULL); 1651 usb_put_dev(udev); 1652 err_free_dev: 1653 ieee80211_free_hw(dev); 1654 return err; 1655 } 1656 1657 static void rtl8187_disconnect(struct usb_interface *intf) 1658 { 1659 struct ieee80211_hw *dev = usb_get_intfdata(intf); 1660 struct rtl8187_priv *priv; 1661 1662 if (!dev) 1663 return; 1664 1665 #ifdef CONFIG_RTL8187_LEDS 1666 rtl8187_leds_exit(dev); 1667 #endif 1668 rtl8187_rfkill_exit(dev); 1669 ieee80211_unregister_hw(dev); 1670 1671 priv = dev->priv; 1672 usb_reset_device(priv->udev); 1673 usb_put_dev(interface_to_usbdev(intf)); 1674 kfree(priv->io_dmabuf); 1675 ieee80211_free_hw(dev); 1676 } 1677 1678 static struct usb_driver rtl8187_driver = { 1679 .name = KBUILD_MODNAME, 1680 .id_table = rtl8187_table, 1681 .probe = rtl8187_probe, 1682 .disconnect = rtl8187_disconnect, 1683 .disable_hub_initiated_lpm = 1, 1684 }; 1685 1686 module_usb_driver(rtl8187_driver); 1687