1 /* 2 Copyright (C) 2010 Willow Garage <http://www.willowgarage.com> 3 Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com> 4 Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com> 5 <http://rt2x00.serialmonkey.com> 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 2 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program; if not, see <http://www.gnu.org/licenses/>. 19 */ 20 21 /* 22 Module: rt2x00lib 23 Abstract: rt2x00 queue specific routines. 24 */ 25 26 #include <linux/slab.h> 27 #include <linux/kernel.h> 28 #include <linux/module.h> 29 #include <linux/dma-mapping.h> 30 31 #include "rt2x00.h" 32 #include "rt2x00lib.h" 33 34 struct sk_buff *rt2x00queue_alloc_rxskb(struct queue_entry *entry, gfp_t gfp) 35 { 36 struct data_queue *queue = entry->queue; 37 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev; 38 struct sk_buff *skb; 39 struct skb_frame_desc *skbdesc; 40 unsigned int frame_size; 41 unsigned int head_size = 0; 42 unsigned int tail_size = 0; 43 44 /* 45 * The frame size includes descriptor size, because the 46 * hardware directly receive the frame into the skbuffer. 47 */ 48 frame_size = queue->data_size + queue->desc_size + queue->winfo_size; 49 50 /* 51 * The payload should be aligned to a 4-byte boundary, 52 * this means we need at least 3 bytes for moving the frame 53 * into the correct offset. 54 */ 55 head_size = 4; 56 57 /* 58 * For IV/EIV/ICV assembly we must make sure there is 59 * at least 8 bytes bytes available in headroom for IV/EIV 60 * and 8 bytes for ICV data as tailroon. 61 */ 62 if (rt2x00_has_cap_hw_crypto(rt2x00dev)) { 63 head_size += 8; 64 tail_size += 8; 65 } 66 67 /* 68 * Allocate skbuffer. 69 */ 70 skb = __dev_alloc_skb(frame_size + head_size + tail_size, gfp); 71 if (!skb) 72 return NULL; 73 74 /* 75 * Make sure we not have a frame with the requested bytes 76 * available in the head and tail. 77 */ 78 skb_reserve(skb, head_size); 79 skb_put(skb, frame_size); 80 81 /* 82 * Populate skbdesc. 83 */ 84 skbdesc = get_skb_frame_desc(skb); 85 memset(skbdesc, 0, sizeof(*skbdesc)); 86 87 if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_DMA)) { 88 dma_addr_t skb_dma; 89 90 skb_dma = dma_map_single(rt2x00dev->dev, skb->data, skb->len, 91 DMA_FROM_DEVICE); 92 if (unlikely(dma_mapping_error(rt2x00dev->dev, skb_dma))) { 93 dev_kfree_skb_any(skb); 94 return NULL; 95 } 96 97 skbdesc->skb_dma = skb_dma; 98 skbdesc->flags |= SKBDESC_DMA_MAPPED_RX; 99 } 100 101 return skb; 102 } 103 104 int rt2x00queue_map_txskb(struct queue_entry *entry) 105 { 106 struct device *dev = entry->queue->rt2x00dev->dev; 107 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); 108 109 skbdesc->skb_dma = 110 dma_map_single(dev, entry->skb->data, entry->skb->len, DMA_TO_DEVICE); 111 112 if (unlikely(dma_mapping_error(dev, skbdesc->skb_dma))) 113 return -ENOMEM; 114 115 skbdesc->flags |= SKBDESC_DMA_MAPPED_TX; 116 rt2x00lib_dmadone(entry); 117 return 0; 118 } 119 EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb); 120 121 void rt2x00queue_unmap_skb(struct queue_entry *entry) 122 { 123 struct device *dev = entry->queue->rt2x00dev->dev; 124 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); 125 126 if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) { 127 dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len, 128 DMA_FROM_DEVICE); 129 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX; 130 } else if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) { 131 dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len, 132 DMA_TO_DEVICE); 133 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX; 134 } 135 } 136 EXPORT_SYMBOL_GPL(rt2x00queue_unmap_skb); 137 138 void rt2x00queue_free_skb(struct queue_entry *entry) 139 { 140 if (!entry->skb) 141 return; 142 143 rt2x00queue_unmap_skb(entry); 144 dev_kfree_skb_any(entry->skb); 145 entry->skb = NULL; 146 } 147 148 void rt2x00queue_align_frame(struct sk_buff *skb) 149 { 150 unsigned int frame_length = skb->len; 151 unsigned int align = ALIGN_SIZE(skb, 0); 152 153 if (!align) 154 return; 155 156 skb_push(skb, align); 157 memmove(skb->data, skb->data + align, frame_length); 158 skb_trim(skb, frame_length); 159 } 160 161 /* 162 * H/W needs L2 padding between the header and the paylod if header size 163 * is not 4 bytes aligned. 164 */ 165 void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int hdr_len) 166 { 167 unsigned int l2pad = (skb->len > hdr_len) ? L2PAD_SIZE(hdr_len) : 0; 168 169 if (!l2pad) 170 return; 171 172 skb_push(skb, l2pad); 173 memmove(skb->data, skb->data + l2pad, hdr_len); 174 } 175 176 void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int hdr_len) 177 { 178 unsigned int l2pad = (skb->len > hdr_len) ? L2PAD_SIZE(hdr_len) : 0; 179 180 if (!l2pad) 181 return; 182 183 memmove(skb->data + l2pad, skb->data, hdr_len); 184 skb_pull(skb, l2pad); 185 } 186 187 static void rt2x00queue_create_tx_descriptor_seq(struct rt2x00_dev *rt2x00dev, 188 struct sk_buff *skb, 189 struct txentry_desc *txdesc) 190 { 191 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 192 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 193 struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif); 194 u16 seqno; 195 196 if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ)) 197 return; 198 199 __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags); 200 201 if (!rt2x00_has_cap_flag(rt2x00dev, REQUIRE_SW_SEQNO)) { 202 /* 203 * rt2800 has a H/W (or F/W) bug, device incorrectly increase 204 * seqno on retransmitted data (non-QOS) and management frames. 205 * To workaround the problem let's generate seqno in software. 206 * Except for beacons which are transmitted periodically by H/W 207 * hence hardware has to assign seqno for them. 208 */ 209 if (ieee80211_is_beacon(hdr->frame_control)) { 210 __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags); 211 /* H/W will generate sequence number */ 212 return; 213 } 214 215 __clear_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags); 216 } 217 218 /* 219 * The hardware is not able to insert a sequence number. Assign a 220 * software generated one here. 221 * 222 * This is wrong because beacons are not getting sequence 223 * numbers assigned properly. 224 * 225 * A secondary problem exists for drivers that cannot toggle 226 * sequence counting per-frame, since those will override the 227 * sequence counter given by mac80211. 228 */ 229 if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags)) 230 seqno = atomic_add_return(0x10, &intf->seqno); 231 else 232 seqno = atomic_read(&intf->seqno); 233 234 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); 235 hdr->seq_ctrl |= cpu_to_le16(seqno); 236 } 237 238 static void rt2x00queue_create_tx_descriptor_plcp(struct rt2x00_dev *rt2x00dev, 239 struct sk_buff *skb, 240 struct txentry_desc *txdesc, 241 const struct rt2x00_rate *hwrate) 242 { 243 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 244 struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0]; 245 unsigned int data_length; 246 unsigned int duration; 247 unsigned int residual; 248 249 /* 250 * Determine with what IFS priority this frame should be send. 251 * Set ifs to IFS_SIFS when the this is not the first fragment, 252 * or this fragment came after RTS/CTS. 253 */ 254 if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags)) 255 txdesc->u.plcp.ifs = IFS_BACKOFF; 256 else 257 txdesc->u.plcp.ifs = IFS_SIFS; 258 259 /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */ 260 data_length = skb->len + 4; 261 data_length += rt2x00crypto_tx_overhead(rt2x00dev, skb); 262 263 /* 264 * PLCP setup 265 * Length calculation depends on OFDM/CCK rate. 266 */ 267 txdesc->u.plcp.signal = hwrate->plcp; 268 txdesc->u.plcp.service = 0x04; 269 270 if (hwrate->flags & DEV_RATE_OFDM) { 271 txdesc->u.plcp.length_high = (data_length >> 6) & 0x3f; 272 txdesc->u.plcp.length_low = data_length & 0x3f; 273 } else { 274 /* 275 * Convert length to microseconds. 276 */ 277 residual = GET_DURATION_RES(data_length, hwrate->bitrate); 278 duration = GET_DURATION(data_length, hwrate->bitrate); 279 280 if (residual != 0) { 281 duration++; 282 283 /* 284 * Check if we need to set the Length Extension 285 */ 286 if (hwrate->bitrate == 110 && residual <= 30) 287 txdesc->u.plcp.service |= 0x80; 288 } 289 290 txdesc->u.plcp.length_high = (duration >> 8) & 0xff; 291 txdesc->u.plcp.length_low = duration & 0xff; 292 293 /* 294 * When preamble is enabled we should set the 295 * preamble bit for the signal. 296 */ 297 if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) 298 txdesc->u.plcp.signal |= 0x08; 299 } 300 } 301 302 static void rt2x00queue_create_tx_descriptor_ht(struct rt2x00_dev *rt2x00dev, 303 struct sk_buff *skb, 304 struct txentry_desc *txdesc, 305 struct ieee80211_sta *sta, 306 const struct rt2x00_rate *hwrate) 307 { 308 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 309 struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0]; 310 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 311 struct rt2x00_sta *sta_priv = NULL; 312 u8 density = 0; 313 314 if (sta) { 315 sta_priv = sta_to_rt2x00_sta(sta); 316 txdesc->u.ht.wcid = sta_priv->wcid; 317 density = sta->ht_cap.ampdu_density; 318 } 319 320 /* 321 * If IEEE80211_TX_RC_MCS is set txrate->idx just contains the 322 * mcs rate to be used 323 */ 324 if (txrate->flags & IEEE80211_TX_RC_MCS) { 325 txdesc->u.ht.mcs = txrate->idx; 326 327 /* 328 * MIMO PS should be set to 1 for STA's using dynamic SM PS 329 * when using more then one tx stream (>MCS7). 330 */ 331 if (sta && txdesc->u.ht.mcs > 7 && 332 sta->smps_mode == IEEE80211_SMPS_DYNAMIC) 333 __set_bit(ENTRY_TXD_HT_MIMO_PS, &txdesc->flags); 334 } else { 335 txdesc->u.ht.mcs = rt2x00_get_rate_mcs(hwrate->mcs); 336 if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) 337 txdesc->u.ht.mcs |= 0x08; 338 } 339 340 if (test_bit(CONFIG_HT_DISABLED, &rt2x00dev->flags)) { 341 if (!(tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)) 342 txdesc->u.ht.txop = TXOP_SIFS; 343 else 344 txdesc->u.ht.txop = TXOP_BACKOFF; 345 346 /* Left zero on all other settings. */ 347 return; 348 } 349 350 /* 351 * Only one STBC stream is supported for now. 352 */ 353 if (tx_info->flags & IEEE80211_TX_CTL_STBC) 354 txdesc->u.ht.stbc = 1; 355 356 /* 357 * This frame is eligible for an AMPDU, however, don't aggregate 358 * frames that are intended to probe a specific tx rate. 359 */ 360 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU && 361 !(tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)) { 362 __set_bit(ENTRY_TXD_HT_AMPDU, &txdesc->flags); 363 txdesc->u.ht.mpdu_density = density; 364 txdesc->u.ht.ba_size = 7; /* FIXME: What value is needed? */ 365 } 366 367 /* 368 * Set 40Mhz mode if necessary (for legacy rates this will 369 * duplicate the frame to both channels). 370 */ 371 if (txrate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH || 372 txrate->flags & IEEE80211_TX_RC_DUP_DATA) 373 __set_bit(ENTRY_TXD_HT_BW_40, &txdesc->flags); 374 if (txrate->flags & IEEE80211_TX_RC_SHORT_GI) 375 __set_bit(ENTRY_TXD_HT_SHORT_GI, &txdesc->flags); 376 377 /* 378 * Determine IFS values 379 * - Use TXOP_BACKOFF for management frames except beacons 380 * - Use TXOP_SIFS for fragment bursts 381 * - Use TXOP_HTTXOP for everything else 382 * 383 * Note: rt2800 devices won't use CTS protection (if used) 384 * for frames not transmitted with TXOP_HTTXOP 385 */ 386 if (ieee80211_is_mgmt(hdr->frame_control) && 387 !ieee80211_is_beacon(hdr->frame_control)) 388 txdesc->u.ht.txop = TXOP_BACKOFF; 389 else if (!(tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)) 390 txdesc->u.ht.txop = TXOP_SIFS; 391 else 392 txdesc->u.ht.txop = TXOP_HTTXOP; 393 } 394 395 static void rt2x00queue_create_tx_descriptor(struct rt2x00_dev *rt2x00dev, 396 struct sk_buff *skb, 397 struct txentry_desc *txdesc, 398 struct ieee80211_sta *sta) 399 { 400 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 401 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 402 struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0]; 403 struct ieee80211_rate *rate; 404 const struct rt2x00_rate *hwrate = NULL; 405 406 memset(txdesc, 0, sizeof(*txdesc)); 407 408 /* 409 * Header and frame information. 410 */ 411 txdesc->length = skb->len; 412 txdesc->header_length = ieee80211_get_hdrlen_from_skb(skb); 413 414 /* 415 * Check whether this frame is to be acked. 416 */ 417 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK)) 418 __set_bit(ENTRY_TXD_ACK, &txdesc->flags); 419 420 /* 421 * Check if this is a RTS/CTS frame 422 */ 423 if (ieee80211_is_rts(hdr->frame_control) || 424 ieee80211_is_cts(hdr->frame_control)) { 425 __set_bit(ENTRY_TXD_BURST, &txdesc->flags); 426 if (ieee80211_is_rts(hdr->frame_control)) 427 __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags); 428 else 429 __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags); 430 if (tx_info->control.rts_cts_rate_idx >= 0) 431 rate = 432 ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info); 433 } 434 435 /* 436 * Determine retry information. 437 */ 438 txdesc->retry_limit = tx_info->control.rates[0].count - 1; 439 if (txdesc->retry_limit >= rt2x00dev->long_retry) 440 __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags); 441 442 /* 443 * Check if more fragments are pending 444 */ 445 if (ieee80211_has_morefrags(hdr->frame_control)) { 446 __set_bit(ENTRY_TXD_BURST, &txdesc->flags); 447 __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags); 448 } 449 450 /* 451 * Check if more frames (!= fragments) are pending 452 */ 453 if (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES) 454 __set_bit(ENTRY_TXD_BURST, &txdesc->flags); 455 456 /* 457 * Beacons and probe responses require the tsf timestamp 458 * to be inserted into the frame. 459 */ 460 if (ieee80211_is_beacon(hdr->frame_control) || 461 ieee80211_is_probe_resp(hdr->frame_control)) 462 __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags); 463 464 if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) && 465 !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) 466 __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags); 467 468 /* 469 * Determine rate modulation. 470 */ 471 if (txrate->flags & IEEE80211_TX_RC_GREEN_FIELD) 472 txdesc->rate_mode = RATE_MODE_HT_GREENFIELD; 473 else if (txrate->flags & IEEE80211_TX_RC_MCS) 474 txdesc->rate_mode = RATE_MODE_HT_MIX; 475 else { 476 rate = ieee80211_get_tx_rate(rt2x00dev->hw, tx_info); 477 hwrate = rt2x00_get_rate(rate->hw_value); 478 if (hwrate->flags & DEV_RATE_OFDM) 479 txdesc->rate_mode = RATE_MODE_OFDM; 480 else 481 txdesc->rate_mode = RATE_MODE_CCK; 482 } 483 484 /* 485 * Apply TX descriptor handling by components 486 */ 487 rt2x00crypto_create_tx_descriptor(rt2x00dev, skb, txdesc); 488 rt2x00queue_create_tx_descriptor_seq(rt2x00dev, skb, txdesc); 489 490 if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_HT_TX_DESC)) 491 rt2x00queue_create_tx_descriptor_ht(rt2x00dev, skb, txdesc, 492 sta, hwrate); 493 else 494 rt2x00queue_create_tx_descriptor_plcp(rt2x00dev, skb, txdesc, 495 hwrate); 496 } 497 498 static int rt2x00queue_write_tx_data(struct queue_entry *entry, 499 struct txentry_desc *txdesc) 500 { 501 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; 502 503 /* 504 * This should not happen, we already checked the entry 505 * was ours. When the hardware disagrees there has been 506 * a queue corruption! 507 */ 508 if (unlikely(rt2x00dev->ops->lib->get_entry_state && 509 rt2x00dev->ops->lib->get_entry_state(entry))) { 510 rt2x00_err(rt2x00dev, 511 "Corrupt queue %d, accessing entry which is not ours\n" 512 "Please file bug report to %s\n", 513 entry->queue->qid, DRV_PROJECT); 514 return -EINVAL; 515 } 516 517 /* 518 * Add the requested extra tx headroom in front of the skb. 519 */ 520 skb_push(entry->skb, rt2x00dev->extra_tx_headroom); 521 memset(entry->skb->data, 0, rt2x00dev->extra_tx_headroom); 522 523 /* 524 * Call the driver's write_tx_data function, if it exists. 525 */ 526 if (rt2x00dev->ops->lib->write_tx_data) 527 rt2x00dev->ops->lib->write_tx_data(entry, txdesc); 528 529 /* 530 * Map the skb to DMA. 531 */ 532 if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_DMA) && 533 rt2x00queue_map_txskb(entry)) 534 return -ENOMEM; 535 536 return 0; 537 } 538 539 static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry, 540 struct txentry_desc *txdesc) 541 { 542 struct data_queue *queue = entry->queue; 543 544 queue->rt2x00dev->ops->lib->write_tx_desc(entry, txdesc); 545 546 /* 547 * All processing on the frame has been completed, this means 548 * it is now ready to be dumped to userspace through debugfs. 549 */ 550 rt2x00debug_dump_frame(queue->rt2x00dev, DUMP_FRAME_TX, entry); 551 } 552 553 static void rt2x00queue_kick_tx_queue(struct data_queue *queue, 554 struct txentry_desc *txdesc) 555 { 556 /* 557 * Check if we need to kick the queue, there are however a few rules 558 * 1) Don't kick unless this is the last in frame in a burst. 559 * When the burst flag is set, this frame is always followed 560 * by another frame which in some way are related to eachother. 561 * This is true for fragments, RTS or CTS-to-self frames. 562 * 2) Rule 1 can be broken when the available entries 563 * in the queue are less then a certain threshold. 564 */ 565 if (rt2x00queue_threshold(queue) || 566 !test_bit(ENTRY_TXD_BURST, &txdesc->flags)) 567 queue->rt2x00dev->ops->lib->kick_queue(queue); 568 } 569 570 static void rt2x00queue_bar_check(struct queue_entry *entry) 571 { 572 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; 573 struct ieee80211_bar *bar = (void *) (entry->skb->data + 574 rt2x00dev->extra_tx_headroom); 575 struct rt2x00_bar_list_entry *bar_entry; 576 577 if (likely(!ieee80211_is_back_req(bar->frame_control))) 578 return; 579 580 bar_entry = kmalloc(sizeof(*bar_entry), GFP_ATOMIC); 581 582 /* 583 * If the alloc fails we still send the BAR out but just don't track 584 * it in our bar list. And as a result we will report it to mac80211 585 * back as failed. 586 */ 587 if (!bar_entry) 588 return; 589 590 bar_entry->entry = entry; 591 bar_entry->block_acked = 0; 592 593 /* 594 * Copy the relevant parts of the 802.11 BAR into out check list 595 * such that we can use RCU for less-overhead in the RX path since 596 * sending BARs and processing the according BlockAck should be 597 * the exception. 598 */ 599 memcpy(bar_entry->ra, bar->ra, sizeof(bar->ra)); 600 memcpy(bar_entry->ta, bar->ta, sizeof(bar->ta)); 601 bar_entry->control = bar->control; 602 bar_entry->start_seq_num = bar->start_seq_num; 603 604 /* 605 * Insert BAR into our BAR check list. 606 */ 607 spin_lock_bh(&rt2x00dev->bar_list_lock); 608 list_add_tail_rcu(&bar_entry->list, &rt2x00dev->bar_list); 609 spin_unlock_bh(&rt2x00dev->bar_list_lock); 610 } 611 612 int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb, 613 struct ieee80211_sta *sta, bool local) 614 { 615 struct ieee80211_tx_info *tx_info; 616 struct queue_entry *entry; 617 struct txentry_desc txdesc; 618 struct skb_frame_desc *skbdesc; 619 u8 rate_idx, rate_flags; 620 int ret = 0; 621 622 /* 623 * Copy all TX descriptor information into txdesc, 624 * after that we are free to use the skb->cb array 625 * for our information. 626 */ 627 rt2x00queue_create_tx_descriptor(queue->rt2x00dev, skb, &txdesc, sta); 628 629 /* 630 * All information is retrieved from the skb->cb array, 631 * now we should claim ownership of the driver part of that 632 * array, preserving the bitrate index and flags. 633 */ 634 tx_info = IEEE80211_SKB_CB(skb); 635 rate_idx = tx_info->control.rates[0].idx; 636 rate_flags = tx_info->control.rates[0].flags; 637 skbdesc = get_skb_frame_desc(skb); 638 memset(skbdesc, 0, sizeof(*skbdesc)); 639 skbdesc->tx_rate_idx = rate_idx; 640 skbdesc->tx_rate_flags = rate_flags; 641 642 if (local) 643 skbdesc->flags |= SKBDESC_NOT_MAC80211; 644 645 /* 646 * When hardware encryption is supported, and this frame 647 * is to be encrypted, we should strip the IV/EIV data from 648 * the frame so we can provide it to the driver separately. 649 */ 650 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) && 651 !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) { 652 if (rt2x00_has_cap_flag(queue->rt2x00dev, REQUIRE_COPY_IV)) 653 rt2x00crypto_tx_copy_iv(skb, &txdesc); 654 else 655 rt2x00crypto_tx_remove_iv(skb, &txdesc); 656 } 657 658 /* 659 * When DMA allocation is required we should guarantee to the 660 * driver that the DMA is aligned to a 4-byte boundary. 661 * However some drivers require L2 padding to pad the payload 662 * rather then the header. This could be a requirement for 663 * PCI and USB devices, while header alignment only is valid 664 * for PCI devices. 665 */ 666 if (rt2x00_has_cap_flag(queue->rt2x00dev, REQUIRE_L2PAD)) 667 rt2x00queue_insert_l2pad(skb, txdesc.header_length); 668 else if (rt2x00_has_cap_flag(queue->rt2x00dev, REQUIRE_DMA)) 669 rt2x00queue_align_frame(skb); 670 671 /* 672 * That function must be called with bh disabled. 673 */ 674 spin_lock(&queue->tx_lock); 675 676 if (unlikely(rt2x00queue_full(queue))) { 677 rt2x00_err(queue->rt2x00dev, "Dropping frame due to full tx queue %d\n", 678 queue->qid); 679 ret = -ENOBUFS; 680 goto out; 681 } 682 683 entry = rt2x00queue_get_entry(queue, Q_INDEX); 684 685 if (unlikely(test_and_set_bit(ENTRY_OWNER_DEVICE_DATA, 686 &entry->flags))) { 687 rt2x00_err(queue->rt2x00dev, 688 "Arrived at non-free entry in the non-full queue %d\n" 689 "Please file bug report to %s\n", 690 queue->qid, DRV_PROJECT); 691 ret = -EINVAL; 692 goto out; 693 } 694 695 entry->skb = skb; 696 697 /* 698 * It could be possible that the queue was corrupted and this 699 * call failed. Since we always return NETDEV_TX_OK to mac80211, 700 * this frame will simply be dropped. 701 */ 702 if (unlikely(rt2x00queue_write_tx_data(entry, &txdesc))) { 703 clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags); 704 entry->skb = NULL; 705 ret = -EIO; 706 goto out; 707 } 708 709 /* 710 * Put BlockAckReqs into our check list for driver BA processing. 711 */ 712 rt2x00queue_bar_check(entry); 713 714 set_bit(ENTRY_DATA_PENDING, &entry->flags); 715 716 rt2x00queue_index_inc(entry, Q_INDEX); 717 rt2x00queue_write_tx_descriptor(entry, &txdesc); 718 rt2x00queue_kick_tx_queue(queue, &txdesc); 719 720 out: 721 /* 722 * Pausing queue has to be serialized with rt2x00lib_txdone(), so we 723 * do this under queue->tx_lock. Bottom halve was already disabled 724 * before ieee80211_xmit() call. 725 */ 726 if (rt2x00queue_threshold(queue)) 727 rt2x00queue_pause_queue(queue); 728 729 spin_unlock(&queue->tx_lock); 730 return ret; 731 } 732 733 int rt2x00queue_clear_beacon(struct rt2x00_dev *rt2x00dev, 734 struct ieee80211_vif *vif) 735 { 736 struct rt2x00_intf *intf = vif_to_intf(vif); 737 738 if (unlikely(!intf->beacon)) 739 return -ENOBUFS; 740 741 /* 742 * Clean up the beacon skb. 743 */ 744 rt2x00queue_free_skb(intf->beacon); 745 746 /* 747 * Clear beacon (single bssid devices don't need to clear the beacon 748 * since the beacon queue will get stopped anyway). 749 */ 750 if (rt2x00dev->ops->lib->clear_beacon) 751 rt2x00dev->ops->lib->clear_beacon(intf->beacon); 752 753 return 0; 754 } 755 756 int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev, 757 struct ieee80211_vif *vif) 758 { 759 struct rt2x00_intf *intf = vif_to_intf(vif); 760 struct skb_frame_desc *skbdesc; 761 struct txentry_desc txdesc; 762 763 if (unlikely(!intf->beacon)) 764 return -ENOBUFS; 765 766 /* 767 * Clean up the beacon skb. 768 */ 769 rt2x00queue_free_skb(intf->beacon); 770 771 intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif); 772 if (!intf->beacon->skb) 773 return -ENOMEM; 774 775 /* 776 * Copy all TX descriptor information into txdesc, 777 * after that we are free to use the skb->cb array 778 * for our information. 779 */ 780 rt2x00queue_create_tx_descriptor(rt2x00dev, intf->beacon->skb, &txdesc, NULL); 781 782 /* 783 * Fill in skb descriptor 784 */ 785 skbdesc = get_skb_frame_desc(intf->beacon->skb); 786 memset(skbdesc, 0, sizeof(*skbdesc)); 787 788 /* 789 * Send beacon to hardware. 790 */ 791 rt2x00dev->ops->lib->write_beacon(intf->beacon, &txdesc); 792 793 return 0; 794 795 } 796 797 bool rt2x00queue_for_each_entry(struct data_queue *queue, 798 enum queue_index start, 799 enum queue_index end, 800 void *data, 801 bool (*fn)(struct queue_entry *entry, 802 void *data)) 803 { 804 unsigned long irqflags; 805 unsigned int index_start; 806 unsigned int index_end; 807 unsigned int i; 808 809 if (unlikely(start >= Q_INDEX_MAX || end >= Q_INDEX_MAX)) { 810 rt2x00_err(queue->rt2x00dev, 811 "Entry requested from invalid index range (%d - %d)\n", 812 start, end); 813 return true; 814 } 815 816 /* 817 * Only protect the range we are going to loop over, 818 * if during our loop a extra entry is set to pending 819 * it should not be kicked during this run, since it 820 * is part of another TX operation. 821 */ 822 spin_lock_irqsave(&queue->index_lock, irqflags); 823 index_start = queue->index[start]; 824 index_end = queue->index[end]; 825 spin_unlock_irqrestore(&queue->index_lock, irqflags); 826 827 /* 828 * Start from the TX done pointer, this guarantees that we will 829 * send out all frames in the correct order. 830 */ 831 if (index_start < index_end) { 832 for (i = index_start; i < index_end; i++) { 833 if (fn(&queue->entries[i], data)) 834 return true; 835 } 836 } else { 837 for (i = index_start; i < queue->limit; i++) { 838 if (fn(&queue->entries[i], data)) 839 return true; 840 } 841 842 for (i = 0; i < index_end; i++) { 843 if (fn(&queue->entries[i], data)) 844 return true; 845 } 846 } 847 848 return false; 849 } 850 EXPORT_SYMBOL_GPL(rt2x00queue_for_each_entry); 851 852 struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue, 853 enum queue_index index) 854 { 855 struct queue_entry *entry; 856 unsigned long irqflags; 857 858 if (unlikely(index >= Q_INDEX_MAX)) { 859 rt2x00_err(queue->rt2x00dev, "Entry requested from invalid index type (%d)\n", 860 index); 861 return NULL; 862 } 863 864 spin_lock_irqsave(&queue->index_lock, irqflags); 865 866 entry = &queue->entries[queue->index[index]]; 867 868 spin_unlock_irqrestore(&queue->index_lock, irqflags); 869 870 return entry; 871 } 872 EXPORT_SYMBOL_GPL(rt2x00queue_get_entry); 873 874 void rt2x00queue_index_inc(struct queue_entry *entry, enum queue_index index) 875 { 876 struct data_queue *queue = entry->queue; 877 unsigned long irqflags; 878 879 if (unlikely(index >= Q_INDEX_MAX)) { 880 rt2x00_err(queue->rt2x00dev, 881 "Index change on invalid index type (%d)\n", index); 882 return; 883 } 884 885 spin_lock_irqsave(&queue->index_lock, irqflags); 886 887 queue->index[index]++; 888 if (queue->index[index] >= queue->limit) 889 queue->index[index] = 0; 890 891 entry->last_action = jiffies; 892 893 if (index == Q_INDEX) { 894 queue->length++; 895 } else if (index == Q_INDEX_DONE) { 896 queue->length--; 897 queue->count++; 898 } 899 900 spin_unlock_irqrestore(&queue->index_lock, irqflags); 901 } 902 903 static void rt2x00queue_pause_queue_nocheck(struct data_queue *queue) 904 { 905 switch (queue->qid) { 906 case QID_AC_VO: 907 case QID_AC_VI: 908 case QID_AC_BE: 909 case QID_AC_BK: 910 /* 911 * For TX queues, we have to disable the queue 912 * inside mac80211. 913 */ 914 ieee80211_stop_queue(queue->rt2x00dev->hw, queue->qid); 915 break; 916 default: 917 break; 918 } 919 } 920 void rt2x00queue_pause_queue(struct data_queue *queue) 921 { 922 if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) || 923 !test_bit(QUEUE_STARTED, &queue->flags) || 924 test_and_set_bit(QUEUE_PAUSED, &queue->flags)) 925 return; 926 927 rt2x00queue_pause_queue_nocheck(queue); 928 } 929 EXPORT_SYMBOL_GPL(rt2x00queue_pause_queue); 930 931 void rt2x00queue_unpause_queue(struct data_queue *queue) 932 { 933 if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) || 934 !test_bit(QUEUE_STARTED, &queue->flags) || 935 !test_and_clear_bit(QUEUE_PAUSED, &queue->flags)) 936 return; 937 938 switch (queue->qid) { 939 case QID_AC_VO: 940 case QID_AC_VI: 941 case QID_AC_BE: 942 case QID_AC_BK: 943 /* 944 * For TX queues, we have to enable the queue 945 * inside mac80211. 946 */ 947 ieee80211_wake_queue(queue->rt2x00dev->hw, queue->qid); 948 break; 949 case QID_RX: 950 /* 951 * For RX we need to kick the queue now in order to 952 * receive frames. 953 */ 954 queue->rt2x00dev->ops->lib->kick_queue(queue); 955 default: 956 break; 957 } 958 } 959 EXPORT_SYMBOL_GPL(rt2x00queue_unpause_queue); 960 961 void rt2x00queue_start_queue(struct data_queue *queue) 962 { 963 mutex_lock(&queue->status_lock); 964 965 if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) || 966 test_and_set_bit(QUEUE_STARTED, &queue->flags)) { 967 mutex_unlock(&queue->status_lock); 968 return; 969 } 970 971 set_bit(QUEUE_PAUSED, &queue->flags); 972 973 queue->rt2x00dev->ops->lib->start_queue(queue); 974 975 rt2x00queue_unpause_queue(queue); 976 977 mutex_unlock(&queue->status_lock); 978 } 979 EXPORT_SYMBOL_GPL(rt2x00queue_start_queue); 980 981 void rt2x00queue_stop_queue(struct data_queue *queue) 982 { 983 mutex_lock(&queue->status_lock); 984 985 if (!test_and_clear_bit(QUEUE_STARTED, &queue->flags)) { 986 mutex_unlock(&queue->status_lock); 987 return; 988 } 989 990 rt2x00queue_pause_queue_nocheck(queue); 991 992 queue->rt2x00dev->ops->lib->stop_queue(queue); 993 994 mutex_unlock(&queue->status_lock); 995 } 996 EXPORT_SYMBOL_GPL(rt2x00queue_stop_queue); 997 998 void rt2x00queue_flush_queue(struct data_queue *queue, bool drop) 999 { 1000 bool tx_queue = 1001 (queue->qid == QID_AC_VO) || 1002 (queue->qid == QID_AC_VI) || 1003 (queue->qid == QID_AC_BE) || 1004 (queue->qid == QID_AC_BK); 1005 1006 if (rt2x00queue_empty(queue)) 1007 return; 1008 1009 /* 1010 * If we are not supposed to drop any pending 1011 * frames, this means we must force a start (=kick) 1012 * to the queue to make sure the hardware will 1013 * start transmitting. 1014 */ 1015 if (!drop && tx_queue) 1016 queue->rt2x00dev->ops->lib->kick_queue(queue); 1017 1018 /* 1019 * Check if driver supports flushing, if that is the case we can 1020 * defer the flushing to the driver. Otherwise we must use the 1021 * alternative which just waits for the queue to become empty. 1022 */ 1023 if (likely(queue->rt2x00dev->ops->lib->flush_queue)) 1024 queue->rt2x00dev->ops->lib->flush_queue(queue, drop); 1025 1026 /* 1027 * The queue flush has failed... 1028 */ 1029 if (unlikely(!rt2x00queue_empty(queue))) 1030 rt2x00_warn(queue->rt2x00dev, "Queue %d failed to flush\n", 1031 queue->qid); 1032 } 1033 EXPORT_SYMBOL_GPL(rt2x00queue_flush_queue); 1034 1035 void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev) 1036 { 1037 struct data_queue *queue; 1038 1039 /* 1040 * rt2x00queue_start_queue will call ieee80211_wake_queue 1041 * for each queue after is has been properly initialized. 1042 */ 1043 tx_queue_for_each(rt2x00dev, queue) 1044 rt2x00queue_start_queue(queue); 1045 rt2x00dev->last_nostatus_check = jiffies; 1046 1047 rt2x00queue_start_queue(rt2x00dev->rx); 1048 } 1049 EXPORT_SYMBOL_GPL(rt2x00queue_start_queues); 1050 1051 void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev) 1052 { 1053 struct data_queue *queue; 1054 1055 /* 1056 * rt2x00queue_stop_queue will call ieee80211_stop_queue 1057 * as well, but we are completely shutting doing everything 1058 * now, so it is much safer to stop all TX queues at once, 1059 * and use rt2x00queue_stop_queue for cleaning up. 1060 */ 1061 ieee80211_stop_queues(rt2x00dev->hw); 1062 1063 tx_queue_for_each(rt2x00dev, queue) 1064 rt2x00queue_stop_queue(queue); 1065 1066 rt2x00queue_stop_queue(rt2x00dev->rx); 1067 } 1068 EXPORT_SYMBOL_GPL(rt2x00queue_stop_queues); 1069 1070 void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop) 1071 { 1072 struct data_queue *queue; 1073 1074 tx_queue_for_each(rt2x00dev, queue) 1075 rt2x00queue_flush_queue(queue, drop); 1076 1077 rt2x00queue_flush_queue(rt2x00dev->rx, drop); 1078 } 1079 EXPORT_SYMBOL_GPL(rt2x00queue_flush_queues); 1080 1081 static void rt2x00queue_reset(struct data_queue *queue) 1082 { 1083 unsigned long irqflags; 1084 unsigned int i; 1085 1086 spin_lock_irqsave(&queue->index_lock, irqflags); 1087 1088 queue->count = 0; 1089 queue->length = 0; 1090 1091 for (i = 0; i < Q_INDEX_MAX; i++) 1092 queue->index[i] = 0; 1093 1094 spin_unlock_irqrestore(&queue->index_lock, irqflags); 1095 } 1096 1097 void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev) 1098 { 1099 struct data_queue *queue; 1100 unsigned int i; 1101 1102 queue_for_each(rt2x00dev, queue) { 1103 rt2x00queue_reset(queue); 1104 1105 for (i = 0; i < queue->limit; i++) 1106 rt2x00dev->ops->lib->clear_entry(&queue->entries[i]); 1107 } 1108 } 1109 1110 static int rt2x00queue_alloc_entries(struct data_queue *queue) 1111 { 1112 struct queue_entry *entries; 1113 unsigned int entry_size; 1114 unsigned int i; 1115 1116 rt2x00queue_reset(queue); 1117 1118 /* 1119 * Allocate all queue entries. 1120 */ 1121 entry_size = sizeof(*entries) + queue->priv_size; 1122 entries = kcalloc(queue->limit, entry_size, GFP_KERNEL); 1123 if (!entries) 1124 return -ENOMEM; 1125 1126 #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \ 1127 (((char *)(__base)) + ((__limit) * (__esize)) + \ 1128 ((__index) * (__psize))) 1129 1130 for (i = 0; i < queue->limit; i++) { 1131 entries[i].flags = 0; 1132 entries[i].queue = queue; 1133 entries[i].skb = NULL; 1134 entries[i].entry_idx = i; 1135 entries[i].priv_data = 1136 QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit, 1137 sizeof(*entries), queue->priv_size); 1138 } 1139 1140 #undef QUEUE_ENTRY_PRIV_OFFSET 1141 1142 queue->entries = entries; 1143 1144 return 0; 1145 } 1146 1147 static void rt2x00queue_free_skbs(struct data_queue *queue) 1148 { 1149 unsigned int i; 1150 1151 if (!queue->entries) 1152 return; 1153 1154 for (i = 0; i < queue->limit; i++) { 1155 rt2x00queue_free_skb(&queue->entries[i]); 1156 } 1157 } 1158 1159 static int rt2x00queue_alloc_rxskbs(struct data_queue *queue) 1160 { 1161 unsigned int i; 1162 struct sk_buff *skb; 1163 1164 for (i = 0; i < queue->limit; i++) { 1165 skb = rt2x00queue_alloc_rxskb(&queue->entries[i], GFP_KERNEL); 1166 if (!skb) 1167 return -ENOMEM; 1168 queue->entries[i].skb = skb; 1169 } 1170 1171 return 0; 1172 } 1173 1174 int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev) 1175 { 1176 struct data_queue *queue; 1177 int status; 1178 1179 status = rt2x00queue_alloc_entries(rt2x00dev->rx); 1180 if (status) 1181 goto exit; 1182 1183 tx_queue_for_each(rt2x00dev, queue) { 1184 status = rt2x00queue_alloc_entries(queue); 1185 if (status) 1186 goto exit; 1187 } 1188 1189 status = rt2x00queue_alloc_entries(rt2x00dev->bcn); 1190 if (status) 1191 goto exit; 1192 1193 if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_ATIM_QUEUE)) { 1194 status = rt2x00queue_alloc_entries(rt2x00dev->atim); 1195 if (status) 1196 goto exit; 1197 } 1198 1199 status = rt2x00queue_alloc_rxskbs(rt2x00dev->rx); 1200 if (status) 1201 goto exit; 1202 1203 return 0; 1204 1205 exit: 1206 rt2x00_err(rt2x00dev, "Queue entries allocation failed\n"); 1207 1208 rt2x00queue_uninitialize(rt2x00dev); 1209 1210 return status; 1211 } 1212 1213 void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev) 1214 { 1215 struct data_queue *queue; 1216 1217 rt2x00queue_free_skbs(rt2x00dev->rx); 1218 1219 queue_for_each(rt2x00dev, queue) { 1220 kfree(queue->entries); 1221 queue->entries = NULL; 1222 } 1223 } 1224 1225 static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev, 1226 struct data_queue *queue, enum data_queue_qid qid) 1227 { 1228 mutex_init(&queue->status_lock); 1229 spin_lock_init(&queue->tx_lock); 1230 spin_lock_init(&queue->index_lock); 1231 1232 queue->rt2x00dev = rt2x00dev; 1233 queue->qid = qid; 1234 queue->txop = 0; 1235 queue->aifs = 2; 1236 queue->cw_min = 5; 1237 queue->cw_max = 10; 1238 1239 rt2x00dev->ops->queue_init(queue); 1240 1241 queue->threshold = DIV_ROUND_UP(queue->limit, 10); 1242 } 1243 1244 int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev) 1245 { 1246 struct data_queue *queue; 1247 enum data_queue_qid qid; 1248 unsigned int req_atim = 1249 rt2x00_has_cap_flag(rt2x00dev, REQUIRE_ATIM_QUEUE); 1250 1251 /* 1252 * We need the following queues: 1253 * RX: 1 1254 * TX: ops->tx_queues 1255 * Beacon: 1 1256 * Atim: 1 (if required) 1257 */ 1258 rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim; 1259 1260 queue = kcalloc(rt2x00dev->data_queues, sizeof(*queue), GFP_KERNEL); 1261 if (!queue) 1262 return -ENOMEM; 1263 1264 /* 1265 * Initialize pointers 1266 */ 1267 rt2x00dev->rx = queue; 1268 rt2x00dev->tx = &queue[1]; 1269 rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues]; 1270 rt2x00dev->atim = req_atim ? &queue[2 + rt2x00dev->ops->tx_queues] : NULL; 1271 1272 /* 1273 * Initialize queue parameters. 1274 * RX: qid = QID_RX 1275 * TX: qid = QID_AC_VO + index 1276 * TX: cw_min: 2^5 = 32. 1277 * TX: cw_max: 2^10 = 1024. 1278 * BCN: qid = QID_BEACON 1279 * ATIM: qid = QID_ATIM 1280 */ 1281 rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX); 1282 1283 qid = QID_AC_VO; 1284 tx_queue_for_each(rt2x00dev, queue) 1285 rt2x00queue_init(rt2x00dev, queue, qid++); 1286 1287 rt2x00queue_init(rt2x00dev, rt2x00dev->bcn, QID_BEACON); 1288 if (req_atim) 1289 rt2x00queue_init(rt2x00dev, rt2x00dev->atim, QID_ATIM); 1290 1291 return 0; 1292 } 1293 1294 void rt2x00queue_free(struct rt2x00_dev *rt2x00dev) 1295 { 1296 kfree(rt2x00dev->rx); 1297 rt2x00dev->rx = NULL; 1298 rt2x00dev->tx = NULL; 1299 rt2x00dev->bcn = NULL; 1300 } 1301