1 /* 2 Copyright (C) 2010 Willow Garage <http://www.willowgarage.com> 3 Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com> 4 Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com> 5 <http://rt2x00.serialmonkey.com> 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 2 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program; if not, see <http://www.gnu.org/licenses/>. 19 */ 20 21 /* 22 Module: rt2x00lib 23 Abstract: rt2x00 queue specific routines. 24 */ 25 26 #include <linux/slab.h> 27 #include <linux/kernel.h> 28 #include <linux/module.h> 29 #include <linux/dma-mapping.h> 30 31 #include "rt2x00.h" 32 #include "rt2x00lib.h" 33 34 struct sk_buff *rt2x00queue_alloc_rxskb(struct queue_entry *entry, gfp_t gfp) 35 { 36 struct data_queue *queue = entry->queue; 37 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev; 38 struct sk_buff *skb; 39 struct skb_frame_desc *skbdesc; 40 unsigned int frame_size; 41 unsigned int head_size = 0; 42 unsigned int tail_size = 0; 43 44 /* 45 * The frame size includes descriptor size, because the 46 * hardware directly receive the frame into the skbuffer. 47 */ 48 frame_size = queue->data_size + queue->desc_size + queue->winfo_size; 49 50 /* 51 * The payload should be aligned to a 4-byte boundary, 52 * this means we need at least 3 bytes for moving the frame 53 * into the correct offset. 54 */ 55 head_size = 4; 56 57 /* 58 * For IV/EIV/ICV assembly we must make sure there is 59 * at least 8 bytes bytes available in headroom for IV/EIV 60 * and 8 bytes for ICV data as tailroon. 61 */ 62 if (rt2x00_has_cap_hw_crypto(rt2x00dev)) { 63 head_size += 8; 64 tail_size += 8; 65 } 66 67 /* 68 * Allocate skbuffer. 69 */ 70 skb = __dev_alloc_skb(frame_size + head_size + tail_size, gfp); 71 if (!skb) 72 return NULL; 73 74 /* 75 * Make sure we not have a frame with the requested bytes 76 * available in the head and tail. 77 */ 78 skb_reserve(skb, head_size); 79 skb_put(skb, frame_size); 80 81 /* 82 * Populate skbdesc. 83 */ 84 skbdesc = get_skb_frame_desc(skb); 85 memset(skbdesc, 0, sizeof(*skbdesc)); 86 87 if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_DMA)) { 88 dma_addr_t skb_dma; 89 90 skb_dma = dma_map_single(rt2x00dev->dev, skb->data, skb->len, 91 DMA_FROM_DEVICE); 92 if (unlikely(dma_mapping_error(rt2x00dev->dev, skb_dma))) { 93 dev_kfree_skb_any(skb); 94 return NULL; 95 } 96 97 skbdesc->skb_dma = skb_dma; 98 skbdesc->flags |= SKBDESC_DMA_MAPPED_RX; 99 } 100 101 return skb; 102 } 103 104 int rt2x00queue_map_txskb(struct queue_entry *entry) 105 { 106 struct device *dev = entry->queue->rt2x00dev->dev; 107 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); 108 109 skbdesc->skb_dma = 110 dma_map_single(dev, entry->skb->data, entry->skb->len, DMA_TO_DEVICE); 111 112 if (unlikely(dma_mapping_error(dev, skbdesc->skb_dma))) 113 return -ENOMEM; 114 115 skbdesc->flags |= SKBDESC_DMA_MAPPED_TX; 116 return 0; 117 } 118 EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb); 119 120 void rt2x00queue_unmap_skb(struct queue_entry *entry) 121 { 122 struct device *dev = entry->queue->rt2x00dev->dev; 123 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); 124 125 if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) { 126 dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len, 127 DMA_FROM_DEVICE); 128 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX; 129 } else if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) { 130 dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len, 131 DMA_TO_DEVICE); 132 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX; 133 } 134 } 135 EXPORT_SYMBOL_GPL(rt2x00queue_unmap_skb); 136 137 void rt2x00queue_free_skb(struct queue_entry *entry) 138 { 139 if (!entry->skb) 140 return; 141 142 rt2x00queue_unmap_skb(entry); 143 dev_kfree_skb_any(entry->skb); 144 entry->skb = NULL; 145 } 146 147 void rt2x00queue_align_frame(struct sk_buff *skb) 148 { 149 unsigned int frame_length = skb->len; 150 unsigned int align = ALIGN_SIZE(skb, 0); 151 152 if (!align) 153 return; 154 155 skb_push(skb, align); 156 memmove(skb->data, skb->data + align, frame_length); 157 skb_trim(skb, frame_length); 158 } 159 160 /* 161 * H/W needs L2 padding between the header and the paylod if header size 162 * is not 4 bytes aligned. 163 */ 164 void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int hdr_len) 165 { 166 unsigned int l2pad = (skb->len > hdr_len) ? L2PAD_SIZE(hdr_len) : 0; 167 168 if (!l2pad) 169 return; 170 171 skb_push(skb, l2pad); 172 memmove(skb->data, skb->data + l2pad, hdr_len); 173 } 174 175 void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int hdr_len) 176 { 177 unsigned int l2pad = (skb->len > hdr_len) ? L2PAD_SIZE(hdr_len) : 0; 178 179 if (!l2pad) 180 return; 181 182 memmove(skb->data + l2pad, skb->data, hdr_len); 183 skb_pull(skb, l2pad); 184 } 185 186 static void rt2x00queue_create_tx_descriptor_seq(struct rt2x00_dev *rt2x00dev, 187 struct sk_buff *skb, 188 struct txentry_desc *txdesc) 189 { 190 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 191 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 192 struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif); 193 u16 seqno; 194 195 if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ)) 196 return; 197 198 __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags); 199 200 if (!rt2x00_has_cap_flag(rt2x00dev, REQUIRE_SW_SEQNO)) { 201 /* 202 * rt2800 has a H/W (or F/W) bug, device incorrectly increase 203 * seqno on retransmited data (non-QOS) frames. To workaround 204 * the problem let's generate seqno in software if QOS is 205 * disabled. 206 */ 207 if (test_bit(CONFIG_QOS_DISABLED, &rt2x00dev->flags)) 208 __clear_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags); 209 else 210 /* H/W will generate sequence number */ 211 return; 212 } 213 214 /* 215 * The hardware is not able to insert a sequence number. Assign a 216 * software generated one here. 217 * 218 * This is wrong because beacons are not getting sequence 219 * numbers assigned properly. 220 * 221 * A secondary problem exists for drivers that cannot toggle 222 * sequence counting per-frame, since those will override the 223 * sequence counter given by mac80211. 224 */ 225 if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags)) 226 seqno = atomic_add_return(0x10, &intf->seqno); 227 else 228 seqno = atomic_read(&intf->seqno); 229 230 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); 231 hdr->seq_ctrl |= cpu_to_le16(seqno); 232 } 233 234 static void rt2x00queue_create_tx_descriptor_plcp(struct rt2x00_dev *rt2x00dev, 235 struct sk_buff *skb, 236 struct txentry_desc *txdesc, 237 const struct rt2x00_rate *hwrate) 238 { 239 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 240 struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0]; 241 unsigned int data_length; 242 unsigned int duration; 243 unsigned int residual; 244 245 /* 246 * Determine with what IFS priority this frame should be send. 247 * Set ifs to IFS_SIFS when the this is not the first fragment, 248 * or this fragment came after RTS/CTS. 249 */ 250 if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags)) 251 txdesc->u.plcp.ifs = IFS_BACKOFF; 252 else 253 txdesc->u.plcp.ifs = IFS_SIFS; 254 255 /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */ 256 data_length = skb->len + 4; 257 data_length += rt2x00crypto_tx_overhead(rt2x00dev, skb); 258 259 /* 260 * PLCP setup 261 * Length calculation depends on OFDM/CCK rate. 262 */ 263 txdesc->u.plcp.signal = hwrate->plcp; 264 txdesc->u.plcp.service = 0x04; 265 266 if (hwrate->flags & DEV_RATE_OFDM) { 267 txdesc->u.plcp.length_high = (data_length >> 6) & 0x3f; 268 txdesc->u.plcp.length_low = data_length & 0x3f; 269 } else { 270 /* 271 * Convert length to microseconds. 272 */ 273 residual = GET_DURATION_RES(data_length, hwrate->bitrate); 274 duration = GET_DURATION(data_length, hwrate->bitrate); 275 276 if (residual != 0) { 277 duration++; 278 279 /* 280 * Check if we need to set the Length Extension 281 */ 282 if (hwrate->bitrate == 110 && residual <= 30) 283 txdesc->u.plcp.service |= 0x80; 284 } 285 286 txdesc->u.plcp.length_high = (duration >> 8) & 0xff; 287 txdesc->u.plcp.length_low = duration & 0xff; 288 289 /* 290 * When preamble is enabled we should set the 291 * preamble bit for the signal. 292 */ 293 if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) 294 txdesc->u.plcp.signal |= 0x08; 295 } 296 } 297 298 static void rt2x00queue_create_tx_descriptor_ht(struct rt2x00_dev *rt2x00dev, 299 struct sk_buff *skb, 300 struct txentry_desc *txdesc, 301 struct ieee80211_sta *sta, 302 const struct rt2x00_rate *hwrate) 303 { 304 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 305 struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0]; 306 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 307 struct rt2x00_sta *sta_priv = NULL; 308 u8 density = 0; 309 310 if (sta) { 311 sta_priv = sta_to_rt2x00_sta(sta); 312 txdesc->u.ht.wcid = sta_priv->wcid; 313 density = sta->ht_cap.ampdu_density; 314 } 315 316 /* 317 * If IEEE80211_TX_RC_MCS is set txrate->idx just contains the 318 * mcs rate to be used 319 */ 320 if (txrate->flags & IEEE80211_TX_RC_MCS) { 321 txdesc->u.ht.mcs = txrate->idx; 322 323 /* 324 * MIMO PS should be set to 1 for STA's using dynamic SM PS 325 * when using more then one tx stream (>MCS7). 326 */ 327 if (sta && txdesc->u.ht.mcs > 7 && 328 sta->smps_mode == IEEE80211_SMPS_DYNAMIC) 329 __set_bit(ENTRY_TXD_HT_MIMO_PS, &txdesc->flags); 330 } else { 331 txdesc->u.ht.mcs = rt2x00_get_rate_mcs(hwrate->mcs); 332 if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) 333 txdesc->u.ht.mcs |= 0x08; 334 } 335 336 if (test_bit(CONFIG_HT_DISABLED, &rt2x00dev->flags)) { 337 if (!(tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)) 338 txdesc->u.ht.txop = TXOP_SIFS; 339 else 340 txdesc->u.ht.txop = TXOP_BACKOFF; 341 342 /* Left zero on all other settings. */ 343 return; 344 } 345 346 /* 347 * Only one STBC stream is supported for now. 348 */ 349 if (tx_info->flags & IEEE80211_TX_CTL_STBC) 350 txdesc->u.ht.stbc = 1; 351 352 /* 353 * This frame is eligible for an AMPDU, however, don't aggregate 354 * frames that are intended to probe a specific tx rate. 355 */ 356 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU && 357 !(tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)) { 358 __set_bit(ENTRY_TXD_HT_AMPDU, &txdesc->flags); 359 txdesc->u.ht.mpdu_density = density; 360 txdesc->u.ht.ba_size = 7; /* FIXME: What value is needed? */ 361 } 362 363 /* 364 * Set 40Mhz mode if necessary (for legacy rates this will 365 * duplicate the frame to both channels). 366 */ 367 if (txrate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH || 368 txrate->flags & IEEE80211_TX_RC_DUP_DATA) 369 __set_bit(ENTRY_TXD_HT_BW_40, &txdesc->flags); 370 if (txrate->flags & IEEE80211_TX_RC_SHORT_GI) 371 __set_bit(ENTRY_TXD_HT_SHORT_GI, &txdesc->flags); 372 373 /* 374 * Determine IFS values 375 * - Use TXOP_BACKOFF for probe and management frames except beacons 376 * - Use TXOP_SIFS for fragment bursts 377 * - Use TXOP_HTTXOP for everything else 378 * 379 * Note: rt2800 devices won't use CTS protection (if used) 380 * for frames not transmitted with TXOP_HTTXOP 381 */ 382 if ((ieee80211_is_mgmt(hdr->frame_control) && 383 !ieee80211_is_beacon(hdr->frame_control)) || 384 (tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)) 385 txdesc->u.ht.txop = TXOP_BACKOFF; 386 else if (!(tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)) 387 txdesc->u.ht.txop = TXOP_SIFS; 388 else 389 txdesc->u.ht.txop = TXOP_HTTXOP; 390 } 391 392 static void rt2x00queue_create_tx_descriptor(struct rt2x00_dev *rt2x00dev, 393 struct sk_buff *skb, 394 struct txentry_desc *txdesc, 395 struct ieee80211_sta *sta) 396 { 397 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 398 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 399 struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0]; 400 struct ieee80211_rate *rate; 401 const struct rt2x00_rate *hwrate = NULL; 402 403 memset(txdesc, 0, sizeof(*txdesc)); 404 405 /* 406 * Header and frame information. 407 */ 408 txdesc->length = skb->len; 409 txdesc->header_length = ieee80211_get_hdrlen_from_skb(skb); 410 411 /* 412 * Check whether this frame is to be acked. 413 */ 414 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK)) 415 __set_bit(ENTRY_TXD_ACK, &txdesc->flags); 416 417 /* 418 * Check if this is a RTS/CTS frame 419 */ 420 if (ieee80211_is_rts(hdr->frame_control) || 421 ieee80211_is_cts(hdr->frame_control)) { 422 __set_bit(ENTRY_TXD_BURST, &txdesc->flags); 423 if (ieee80211_is_rts(hdr->frame_control)) 424 __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags); 425 else 426 __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags); 427 if (tx_info->control.rts_cts_rate_idx >= 0) 428 rate = 429 ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info); 430 } 431 432 /* 433 * Determine retry information. 434 */ 435 txdesc->retry_limit = tx_info->control.rates[0].count - 1; 436 if (txdesc->retry_limit >= rt2x00dev->long_retry) 437 __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags); 438 439 /* 440 * Check if more fragments are pending 441 */ 442 if (ieee80211_has_morefrags(hdr->frame_control)) { 443 __set_bit(ENTRY_TXD_BURST, &txdesc->flags); 444 __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags); 445 } 446 447 /* 448 * Check if more frames (!= fragments) are pending 449 */ 450 if (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES) 451 __set_bit(ENTRY_TXD_BURST, &txdesc->flags); 452 453 /* 454 * Beacons and probe responses require the tsf timestamp 455 * to be inserted into the frame. 456 */ 457 if (ieee80211_is_beacon(hdr->frame_control) || 458 ieee80211_is_probe_resp(hdr->frame_control)) 459 __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags); 460 461 if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) && 462 !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) 463 __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags); 464 465 /* 466 * Determine rate modulation. 467 */ 468 if (txrate->flags & IEEE80211_TX_RC_GREEN_FIELD) 469 txdesc->rate_mode = RATE_MODE_HT_GREENFIELD; 470 else if (txrate->flags & IEEE80211_TX_RC_MCS) 471 txdesc->rate_mode = RATE_MODE_HT_MIX; 472 else { 473 rate = ieee80211_get_tx_rate(rt2x00dev->hw, tx_info); 474 hwrate = rt2x00_get_rate(rate->hw_value); 475 if (hwrate->flags & DEV_RATE_OFDM) 476 txdesc->rate_mode = RATE_MODE_OFDM; 477 else 478 txdesc->rate_mode = RATE_MODE_CCK; 479 } 480 481 /* 482 * Apply TX descriptor handling by components 483 */ 484 rt2x00crypto_create_tx_descriptor(rt2x00dev, skb, txdesc); 485 rt2x00queue_create_tx_descriptor_seq(rt2x00dev, skb, txdesc); 486 487 if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_HT_TX_DESC)) 488 rt2x00queue_create_tx_descriptor_ht(rt2x00dev, skb, txdesc, 489 sta, hwrate); 490 else 491 rt2x00queue_create_tx_descriptor_plcp(rt2x00dev, skb, txdesc, 492 hwrate); 493 } 494 495 static int rt2x00queue_write_tx_data(struct queue_entry *entry, 496 struct txentry_desc *txdesc) 497 { 498 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; 499 500 /* 501 * This should not happen, we already checked the entry 502 * was ours. When the hardware disagrees there has been 503 * a queue corruption! 504 */ 505 if (unlikely(rt2x00dev->ops->lib->get_entry_state && 506 rt2x00dev->ops->lib->get_entry_state(entry))) { 507 rt2x00_err(rt2x00dev, 508 "Corrupt queue %d, accessing entry which is not ours\n" 509 "Please file bug report to %s\n", 510 entry->queue->qid, DRV_PROJECT); 511 return -EINVAL; 512 } 513 514 /* 515 * Add the requested extra tx headroom in front of the skb. 516 */ 517 skb_push(entry->skb, rt2x00dev->extra_tx_headroom); 518 memset(entry->skb->data, 0, rt2x00dev->extra_tx_headroom); 519 520 /* 521 * Call the driver's write_tx_data function, if it exists. 522 */ 523 if (rt2x00dev->ops->lib->write_tx_data) 524 rt2x00dev->ops->lib->write_tx_data(entry, txdesc); 525 526 /* 527 * Map the skb to DMA. 528 */ 529 if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_DMA) && 530 rt2x00queue_map_txskb(entry)) 531 return -ENOMEM; 532 533 return 0; 534 } 535 536 static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry, 537 struct txentry_desc *txdesc) 538 { 539 struct data_queue *queue = entry->queue; 540 541 queue->rt2x00dev->ops->lib->write_tx_desc(entry, txdesc); 542 543 /* 544 * All processing on the frame has been completed, this means 545 * it is now ready to be dumped to userspace through debugfs. 546 */ 547 rt2x00debug_dump_frame(queue->rt2x00dev, DUMP_FRAME_TX, entry); 548 } 549 550 static void rt2x00queue_kick_tx_queue(struct data_queue *queue, 551 struct txentry_desc *txdesc) 552 { 553 /* 554 * Check if we need to kick the queue, there are however a few rules 555 * 1) Don't kick unless this is the last in frame in a burst. 556 * When the burst flag is set, this frame is always followed 557 * by another frame which in some way are related to eachother. 558 * This is true for fragments, RTS or CTS-to-self frames. 559 * 2) Rule 1 can be broken when the available entries 560 * in the queue are less then a certain threshold. 561 */ 562 if (rt2x00queue_threshold(queue) || 563 !test_bit(ENTRY_TXD_BURST, &txdesc->flags)) 564 queue->rt2x00dev->ops->lib->kick_queue(queue); 565 } 566 567 static void rt2x00queue_bar_check(struct queue_entry *entry) 568 { 569 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; 570 struct ieee80211_bar *bar = (void *) (entry->skb->data + 571 rt2x00dev->extra_tx_headroom); 572 struct rt2x00_bar_list_entry *bar_entry; 573 574 if (likely(!ieee80211_is_back_req(bar->frame_control))) 575 return; 576 577 bar_entry = kmalloc(sizeof(*bar_entry), GFP_ATOMIC); 578 579 /* 580 * If the alloc fails we still send the BAR out but just don't track 581 * it in our bar list. And as a result we will report it to mac80211 582 * back as failed. 583 */ 584 if (!bar_entry) 585 return; 586 587 bar_entry->entry = entry; 588 bar_entry->block_acked = 0; 589 590 /* 591 * Copy the relevant parts of the 802.11 BAR into out check list 592 * such that we can use RCU for less-overhead in the RX path since 593 * sending BARs and processing the according BlockAck should be 594 * the exception. 595 */ 596 memcpy(bar_entry->ra, bar->ra, sizeof(bar->ra)); 597 memcpy(bar_entry->ta, bar->ta, sizeof(bar->ta)); 598 bar_entry->control = bar->control; 599 bar_entry->start_seq_num = bar->start_seq_num; 600 601 /* 602 * Insert BAR into our BAR check list. 603 */ 604 spin_lock_bh(&rt2x00dev->bar_list_lock); 605 list_add_tail_rcu(&bar_entry->list, &rt2x00dev->bar_list); 606 spin_unlock_bh(&rt2x00dev->bar_list_lock); 607 } 608 609 int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb, 610 struct ieee80211_sta *sta, bool local) 611 { 612 struct ieee80211_tx_info *tx_info; 613 struct queue_entry *entry; 614 struct txentry_desc txdesc; 615 struct skb_frame_desc *skbdesc; 616 u8 rate_idx, rate_flags; 617 int ret = 0; 618 619 /* 620 * Copy all TX descriptor information into txdesc, 621 * after that we are free to use the skb->cb array 622 * for our information. 623 */ 624 rt2x00queue_create_tx_descriptor(queue->rt2x00dev, skb, &txdesc, sta); 625 626 /* 627 * All information is retrieved from the skb->cb array, 628 * now we should claim ownership of the driver part of that 629 * array, preserving the bitrate index and flags. 630 */ 631 tx_info = IEEE80211_SKB_CB(skb); 632 rate_idx = tx_info->control.rates[0].idx; 633 rate_flags = tx_info->control.rates[0].flags; 634 skbdesc = get_skb_frame_desc(skb); 635 memset(skbdesc, 0, sizeof(*skbdesc)); 636 skbdesc->tx_rate_idx = rate_idx; 637 skbdesc->tx_rate_flags = rate_flags; 638 639 if (local) 640 skbdesc->flags |= SKBDESC_NOT_MAC80211; 641 642 /* 643 * When hardware encryption is supported, and this frame 644 * is to be encrypted, we should strip the IV/EIV data from 645 * the frame so we can provide it to the driver separately. 646 */ 647 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) && 648 !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) { 649 if (rt2x00_has_cap_flag(queue->rt2x00dev, REQUIRE_COPY_IV)) 650 rt2x00crypto_tx_copy_iv(skb, &txdesc); 651 else 652 rt2x00crypto_tx_remove_iv(skb, &txdesc); 653 } 654 655 /* 656 * When DMA allocation is required we should guarantee to the 657 * driver that the DMA is aligned to a 4-byte boundary. 658 * However some drivers require L2 padding to pad the payload 659 * rather then the header. This could be a requirement for 660 * PCI and USB devices, while header alignment only is valid 661 * for PCI devices. 662 */ 663 if (rt2x00_has_cap_flag(queue->rt2x00dev, REQUIRE_L2PAD)) 664 rt2x00queue_insert_l2pad(skb, txdesc.header_length); 665 else if (rt2x00_has_cap_flag(queue->rt2x00dev, REQUIRE_DMA)) 666 rt2x00queue_align_frame(skb); 667 668 /* 669 * That function must be called with bh disabled. 670 */ 671 spin_lock(&queue->tx_lock); 672 673 if (unlikely(rt2x00queue_full(queue))) { 674 rt2x00_err(queue->rt2x00dev, "Dropping frame due to full tx queue %d\n", 675 queue->qid); 676 ret = -ENOBUFS; 677 goto out; 678 } 679 680 entry = rt2x00queue_get_entry(queue, Q_INDEX); 681 682 if (unlikely(test_and_set_bit(ENTRY_OWNER_DEVICE_DATA, 683 &entry->flags))) { 684 rt2x00_err(queue->rt2x00dev, 685 "Arrived at non-free entry in the non-full queue %d\n" 686 "Please file bug report to %s\n", 687 queue->qid, DRV_PROJECT); 688 ret = -EINVAL; 689 goto out; 690 } 691 692 entry->skb = skb; 693 694 /* 695 * It could be possible that the queue was corrupted and this 696 * call failed. Since we always return NETDEV_TX_OK to mac80211, 697 * this frame will simply be dropped. 698 */ 699 if (unlikely(rt2x00queue_write_tx_data(entry, &txdesc))) { 700 clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags); 701 entry->skb = NULL; 702 ret = -EIO; 703 goto out; 704 } 705 706 /* 707 * Put BlockAckReqs into our check list for driver BA processing. 708 */ 709 rt2x00queue_bar_check(entry); 710 711 set_bit(ENTRY_DATA_PENDING, &entry->flags); 712 713 rt2x00queue_index_inc(entry, Q_INDEX); 714 rt2x00queue_write_tx_descriptor(entry, &txdesc); 715 rt2x00queue_kick_tx_queue(queue, &txdesc); 716 717 out: 718 spin_unlock(&queue->tx_lock); 719 return ret; 720 } 721 722 int rt2x00queue_clear_beacon(struct rt2x00_dev *rt2x00dev, 723 struct ieee80211_vif *vif) 724 { 725 struct rt2x00_intf *intf = vif_to_intf(vif); 726 727 if (unlikely(!intf->beacon)) 728 return -ENOBUFS; 729 730 /* 731 * Clean up the beacon skb. 732 */ 733 rt2x00queue_free_skb(intf->beacon); 734 735 /* 736 * Clear beacon (single bssid devices don't need to clear the beacon 737 * since the beacon queue will get stopped anyway). 738 */ 739 if (rt2x00dev->ops->lib->clear_beacon) 740 rt2x00dev->ops->lib->clear_beacon(intf->beacon); 741 742 return 0; 743 } 744 745 int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev, 746 struct ieee80211_vif *vif) 747 { 748 struct rt2x00_intf *intf = vif_to_intf(vif); 749 struct skb_frame_desc *skbdesc; 750 struct txentry_desc txdesc; 751 752 if (unlikely(!intf->beacon)) 753 return -ENOBUFS; 754 755 /* 756 * Clean up the beacon skb. 757 */ 758 rt2x00queue_free_skb(intf->beacon); 759 760 intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif); 761 if (!intf->beacon->skb) 762 return -ENOMEM; 763 764 /* 765 * Copy all TX descriptor information into txdesc, 766 * after that we are free to use the skb->cb array 767 * for our information. 768 */ 769 rt2x00queue_create_tx_descriptor(rt2x00dev, intf->beacon->skb, &txdesc, NULL); 770 771 /* 772 * Fill in skb descriptor 773 */ 774 skbdesc = get_skb_frame_desc(intf->beacon->skb); 775 memset(skbdesc, 0, sizeof(*skbdesc)); 776 777 /* 778 * Send beacon to hardware. 779 */ 780 rt2x00dev->ops->lib->write_beacon(intf->beacon, &txdesc); 781 782 return 0; 783 784 } 785 786 bool rt2x00queue_for_each_entry(struct data_queue *queue, 787 enum queue_index start, 788 enum queue_index end, 789 void *data, 790 bool (*fn)(struct queue_entry *entry, 791 void *data)) 792 { 793 unsigned long irqflags; 794 unsigned int index_start; 795 unsigned int index_end; 796 unsigned int i; 797 798 if (unlikely(start >= Q_INDEX_MAX || end >= Q_INDEX_MAX)) { 799 rt2x00_err(queue->rt2x00dev, 800 "Entry requested from invalid index range (%d - %d)\n", 801 start, end); 802 return true; 803 } 804 805 /* 806 * Only protect the range we are going to loop over, 807 * if during our loop a extra entry is set to pending 808 * it should not be kicked during this run, since it 809 * is part of another TX operation. 810 */ 811 spin_lock_irqsave(&queue->index_lock, irqflags); 812 index_start = queue->index[start]; 813 index_end = queue->index[end]; 814 spin_unlock_irqrestore(&queue->index_lock, irqflags); 815 816 /* 817 * Start from the TX done pointer, this guarantees that we will 818 * send out all frames in the correct order. 819 */ 820 if (index_start < index_end) { 821 for (i = index_start; i < index_end; i++) { 822 if (fn(&queue->entries[i], data)) 823 return true; 824 } 825 } else { 826 for (i = index_start; i < queue->limit; i++) { 827 if (fn(&queue->entries[i], data)) 828 return true; 829 } 830 831 for (i = 0; i < index_end; i++) { 832 if (fn(&queue->entries[i], data)) 833 return true; 834 } 835 } 836 837 return false; 838 } 839 EXPORT_SYMBOL_GPL(rt2x00queue_for_each_entry); 840 841 struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue, 842 enum queue_index index) 843 { 844 struct queue_entry *entry; 845 unsigned long irqflags; 846 847 if (unlikely(index >= Q_INDEX_MAX)) { 848 rt2x00_err(queue->rt2x00dev, "Entry requested from invalid index type (%d)\n", 849 index); 850 return NULL; 851 } 852 853 spin_lock_irqsave(&queue->index_lock, irqflags); 854 855 entry = &queue->entries[queue->index[index]]; 856 857 spin_unlock_irqrestore(&queue->index_lock, irqflags); 858 859 return entry; 860 } 861 EXPORT_SYMBOL_GPL(rt2x00queue_get_entry); 862 863 void rt2x00queue_index_inc(struct queue_entry *entry, enum queue_index index) 864 { 865 struct data_queue *queue = entry->queue; 866 unsigned long irqflags; 867 868 if (unlikely(index >= Q_INDEX_MAX)) { 869 rt2x00_err(queue->rt2x00dev, 870 "Index change on invalid index type (%d)\n", index); 871 return; 872 } 873 874 spin_lock_irqsave(&queue->index_lock, irqflags); 875 876 queue->index[index]++; 877 if (queue->index[index] >= queue->limit) 878 queue->index[index] = 0; 879 880 entry->last_action = jiffies; 881 882 if (index == Q_INDEX) { 883 queue->length++; 884 } else if (index == Q_INDEX_DONE) { 885 queue->length--; 886 queue->count++; 887 } 888 889 spin_unlock_irqrestore(&queue->index_lock, irqflags); 890 } 891 892 static void rt2x00queue_pause_queue_nocheck(struct data_queue *queue) 893 { 894 switch (queue->qid) { 895 case QID_AC_VO: 896 case QID_AC_VI: 897 case QID_AC_BE: 898 case QID_AC_BK: 899 /* 900 * For TX queues, we have to disable the queue 901 * inside mac80211. 902 */ 903 ieee80211_stop_queue(queue->rt2x00dev->hw, queue->qid); 904 break; 905 default: 906 break; 907 } 908 } 909 void rt2x00queue_pause_queue(struct data_queue *queue) 910 { 911 if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) || 912 !test_bit(QUEUE_STARTED, &queue->flags) || 913 test_and_set_bit(QUEUE_PAUSED, &queue->flags)) 914 return; 915 916 rt2x00queue_pause_queue_nocheck(queue); 917 } 918 EXPORT_SYMBOL_GPL(rt2x00queue_pause_queue); 919 920 void rt2x00queue_unpause_queue(struct data_queue *queue) 921 { 922 if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) || 923 !test_bit(QUEUE_STARTED, &queue->flags) || 924 !test_and_clear_bit(QUEUE_PAUSED, &queue->flags)) 925 return; 926 927 switch (queue->qid) { 928 case QID_AC_VO: 929 case QID_AC_VI: 930 case QID_AC_BE: 931 case QID_AC_BK: 932 /* 933 * For TX queues, we have to enable the queue 934 * inside mac80211. 935 */ 936 ieee80211_wake_queue(queue->rt2x00dev->hw, queue->qid); 937 break; 938 case QID_RX: 939 /* 940 * For RX we need to kick the queue now in order to 941 * receive frames. 942 */ 943 queue->rt2x00dev->ops->lib->kick_queue(queue); 944 default: 945 break; 946 } 947 } 948 EXPORT_SYMBOL_GPL(rt2x00queue_unpause_queue); 949 950 void rt2x00queue_start_queue(struct data_queue *queue) 951 { 952 mutex_lock(&queue->status_lock); 953 954 if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) || 955 test_and_set_bit(QUEUE_STARTED, &queue->flags)) { 956 mutex_unlock(&queue->status_lock); 957 return; 958 } 959 960 set_bit(QUEUE_PAUSED, &queue->flags); 961 962 queue->rt2x00dev->ops->lib->start_queue(queue); 963 964 rt2x00queue_unpause_queue(queue); 965 966 mutex_unlock(&queue->status_lock); 967 } 968 EXPORT_SYMBOL_GPL(rt2x00queue_start_queue); 969 970 void rt2x00queue_stop_queue(struct data_queue *queue) 971 { 972 mutex_lock(&queue->status_lock); 973 974 if (!test_and_clear_bit(QUEUE_STARTED, &queue->flags)) { 975 mutex_unlock(&queue->status_lock); 976 return; 977 } 978 979 rt2x00queue_pause_queue_nocheck(queue); 980 981 queue->rt2x00dev->ops->lib->stop_queue(queue); 982 983 mutex_unlock(&queue->status_lock); 984 } 985 EXPORT_SYMBOL_GPL(rt2x00queue_stop_queue); 986 987 void rt2x00queue_flush_queue(struct data_queue *queue, bool drop) 988 { 989 bool tx_queue = 990 (queue->qid == QID_AC_VO) || 991 (queue->qid == QID_AC_VI) || 992 (queue->qid == QID_AC_BE) || 993 (queue->qid == QID_AC_BK); 994 995 996 /* 997 * If we are not supposed to drop any pending 998 * frames, this means we must force a start (=kick) 999 * to the queue to make sure the hardware will 1000 * start transmitting. 1001 */ 1002 if (!drop && tx_queue) 1003 queue->rt2x00dev->ops->lib->kick_queue(queue); 1004 1005 /* 1006 * Check if driver supports flushing, if that is the case we can 1007 * defer the flushing to the driver. Otherwise we must use the 1008 * alternative which just waits for the queue to become empty. 1009 */ 1010 if (likely(queue->rt2x00dev->ops->lib->flush_queue)) 1011 queue->rt2x00dev->ops->lib->flush_queue(queue, drop); 1012 1013 /* 1014 * The queue flush has failed... 1015 */ 1016 if (unlikely(!rt2x00queue_empty(queue))) 1017 rt2x00_warn(queue->rt2x00dev, "Queue %d failed to flush\n", 1018 queue->qid); 1019 } 1020 EXPORT_SYMBOL_GPL(rt2x00queue_flush_queue); 1021 1022 void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev) 1023 { 1024 struct data_queue *queue; 1025 1026 /* 1027 * rt2x00queue_start_queue will call ieee80211_wake_queue 1028 * for each queue after is has been properly initialized. 1029 */ 1030 tx_queue_for_each(rt2x00dev, queue) 1031 rt2x00queue_start_queue(queue); 1032 1033 rt2x00queue_start_queue(rt2x00dev->rx); 1034 } 1035 EXPORT_SYMBOL_GPL(rt2x00queue_start_queues); 1036 1037 void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev) 1038 { 1039 struct data_queue *queue; 1040 1041 /* 1042 * rt2x00queue_stop_queue will call ieee80211_stop_queue 1043 * as well, but we are completely shutting doing everything 1044 * now, so it is much safer to stop all TX queues at once, 1045 * and use rt2x00queue_stop_queue for cleaning up. 1046 */ 1047 ieee80211_stop_queues(rt2x00dev->hw); 1048 1049 tx_queue_for_each(rt2x00dev, queue) 1050 rt2x00queue_stop_queue(queue); 1051 1052 rt2x00queue_stop_queue(rt2x00dev->rx); 1053 } 1054 EXPORT_SYMBOL_GPL(rt2x00queue_stop_queues); 1055 1056 void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop) 1057 { 1058 struct data_queue *queue; 1059 1060 tx_queue_for_each(rt2x00dev, queue) 1061 rt2x00queue_flush_queue(queue, drop); 1062 1063 rt2x00queue_flush_queue(rt2x00dev->rx, drop); 1064 } 1065 EXPORT_SYMBOL_GPL(rt2x00queue_flush_queues); 1066 1067 static void rt2x00queue_reset(struct data_queue *queue) 1068 { 1069 unsigned long irqflags; 1070 unsigned int i; 1071 1072 spin_lock_irqsave(&queue->index_lock, irqflags); 1073 1074 queue->count = 0; 1075 queue->length = 0; 1076 1077 for (i = 0; i < Q_INDEX_MAX; i++) 1078 queue->index[i] = 0; 1079 1080 spin_unlock_irqrestore(&queue->index_lock, irqflags); 1081 } 1082 1083 void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev) 1084 { 1085 struct data_queue *queue; 1086 unsigned int i; 1087 1088 queue_for_each(rt2x00dev, queue) { 1089 rt2x00queue_reset(queue); 1090 1091 for (i = 0; i < queue->limit; i++) 1092 rt2x00dev->ops->lib->clear_entry(&queue->entries[i]); 1093 } 1094 } 1095 1096 static int rt2x00queue_alloc_entries(struct data_queue *queue) 1097 { 1098 struct queue_entry *entries; 1099 unsigned int entry_size; 1100 unsigned int i; 1101 1102 rt2x00queue_reset(queue); 1103 1104 /* 1105 * Allocate all queue entries. 1106 */ 1107 entry_size = sizeof(*entries) + queue->priv_size; 1108 entries = kcalloc(queue->limit, entry_size, GFP_KERNEL); 1109 if (!entries) 1110 return -ENOMEM; 1111 1112 #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \ 1113 (((char *)(__base)) + ((__limit) * (__esize)) + \ 1114 ((__index) * (__psize))) 1115 1116 for (i = 0; i < queue->limit; i++) { 1117 entries[i].flags = 0; 1118 entries[i].queue = queue; 1119 entries[i].skb = NULL; 1120 entries[i].entry_idx = i; 1121 entries[i].priv_data = 1122 QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit, 1123 sizeof(*entries), queue->priv_size); 1124 } 1125 1126 #undef QUEUE_ENTRY_PRIV_OFFSET 1127 1128 queue->entries = entries; 1129 1130 return 0; 1131 } 1132 1133 static void rt2x00queue_free_skbs(struct data_queue *queue) 1134 { 1135 unsigned int i; 1136 1137 if (!queue->entries) 1138 return; 1139 1140 for (i = 0; i < queue->limit; i++) { 1141 rt2x00queue_free_skb(&queue->entries[i]); 1142 } 1143 } 1144 1145 static int rt2x00queue_alloc_rxskbs(struct data_queue *queue) 1146 { 1147 unsigned int i; 1148 struct sk_buff *skb; 1149 1150 for (i = 0; i < queue->limit; i++) { 1151 skb = rt2x00queue_alloc_rxskb(&queue->entries[i], GFP_KERNEL); 1152 if (!skb) 1153 return -ENOMEM; 1154 queue->entries[i].skb = skb; 1155 } 1156 1157 return 0; 1158 } 1159 1160 int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev) 1161 { 1162 struct data_queue *queue; 1163 int status; 1164 1165 status = rt2x00queue_alloc_entries(rt2x00dev->rx); 1166 if (status) 1167 goto exit; 1168 1169 tx_queue_for_each(rt2x00dev, queue) { 1170 status = rt2x00queue_alloc_entries(queue); 1171 if (status) 1172 goto exit; 1173 } 1174 1175 status = rt2x00queue_alloc_entries(rt2x00dev->bcn); 1176 if (status) 1177 goto exit; 1178 1179 if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_ATIM_QUEUE)) { 1180 status = rt2x00queue_alloc_entries(rt2x00dev->atim); 1181 if (status) 1182 goto exit; 1183 } 1184 1185 status = rt2x00queue_alloc_rxskbs(rt2x00dev->rx); 1186 if (status) 1187 goto exit; 1188 1189 return 0; 1190 1191 exit: 1192 rt2x00_err(rt2x00dev, "Queue entries allocation failed\n"); 1193 1194 rt2x00queue_uninitialize(rt2x00dev); 1195 1196 return status; 1197 } 1198 1199 void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev) 1200 { 1201 struct data_queue *queue; 1202 1203 rt2x00queue_free_skbs(rt2x00dev->rx); 1204 1205 queue_for_each(rt2x00dev, queue) { 1206 kfree(queue->entries); 1207 queue->entries = NULL; 1208 } 1209 } 1210 1211 static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev, 1212 struct data_queue *queue, enum data_queue_qid qid) 1213 { 1214 mutex_init(&queue->status_lock); 1215 spin_lock_init(&queue->tx_lock); 1216 spin_lock_init(&queue->index_lock); 1217 1218 queue->rt2x00dev = rt2x00dev; 1219 queue->qid = qid; 1220 queue->txop = 0; 1221 queue->aifs = 2; 1222 queue->cw_min = 5; 1223 queue->cw_max = 10; 1224 1225 rt2x00dev->ops->queue_init(queue); 1226 1227 queue->threshold = DIV_ROUND_UP(queue->limit, 10); 1228 } 1229 1230 int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev) 1231 { 1232 struct data_queue *queue; 1233 enum data_queue_qid qid; 1234 unsigned int req_atim = 1235 rt2x00_has_cap_flag(rt2x00dev, REQUIRE_ATIM_QUEUE); 1236 1237 /* 1238 * We need the following queues: 1239 * RX: 1 1240 * TX: ops->tx_queues 1241 * Beacon: 1 1242 * Atim: 1 (if required) 1243 */ 1244 rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim; 1245 1246 queue = kcalloc(rt2x00dev->data_queues, sizeof(*queue), GFP_KERNEL); 1247 if (!queue) { 1248 rt2x00_err(rt2x00dev, "Queue allocation failed\n"); 1249 return -ENOMEM; 1250 } 1251 1252 /* 1253 * Initialize pointers 1254 */ 1255 rt2x00dev->rx = queue; 1256 rt2x00dev->tx = &queue[1]; 1257 rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues]; 1258 rt2x00dev->atim = req_atim ? &queue[2 + rt2x00dev->ops->tx_queues] : NULL; 1259 1260 /* 1261 * Initialize queue parameters. 1262 * RX: qid = QID_RX 1263 * TX: qid = QID_AC_VO + index 1264 * TX: cw_min: 2^5 = 32. 1265 * TX: cw_max: 2^10 = 1024. 1266 * BCN: qid = QID_BEACON 1267 * ATIM: qid = QID_ATIM 1268 */ 1269 rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX); 1270 1271 qid = QID_AC_VO; 1272 tx_queue_for_each(rt2x00dev, queue) 1273 rt2x00queue_init(rt2x00dev, queue, qid++); 1274 1275 rt2x00queue_init(rt2x00dev, rt2x00dev->bcn, QID_BEACON); 1276 if (req_atim) 1277 rt2x00queue_init(rt2x00dev, rt2x00dev->atim, QID_ATIM); 1278 1279 return 0; 1280 } 1281 1282 void rt2x00queue_free(struct rt2x00_dev *rt2x00dev) 1283 { 1284 kfree(rt2x00dev->rx); 1285 rt2x00dev->rx = NULL; 1286 rt2x00dev->tx = NULL; 1287 rt2x00dev->bcn = NULL; 1288 } 1289