1 /* 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com> 3 <http://rt2x00.serialmonkey.com> 4 5 This program is free software; you can redistribute it and/or modify 6 it under the terms of the GNU General Public License as published by 7 the Free Software Foundation; either version 2 of the License, or 8 (at your option) any later version. 9 10 This program is distributed in the hope that it will be useful, 11 but WITHOUT ANY WARRANTY; without even the implied warranty of 12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 GNU General Public License for more details. 14 15 You should have received a copy of the GNU General Public License 16 along with this program; if not, see <http://www.gnu.org/licenses/>. 17 */ 18 19 /* 20 Module: rt2500usb 21 Abstract: rt2500usb device specific routines. 22 Supported chipsets: RT2570. 23 */ 24 25 #include <linux/delay.h> 26 #include <linux/etherdevice.h> 27 #include <linux/kernel.h> 28 #include <linux/module.h> 29 #include <linux/slab.h> 30 #include <linux/usb.h> 31 32 #include "rt2x00.h" 33 #include "rt2x00usb.h" 34 #include "rt2500usb.h" 35 36 /* 37 * Allow hardware encryption to be disabled. 38 */ 39 static bool modparam_nohwcrypt; 40 module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO); 41 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption."); 42 43 /* 44 * Register access. 45 * All access to the CSR registers will go through the methods 46 * rt2500usb_register_read and rt2500usb_register_write. 47 * BBP and RF register require indirect register access, 48 * and use the CSR registers BBPCSR and RFCSR to achieve this. 49 * These indirect registers work with busy bits, 50 * and we will try maximal REGISTER_USB_BUSY_COUNT times to access 51 * the register while taking a REGISTER_BUSY_DELAY us delay 52 * between each attampt. When the busy bit is still set at that time, 53 * the access attempt is considered to have failed, 54 * and we will print an error. 55 * If the csr_mutex is already held then the _lock variants must 56 * be used instead. 57 */ 58 static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev, 59 const unsigned int offset, 60 u16 *value) 61 { 62 __le16 reg; 63 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ, 64 USB_VENDOR_REQUEST_IN, offset, 65 ®, sizeof(reg)); 66 *value = le16_to_cpu(reg); 67 } 68 69 static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev, 70 const unsigned int offset, 71 u16 *value) 72 { 73 __le16 reg; 74 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ, 75 USB_VENDOR_REQUEST_IN, offset, 76 ®, sizeof(reg), REGISTER_TIMEOUT); 77 *value = le16_to_cpu(reg); 78 } 79 80 static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev, 81 const unsigned int offset, 82 void *value, const u16 length) 83 { 84 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ, 85 USB_VENDOR_REQUEST_IN, offset, 86 value, length); 87 } 88 89 static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev, 90 const unsigned int offset, 91 u16 value) 92 { 93 __le16 reg = cpu_to_le16(value); 94 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE, 95 USB_VENDOR_REQUEST_OUT, offset, 96 ®, sizeof(reg)); 97 } 98 99 static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev, 100 const unsigned int offset, 101 u16 value) 102 { 103 __le16 reg = cpu_to_le16(value); 104 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE, 105 USB_VENDOR_REQUEST_OUT, offset, 106 ®, sizeof(reg), REGISTER_TIMEOUT); 107 } 108 109 static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev, 110 const unsigned int offset, 111 void *value, const u16 length) 112 { 113 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE, 114 USB_VENDOR_REQUEST_OUT, offset, 115 value, length); 116 } 117 118 static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev, 119 const unsigned int offset, 120 struct rt2x00_field16 field, 121 u16 *reg) 122 { 123 unsigned int i; 124 125 for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) { 126 rt2500usb_register_read_lock(rt2x00dev, offset, reg); 127 if (!rt2x00_get_field16(*reg, field)) 128 return 1; 129 udelay(REGISTER_BUSY_DELAY); 130 } 131 132 rt2x00_err(rt2x00dev, "Indirect register access failed: offset=0x%.08x, value=0x%.08x\n", 133 offset, *reg); 134 *reg = ~0; 135 136 return 0; 137 } 138 139 #define WAIT_FOR_BBP(__dev, __reg) \ 140 rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg)) 141 #define WAIT_FOR_RF(__dev, __reg) \ 142 rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg)) 143 144 static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev, 145 const unsigned int word, const u8 value) 146 { 147 u16 reg; 148 149 mutex_lock(&rt2x00dev->csr_mutex); 150 151 /* 152 * Wait until the BBP becomes available, afterwards we 153 * can safely write the new data into the register. 154 */ 155 if (WAIT_FOR_BBP(rt2x00dev, ®)) { 156 reg = 0; 157 rt2x00_set_field16(®, PHY_CSR7_DATA, value); 158 rt2x00_set_field16(®, PHY_CSR7_REG_ID, word); 159 rt2x00_set_field16(®, PHY_CSR7_READ_CONTROL, 0); 160 161 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg); 162 } 163 164 mutex_unlock(&rt2x00dev->csr_mutex); 165 } 166 167 static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev, 168 const unsigned int word, u8 *value) 169 { 170 u16 reg; 171 172 mutex_lock(&rt2x00dev->csr_mutex); 173 174 /* 175 * Wait until the BBP becomes available, afterwards we 176 * can safely write the read request into the register. 177 * After the data has been written, we wait until hardware 178 * returns the correct value, if at any time the register 179 * doesn't become available in time, reg will be 0xffffffff 180 * which means we return 0xff to the caller. 181 */ 182 if (WAIT_FOR_BBP(rt2x00dev, ®)) { 183 reg = 0; 184 rt2x00_set_field16(®, PHY_CSR7_REG_ID, word); 185 rt2x00_set_field16(®, PHY_CSR7_READ_CONTROL, 1); 186 187 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg); 188 189 if (WAIT_FOR_BBP(rt2x00dev, ®)) 190 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, ®); 191 } 192 193 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA); 194 195 mutex_unlock(&rt2x00dev->csr_mutex); 196 } 197 198 static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev, 199 const unsigned int word, const u32 value) 200 { 201 u16 reg; 202 203 mutex_lock(&rt2x00dev->csr_mutex); 204 205 /* 206 * Wait until the RF becomes available, afterwards we 207 * can safely write the new data into the register. 208 */ 209 if (WAIT_FOR_RF(rt2x00dev, ®)) { 210 reg = 0; 211 rt2x00_set_field16(®, PHY_CSR9_RF_VALUE, value); 212 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg); 213 214 reg = 0; 215 rt2x00_set_field16(®, PHY_CSR10_RF_VALUE, value >> 16); 216 rt2x00_set_field16(®, PHY_CSR10_RF_NUMBER_OF_BITS, 20); 217 rt2x00_set_field16(®, PHY_CSR10_RF_IF_SELECT, 0); 218 rt2x00_set_field16(®, PHY_CSR10_RF_BUSY, 1); 219 220 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg); 221 rt2x00_rf_write(rt2x00dev, word, value); 222 } 223 224 mutex_unlock(&rt2x00dev->csr_mutex); 225 } 226 227 #ifdef CONFIG_RT2X00_LIB_DEBUGFS 228 static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev, 229 const unsigned int offset, 230 u32 *value) 231 { 232 u16 tmp; 233 234 rt2500usb_register_read(rt2x00dev, offset, &tmp); 235 *value = tmp; 236 } 237 238 static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev, 239 const unsigned int offset, 240 u32 value) 241 { 242 rt2500usb_register_write(rt2x00dev, offset, value); 243 } 244 245 static const struct rt2x00debug rt2500usb_rt2x00debug = { 246 .owner = THIS_MODULE, 247 .csr = { 248 .read = _rt2500usb_register_read, 249 .write = _rt2500usb_register_write, 250 .flags = RT2X00DEBUGFS_OFFSET, 251 .word_base = CSR_REG_BASE, 252 .word_size = sizeof(u16), 253 .word_count = CSR_REG_SIZE / sizeof(u16), 254 }, 255 .eeprom = { 256 .read = rt2x00_eeprom_read, 257 .write = rt2x00_eeprom_write, 258 .word_base = EEPROM_BASE, 259 .word_size = sizeof(u16), 260 .word_count = EEPROM_SIZE / sizeof(u16), 261 }, 262 .bbp = { 263 .read = rt2500usb_bbp_read, 264 .write = rt2500usb_bbp_write, 265 .word_base = BBP_BASE, 266 .word_size = sizeof(u8), 267 .word_count = BBP_SIZE / sizeof(u8), 268 }, 269 .rf = { 270 .read = rt2x00_rf_read, 271 .write = rt2500usb_rf_write, 272 .word_base = RF_BASE, 273 .word_size = sizeof(u32), 274 .word_count = RF_SIZE / sizeof(u32), 275 }, 276 }; 277 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ 278 279 static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev) 280 { 281 u16 reg; 282 283 rt2500usb_register_read(rt2x00dev, MAC_CSR19, ®); 284 return rt2x00_get_field16(reg, MAC_CSR19_VAL7); 285 } 286 287 #ifdef CONFIG_RT2X00_LIB_LEDS 288 static void rt2500usb_brightness_set(struct led_classdev *led_cdev, 289 enum led_brightness brightness) 290 { 291 struct rt2x00_led *led = 292 container_of(led_cdev, struct rt2x00_led, led_dev); 293 unsigned int enabled = brightness != LED_OFF; 294 u16 reg; 295 296 rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, ®); 297 298 if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC) 299 rt2x00_set_field16(®, MAC_CSR20_LINK, enabled); 300 else if (led->type == LED_TYPE_ACTIVITY) 301 rt2x00_set_field16(®, MAC_CSR20_ACTIVITY, enabled); 302 303 rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg); 304 } 305 306 static int rt2500usb_blink_set(struct led_classdev *led_cdev, 307 unsigned long *delay_on, 308 unsigned long *delay_off) 309 { 310 struct rt2x00_led *led = 311 container_of(led_cdev, struct rt2x00_led, led_dev); 312 u16 reg; 313 314 rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, ®); 315 rt2x00_set_field16(®, MAC_CSR21_ON_PERIOD, *delay_on); 316 rt2x00_set_field16(®, MAC_CSR21_OFF_PERIOD, *delay_off); 317 rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg); 318 319 return 0; 320 } 321 322 static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev, 323 struct rt2x00_led *led, 324 enum led_type type) 325 { 326 led->rt2x00dev = rt2x00dev; 327 led->type = type; 328 led->led_dev.brightness_set = rt2500usb_brightness_set; 329 led->led_dev.blink_set = rt2500usb_blink_set; 330 led->flags = LED_INITIALIZED; 331 } 332 #endif /* CONFIG_RT2X00_LIB_LEDS */ 333 334 /* 335 * Configuration handlers. 336 */ 337 338 /* 339 * rt2500usb does not differentiate between shared and pairwise 340 * keys, so we should use the same function for both key types. 341 */ 342 static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev, 343 struct rt2x00lib_crypto *crypto, 344 struct ieee80211_key_conf *key) 345 { 346 u32 mask; 347 u16 reg; 348 enum cipher curr_cipher; 349 350 if (crypto->cmd == SET_KEY) { 351 /* 352 * Disallow to set WEP key other than with index 0, 353 * it is known that not work at least on some hardware. 354 * SW crypto will be used in that case. 355 */ 356 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 || 357 key->cipher == WLAN_CIPHER_SUITE_WEP104) && 358 key->keyidx != 0) 359 return -EOPNOTSUPP; 360 361 /* 362 * Pairwise key will always be entry 0, but this 363 * could collide with a shared key on the same 364 * position... 365 */ 366 mask = TXRX_CSR0_KEY_ID.bit_mask; 367 368 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®); 369 curr_cipher = rt2x00_get_field16(reg, TXRX_CSR0_ALGORITHM); 370 reg &= mask; 371 372 if (reg && reg == mask) 373 return -ENOSPC; 374 375 reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID); 376 377 key->hw_key_idx += reg ? ffz(reg) : 0; 378 /* 379 * Hardware requires that all keys use the same cipher 380 * (e.g. TKIP-only, AES-only, but not TKIP+AES). 381 * If this is not the first key, compare the cipher with the 382 * first one and fall back to SW crypto if not the same. 383 */ 384 if (key->hw_key_idx > 0 && crypto->cipher != curr_cipher) 385 return -EOPNOTSUPP; 386 387 rt2500usb_register_multiwrite(rt2x00dev, KEY_ENTRY(key->hw_key_idx), 388 crypto->key, sizeof(crypto->key)); 389 390 /* 391 * The driver does not support the IV/EIV generation 392 * in hardware. However it demands the data to be provided 393 * both separately as well as inside the frame. 394 * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib 395 * to ensure rt2x00lib will not strip the data from the 396 * frame after the copy, now we must tell mac80211 397 * to generate the IV/EIV data. 398 */ 399 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; 400 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC; 401 } 402 403 /* 404 * TXRX_CSR0_KEY_ID contains only single-bit fields to indicate 405 * a particular key is valid. 406 */ 407 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®); 408 rt2x00_set_field16(®, TXRX_CSR0_ALGORITHM, crypto->cipher); 409 rt2x00_set_field16(®, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER); 410 411 mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID); 412 if (crypto->cmd == SET_KEY) 413 mask |= 1 << key->hw_key_idx; 414 else if (crypto->cmd == DISABLE_KEY) 415 mask &= ~(1 << key->hw_key_idx); 416 rt2x00_set_field16(®, TXRX_CSR0_KEY_ID, mask); 417 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg); 418 419 return 0; 420 } 421 422 static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev, 423 const unsigned int filter_flags) 424 { 425 u16 reg; 426 427 /* 428 * Start configuration steps. 429 * Note that the version error will always be dropped 430 * and broadcast frames will always be accepted since 431 * there is no filter for it at this time. 432 */ 433 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); 434 rt2x00_set_field16(®, TXRX_CSR2_DROP_CRC, 435 !(filter_flags & FIF_FCSFAIL)); 436 rt2x00_set_field16(®, TXRX_CSR2_DROP_PHYSICAL, 437 !(filter_flags & FIF_PLCPFAIL)); 438 rt2x00_set_field16(®, TXRX_CSR2_DROP_CONTROL, 439 !(filter_flags & FIF_CONTROL)); 440 rt2x00_set_field16(®, TXRX_CSR2_DROP_NOT_TO_ME, 1); 441 rt2x00_set_field16(®, TXRX_CSR2_DROP_TODS, 442 !rt2x00dev->intf_ap_count); 443 rt2x00_set_field16(®, TXRX_CSR2_DROP_VERSION_ERROR, 1); 444 rt2x00_set_field16(®, TXRX_CSR2_DROP_MULTICAST, 445 !(filter_flags & FIF_ALLMULTI)); 446 rt2x00_set_field16(®, TXRX_CSR2_DROP_BROADCAST, 0); 447 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); 448 } 449 450 static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev, 451 struct rt2x00_intf *intf, 452 struct rt2x00intf_conf *conf, 453 const unsigned int flags) 454 { 455 unsigned int bcn_preload; 456 u16 reg; 457 458 if (flags & CONFIG_UPDATE_TYPE) { 459 /* 460 * Enable beacon config 461 */ 462 bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20); 463 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, ®); 464 rt2x00_set_field16(®, TXRX_CSR20_OFFSET, bcn_preload >> 6); 465 rt2x00_set_field16(®, TXRX_CSR20_BCN_EXPECT_WINDOW, 466 2 * (conf->type != NL80211_IFTYPE_STATION)); 467 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg); 468 469 /* 470 * Enable synchronisation. 471 */ 472 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, ®); 473 rt2x00_set_field16(®, TXRX_CSR18_OFFSET, 0); 474 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg); 475 476 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); 477 rt2x00_set_field16(®, TXRX_CSR19_TSF_SYNC, conf->sync); 478 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 479 } 480 481 if (flags & CONFIG_UPDATE_MAC) 482 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac, 483 (3 * sizeof(__le16))); 484 485 if (flags & CONFIG_UPDATE_BSSID) 486 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid, 487 (3 * sizeof(__le16))); 488 } 489 490 static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev, 491 struct rt2x00lib_erp *erp, 492 u32 changed) 493 { 494 u16 reg; 495 496 if (changed & BSS_CHANGED_ERP_PREAMBLE) { 497 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, ®); 498 rt2x00_set_field16(®, TXRX_CSR10_AUTORESPOND_PREAMBLE, 499 !!erp->short_preamble); 500 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg); 501 } 502 503 if (changed & BSS_CHANGED_BASIC_RATES) 504 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, 505 erp->basic_rates); 506 507 if (changed & BSS_CHANGED_BEACON_INT) { 508 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, ®); 509 rt2x00_set_field16(®, TXRX_CSR18_INTERVAL, 510 erp->beacon_int * 4); 511 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg); 512 } 513 514 if (changed & BSS_CHANGED_ERP_SLOT) { 515 rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time); 516 rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs); 517 rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs); 518 } 519 } 520 521 static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev, 522 struct antenna_setup *ant) 523 { 524 u8 r2; 525 u8 r14; 526 u16 csr5; 527 u16 csr6; 528 529 /* 530 * We should never come here because rt2x00lib is supposed 531 * to catch this and send us the correct antenna explicitely. 532 */ 533 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY || 534 ant->tx == ANTENNA_SW_DIVERSITY); 535 536 rt2500usb_bbp_read(rt2x00dev, 2, &r2); 537 rt2500usb_bbp_read(rt2x00dev, 14, &r14); 538 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5); 539 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6); 540 541 /* 542 * Configure the TX antenna. 543 */ 544 switch (ant->tx) { 545 case ANTENNA_HW_DIVERSITY: 546 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1); 547 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1); 548 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1); 549 break; 550 case ANTENNA_A: 551 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0); 552 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0); 553 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0); 554 break; 555 case ANTENNA_B: 556 default: 557 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2); 558 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2); 559 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2); 560 break; 561 } 562 563 /* 564 * Configure the RX antenna. 565 */ 566 switch (ant->rx) { 567 case ANTENNA_HW_DIVERSITY: 568 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1); 569 break; 570 case ANTENNA_A: 571 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0); 572 break; 573 case ANTENNA_B: 574 default: 575 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2); 576 break; 577 } 578 579 /* 580 * RT2525E and RT5222 need to flip TX I/Q 581 */ 582 if (rt2x00_rf(rt2x00dev, RF2525E) || rt2x00_rf(rt2x00dev, RF5222)) { 583 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1); 584 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1); 585 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1); 586 587 /* 588 * RT2525E does not need RX I/Q Flip. 589 */ 590 if (rt2x00_rf(rt2x00dev, RF2525E)) 591 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0); 592 } else { 593 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0); 594 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0); 595 } 596 597 rt2500usb_bbp_write(rt2x00dev, 2, r2); 598 rt2500usb_bbp_write(rt2x00dev, 14, r14); 599 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5); 600 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6); 601 } 602 603 static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev, 604 struct rf_channel *rf, const int txpower) 605 { 606 /* 607 * Set TXpower. 608 */ 609 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower)); 610 611 /* 612 * For RT2525E we should first set the channel to half band higher. 613 */ 614 if (rt2x00_rf(rt2x00dev, RF2525E)) { 615 static const u32 vals[] = { 616 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2, 617 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba, 618 0x000008ba, 0x000008be, 0x000008b7, 0x00000902, 619 0x00000902, 0x00000906 620 }; 621 622 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]); 623 if (rf->rf4) 624 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4); 625 } 626 627 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1); 628 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2); 629 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3); 630 if (rf->rf4) 631 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4); 632 } 633 634 static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev, 635 const int txpower) 636 { 637 u32 rf3; 638 639 rt2x00_rf_read(rt2x00dev, 3, &rf3); 640 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower)); 641 rt2500usb_rf_write(rt2x00dev, 3, rf3); 642 } 643 644 static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev, 645 struct rt2x00lib_conf *libconf) 646 { 647 enum dev_state state = 648 (libconf->conf->flags & IEEE80211_CONF_PS) ? 649 STATE_SLEEP : STATE_AWAKE; 650 u16 reg; 651 652 if (state == STATE_SLEEP) { 653 rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®); 654 rt2x00_set_field16(®, MAC_CSR18_DELAY_AFTER_BEACON, 655 rt2x00dev->beacon_int - 20); 656 rt2x00_set_field16(®, MAC_CSR18_BEACONS_BEFORE_WAKEUP, 657 libconf->conf->listen_interval - 1); 658 659 /* We must first disable autowake before it can be enabled */ 660 rt2x00_set_field16(®, MAC_CSR18_AUTO_WAKE, 0); 661 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg); 662 663 rt2x00_set_field16(®, MAC_CSR18_AUTO_WAKE, 1); 664 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg); 665 } else { 666 rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®); 667 rt2x00_set_field16(®, MAC_CSR18_AUTO_WAKE, 0); 668 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg); 669 } 670 671 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state); 672 } 673 674 static void rt2500usb_config(struct rt2x00_dev *rt2x00dev, 675 struct rt2x00lib_conf *libconf, 676 const unsigned int flags) 677 { 678 if (flags & IEEE80211_CONF_CHANGE_CHANNEL) 679 rt2500usb_config_channel(rt2x00dev, &libconf->rf, 680 libconf->conf->power_level); 681 if ((flags & IEEE80211_CONF_CHANGE_POWER) && 682 !(flags & IEEE80211_CONF_CHANGE_CHANNEL)) 683 rt2500usb_config_txpower(rt2x00dev, 684 libconf->conf->power_level); 685 if (flags & IEEE80211_CONF_CHANGE_PS) 686 rt2500usb_config_ps(rt2x00dev, libconf); 687 } 688 689 /* 690 * Link tuning 691 */ 692 static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev, 693 struct link_qual *qual) 694 { 695 u16 reg; 696 697 /* 698 * Update FCS error count from register. 699 */ 700 rt2500usb_register_read(rt2x00dev, STA_CSR0, ®); 701 qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR); 702 703 /* 704 * Update False CCA count from register. 705 */ 706 rt2500usb_register_read(rt2x00dev, STA_CSR3, ®); 707 qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR); 708 } 709 710 static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev, 711 struct link_qual *qual) 712 { 713 u16 eeprom; 714 u16 value; 715 716 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom); 717 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW); 718 rt2500usb_bbp_write(rt2x00dev, 24, value); 719 720 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom); 721 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW); 722 rt2500usb_bbp_write(rt2x00dev, 25, value); 723 724 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom); 725 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW); 726 rt2500usb_bbp_write(rt2x00dev, 61, value); 727 728 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom); 729 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER); 730 rt2500usb_bbp_write(rt2x00dev, 17, value); 731 732 qual->vgc_level = value; 733 } 734 735 /* 736 * Queue handlers. 737 */ 738 static void rt2500usb_start_queue(struct data_queue *queue) 739 { 740 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev; 741 u16 reg; 742 743 switch (queue->qid) { 744 case QID_RX: 745 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); 746 rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, 0); 747 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); 748 break; 749 case QID_BEACON: 750 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); 751 rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 1); 752 rt2x00_set_field16(®, TXRX_CSR19_TBCN, 1); 753 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 1); 754 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 755 break; 756 default: 757 break; 758 } 759 } 760 761 static void rt2500usb_stop_queue(struct data_queue *queue) 762 { 763 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev; 764 u16 reg; 765 766 switch (queue->qid) { 767 case QID_RX: 768 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); 769 rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, 1); 770 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); 771 break; 772 case QID_BEACON: 773 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); 774 rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 0); 775 rt2x00_set_field16(®, TXRX_CSR19_TBCN, 0); 776 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0); 777 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 778 break; 779 default: 780 break; 781 } 782 } 783 784 /* 785 * Initialization functions. 786 */ 787 static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev) 788 { 789 u16 reg; 790 791 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001, 792 USB_MODE_TEST, REGISTER_TIMEOUT); 793 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308, 794 0x00f0, REGISTER_TIMEOUT); 795 796 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); 797 rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, 1); 798 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); 799 800 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111); 801 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11); 802 803 rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®); 804 rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 1); 805 rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 1); 806 rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 0); 807 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg); 808 809 rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®); 810 rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 0); 811 rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 0); 812 rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 0); 813 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg); 814 815 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, ®); 816 rt2x00_set_field16(®, TXRX_CSR5_BBP_ID0, 13); 817 rt2x00_set_field16(®, TXRX_CSR5_BBP_ID0_VALID, 1); 818 rt2x00_set_field16(®, TXRX_CSR5_BBP_ID1, 12); 819 rt2x00_set_field16(®, TXRX_CSR5_BBP_ID1_VALID, 1); 820 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg); 821 822 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, ®); 823 rt2x00_set_field16(®, TXRX_CSR6_BBP_ID0, 10); 824 rt2x00_set_field16(®, TXRX_CSR6_BBP_ID0_VALID, 1); 825 rt2x00_set_field16(®, TXRX_CSR6_BBP_ID1, 11); 826 rt2x00_set_field16(®, TXRX_CSR6_BBP_ID1_VALID, 1); 827 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg); 828 829 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, ®); 830 rt2x00_set_field16(®, TXRX_CSR7_BBP_ID0, 7); 831 rt2x00_set_field16(®, TXRX_CSR7_BBP_ID0_VALID, 1); 832 rt2x00_set_field16(®, TXRX_CSR7_BBP_ID1, 6); 833 rt2x00_set_field16(®, TXRX_CSR7_BBP_ID1_VALID, 1); 834 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg); 835 836 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, ®); 837 rt2x00_set_field16(®, TXRX_CSR8_BBP_ID0, 5); 838 rt2x00_set_field16(®, TXRX_CSR8_BBP_ID0_VALID, 1); 839 rt2x00_set_field16(®, TXRX_CSR8_BBP_ID1, 0); 840 rt2x00_set_field16(®, TXRX_CSR8_BBP_ID1_VALID, 0); 841 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg); 842 843 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); 844 rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 0); 845 rt2x00_set_field16(®, TXRX_CSR19_TSF_SYNC, 0); 846 rt2x00_set_field16(®, TXRX_CSR19_TBCN, 0); 847 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0); 848 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 849 850 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f); 851 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d); 852 853 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE)) 854 return -EBUSY; 855 856 rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®); 857 rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 0); 858 rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 0); 859 rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 1); 860 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg); 861 862 if (rt2x00_rev(rt2x00dev) >= RT2570_VERSION_C) { 863 rt2500usb_register_read(rt2x00dev, PHY_CSR2, ®); 864 rt2x00_set_field16(®, PHY_CSR2_LNA, 0); 865 } else { 866 reg = 0; 867 rt2x00_set_field16(®, PHY_CSR2_LNA, 1); 868 rt2x00_set_field16(®, PHY_CSR2_LNA_MODE, 3); 869 } 870 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg); 871 872 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002); 873 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053); 874 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee); 875 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000); 876 877 rt2500usb_register_read(rt2x00dev, MAC_CSR8, ®); 878 rt2x00_set_field16(®, MAC_CSR8_MAX_FRAME_UNIT, 879 rt2x00dev->rx->data_size); 880 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg); 881 882 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®); 883 rt2x00_set_field16(®, TXRX_CSR0_ALGORITHM, CIPHER_NONE); 884 rt2x00_set_field16(®, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER); 885 rt2x00_set_field16(®, TXRX_CSR0_KEY_ID, 0); 886 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg); 887 888 rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®); 889 rt2x00_set_field16(®, MAC_CSR18_DELAY_AFTER_BEACON, 90); 890 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg); 891 892 rt2500usb_register_read(rt2x00dev, PHY_CSR4, ®); 893 rt2x00_set_field16(®, PHY_CSR4_LOW_RF_LE, 1); 894 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg); 895 896 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, ®); 897 rt2x00_set_field16(®, TXRX_CSR1_AUTO_SEQUENCE, 1); 898 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg); 899 900 return 0; 901 } 902 903 static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev) 904 { 905 unsigned int i; 906 u8 value; 907 908 for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) { 909 rt2500usb_bbp_read(rt2x00dev, 0, &value); 910 if ((value != 0xff) && (value != 0x00)) 911 return 0; 912 udelay(REGISTER_BUSY_DELAY); 913 } 914 915 rt2x00_err(rt2x00dev, "BBP register access failed, aborting\n"); 916 return -EACCES; 917 } 918 919 static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev) 920 { 921 unsigned int i; 922 u16 eeprom; 923 u8 value; 924 u8 reg_id; 925 926 if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev))) 927 return -EACCES; 928 929 rt2500usb_bbp_write(rt2x00dev, 3, 0x02); 930 rt2500usb_bbp_write(rt2x00dev, 4, 0x19); 931 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c); 932 rt2500usb_bbp_write(rt2x00dev, 15, 0x30); 933 rt2500usb_bbp_write(rt2x00dev, 16, 0xac); 934 rt2500usb_bbp_write(rt2x00dev, 18, 0x18); 935 rt2500usb_bbp_write(rt2x00dev, 19, 0xff); 936 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e); 937 rt2500usb_bbp_write(rt2x00dev, 21, 0x08); 938 rt2500usb_bbp_write(rt2x00dev, 22, 0x08); 939 rt2500usb_bbp_write(rt2x00dev, 23, 0x08); 940 rt2500usb_bbp_write(rt2x00dev, 24, 0x80); 941 rt2500usb_bbp_write(rt2x00dev, 25, 0x50); 942 rt2500usb_bbp_write(rt2x00dev, 26, 0x08); 943 rt2500usb_bbp_write(rt2x00dev, 27, 0x23); 944 rt2500usb_bbp_write(rt2x00dev, 30, 0x10); 945 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b); 946 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9); 947 rt2500usb_bbp_write(rt2x00dev, 34, 0x12); 948 rt2500usb_bbp_write(rt2x00dev, 35, 0x50); 949 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4); 950 rt2500usb_bbp_write(rt2x00dev, 40, 0x02); 951 rt2500usb_bbp_write(rt2x00dev, 41, 0x60); 952 rt2500usb_bbp_write(rt2x00dev, 53, 0x10); 953 rt2500usb_bbp_write(rt2x00dev, 54, 0x18); 954 rt2500usb_bbp_write(rt2x00dev, 56, 0x08); 955 rt2500usb_bbp_write(rt2x00dev, 57, 0x10); 956 rt2500usb_bbp_write(rt2x00dev, 58, 0x08); 957 rt2500usb_bbp_write(rt2x00dev, 61, 0x60); 958 rt2500usb_bbp_write(rt2x00dev, 62, 0x10); 959 rt2500usb_bbp_write(rt2x00dev, 75, 0xff); 960 961 for (i = 0; i < EEPROM_BBP_SIZE; i++) { 962 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom); 963 964 if (eeprom != 0xffff && eeprom != 0x0000) { 965 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID); 966 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE); 967 rt2500usb_bbp_write(rt2x00dev, reg_id, value); 968 } 969 } 970 971 return 0; 972 } 973 974 /* 975 * Device state switch handlers. 976 */ 977 static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev) 978 { 979 /* 980 * Initialize all registers. 981 */ 982 if (unlikely(rt2500usb_init_registers(rt2x00dev) || 983 rt2500usb_init_bbp(rt2x00dev))) 984 return -EIO; 985 986 return 0; 987 } 988 989 static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev) 990 { 991 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121); 992 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121); 993 994 /* 995 * Disable synchronisation. 996 */ 997 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0); 998 999 rt2x00usb_disable_radio(rt2x00dev); 1000 } 1001 1002 static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev, 1003 enum dev_state state) 1004 { 1005 u16 reg; 1006 u16 reg2; 1007 unsigned int i; 1008 char put_to_sleep; 1009 char bbp_state; 1010 char rf_state; 1011 1012 put_to_sleep = (state != STATE_AWAKE); 1013 1014 reg = 0; 1015 rt2x00_set_field16(®, MAC_CSR17_BBP_DESIRE_STATE, state); 1016 rt2x00_set_field16(®, MAC_CSR17_RF_DESIRE_STATE, state); 1017 rt2x00_set_field16(®, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep); 1018 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg); 1019 rt2x00_set_field16(®, MAC_CSR17_SET_STATE, 1); 1020 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg); 1021 1022 /* 1023 * Device is not guaranteed to be in the requested state yet. 1024 * We must wait until the register indicates that the 1025 * device has entered the correct state. 1026 */ 1027 for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) { 1028 rt2500usb_register_read(rt2x00dev, MAC_CSR17, ®2); 1029 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE); 1030 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE); 1031 if (bbp_state == state && rf_state == state) 1032 return 0; 1033 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg); 1034 msleep(30); 1035 } 1036 1037 return -EBUSY; 1038 } 1039 1040 static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev, 1041 enum dev_state state) 1042 { 1043 int retval = 0; 1044 1045 switch (state) { 1046 case STATE_RADIO_ON: 1047 retval = rt2500usb_enable_radio(rt2x00dev); 1048 break; 1049 case STATE_RADIO_OFF: 1050 rt2500usb_disable_radio(rt2x00dev); 1051 break; 1052 case STATE_RADIO_IRQ_ON: 1053 case STATE_RADIO_IRQ_OFF: 1054 /* No support, but no error either */ 1055 break; 1056 case STATE_DEEP_SLEEP: 1057 case STATE_SLEEP: 1058 case STATE_STANDBY: 1059 case STATE_AWAKE: 1060 retval = rt2500usb_set_state(rt2x00dev, state); 1061 break; 1062 default: 1063 retval = -ENOTSUPP; 1064 break; 1065 } 1066 1067 if (unlikely(retval)) 1068 rt2x00_err(rt2x00dev, "Device failed to enter state %d (%d)\n", 1069 state, retval); 1070 1071 return retval; 1072 } 1073 1074 /* 1075 * TX descriptor initialization 1076 */ 1077 static void rt2500usb_write_tx_desc(struct queue_entry *entry, 1078 struct txentry_desc *txdesc) 1079 { 1080 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); 1081 __le32 *txd = (__le32 *) entry->skb->data; 1082 u32 word; 1083 1084 /* 1085 * Start writing the descriptor words. 1086 */ 1087 rt2x00_desc_read(txd, 0, &word); 1088 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit); 1089 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG, 1090 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags)); 1091 rt2x00_set_field32(&word, TXD_W0_ACK, 1092 test_bit(ENTRY_TXD_ACK, &txdesc->flags)); 1093 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP, 1094 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags)); 1095 rt2x00_set_field32(&word, TXD_W0_OFDM, 1096 (txdesc->rate_mode == RATE_MODE_OFDM)); 1097 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ, 1098 test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags)); 1099 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->u.plcp.ifs); 1100 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, txdesc->length); 1101 rt2x00_set_field32(&word, TXD_W0_CIPHER, !!txdesc->cipher); 1102 rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx); 1103 rt2x00_desc_write(txd, 0, word); 1104 1105 rt2x00_desc_read(txd, 1, &word); 1106 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset); 1107 rt2x00_set_field32(&word, TXD_W1_AIFS, entry->queue->aifs); 1108 rt2x00_set_field32(&word, TXD_W1_CWMIN, entry->queue->cw_min); 1109 rt2x00_set_field32(&word, TXD_W1_CWMAX, entry->queue->cw_max); 1110 rt2x00_desc_write(txd, 1, word); 1111 1112 rt2x00_desc_read(txd, 2, &word); 1113 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->u.plcp.signal); 1114 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->u.plcp.service); 1115 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, 1116 txdesc->u.plcp.length_low); 1117 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, 1118 txdesc->u.plcp.length_high); 1119 rt2x00_desc_write(txd, 2, word); 1120 1121 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) { 1122 _rt2x00_desc_write(txd, 3, skbdesc->iv[0]); 1123 _rt2x00_desc_write(txd, 4, skbdesc->iv[1]); 1124 } 1125 1126 /* 1127 * Register descriptor details in skb frame descriptor. 1128 */ 1129 skbdesc->flags |= SKBDESC_DESC_IN_SKB; 1130 skbdesc->desc = txd; 1131 skbdesc->desc_len = TXD_DESC_SIZE; 1132 } 1133 1134 /* 1135 * TX data initialization 1136 */ 1137 static void rt2500usb_beacondone(struct urb *urb); 1138 1139 static void rt2500usb_write_beacon(struct queue_entry *entry, 1140 struct txentry_desc *txdesc) 1141 { 1142 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; 1143 struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev); 1144 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data; 1145 int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint); 1146 int length; 1147 u16 reg, reg0; 1148 1149 /* 1150 * Disable beaconing while we are reloading the beacon data, 1151 * otherwise we might be sending out invalid data. 1152 */ 1153 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); 1154 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0); 1155 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 1156 1157 /* 1158 * Add space for the descriptor in front of the skb. 1159 */ 1160 skb_push(entry->skb, TXD_DESC_SIZE); 1161 memset(entry->skb->data, 0, TXD_DESC_SIZE); 1162 1163 /* 1164 * Write the TX descriptor for the beacon. 1165 */ 1166 rt2500usb_write_tx_desc(entry, txdesc); 1167 1168 /* 1169 * Dump beacon to userspace through debugfs. 1170 */ 1171 rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry->skb); 1172 1173 /* 1174 * USB devices cannot blindly pass the skb->len as the 1175 * length of the data to usb_fill_bulk_urb. Pass the skb 1176 * to the driver to determine what the length should be. 1177 */ 1178 length = rt2x00dev->ops->lib->get_tx_data_len(entry); 1179 1180 usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe, 1181 entry->skb->data, length, rt2500usb_beacondone, 1182 entry); 1183 1184 /* 1185 * Second we need to create the guardian byte. 1186 * We only need a single byte, so lets recycle 1187 * the 'flags' field we are not using for beacons. 1188 */ 1189 bcn_priv->guardian_data = 0; 1190 usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe, 1191 &bcn_priv->guardian_data, 1, rt2500usb_beacondone, 1192 entry); 1193 1194 /* 1195 * Send out the guardian byte. 1196 */ 1197 usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC); 1198 1199 /* 1200 * Enable beaconing again. 1201 */ 1202 rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 1); 1203 rt2x00_set_field16(®, TXRX_CSR19_TBCN, 1); 1204 reg0 = reg; 1205 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 1); 1206 /* 1207 * Beacon generation will fail initially. 1208 * To prevent this we need to change the TXRX_CSR19 1209 * register several times (reg0 is the same as reg 1210 * except for TXRX_CSR19_BEACON_GEN, which is 0 in reg0 1211 * and 1 in reg). 1212 */ 1213 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 1214 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0); 1215 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 1216 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0); 1217 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 1218 } 1219 1220 static int rt2500usb_get_tx_data_len(struct queue_entry *entry) 1221 { 1222 int length; 1223 1224 /* 1225 * The length _must_ be a multiple of 2, 1226 * but it must _not_ be a multiple of the USB packet size. 1227 */ 1228 length = roundup(entry->skb->len, 2); 1229 length += (2 * !(length % entry->queue->usb_maxpacket)); 1230 1231 return length; 1232 } 1233 1234 /* 1235 * RX control handlers 1236 */ 1237 static void rt2500usb_fill_rxdone(struct queue_entry *entry, 1238 struct rxdone_entry_desc *rxdesc) 1239 { 1240 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; 1241 struct queue_entry_priv_usb *entry_priv = entry->priv_data; 1242 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); 1243 __le32 *rxd = 1244 (__le32 *)(entry->skb->data + 1245 (entry_priv->urb->actual_length - 1246 entry->queue->desc_size)); 1247 u32 word0; 1248 u32 word1; 1249 1250 /* 1251 * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of 1252 * frame data in rt2x00usb. 1253 */ 1254 memcpy(skbdesc->desc, rxd, skbdesc->desc_len); 1255 rxd = (__le32 *)skbdesc->desc; 1256 1257 /* 1258 * It is now safe to read the descriptor on all architectures. 1259 */ 1260 rt2x00_desc_read(rxd, 0, &word0); 1261 rt2x00_desc_read(rxd, 1, &word1); 1262 1263 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) 1264 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC; 1265 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR)) 1266 rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC; 1267 1268 rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER); 1269 if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR)) 1270 rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY; 1271 1272 if (rxdesc->cipher != CIPHER_NONE) { 1273 _rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]); 1274 _rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]); 1275 rxdesc->dev_flags |= RXDONE_CRYPTO_IV; 1276 1277 /* ICV is located at the end of frame */ 1278 1279 rxdesc->flags |= RX_FLAG_MMIC_STRIPPED; 1280 if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS) 1281 rxdesc->flags |= RX_FLAG_DECRYPTED; 1282 else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC) 1283 rxdesc->flags |= RX_FLAG_MMIC_ERROR; 1284 } 1285 1286 /* 1287 * Obtain the status about this packet. 1288 * When frame was received with an OFDM bitrate, 1289 * the signal is the PLCP value. If it was received with 1290 * a CCK bitrate the signal is the rate in 100kbit/s. 1291 */ 1292 rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL); 1293 rxdesc->rssi = 1294 rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset; 1295 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); 1296 1297 if (rt2x00_get_field32(word0, RXD_W0_OFDM)) 1298 rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP; 1299 else 1300 rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE; 1301 if (rt2x00_get_field32(word0, RXD_W0_MY_BSS)) 1302 rxdesc->dev_flags |= RXDONE_MY_BSS; 1303 1304 /* 1305 * Adjust the skb memory window to the frame boundaries. 1306 */ 1307 skb_trim(entry->skb, rxdesc->size); 1308 } 1309 1310 /* 1311 * Interrupt functions. 1312 */ 1313 static void rt2500usb_beacondone(struct urb *urb) 1314 { 1315 struct queue_entry *entry = (struct queue_entry *)urb->context; 1316 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data; 1317 1318 if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags)) 1319 return; 1320 1321 /* 1322 * Check if this was the guardian beacon, 1323 * if that was the case we need to send the real beacon now. 1324 * Otherwise we should free the sk_buffer, the device 1325 * should be doing the rest of the work now. 1326 */ 1327 if (bcn_priv->guardian_urb == urb) { 1328 usb_submit_urb(bcn_priv->urb, GFP_ATOMIC); 1329 } else if (bcn_priv->urb == urb) { 1330 dev_kfree_skb(entry->skb); 1331 entry->skb = NULL; 1332 } 1333 } 1334 1335 /* 1336 * Device probe functions. 1337 */ 1338 static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev) 1339 { 1340 u16 word; 1341 u8 *mac; 1342 u8 bbp; 1343 1344 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE); 1345 1346 /* 1347 * Start validation of the data that has been read. 1348 */ 1349 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0); 1350 if (!is_valid_ether_addr(mac)) { 1351 eth_random_addr(mac); 1352 rt2x00_eeprom_dbg(rt2x00dev, "MAC: %pM\n", mac); 1353 } 1354 1355 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word); 1356 if (word == 0xffff) { 1357 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2); 1358 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT, 1359 ANTENNA_SW_DIVERSITY); 1360 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT, 1361 ANTENNA_SW_DIVERSITY); 1362 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE, 1363 LED_MODE_DEFAULT); 1364 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0); 1365 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0); 1366 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522); 1367 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word); 1368 rt2x00_eeprom_dbg(rt2x00dev, "Antenna: 0x%04x\n", word); 1369 } 1370 1371 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word); 1372 if (word == 0xffff) { 1373 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0); 1374 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0); 1375 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0); 1376 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word); 1377 rt2x00_eeprom_dbg(rt2x00dev, "NIC: 0x%04x\n", word); 1378 } 1379 1380 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word); 1381 if (word == 0xffff) { 1382 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI, 1383 DEFAULT_RSSI_OFFSET); 1384 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word); 1385 rt2x00_eeprom_dbg(rt2x00dev, "Calibrate offset: 0x%04x\n", 1386 word); 1387 } 1388 1389 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word); 1390 if (word == 0xffff) { 1391 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45); 1392 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word); 1393 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune: 0x%04x\n", word); 1394 } 1395 1396 /* 1397 * Switch lower vgc bound to current BBP R17 value, 1398 * lower the value a bit for better quality. 1399 */ 1400 rt2500usb_bbp_read(rt2x00dev, 17, &bbp); 1401 bbp -= 6; 1402 1403 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word); 1404 if (word == 0xffff) { 1405 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40); 1406 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp); 1407 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word); 1408 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune vgc: 0x%04x\n", word); 1409 } else { 1410 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp); 1411 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word); 1412 } 1413 1414 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word); 1415 if (word == 0xffff) { 1416 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48); 1417 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41); 1418 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word); 1419 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r17: 0x%04x\n", word); 1420 } 1421 1422 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word); 1423 if (word == 0xffff) { 1424 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40); 1425 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80); 1426 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word); 1427 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r24: 0x%04x\n", word); 1428 } 1429 1430 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word); 1431 if (word == 0xffff) { 1432 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40); 1433 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50); 1434 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word); 1435 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r25: 0x%04x\n", word); 1436 } 1437 1438 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word); 1439 if (word == 0xffff) { 1440 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60); 1441 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d); 1442 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word); 1443 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r61: 0x%04x\n", word); 1444 } 1445 1446 return 0; 1447 } 1448 1449 static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev) 1450 { 1451 u16 reg; 1452 u16 value; 1453 u16 eeprom; 1454 1455 /* 1456 * Read EEPROM word for configuration. 1457 */ 1458 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom); 1459 1460 /* 1461 * Identify RF chipset. 1462 */ 1463 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE); 1464 rt2500usb_register_read(rt2x00dev, MAC_CSR0, ®); 1465 rt2x00_set_chip(rt2x00dev, RT2570, value, reg); 1466 1467 if (((reg & 0xfff0) != 0) || ((reg & 0x0000000f) == 0)) { 1468 rt2x00_err(rt2x00dev, "Invalid RT chipset detected\n"); 1469 return -ENODEV; 1470 } 1471 1472 if (!rt2x00_rf(rt2x00dev, RF2522) && 1473 !rt2x00_rf(rt2x00dev, RF2523) && 1474 !rt2x00_rf(rt2x00dev, RF2524) && 1475 !rt2x00_rf(rt2x00dev, RF2525) && 1476 !rt2x00_rf(rt2x00dev, RF2525E) && 1477 !rt2x00_rf(rt2x00dev, RF5222)) { 1478 rt2x00_err(rt2x00dev, "Invalid RF chipset detected\n"); 1479 return -ENODEV; 1480 } 1481 1482 /* 1483 * Identify default antenna configuration. 1484 */ 1485 rt2x00dev->default_ant.tx = 1486 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT); 1487 rt2x00dev->default_ant.rx = 1488 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT); 1489 1490 /* 1491 * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead. 1492 * I am not 100% sure about this, but the legacy drivers do not 1493 * indicate antenna swapping in software is required when 1494 * diversity is enabled. 1495 */ 1496 if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY) 1497 rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY; 1498 if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY) 1499 rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY; 1500 1501 /* 1502 * Store led mode, for correct led behaviour. 1503 */ 1504 #ifdef CONFIG_RT2X00_LIB_LEDS 1505 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE); 1506 1507 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO); 1508 if (value == LED_MODE_TXRX_ACTIVITY || 1509 value == LED_MODE_DEFAULT || 1510 value == LED_MODE_ASUS) 1511 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual, 1512 LED_TYPE_ACTIVITY); 1513 #endif /* CONFIG_RT2X00_LIB_LEDS */ 1514 1515 /* 1516 * Detect if this device has an hardware controlled radio. 1517 */ 1518 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO)) 1519 __set_bit(CAPABILITY_HW_BUTTON, &rt2x00dev->cap_flags); 1520 1521 /* 1522 * Read the RSSI <-> dBm offset information. 1523 */ 1524 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom); 1525 rt2x00dev->rssi_offset = 1526 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI); 1527 1528 return 0; 1529 } 1530 1531 /* 1532 * RF value list for RF2522 1533 * Supports: 2.4 GHz 1534 */ 1535 static const struct rf_channel rf_vals_bg_2522[] = { 1536 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 }, 1537 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 }, 1538 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 }, 1539 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 }, 1540 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 }, 1541 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 }, 1542 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 }, 1543 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 }, 1544 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 }, 1545 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 }, 1546 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 }, 1547 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 }, 1548 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 }, 1549 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 }, 1550 }; 1551 1552 /* 1553 * RF value list for RF2523 1554 * Supports: 2.4 GHz 1555 */ 1556 static const struct rf_channel rf_vals_bg_2523[] = { 1557 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b }, 1558 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b }, 1559 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b }, 1560 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b }, 1561 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b }, 1562 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b }, 1563 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b }, 1564 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b }, 1565 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b }, 1566 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b }, 1567 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b }, 1568 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b }, 1569 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b }, 1570 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 }, 1571 }; 1572 1573 /* 1574 * RF value list for RF2524 1575 * Supports: 2.4 GHz 1576 */ 1577 static const struct rf_channel rf_vals_bg_2524[] = { 1578 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b }, 1579 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b }, 1580 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b }, 1581 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b }, 1582 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b }, 1583 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b }, 1584 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b }, 1585 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b }, 1586 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b }, 1587 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b }, 1588 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b }, 1589 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b }, 1590 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b }, 1591 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 }, 1592 }; 1593 1594 /* 1595 * RF value list for RF2525 1596 * Supports: 2.4 GHz 1597 */ 1598 static const struct rf_channel rf_vals_bg_2525[] = { 1599 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b }, 1600 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b }, 1601 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b }, 1602 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b }, 1603 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b }, 1604 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b }, 1605 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b }, 1606 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b }, 1607 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b }, 1608 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b }, 1609 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b }, 1610 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b }, 1611 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b }, 1612 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 }, 1613 }; 1614 1615 /* 1616 * RF value list for RF2525e 1617 * Supports: 2.4 GHz 1618 */ 1619 static const struct rf_channel rf_vals_bg_2525e[] = { 1620 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b }, 1621 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 }, 1622 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b }, 1623 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 }, 1624 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b }, 1625 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 }, 1626 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b }, 1627 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 }, 1628 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b }, 1629 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 }, 1630 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b }, 1631 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 }, 1632 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b }, 1633 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 }, 1634 }; 1635 1636 /* 1637 * RF value list for RF5222 1638 * Supports: 2.4 GHz & 5.2 GHz 1639 */ 1640 static const struct rf_channel rf_vals_5222[] = { 1641 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b }, 1642 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b }, 1643 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b }, 1644 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b }, 1645 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b }, 1646 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b }, 1647 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b }, 1648 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b }, 1649 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b }, 1650 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b }, 1651 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b }, 1652 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b }, 1653 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b }, 1654 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b }, 1655 1656 /* 802.11 UNI / HyperLan 2 */ 1657 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f }, 1658 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f }, 1659 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f }, 1660 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f }, 1661 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f }, 1662 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f }, 1663 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f }, 1664 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f }, 1665 1666 /* 802.11 HyperLan 2 */ 1667 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f }, 1668 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f }, 1669 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f }, 1670 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f }, 1671 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f }, 1672 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f }, 1673 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f }, 1674 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f }, 1675 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f }, 1676 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f }, 1677 1678 /* 802.11 UNII */ 1679 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f }, 1680 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 }, 1681 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 }, 1682 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 }, 1683 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 }, 1684 }; 1685 1686 static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev) 1687 { 1688 struct hw_mode_spec *spec = &rt2x00dev->spec; 1689 struct channel_info *info; 1690 char *tx_power; 1691 unsigned int i; 1692 1693 /* 1694 * Initialize all hw fields. 1695 * 1696 * Don't set IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING unless we are 1697 * capable of sending the buffered frames out after the DTIM 1698 * transmission using rt2x00lib_beacondone. This will send out 1699 * multicast and broadcast traffic immediately instead of buffering it 1700 * infinitly and thus dropping it after some time. 1701 */ 1702 ieee80211_hw_set(rt2x00dev->hw, PS_NULLFUNC_STACK); 1703 ieee80211_hw_set(rt2x00dev->hw, SUPPORTS_PS); 1704 ieee80211_hw_set(rt2x00dev->hw, RX_INCLUDES_FCS); 1705 ieee80211_hw_set(rt2x00dev->hw, SIGNAL_DBM); 1706 1707 /* 1708 * Disable powersaving as default. 1709 */ 1710 rt2x00dev->hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; 1711 1712 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev); 1713 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw, 1714 rt2x00_eeprom_addr(rt2x00dev, 1715 EEPROM_MAC_ADDR_0)); 1716 1717 /* 1718 * Initialize hw_mode information. 1719 */ 1720 spec->supported_bands = SUPPORT_BAND_2GHZ; 1721 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM; 1722 1723 if (rt2x00_rf(rt2x00dev, RF2522)) { 1724 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522); 1725 spec->channels = rf_vals_bg_2522; 1726 } else if (rt2x00_rf(rt2x00dev, RF2523)) { 1727 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523); 1728 spec->channels = rf_vals_bg_2523; 1729 } else if (rt2x00_rf(rt2x00dev, RF2524)) { 1730 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524); 1731 spec->channels = rf_vals_bg_2524; 1732 } else if (rt2x00_rf(rt2x00dev, RF2525)) { 1733 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525); 1734 spec->channels = rf_vals_bg_2525; 1735 } else if (rt2x00_rf(rt2x00dev, RF2525E)) { 1736 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e); 1737 spec->channels = rf_vals_bg_2525e; 1738 } else if (rt2x00_rf(rt2x00dev, RF5222)) { 1739 spec->supported_bands |= SUPPORT_BAND_5GHZ; 1740 spec->num_channels = ARRAY_SIZE(rf_vals_5222); 1741 spec->channels = rf_vals_5222; 1742 } 1743 1744 /* 1745 * Create channel information array 1746 */ 1747 info = kcalloc(spec->num_channels, sizeof(*info), GFP_KERNEL); 1748 if (!info) 1749 return -ENOMEM; 1750 1751 spec->channels_info = info; 1752 1753 tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START); 1754 for (i = 0; i < 14; i++) { 1755 info[i].max_power = MAX_TXPOWER; 1756 info[i].default_power1 = TXPOWER_FROM_DEV(tx_power[i]); 1757 } 1758 1759 if (spec->num_channels > 14) { 1760 for (i = 14; i < spec->num_channels; i++) { 1761 info[i].max_power = MAX_TXPOWER; 1762 info[i].default_power1 = DEFAULT_TXPOWER; 1763 } 1764 } 1765 1766 return 0; 1767 } 1768 1769 static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev) 1770 { 1771 int retval; 1772 u16 reg; 1773 1774 /* 1775 * Allocate eeprom data. 1776 */ 1777 retval = rt2500usb_validate_eeprom(rt2x00dev); 1778 if (retval) 1779 return retval; 1780 1781 retval = rt2500usb_init_eeprom(rt2x00dev); 1782 if (retval) 1783 return retval; 1784 1785 /* 1786 * Enable rfkill polling by setting GPIO direction of the 1787 * rfkill switch GPIO pin correctly. 1788 */ 1789 rt2500usb_register_read(rt2x00dev, MAC_CSR19, ®); 1790 rt2x00_set_field16(®, MAC_CSR19_DIR0, 0); 1791 rt2500usb_register_write(rt2x00dev, MAC_CSR19, reg); 1792 1793 /* 1794 * Initialize hw specifications. 1795 */ 1796 retval = rt2500usb_probe_hw_mode(rt2x00dev); 1797 if (retval) 1798 return retval; 1799 1800 /* 1801 * This device requires the atim queue 1802 */ 1803 __set_bit(REQUIRE_ATIM_QUEUE, &rt2x00dev->cap_flags); 1804 __set_bit(REQUIRE_BEACON_GUARD, &rt2x00dev->cap_flags); 1805 if (!modparam_nohwcrypt) { 1806 __set_bit(CAPABILITY_HW_CRYPTO, &rt2x00dev->cap_flags); 1807 __set_bit(REQUIRE_COPY_IV, &rt2x00dev->cap_flags); 1808 } 1809 __set_bit(REQUIRE_SW_SEQNO, &rt2x00dev->cap_flags); 1810 __set_bit(REQUIRE_PS_AUTOWAKE, &rt2x00dev->cap_flags); 1811 1812 /* 1813 * Set the rssi offset. 1814 */ 1815 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET; 1816 1817 return 0; 1818 } 1819 1820 static const struct ieee80211_ops rt2500usb_mac80211_ops = { 1821 .tx = rt2x00mac_tx, 1822 .start = rt2x00mac_start, 1823 .stop = rt2x00mac_stop, 1824 .add_interface = rt2x00mac_add_interface, 1825 .remove_interface = rt2x00mac_remove_interface, 1826 .config = rt2x00mac_config, 1827 .configure_filter = rt2x00mac_configure_filter, 1828 .set_tim = rt2x00mac_set_tim, 1829 .set_key = rt2x00mac_set_key, 1830 .sw_scan_start = rt2x00mac_sw_scan_start, 1831 .sw_scan_complete = rt2x00mac_sw_scan_complete, 1832 .get_stats = rt2x00mac_get_stats, 1833 .bss_info_changed = rt2x00mac_bss_info_changed, 1834 .conf_tx = rt2x00mac_conf_tx, 1835 .rfkill_poll = rt2x00mac_rfkill_poll, 1836 .flush = rt2x00mac_flush, 1837 .set_antenna = rt2x00mac_set_antenna, 1838 .get_antenna = rt2x00mac_get_antenna, 1839 .get_ringparam = rt2x00mac_get_ringparam, 1840 .tx_frames_pending = rt2x00mac_tx_frames_pending, 1841 }; 1842 1843 static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = { 1844 .probe_hw = rt2500usb_probe_hw, 1845 .initialize = rt2x00usb_initialize, 1846 .uninitialize = rt2x00usb_uninitialize, 1847 .clear_entry = rt2x00usb_clear_entry, 1848 .set_device_state = rt2500usb_set_device_state, 1849 .rfkill_poll = rt2500usb_rfkill_poll, 1850 .link_stats = rt2500usb_link_stats, 1851 .reset_tuner = rt2500usb_reset_tuner, 1852 .watchdog = rt2x00usb_watchdog, 1853 .start_queue = rt2500usb_start_queue, 1854 .kick_queue = rt2x00usb_kick_queue, 1855 .stop_queue = rt2500usb_stop_queue, 1856 .flush_queue = rt2x00usb_flush_queue, 1857 .write_tx_desc = rt2500usb_write_tx_desc, 1858 .write_beacon = rt2500usb_write_beacon, 1859 .get_tx_data_len = rt2500usb_get_tx_data_len, 1860 .fill_rxdone = rt2500usb_fill_rxdone, 1861 .config_shared_key = rt2500usb_config_key, 1862 .config_pairwise_key = rt2500usb_config_key, 1863 .config_filter = rt2500usb_config_filter, 1864 .config_intf = rt2500usb_config_intf, 1865 .config_erp = rt2500usb_config_erp, 1866 .config_ant = rt2500usb_config_ant, 1867 .config = rt2500usb_config, 1868 }; 1869 1870 static void rt2500usb_queue_init(struct data_queue *queue) 1871 { 1872 switch (queue->qid) { 1873 case QID_RX: 1874 queue->limit = 32; 1875 queue->data_size = DATA_FRAME_SIZE; 1876 queue->desc_size = RXD_DESC_SIZE; 1877 queue->priv_size = sizeof(struct queue_entry_priv_usb); 1878 break; 1879 1880 case QID_AC_VO: 1881 case QID_AC_VI: 1882 case QID_AC_BE: 1883 case QID_AC_BK: 1884 queue->limit = 32; 1885 queue->data_size = DATA_FRAME_SIZE; 1886 queue->desc_size = TXD_DESC_SIZE; 1887 queue->priv_size = sizeof(struct queue_entry_priv_usb); 1888 break; 1889 1890 case QID_BEACON: 1891 queue->limit = 1; 1892 queue->data_size = MGMT_FRAME_SIZE; 1893 queue->desc_size = TXD_DESC_SIZE; 1894 queue->priv_size = sizeof(struct queue_entry_priv_usb_bcn); 1895 break; 1896 1897 case QID_ATIM: 1898 queue->limit = 8; 1899 queue->data_size = DATA_FRAME_SIZE; 1900 queue->desc_size = TXD_DESC_SIZE; 1901 queue->priv_size = sizeof(struct queue_entry_priv_usb); 1902 break; 1903 1904 default: 1905 BUG(); 1906 break; 1907 } 1908 } 1909 1910 static const struct rt2x00_ops rt2500usb_ops = { 1911 .name = KBUILD_MODNAME, 1912 .max_ap_intf = 1, 1913 .eeprom_size = EEPROM_SIZE, 1914 .rf_size = RF_SIZE, 1915 .tx_queues = NUM_TX_QUEUES, 1916 .queue_init = rt2500usb_queue_init, 1917 .lib = &rt2500usb_rt2x00_ops, 1918 .hw = &rt2500usb_mac80211_ops, 1919 #ifdef CONFIG_RT2X00_LIB_DEBUGFS 1920 .debugfs = &rt2500usb_rt2x00debug, 1921 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ 1922 }; 1923 1924 /* 1925 * rt2500usb module information. 1926 */ 1927 static struct usb_device_id rt2500usb_device_table[] = { 1928 /* ASUS */ 1929 { USB_DEVICE(0x0b05, 0x1706) }, 1930 { USB_DEVICE(0x0b05, 0x1707) }, 1931 /* Belkin */ 1932 { USB_DEVICE(0x050d, 0x7050) }, /* FCC ID: K7SF5D7050A ver. 2.x */ 1933 { USB_DEVICE(0x050d, 0x7051) }, 1934 /* Cisco Systems */ 1935 { USB_DEVICE(0x13b1, 0x000d) }, 1936 { USB_DEVICE(0x13b1, 0x0011) }, 1937 { USB_DEVICE(0x13b1, 0x001a) }, 1938 /* Conceptronic */ 1939 { USB_DEVICE(0x14b2, 0x3c02) }, 1940 /* D-LINK */ 1941 { USB_DEVICE(0x2001, 0x3c00) }, 1942 /* Gigabyte */ 1943 { USB_DEVICE(0x1044, 0x8001) }, 1944 { USB_DEVICE(0x1044, 0x8007) }, 1945 /* Hercules */ 1946 { USB_DEVICE(0x06f8, 0xe000) }, 1947 /* Melco */ 1948 { USB_DEVICE(0x0411, 0x005e) }, 1949 { USB_DEVICE(0x0411, 0x0066) }, 1950 { USB_DEVICE(0x0411, 0x0067) }, 1951 { USB_DEVICE(0x0411, 0x008b) }, 1952 { USB_DEVICE(0x0411, 0x0097) }, 1953 /* MSI */ 1954 { USB_DEVICE(0x0db0, 0x6861) }, 1955 { USB_DEVICE(0x0db0, 0x6865) }, 1956 { USB_DEVICE(0x0db0, 0x6869) }, 1957 /* Ralink */ 1958 { USB_DEVICE(0x148f, 0x1706) }, 1959 { USB_DEVICE(0x148f, 0x2570) }, 1960 { USB_DEVICE(0x148f, 0x9020) }, 1961 /* Sagem */ 1962 { USB_DEVICE(0x079b, 0x004b) }, 1963 /* Siemens */ 1964 { USB_DEVICE(0x0681, 0x3c06) }, 1965 /* SMC */ 1966 { USB_DEVICE(0x0707, 0xee13) }, 1967 /* Spairon */ 1968 { USB_DEVICE(0x114b, 0x0110) }, 1969 /* SURECOM */ 1970 { USB_DEVICE(0x0769, 0x11f3) }, 1971 /* Trust */ 1972 { USB_DEVICE(0x0eb0, 0x9020) }, 1973 /* VTech */ 1974 { USB_DEVICE(0x0f88, 0x3012) }, 1975 /* Zinwell */ 1976 { USB_DEVICE(0x5a57, 0x0260) }, 1977 { 0, } 1978 }; 1979 1980 MODULE_AUTHOR(DRV_PROJECT); 1981 MODULE_VERSION(DRV_VERSION); 1982 MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver."); 1983 MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards"); 1984 MODULE_DEVICE_TABLE(usb, rt2500usb_device_table); 1985 MODULE_LICENSE("GPL"); 1986 1987 static int rt2500usb_probe(struct usb_interface *usb_intf, 1988 const struct usb_device_id *id) 1989 { 1990 return rt2x00usb_probe(usb_intf, &rt2500usb_ops); 1991 } 1992 1993 static struct usb_driver rt2500usb_driver = { 1994 .name = KBUILD_MODNAME, 1995 .id_table = rt2500usb_device_table, 1996 .probe = rt2500usb_probe, 1997 .disconnect = rt2x00usb_disconnect, 1998 .suspend = rt2x00usb_suspend, 1999 .resume = rt2x00usb_resume, 2000 .reset_resume = rt2x00usb_resume, 2001 .disable_hub_initiated_lpm = 1, 2002 }; 2003 2004 module_usb_driver(rt2500usb_driver); 2005