1 /*
2 	Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 	<http://rt2x00.serialmonkey.com>
4 
5 	This program is free software; you can redistribute it and/or modify
6 	it under the terms of the GNU General Public License as published by
7 	the Free Software Foundation; either version 2 of the License, or
8 	(at your option) any later version.
9 
10 	This program is distributed in the hope that it will be useful,
11 	but WITHOUT ANY WARRANTY; without even the implied warranty of
12 	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 	GNU General Public License for more details.
14 
15 	You should have received a copy of the GNU General Public License
16 	along with this program; if not, see <http://www.gnu.org/licenses/>.
17  */
18 
19 /*
20 	Module: rt2500usb
21 	Abstract: rt2500usb device specific routines.
22 	Supported chipsets: RT2570.
23  */
24 
25 #include <linux/delay.h>
26 #include <linux/etherdevice.h>
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/slab.h>
30 #include <linux/usb.h>
31 
32 #include "rt2x00.h"
33 #include "rt2x00usb.h"
34 #include "rt2500usb.h"
35 
36 /*
37  * Allow hardware encryption to be disabled.
38  */
39 static bool modparam_nohwcrypt;
40 module_param_named(nohwcrypt, modparam_nohwcrypt, bool, 0444);
41 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
42 
43 /*
44  * Register access.
45  * All access to the CSR registers will go through the methods
46  * rt2500usb_register_read and rt2500usb_register_write.
47  * BBP and RF register require indirect register access,
48  * and use the CSR registers BBPCSR and RFCSR to achieve this.
49  * These indirect registers work with busy bits,
50  * and we will try maximal REGISTER_USB_BUSY_COUNT times to access
51  * the register while taking a REGISTER_BUSY_DELAY us delay
52  * between each attampt. When the busy bit is still set at that time,
53  * the access attempt is considered to have failed,
54  * and we will print an error.
55  * If the csr_mutex is already held then the _lock variants must
56  * be used instead.
57  */
58 static u16 rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
59 				   const unsigned int offset)
60 {
61 	__le16 reg;
62 	rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
63 				      USB_VENDOR_REQUEST_IN, offset,
64 				      &reg, sizeof(reg));
65 	return le16_to_cpu(reg);
66 }
67 
68 static u16 rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
69 					const unsigned int offset)
70 {
71 	__le16 reg;
72 	rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
73 				       USB_VENDOR_REQUEST_IN, offset,
74 				       &reg, sizeof(reg), REGISTER_TIMEOUT);
75 	return le16_to_cpu(reg);
76 }
77 
78 static void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
79 					    const unsigned int offset,
80 					    u16 value)
81 {
82 	__le16 reg = cpu_to_le16(value);
83 	rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
84 				      USB_VENDOR_REQUEST_OUT, offset,
85 				      &reg, sizeof(reg));
86 }
87 
88 static void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
89 						 const unsigned int offset,
90 						 u16 value)
91 {
92 	__le16 reg = cpu_to_le16(value);
93 	rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
94 				       USB_VENDOR_REQUEST_OUT, offset,
95 				       &reg, sizeof(reg), REGISTER_TIMEOUT);
96 }
97 
98 static void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
99 						 const unsigned int offset,
100 						 void *value, const u16 length)
101 {
102 	rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
103 				      USB_VENDOR_REQUEST_OUT, offset,
104 				      value, length);
105 }
106 
107 static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
108 				  const unsigned int offset,
109 				  struct rt2x00_field16 field,
110 				  u16 *reg)
111 {
112 	unsigned int i;
113 
114 	for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) {
115 		*reg = rt2500usb_register_read_lock(rt2x00dev, offset);
116 		if (!rt2x00_get_field16(*reg, field))
117 			return 1;
118 		udelay(REGISTER_BUSY_DELAY);
119 	}
120 
121 	rt2x00_err(rt2x00dev, "Indirect register access failed: offset=0x%.08x, value=0x%.08x\n",
122 		   offset, *reg);
123 	*reg = ~0;
124 
125 	return 0;
126 }
127 
128 #define WAIT_FOR_BBP(__dev, __reg) \
129 	rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg))
130 #define WAIT_FOR_RF(__dev, __reg) \
131 	rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg))
132 
133 static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
134 				const unsigned int word, const u8 value)
135 {
136 	u16 reg;
137 
138 	mutex_lock(&rt2x00dev->csr_mutex);
139 
140 	/*
141 	 * Wait until the BBP becomes available, afterwards we
142 	 * can safely write the new data into the register.
143 	 */
144 	if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
145 		reg = 0;
146 		rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
147 		rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
148 		rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
149 
150 		rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
151 	}
152 
153 	mutex_unlock(&rt2x00dev->csr_mutex);
154 }
155 
156 static u8 rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
157 			     const unsigned int word)
158 {
159 	u16 reg;
160 	u8 value;
161 
162 	mutex_lock(&rt2x00dev->csr_mutex);
163 
164 	/*
165 	 * Wait until the BBP becomes available, afterwards we
166 	 * can safely write the read request into the register.
167 	 * After the data has been written, we wait until hardware
168 	 * returns the correct value, if at any time the register
169 	 * doesn't become available in time, reg will be 0xffffffff
170 	 * which means we return 0xff to the caller.
171 	 */
172 	if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
173 		reg = 0;
174 		rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
175 		rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
176 
177 		rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
178 
179 		if (WAIT_FOR_BBP(rt2x00dev, &reg))
180 			reg = rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7);
181 	}
182 
183 	value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
184 
185 	mutex_unlock(&rt2x00dev->csr_mutex);
186 
187 	return value;
188 }
189 
190 static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
191 			       const unsigned int word, const u32 value)
192 {
193 	u16 reg;
194 
195 	mutex_lock(&rt2x00dev->csr_mutex);
196 
197 	/*
198 	 * Wait until the RF becomes available, afterwards we
199 	 * can safely write the new data into the register.
200 	 */
201 	if (WAIT_FOR_RF(rt2x00dev, &reg)) {
202 		reg = 0;
203 		rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
204 		rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
205 
206 		reg = 0;
207 		rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
208 		rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
209 		rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
210 		rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
211 
212 		rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
213 		rt2x00_rf_write(rt2x00dev, word, value);
214 	}
215 
216 	mutex_unlock(&rt2x00dev->csr_mutex);
217 }
218 
219 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
220 static u32 _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
221 				     const unsigned int offset)
222 {
223 	return rt2500usb_register_read(rt2x00dev, offset);
224 }
225 
226 static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
227 				      const unsigned int offset,
228 				      u32 value)
229 {
230 	rt2500usb_register_write(rt2x00dev, offset, value);
231 }
232 
233 static const struct rt2x00debug rt2500usb_rt2x00debug = {
234 	.owner	= THIS_MODULE,
235 	.csr	= {
236 		.read		= _rt2500usb_register_read,
237 		.write		= _rt2500usb_register_write,
238 		.flags		= RT2X00DEBUGFS_OFFSET,
239 		.word_base	= CSR_REG_BASE,
240 		.word_size	= sizeof(u16),
241 		.word_count	= CSR_REG_SIZE / sizeof(u16),
242 	},
243 	.eeprom	= {
244 		.read		= rt2x00_eeprom_read,
245 		.write		= rt2x00_eeprom_write,
246 		.word_base	= EEPROM_BASE,
247 		.word_size	= sizeof(u16),
248 		.word_count	= EEPROM_SIZE / sizeof(u16),
249 	},
250 	.bbp	= {
251 		.read		= rt2500usb_bbp_read,
252 		.write		= rt2500usb_bbp_write,
253 		.word_base	= BBP_BASE,
254 		.word_size	= sizeof(u8),
255 		.word_count	= BBP_SIZE / sizeof(u8),
256 	},
257 	.rf	= {
258 		.read		= rt2x00_rf_read,
259 		.write		= rt2500usb_rf_write,
260 		.word_base	= RF_BASE,
261 		.word_size	= sizeof(u32),
262 		.word_count	= RF_SIZE / sizeof(u32),
263 	},
264 };
265 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
266 
267 static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
268 {
269 	u16 reg;
270 
271 	reg = rt2500usb_register_read(rt2x00dev, MAC_CSR19);
272 	return rt2x00_get_field16(reg, MAC_CSR19_VAL7);
273 }
274 
275 #ifdef CONFIG_RT2X00_LIB_LEDS
276 static void rt2500usb_brightness_set(struct led_classdev *led_cdev,
277 				     enum led_brightness brightness)
278 {
279 	struct rt2x00_led *led =
280 	    container_of(led_cdev, struct rt2x00_led, led_dev);
281 	unsigned int enabled = brightness != LED_OFF;
282 	u16 reg;
283 
284 	reg = rt2500usb_register_read(led->rt2x00dev, MAC_CSR20);
285 
286 	if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
287 		rt2x00_set_field16(&reg, MAC_CSR20_LINK, enabled);
288 	else if (led->type == LED_TYPE_ACTIVITY)
289 		rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, enabled);
290 
291 	rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg);
292 }
293 
294 static int rt2500usb_blink_set(struct led_classdev *led_cdev,
295 			       unsigned long *delay_on,
296 			       unsigned long *delay_off)
297 {
298 	struct rt2x00_led *led =
299 	    container_of(led_cdev, struct rt2x00_led, led_dev);
300 	u16 reg;
301 
302 	reg = rt2500usb_register_read(led->rt2x00dev, MAC_CSR21);
303 	rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, *delay_on);
304 	rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, *delay_off);
305 	rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg);
306 
307 	return 0;
308 }
309 
310 static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev,
311 			       struct rt2x00_led *led,
312 			       enum led_type type)
313 {
314 	led->rt2x00dev = rt2x00dev;
315 	led->type = type;
316 	led->led_dev.brightness_set = rt2500usb_brightness_set;
317 	led->led_dev.blink_set = rt2500usb_blink_set;
318 	led->flags = LED_INITIALIZED;
319 }
320 #endif /* CONFIG_RT2X00_LIB_LEDS */
321 
322 /*
323  * Configuration handlers.
324  */
325 
326 /*
327  * rt2500usb does not differentiate between shared and pairwise
328  * keys, so we should use the same function for both key types.
329  */
330 static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
331 				struct rt2x00lib_crypto *crypto,
332 				struct ieee80211_key_conf *key)
333 {
334 	u32 mask;
335 	u16 reg;
336 	enum cipher curr_cipher;
337 
338 	if (crypto->cmd == SET_KEY) {
339 		/*
340 		 * Disallow to set WEP key other than with index 0,
341 		 * it is known that not work at least on some hardware.
342 		 * SW crypto will be used in that case.
343 		 */
344 		if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
345 		     key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
346 		    key->keyidx != 0)
347 			return -EOPNOTSUPP;
348 
349 		/*
350 		 * Pairwise key will always be entry 0, but this
351 		 * could collide with a shared key on the same
352 		 * position...
353 		 */
354 		mask = TXRX_CSR0_KEY_ID.bit_mask;
355 
356 		reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR0);
357 		curr_cipher = rt2x00_get_field16(reg, TXRX_CSR0_ALGORITHM);
358 		reg &= mask;
359 
360 		if (reg && reg == mask)
361 			return -ENOSPC;
362 
363 		reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
364 
365 		key->hw_key_idx += reg ? ffz(reg) : 0;
366 		/*
367 		 * Hardware requires that all keys use the same cipher
368 		 * (e.g. TKIP-only, AES-only, but not TKIP+AES).
369 		 * If this is not the first key, compare the cipher with the
370 		 * first one and fall back to SW crypto if not the same.
371 		 */
372 		if (key->hw_key_idx > 0 && crypto->cipher != curr_cipher)
373 			return -EOPNOTSUPP;
374 
375 		rt2500usb_register_multiwrite(rt2x00dev, KEY_ENTRY(key->hw_key_idx),
376 					      crypto->key, sizeof(crypto->key));
377 
378 		/*
379 		 * The driver does not support the IV/EIV generation
380 		 * in hardware. However it demands the data to be provided
381 		 * both separately as well as inside the frame.
382 		 * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib
383 		 * to ensure rt2x00lib will not strip the data from the
384 		 * frame after the copy, now we must tell mac80211
385 		 * to generate the IV/EIV data.
386 		 */
387 		key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
388 		key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
389 	}
390 
391 	/*
392 	 * TXRX_CSR0_KEY_ID contains only single-bit fields to indicate
393 	 * a particular key is valid.
394 	 */
395 	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR0);
396 	rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, crypto->cipher);
397 	rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
398 
399 	mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
400 	if (crypto->cmd == SET_KEY)
401 		mask |= 1 << key->hw_key_idx;
402 	else if (crypto->cmd == DISABLE_KEY)
403 		mask &= ~(1 << key->hw_key_idx);
404 	rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, mask);
405 	rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
406 
407 	return 0;
408 }
409 
410 static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
411 				    const unsigned int filter_flags)
412 {
413 	u16 reg;
414 
415 	/*
416 	 * Start configuration steps.
417 	 * Note that the version error will always be dropped
418 	 * and broadcast frames will always be accepted since
419 	 * there is no filter for it at this time.
420 	 */
421 	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR2);
422 	rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
423 			   !(filter_flags & FIF_FCSFAIL));
424 	rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
425 			   !(filter_flags & FIF_PLCPFAIL));
426 	rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
427 			   !(filter_flags & FIF_CONTROL));
428 	rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
429 			   !test_bit(CONFIG_MONITORING, &rt2x00dev->flags));
430 	rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
431 			   !test_bit(CONFIG_MONITORING, &rt2x00dev->flags) &&
432 			   !rt2x00dev->intf_ap_count);
433 	rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
434 	rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
435 			   !(filter_flags & FIF_ALLMULTI));
436 	rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
437 	rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
438 }
439 
440 static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
441 				  struct rt2x00_intf *intf,
442 				  struct rt2x00intf_conf *conf,
443 				  const unsigned int flags)
444 {
445 	unsigned int bcn_preload;
446 	u16 reg;
447 
448 	if (flags & CONFIG_UPDATE_TYPE) {
449 		/*
450 		 * Enable beacon config
451 		 */
452 		bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20);
453 		reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR20);
454 		rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET, bcn_preload >> 6);
455 		rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW,
456 				   2 * (conf->type != NL80211_IFTYPE_STATION));
457 		rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
458 
459 		/*
460 		 * Enable synchronisation.
461 		 */
462 		reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR18);
463 		rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
464 		rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
465 
466 		reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR19);
467 		rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, conf->sync);
468 		rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
469 	}
470 
471 	if (flags & CONFIG_UPDATE_MAC)
472 		rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
473 					      (3 * sizeof(__le16)));
474 
475 	if (flags & CONFIG_UPDATE_BSSID)
476 		rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
477 					      (3 * sizeof(__le16)));
478 }
479 
480 static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
481 				 struct rt2x00lib_erp *erp,
482 				 u32 changed)
483 {
484 	u16 reg;
485 
486 	if (changed & BSS_CHANGED_ERP_PREAMBLE) {
487 		reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR10);
488 		rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
489 				   !!erp->short_preamble);
490 		rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
491 	}
492 
493 	if (changed & BSS_CHANGED_BASIC_RATES)
494 		rt2500usb_register_write(rt2x00dev, TXRX_CSR11,
495 					 erp->basic_rates);
496 
497 	if (changed & BSS_CHANGED_BEACON_INT) {
498 		reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR18);
499 		rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,
500 				   erp->beacon_int * 4);
501 		rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
502 	}
503 
504 	if (changed & BSS_CHANGED_ERP_SLOT) {
505 		rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time);
506 		rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs);
507 		rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs);
508 	}
509 }
510 
511 static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
512 				 struct antenna_setup *ant)
513 {
514 	u8 r2;
515 	u8 r14;
516 	u16 csr5;
517 	u16 csr6;
518 
519 	/*
520 	 * We should never come here because rt2x00lib is supposed
521 	 * to catch this and send us the correct antenna explicitely.
522 	 */
523 	BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
524 	       ant->tx == ANTENNA_SW_DIVERSITY);
525 
526 	r2 = rt2500usb_bbp_read(rt2x00dev, 2);
527 	r14 = rt2500usb_bbp_read(rt2x00dev, 14);
528 	csr5 = rt2500usb_register_read(rt2x00dev, PHY_CSR5);
529 	csr6 = rt2500usb_register_read(rt2x00dev, PHY_CSR6);
530 
531 	/*
532 	 * Configure the TX antenna.
533 	 */
534 	switch (ant->tx) {
535 	case ANTENNA_HW_DIVERSITY:
536 		rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
537 		rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
538 		rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
539 		break;
540 	case ANTENNA_A:
541 		rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
542 		rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
543 		rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
544 		break;
545 	case ANTENNA_B:
546 	default:
547 		rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
548 		rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
549 		rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
550 		break;
551 	}
552 
553 	/*
554 	 * Configure the RX antenna.
555 	 */
556 	switch (ant->rx) {
557 	case ANTENNA_HW_DIVERSITY:
558 		rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
559 		break;
560 	case ANTENNA_A:
561 		rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
562 		break;
563 	case ANTENNA_B:
564 	default:
565 		rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
566 		break;
567 	}
568 
569 	/*
570 	 * RT2525E and RT5222 need to flip TX I/Q
571 	 */
572 	if (rt2x00_rf(rt2x00dev, RF2525E) || rt2x00_rf(rt2x00dev, RF5222)) {
573 		rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
574 		rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
575 		rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
576 
577 		/*
578 		 * RT2525E does not need RX I/Q Flip.
579 		 */
580 		if (rt2x00_rf(rt2x00dev, RF2525E))
581 			rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
582 	} else {
583 		rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
584 		rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
585 	}
586 
587 	rt2500usb_bbp_write(rt2x00dev, 2, r2);
588 	rt2500usb_bbp_write(rt2x00dev, 14, r14);
589 	rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
590 	rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
591 }
592 
593 static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
594 				     struct rf_channel *rf, const int txpower)
595 {
596 	/*
597 	 * Set TXpower.
598 	 */
599 	rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
600 
601 	/*
602 	 * For RT2525E we should first set the channel to half band higher.
603 	 */
604 	if (rt2x00_rf(rt2x00dev, RF2525E)) {
605 		static const u32 vals[] = {
606 			0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
607 			0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
608 			0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
609 			0x00000902, 0x00000906
610 		};
611 
612 		rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
613 		if (rf->rf4)
614 			rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
615 	}
616 
617 	rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
618 	rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
619 	rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
620 	if (rf->rf4)
621 		rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
622 }
623 
624 static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
625 				     const int txpower)
626 {
627 	u32 rf3;
628 
629 	rf3 = rt2x00_rf_read(rt2x00dev, 3);
630 	rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
631 	rt2500usb_rf_write(rt2x00dev, 3, rf3);
632 }
633 
634 static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev,
635 				struct rt2x00lib_conf *libconf)
636 {
637 	enum dev_state state =
638 	    (libconf->conf->flags & IEEE80211_CONF_PS) ?
639 		STATE_SLEEP : STATE_AWAKE;
640 	u16 reg;
641 
642 	if (state == STATE_SLEEP) {
643 		reg = rt2500usb_register_read(rt2x00dev, MAC_CSR18);
644 		rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON,
645 				   rt2x00dev->beacon_int - 20);
646 		rt2x00_set_field16(&reg, MAC_CSR18_BEACONS_BEFORE_WAKEUP,
647 				   libconf->conf->listen_interval - 1);
648 
649 		/* We must first disable autowake before it can be enabled */
650 		rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
651 		rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
652 
653 		rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 1);
654 		rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
655 	} else {
656 		reg = rt2500usb_register_read(rt2x00dev, MAC_CSR18);
657 		rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
658 		rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
659 	}
660 
661 	rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
662 }
663 
664 static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
665 			     struct rt2x00lib_conf *libconf,
666 			     const unsigned int flags)
667 {
668 	if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
669 		rt2500usb_config_channel(rt2x00dev, &libconf->rf,
670 					 libconf->conf->power_level);
671 	if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
672 	    !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
673 		rt2500usb_config_txpower(rt2x00dev,
674 					 libconf->conf->power_level);
675 	if (flags & IEEE80211_CONF_CHANGE_PS)
676 		rt2500usb_config_ps(rt2x00dev, libconf);
677 }
678 
679 /*
680  * Link tuning
681  */
682 static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
683 				 struct link_qual *qual)
684 {
685 	u16 reg;
686 
687 	/*
688 	 * Update FCS error count from register.
689 	 */
690 	reg = rt2500usb_register_read(rt2x00dev, STA_CSR0);
691 	qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
692 
693 	/*
694 	 * Update False CCA count from register.
695 	 */
696 	reg = rt2500usb_register_read(rt2x00dev, STA_CSR3);
697 	qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
698 }
699 
700 static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev,
701 				  struct link_qual *qual)
702 {
703 	u16 eeprom;
704 	u16 value;
705 
706 	eeprom = rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24);
707 	value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
708 	rt2500usb_bbp_write(rt2x00dev, 24, value);
709 
710 	eeprom = rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25);
711 	value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
712 	rt2500usb_bbp_write(rt2x00dev, 25, value);
713 
714 	eeprom = rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61);
715 	value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
716 	rt2500usb_bbp_write(rt2x00dev, 61, value);
717 
718 	eeprom = rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC);
719 	value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
720 	rt2500usb_bbp_write(rt2x00dev, 17, value);
721 
722 	qual->vgc_level = value;
723 }
724 
725 /*
726  * Queue handlers.
727  */
728 static void rt2500usb_start_queue(struct data_queue *queue)
729 {
730 	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
731 	u16 reg;
732 
733 	switch (queue->qid) {
734 	case QID_RX:
735 		reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR2);
736 		rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 0);
737 		rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
738 		break;
739 	case QID_BEACON:
740 		reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR19);
741 		rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
742 		rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
743 		rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
744 		rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
745 		break;
746 	default:
747 		break;
748 	}
749 }
750 
751 static void rt2500usb_stop_queue(struct data_queue *queue)
752 {
753 	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
754 	u16 reg;
755 
756 	switch (queue->qid) {
757 	case QID_RX:
758 		reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR2);
759 		rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
760 		rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
761 		break;
762 	case QID_BEACON:
763 		reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR19);
764 		rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
765 		rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
766 		rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
767 		rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
768 		break;
769 	default:
770 		break;
771 	}
772 }
773 
774 /*
775  * Initialization functions.
776  */
777 static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
778 {
779 	u16 reg;
780 
781 	rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
782 				    USB_MODE_TEST, REGISTER_TIMEOUT);
783 	rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
784 				    0x00f0, REGISTER_TIMEOUT);
785 
786 	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR2);
787 	rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
788 	rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
789 
790 	rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
791 	rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
792 
793 	reg = rt2500usb_register_read(rt2x00dev, MAC_CSR1);
794 	rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
795 	rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
796 	rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
797 	rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
798 
799 	reg = rt2500usb_register_read(rt2x00dev, MAC_CSR1);
800 	rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
801 	rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
802 	rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
803 	rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
804 
805 	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR5);
806 	rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
807 	rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
808 	rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
809 	rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
810 	rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
811 
812 	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR6);
813 	rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
814 	rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
815 	rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
816 	rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
817 	rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
818 
819 	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR7);
820 	rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
821 	rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
822 	rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
823 	rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
824 	rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
825 
826 	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR8);
827 	rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
828 	rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
829 	rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
830 	rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
831 	rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
832 
833 	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR19);
834 	rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
835 	rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 0);
836 	rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
837 	rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
838 	rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
839 
840 	rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
841 	rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
842 
843 	if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
844 		return -EBUSY;
845 
846 	reg = rt2500usb_register_read(rt2x00dev, MAC_CSR1);
847 	rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
848 	rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
849 	rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
850 	rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
851 
852 	if (rt2x00_rev(rt2x00dev) >= RT2570_VERSION_C) {
853 		reg = rt2500usb_register_read(rt2x00dev, PHY_CSR2);
854 		rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
855 	} else {
856 		reg = 0;
857 		rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
858 		rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
859 	}
860 	rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
861 
862 	rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
863 	rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
864 	rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
865 	rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
866 
867 	reg = rt2500usb_register_read(rt2x00dev, MAC_CSR8);
868 	rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
869 			   rt2x00dev->rx->data_size);
870 	rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
871 
872 	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR0);
873 	rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, CIPHER_NONE);
874 	rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
875 	rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0);
876 	rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
877 
878 	reg = rt2500usb_register_read(rt2x00dev, MAC_CSR18);
879 	rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
880 	rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
881 
882 	reg = rt2500usb_register_read(rt2x00dev, PHY_CSR4);
883 	rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
884 	rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
885 
886 	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR1);
887 	rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
888 	rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
889 
890 	return 0;
891 }
892 
893 static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
894 {
895 	unsigned int i;
896 	u8 value;
897 
898 	for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) {
899 		value = rt2500usb_bbp_read(rt2x00dev, 0);
900 		if ((value != 0xff) && (value != 0x00))
901 			return 0;
902 		udelay(REGISTER_BUSY_DELAY);
903 	}
904 
905 	rt2x00_err(rt2x00dev, "BBP register access failed, aborting\n");
906 	return -EACCES;
907 }
908 
909 static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
910 {
911 	unsigned int i;
912 	u16 eeprom;
913 	u8 value;
914 	u8 reg_id;
915 
916 	if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev)))
917 		return -EACCES;
918 
919 	rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
920 	rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
921 	rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
922 	rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
923 	rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
924 	rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
925 	rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
926 	rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
927 	rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
928 	rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
929 	rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
930 	rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
931 	rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
932 	rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
933 	rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
934 	rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
935 	rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
936 	rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
937 	rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
938 	rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
939 	rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
940 	rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
941 	rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
942 	rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
943 	rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
944 	rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
945 	rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
946 	rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
947 	rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
948 	rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
949 	rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
950 
951 	for (i = 0; i < EEPROM_BBP_SIZE; i++) {
952 		eeprom = rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i);
953 
954 		if (eeprom != 0xffff && eeprom != 0x0000) {
955 			reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
956 			value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
957 			rt2500usb_bbp_write(rt2x00dev, reg_id, value);
958 		}
959 	}
960 
961 	return 0;
962 }
963 
964 /*
965  * Device state switch handlers.
966  */
967 static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
968 {
969 	/*
970 	 * Initialize all registers.
971 	 */
972 	if (unlikely(rt2500usb_init_registers(rt2x00dev) ||
973 		     rt2500usb_init_bbp(rt2x00dev)))
974 		return -EIO;
975 
976 	return 0;
977 }
978 
979 static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
980 {
981 	rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
982 	rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
983 
984 	/*
985 	 * Disable synchronisation.
986 	 */
987 	rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
988 
989 	rt2x00usb_disable_radio(rt2x00dev);
990 }
991 
992 static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
993 			       enum dev_state state)
994 {
995 	u16 reg;
996 	u16 reg2;
997 	unsigned int i;
998 	char put_to_sleep;
999 	char bbp_state;
1000 	char rf_state;
1001 
1002 	put_to_sleep = (state != STATE_AWAKE);
1003 
1004 	reg = 0;
1005 	rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
1006 	rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
1007 	rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
1008 	rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1009 	rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
1010 	rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1011 
1012 	/*
1013 	 * Device is not guaranteed to be in the requested state yet.
1014 	 * We must wait until the register indicates that the
1015 	 * device has entered the correct state.
1016 	 */
1017 	for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) {
1018 		reg2 = rt2500usb_register_read(rt2x00dev, MAC_CSR17);
1019 		bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
1020 		rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
1021 		if (bbp_state == state && rf_state == state)
1022 			return 0;
1023 		rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1024 		msleep(30);
1025 	}
1026 
1027 	return -EBUSY;
1028 }
1029 
1030 static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1031 				      enum dev_state state)
1032 {
1033 	int retval = 0;
1034 
1035 	switch (state) {
1036 	case STATE_RADIO_ON:
1037 		retval = rt2500usb_enable_radio(rt2x00dev);
1038 		break;
1039 	case STATE_RADIO_OFF:
1040 		rt2500usb_disable_radio(rt2x00dev);
1041 		break;
1042 	case STATE_RADIO_IRQ_ON:
1043 	case STATE_RADIO_IRQ_OFF:
1044 		/* No support, but no error either */
1045 		break;
1046 	case STATE_DEEP_SLEEP:
1047 	case STATE_SLEEP:
1048 	case STATE_STANDBY:
1049 	case STATE_AWAKE:
1050 		retval = rt2500usb_set_state(rt2x00dev, state);
1051 		break;
1052 	default:
1053 		retval = -ENOTSUPP;
1054 		break;
1055 	}
1056 
1057 	if (unlikely(retval))
1058 		rt2x00_err(rt2x00dev, "Device failed to enter state %d (%d)\n",
1059 			   state, retval);
1060 
1061 	return retval;
1062 }
1063 
1064 /*
1065  * TX descriptor initialization
1066  */
1067 static void rt2500usb_write_tx_desc(struct queue_entry *entry,
1068 				    struct txentry_desc *txdesc)
1069 {
1070 	struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1071 	__le32 *txd = (__le32 *) entry->skb->data;
1072 	u32 word;
1073 
1074 	/*
1075 	 * Start writing the descriptor words.
1076 	 */
1077 	word = rt2x00_desc_read(txd, 0);
1078 	rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit);
1079 	rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1080 			   test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
1081 	rt2x00_set_field32(&word, TXD_W0_ACK,
1082 			   test_bit(ENTRY_TXD_ACK, &txdesc->flags));
1083 	rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1084 			   test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
1085 	rt2x00_set_field32(&word, TXD_W0_OFDM,
1086 			   (txdesc->rate_mode == RATE_MODE_OFDM));
1087 	rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
1088 			   test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags));
1089 	rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->u.plcp.ifs);
1090 	rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, txdesc->length);
1091 	rt2x00_set_field32(&word, TXD_W0_CIPHER, !!txdesc->cipher);
1092 	rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx);
1093 	rt2x00_desc_write(txd, 0, word);
1094 
1095 	word = rt2x00_desc_read(txd, 1);
1096 	rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset);
1097 	rt2x00_set_field32(&word, TXD_W1_AIFS, entry->queue->aifs);
1098 	rt2x00_set_field32(&word, TXD_W1_CWMIN, entry->queue->cw_min);
1099 	rt2x00_set_field32(&word, TXD_W1_CWMAX, entry->queue->cw_max);
1100 	rt2x00_desc_write(txd, 1, word);
1101 
1102 	word = rt2x00_desc_read(txd, 2);
1103 	rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->u.plcp.signal);
1104 	rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->u.plcp.service);
1105 	rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW,
1106 			   txdesc->u.plcp.length_low);
1107 	rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH,
1108 			   txdesc->u.plcp.length_high);
1109 	rt2x00_desc_write(txd, 2, word);
1110 
1111 	if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) {
1112 		_rt2x00_desc_write(txd, 3, skbdesc->iv[0]);
1113 		_rt2x00_desc_write(txd, 4, skbdesc->iv[1]);
1114 	}
1115 
1116 	/*
1117 	 * Register descriptor details in skb frame descriptor.
1118 	 */
1119 	skbdesc->flags |= SKBDESC_DESC_IN_SKB;
1120 	skbdesc->desc = txd;
1121 	skbdesc->desc_len = TXD_DESC_SIZE;
1122 }
1123 
1124 /*
1125  * TX data initialization
1126  */
1127 static void rt2500usb_beacondone(struct urb *urb);
1128 
1129 static void rt2500usb_write_beacon(struct queue_entry *entry,
1130 				   struct txentry_desc *txdesc)
1131 {
1132 	struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1133 	struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev);
1134 	struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
1135 	int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint);
1136 	int length;
1137 	u16 reg, reg0;
1138 
1139 	/*
1140 	 * Disable beaconing while we are reloading the beacon data,
1141 	 * otherwise we might be sending out invalid data.
1142 	 */
1143 	reg = rt2500usb_register_read(rt2x00dev, TXRX_CSR19);
1144 	rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
1145 	rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1146 
1147 	/*
1148 	 * Add space for the descriptor in front of the skb.
1149 	 */
1150 	skb_push(entry->skb, TXD_DESC_SIZE);
1151 	memset(entry->skb->data, 0, TXD_DESC_SIZE);
1152 
1153 	/*
1154 	 * Write the TX descriptor for the beacon.
1155 	 */
1156 	rt2500usb_write_tx_desc(entry, txdesc);
1157 
1158 	/*
1159 	 * Dump beacon to userspace through debugfs.
1160 	 */
1161 	rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry);
1162 
1163 	/*
1164 	 * USB devices cannot blindly pass the skb->len as the
1165 	 * length of the data to usb_fill_bulk_urb. Pass the skb
1166 	 * to the driver to determine what the length should be.
1167 	 */
1168 	length = rt2x00dev->ops->lib->get_tx_data_len(entry);
1169 
1170 	usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe,
1171 			  entry->skb->data, length, rt2500usb_beacondone,
1172 			  entry);
1173 
1174 	/*
1175 	 * Second we need to create the guardian byte.
1176 	 * We only need a single byte, so lets recycle
1177 	 * the 'flags' field we are not using for beacons.
1178 	 */
1179 	bcn_priv->guardian_data = 0;
1180 	usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe,
1181 			  &bcn_priv->guardian_data, 1, rt2500usb_beacondone,
1182 			  entry);
1183 
1184 	/*
1185 	 * Send out the guardian byte.
1186 	 */
1187 	usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC);
1188 
1189 	/*
1190 	 * Enable beaconing again.
1191 	 */
1192 	rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
1193 	rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
1194 	reg0 = reg;
1195 	rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
1196 	/*
1197 	 * Beacon generation will fail initially.
1198 	 * To prevent this we need to change the TXRX_CSR19
1199 	 * register several times (reg0 is the same as reg
1200 	 * except for TXRX_CSR19_BEACON_GEN, which is 0 in reg0
1201 	 * and 1 in reg).
1202 	 */
1203 	rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1204 	rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
1205 	rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1206 	rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
1207 	rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1208 }
1209 
1210 static int rt2500usb_get_tx_data_len(struct queue_entry *entry)
1211 {
1212 	int length;
1213 
1214 	/*
1215 	 * The length _must_ be a multiple of 2,
1216 	 * but it must _not_ be a multiple of the USB packet size.
1217 	 */
1218 	length = roundup(entry->skb->len, 2);
1219 	length += (2 * !(length % entry->queue->usb_maxpacket));
1220 
1221 	return length;
1222 }
1223 
1224 /*
1225  * RX control handlers
1226  */
1227 static void rt2500usb_fill_rxdone(struct queue_entry *entry,
1228 				  struct rxdone_entry_desc *rxdesc)
1229 {
1230 	struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1231 	struct queue_entry_priv_usb *entry_priv = entry->priv_data;
1232 	struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1233 	__le32 *rxd =
1234 	    (__le32 *)(entry->skb->data +
1235 		       (entry_priv->urb->actual_length -
1236 			entry->queue->desc_size));
1237 	u32 word0;
1238 	u32 word1;
1239 
1240 	/*
1241 	 * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of
1242 	 * frame data in rt2x00usb.
1243 	 */
1244 	memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
1245 	rxd = (__le32 *)skbdesc->desc;
1246 
1247 	/*
1248 	 * It is now safe to read the descriptor on all architectures.
1249 	 */
1250 	word0 = rt2x00_desc_read(rxd, 0);
1251 	word1 = rt2x00_desc_read(rxd, 1);
1252 
1253 	if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1254 		rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
1255 	if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
1256 		rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
1257 
1258 	rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER);
1259 	if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR))
1260 		rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY;
1261 
1262 	if (rxdesc->cipher != CIPHER_NONE) {
1263 		rxdesc->iv[0] = _rt2x00_desc_read(rxd, 2);
1264 		rxdesc->iv[1] = _rt2x00_desc_read(rxd, 3);
1265 		rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
1266 
1267 		/* ICV is located at the end of frame */
1268 
1269 		rxdesc->flags |= RX_FLAG_MMIC_STRIPPED;
1270 		if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
1271 			rxdesc->flags |= RX_FLAG_DECRYPTED;
1272 		else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
1273 			rxdesc->flags |= RX_FLAG_MMIC_ERROR;
1274 	}
1275 
1276 	/*
1277 	 * Obtain the status about this packet.
1278 	 * When frame was received with an OFDM bitrate,
1279 	 * the signal is the PLCP value. If it was received with
1280 	 * a CCK bitrate the signal is the rate in 100kbit/s.
1281 	 */
1282 	rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1283 	rxdesc->rssi =
1284 	    rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset;
1285 	rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1286 
1287 	if (rt2x00_get_field32(word0, RXD_W0_OFDM))
1288 		rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
1289 	else
1290 		rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE;
1291 	if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
1292 		rxdesc->dev_flags |= RXDONE_MY_BSS;
1293 
1294 	/*
1295 	 * Adjust the skb memory window to the frame boundaries.
1296 	 */
1297 	skb_trim(entry->skb, rxdesc->size);
1298 }
1299 
1300 /*
1301  * Interrupt functions.
1302  */
1303 static void rt2500usb_beacondone(struct urb *urb)
1304 {
1305 	struct queue_entry *entry = (struct queue_entry *)urb->context;
1306 	struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
1307 
1308 	if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
1309 		return;
1310 
1311 	/*
1312 	 * Check if this was the guardian beacon,
1313 	 * if that was the case we need to send the real beacon now.
1314 	 * Otherwise we should free the sk_buffer, the device
1315 	 * should be doing the rest of the work now.
1316 	 */
1317 	if (bcn_priv->guardian_urb == urb) {
1318 		usb_submit_urb(bcn_priv->urb, GFP_ATOMIC);
1319 	} else if (bcn_priv->urb == urb) {
1320 		dev_kfree_skb(entry->skb);
1321 		entry->skb = NULL;
1322 	}
1323 }
1324 
1325 /*
1326  * Device probe functions.
1327  */
1328 static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1329 {
1330 	u16 word;
1331 	u8 *mac;
1332 	u8 bbp;
1333 
1334 	rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1335 
1336 	/*
1337 	 * Start validation of the data that has been read.
1338 	 */
1339 	mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1340 	rt2x00lib_set_mac_address(rt2x00dev, mac);
1341 
1342 	word = rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA);
1343 	if (word == 0xffff) {
1344 		rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1345 		rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1346 				   ANTENNA_SW_DIVERSITY);
1347 		rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1348 				   ANTENNA_SW_DIVERSITY);
1349 		rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
1350 				   LED_MODE_DEFAULT);
1351 		rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1352 		rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1353 		rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1354 		rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1355 		rt2x00_eeprom_dbg(rt2x00dev, "Antenna: 0x%04x\n", word);
1356 	}
1357 
1358 	word = rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC);
1359 	if (word == 0xffff) {
1360 		rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1361 		rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1362 		rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1363 		rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1364 		rt2x00_eeprom_dbg(rt2x00dev, "NIC: 0x%04x\n", word);
1365 	}
1366 
1367 	word = rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET);
1368 	if (word == 0xffff) {
1369 		rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1370 				   DEFAULT_RSSI_OFFSET);
1371 		rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1372 		rt2x00_eeprom_dbg(rt2x00dev, "Calibrate offset: 0x%04x\n",
1373 				  word);
1374 	}
1375 
1376 	word = rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE);
1377 	if (word == 0xffff) {
1378 		rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1379 		rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1380 		rt2x00_eeprom_dbg(rt2x00dev, "BBPtune: 0x%04x\n", word);
1381 	}
1382 
1383 	/*
1384 	 * Switch lower vgc bound to current BBP R17 value,
1385 	 * lower the value a bit for better quality.
1386 	 */
1387 	bbp = rt2500usb_bbp_read(rt2x00dev, 17);
1388 	bbp -= 6;
1389 
1390 	word = rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC);
1391 	if (word == 0xffff) {
1392 		rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
1393 		rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1394 		rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1395 		rt2x00_eeprom_dbg(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
1396 	} else {
1397 		rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1398 		rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1399 	}
1400 
1401 	word = rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17);
1402 	if (word == 0xffff) {
1403 		rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1404 		rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1405 		rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1406 		rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
1407 	}
1408 
1409 	word = rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24);
1410 	if (word == 0xffff) {
1411 		rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1412 		rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1413 		rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1414 		rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1415 	}
1416 
1417 	word = rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25);
1418 	if (word == 0xffff) {
1419 		rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1420 		rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1421 		rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1422 		rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1423 	}
1424 
1425 	word = rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61);
1426 	if (word == 0xffff) {
1427 		rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1428 		rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1429 		rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1430 		rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1431 	}
1432 
1433 	return 0;
1434 }
1435 
1436 static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1437 {
1438 	u16 reg;
1439 	u16 value;
1440 	u16 eeprom;
1441 
1442 	/*
1443 	 * Read EEPROM word for configuration.
1444 	 */
1445 	eeprom = rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA);
1446 
1447 	/*
1448 	 * Identify RF chipset.
1449 	 */
1450 	value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1451 	reg = rt2500usb_register_read(rt2x00dev, MAC_CSR0);
1452 	rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1453 
1454 	if (((reg & 0xfff0) != 0) || ((reg & 0x0000000f) == 0)) {
1455 		rt2x00_err(rt2x00dev, "Invalid RT chipset detected\n");
1456 		return -ENODEV;
1457 	}
1458 
1459 	if (!rt2x00_rf(rt2x00dev, RF2522) &&
1460 	    !rt2x00_rf(rt2x00dev, RF2523) &&
1461 	    !rt2x00_rf(rt2x00dev, RF2524) &&
1462 	    !rt2x00_rf(rt2x00dev, RF2525) &&
1463 	    !rt2x00_rf(rt2x00dev, RF2525E) &&
1464 	    !rt2x00_rf(rt2x00dev, RF5222)) {
1465 		rt2x00_err(rt2x00dev, "Invalid RF chipset detected\n");
1466 		return -ENODEV;
1467 	}
1468 
1469 	/*
1470 	 * Identify default antenna configuration.
1471 	 */
1472 	rt2x00dev->default_ant.tx =
1473 	    rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1474 	rt2x00dev->default_ant.rx =
1475 	    rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1476 
1477 	/*
1478 	 * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
1479 	 * I am not 100% sure about this, but the legacy drivers do not
1480 	 * indicate antenna swapping in software is required when
1481 	 * diversity is enabled.
1482 	 */
1483 	if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
1484 		rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
1485 	if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
1486 		rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
1487 
1488 	/*
1489 	 * Store led mode, for correct led behaviour.
1490 	 */
1491 #ifdef CONFIG_RT2X00_LIB_LEDS
1492 	value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1493 
1494 	rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
1495 	if (value == LED_MODE_TXRX_ACTIVITY ||
1496 	    value == LED_MODE_DEFAULT ||
1497 	    value == LED_MODE_ASUS)
1498 		rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual,
1499 				   LED_TYPE_ACTIVITY);
1500 #endif /* CONFIG_RT2X00_LIB_LEDS */
1501 
1502 	/*
1503 	 * Detect if this device has an hardware controlled radio.
1504 	 */
1505 	if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO))
1506 		__set_bit(CAPABILITY_HW_BUTTON, &rt2x00dev->cap_flags);
1507 
1508 	/*
1509 	 * Read the RSSI <-> dBm offset information.
1510 	 */
1511 	eeprom = rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET);
1512 	rt2x00dev->rssi_offset =
1513 	    rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1514 
1515 	return 0;
1516 }
1517 
1518 /*
1519  * RF value list for RF2522
1520  * Supports: 2.4 GHz
1521  */
1522 static const struct rf_channel rf_vals_bg_2522[] = {
1523 	{ 1,  0x00002050, 0x000c1fda, 0x00000101, 0 },
1524 	{ 2,  0x00002050, 0x000c1fee, 0x00000101, 0 },
1525 	{ 3,  0x00002050, 0x000c2002, 0x00000101, 0 },
1526 	{ 4,  0x00002050, 0x000c2016, 0x00000101, 0 },
1527 	{ 5,  0x00002050, 0x000c202a, 0x00000101, 0 },
1528 	{ 6,  0x00002050, 0x000c203e, 0x00000101, 0 },
1529 	{ 7,  0x00002050, 0x000c2052, 0x00000101, 0 },
1530 	{ 8,  0x00002050, 0x000c2066, 0x00000101, 0 },
1531 	{ 9,  0x00002050, 0x000c207a, 0x00000101, 0 },
1532 	{ 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1533 	{ 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1534 	{ 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1535 	{ 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1536 	{ 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1537 };
1538 
1539 /*
1540  * RF value list for RF2523
1541  * Supports: 2.4 GHz
1542  */
1543 static const struct rf_channel rf_vals_bg_2523[] = {
1544 	{ 1,  0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1545 	{ 2,  0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1546 	{ 3,  0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1547 	{ 4,  0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1548 	{ 5,  0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1549 	{ 6,  0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1550 	{ 7,  0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1551 	{ 8,  0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1552 	{ 9,  0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1553 	{ 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1554 	{ 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1555 	{ 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1556 	{ 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1557 	{ 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1558 };
1559 
1560 /*
1561  * RF value list for RF2524
1562  * Supports: 2.4 GHz
1563  */
1564 static const struct rf_channel rf_vals_bg_2524[] = {
1565 	{ 1,  0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1566 	{ 2,  0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1567 	{ 3,  0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1568 	{ 4,  0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1569 	{ 5,  0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1570 	{ 6,  0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1571 	{ 7,  0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1572 	{ 8,  0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1573 	{ 9,  0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1574 	{ 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1575 	{ 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1576 	{ 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1577 	{ 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1578 	{ 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1579 };
1580 
1581 /*
1582  * RF value list for RF2525
1583  * Supports: 2.4 GHz
1584  */
1585 static const struct rf_channel rf_vals_bg_2525[] = {
1586 	{ 1,  0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1587 	{ 2,  0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1588 	{ 3,  0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1589 	{ 4,  0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1590 	{ 5,  0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1591 	{ 6,  0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1592 	{ 7,  0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1593 	{ 8,  0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1594 	{ 9,  0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1595 	{ 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1596 	{ 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1597 	{ 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1598 	{ 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1599 	{ 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1600 };
1601 
1602 /*
1603  * RF value list for RF2525e
1604  * Supports: 2.4 GHz
1605  */
1606 static const struct rf_channel rf_vals_bg_2525e[] = {
1607 	{ 1,  0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1608 	{ 2,  0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1609 	{ 3,  0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1610 	{ 4,  0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1611 	{ 5,  0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1612 	{ 6,  0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1613 	{ 7,  0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1614 	{ 8,  0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1615 	{ 9,  0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1616 	{ 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1617 	{ 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1618 	{ 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1619 	{ 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1620 	{ 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1621 };
1622 
1623 /*
1624  * RF value list for RF5222
1625  * Supports: 2.4 GHz & 5.2 GHz
1626  */
1627 static const struct rf_channel rf_vals_5222[] = {
1628 	{ 1,  0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1629 	{ 2,  0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1630 	{ 3,  0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1631 	{ 4,  0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1632 	{ 5,  0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1633 	{ 6,  0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1634 	{ 7,  0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1635 	{ 8,  0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1636 	{ 9,  0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1637 	{ 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1638 	{ 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1639 	{ 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1640 	{ 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1641 	{ 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1642 
1643 	/* 802.11 UNI / HyperLan 2 */
1644 	{ 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1645 	{ 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1646 	{ 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1647 	{ 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1648 	{ 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1649 	{ 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1650 	{ 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1651 	{ 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1652 
1653 	/* 802.11 HyperLan 2 */
1654 	{ 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1655 	{ 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1656 	{ 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1657 	{ 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1658 	{ 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1659 	{ 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1660 	{ 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1661 	{ 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1662 	{ 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1663 	{ 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1664 
1665 	/* 802.11 UNII */
1666 	{ 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1667 	{ 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1668 	{ 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1669 	{ 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1670 	{ 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1671 };
1672 
1673 static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1674 {
1675 	struct hw_mode_spec *spec = &rt2x00dev->spec;
1676 	struct channel_info *info;
1677 	char *tx_power;
1678 	unsigned int i;
1679 
1680 	/*
1681 	 * Initialize all hw fields.
1682 	 *
1683 	 * Don't set IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING unless we are
1684 	 * capable of sending the buffered frames out after the DTIM
1685 	 * transmission using rt2x00lib_beacondone. This will send out
1686 	 * multicast and broadcast traffic immediately instead of buffering it
1687 	 * infinitly and thus dropping it after some time.
1688 	 */
1689 	ieee80211_hw_set(rt2x00dev->hw, PS_NULLFUNC_STACK);
1690 	ieee80211_hw_set(rt2x00dev->hw, SUPPORTS_PS);
1691 	ieee80211_hw_set(rt2x00dev->hw, RX_INCLUDES_FCS);
1692 	ieee80211_hw_set(rt2x00dev->hw, SIGNAL_DBM);
1693 
1694 	/*
1695 	 * Disable powersaving as default.
1696 	 */
1697 	rt2x00dev->hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
1698 
1699 	SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
1700 	SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1701 				rt2x00_eeprom_addr(rt2x00dev,
1702 						   EEPROM_MAC_ADDR_0));
1703 
1704 	/*
1705 	 * Initialize hw_mode information.
1706 	 */
1707 	spec->supported_bands = SUPPORT_BAND_2GHZ;
1708 	spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
1709 
1710 	if (rt2x00_rf(rt2x00dev, RF2522)) {
1711 		spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1712 		spec->channels = rf_vals_bg_2522;
1713 	} else if (rt2x00_rf(rt2x00dev, RF2523)) {
1714 		spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1715 		spec->channels = rf_vals_bg_2523;
1716 	} else if (rt2x00_rf(rt2x00dev, RF2524)) {
1717 		spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1718 		spec->channels = rf_vals_bg_2524;
1719 	} else if (rt2x00_rf(rt2x00dev, RF2525)) {
1720 		spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1721 		spec->channels = rf_vals_bg_2525;
1722 	} else if (rt2x00_rf(rt2x00dev, RF2525E)) {
1723 		spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1724 		spec->channels = rf_vals_bg_2525e;
1725 	} else if (rt2x00_rf(rt2x00dev, RF5222)) {
1726 		spec->supported_bands |= SUPPORT_BAND_5GHZ;
1727 		spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1728 		spec->channels = rf_vals_5222;
1729 	}
1730 
1731 	/*
1732 	 * Create channel information array
1733 	 */
1734 	info = kcalloc(spec->num_channels, sizeof(*info), GFP_KERNEL);
1735 	if (!info)
1736 		return -ENOMEM;
1737 
1738 	spec->channels_info = info;
1739 
1740 	tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1741 	for (i = 0; i < 14; i++) {
1742 		info[i].max_power = MAX_TXPOWER;
1743 		info[i].default_power1 = TXPOWER_FROM_DEV(tx_power[i]);
1744 	}
1745 
1746 	if (spec->num_channels > 14) {
1747 		for (i = 14; i < spec->num_channels; i++) {
1748 			info[i].max_power = MAX_TXPOWER;
1749 			info[i].default_power1 = DEFAULT_TXPOWER;
1750 		}
1751 	}
1752 
1753 	return 0;
1754 }
1755 
1756 static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1757 {
1758 	int retval;
1759 	u16 reg;
1760 
1761 	/*
1762 	 * Allocate eeprom data.
1763 	 */
1764 	retval = rt2500usb_validate_eeprom(rt2x00dev);
1765 	if (retval)
1766 		return retval;
1767 
1768 	retval = rt2500usb_init_eeprom(rt2x00dev);
1769 	if (retval)
1770 		return retval;
1771 
1772 	/*
1773 	 * Enable rfkill polling by setting GPIO direction of the
1774 	 * rfkill switch GPIO pin correctly.
1775 	 */
1776 	reg = rt2500usb_register_read(rt2x00dev, MAC_CSR19);
1777 	rt2x00_set_field16(&reg, MAC_CSR19_DIR0, 0);
1778 	rt2500usb_register_write(rt2x00dev, MAC_CSR19, reg);
1779 
1780 	/*
1781 	 * Initialize hw specifications.
1782 	 */
1783 	retval = rt2500usb_probe_hw_mode(rt2x00dev);
1784 	if (retval)
1785 		return retval;
1786 
1787 	/*
1788 	 * This device requires the atim queue
1789 	 */
1790 	__set_bit(REQUIRE_ATIM_QUEUE, &rt2x00dev->cap_flags);
1791 	__set_bit(REQUIRE_BEACON_GUARD, &rt2x00dev->cap_flags);
1792 	if (!modparam_nohwcrypt) {
1793 		__set_bit(CAPABILITY_HW_CRYPTO, &rt2x00dev->cap_flags);
1794 		__set_bit(REQUIRE_COPY_IV, &rt2x00dev->cap_flags);
1795 	}
1796 	__set_bit(REQUIRE_SW_SEQNO, &rt2x00dev->cap_flags);
1797 	__set_bit(REQUIRE_PS_AUTOWAKE, &rt2x00dev->cap_flags);
1798 
1799 	/*
1800 	 * Set the rssi offset.
1801 	 */
1802 	rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1803 
1804 	return 0;
1805 }
1806 
1807 static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1808 	.tx			= rt2x00mac_tx,
1809 	.start			= rt2x00mac_start,
1810 	.stop			= rt2x00mac_stop,
1811 	.add_interface		= rt2x00mac_add_interface,
1812 	.remove_interface	= rt2x00mac_remove_interface,
1813 	.config			= rt2x00mac_config,
1814 	.configure_filter	= rt2x00mac_configure_filter,
1815 	.set_tim		= rt2x00mac_set_tim,
1816 	.set_key		= rt2x00mac_set_key,
1817 	.sw_scan_start		= rt2x00mac_sw_scan_start,
1818 	.sw_scan_complete	= rt2x00mac_sw_scan_complete,
1819 	.get_stats		= rt2x00mac_get_stats,
1820 	.bss_info_changed	= rt2x00mac_bss_info_changed,
1821 	.conf_tx		= rt2x00mac_conf_tx,
1822 	.rfkill_poll		= rt2x00mac_rfkill_poll,
1823 	.flush			= rt2x00mac_flush,
1824 	.set_antenna		= rt2x00mac_set_antenna,
1825 	.get_antenna		= rt2x00mac_get_antenna,
1826 	.get_ringparam		= rt2x00mac_get_ringparam,
1827 	.tx_frames_pending	= rt2x00mac_tx_frames_pending,
1828 };
1829 
1830 static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1831 	.probe_hw		= rt2500usb_probe_hw,
1832 	.initialize		= rt2x00usb_initialize,
1833 	.uninitialize		= rt2x00usb_uninitialize,
1834 	.clear_entry		= rt2x00usb_clear_entry,
1835 	.set_device_state	= rt2500usb_set_device_state,
1836 	.rfkill_poll		= rt2500usb_rfkill_poll,
1837 	.link_stats		= rt2500usb_link_stats,
1838 	.reset_tuner		= rt2500usb_reset_tuner,
1839 	.watchdog		= rt2x00usb_watchdog,
1840 	.start_queue		= rt2500usb_start_queue,
1841 	.kick_queue		= rt2x00usb_kick_queue,
1842 	.stop_queue		= rt2500usb_stop_queue,
1843 	.flush_queue		= rt2x00usb_flush_queue,
1844 	.write_tx_desc		= rt2500usb_write_tx_desc,
1845 	.write_beacon		= rt2500usb_write_beacon,
1846 	.get_tx_data_len	= rt2500usb_get_tx_data_len,
1847 	.fill_rxdone		= rt2500usb_fill_rxdone,
1848 	.config_shared_key	= rt2500usb_config_key,
1849 	.config_pairwise_key	= rt2500usb_config_key,
1850 	.config_filter		= rt2500usb_config_filter,
1851 	.config_intf		= rt2500usb_config_intf,
1852 	.config_erp		= rt2500usb_config_erp,
1853 	.config_ant		= rt2500usb_config_ant,
1854 	.config			= rt2500usb_config,
1855 };
1856 
1857 static void rt2500usb_queue_init(struct data_queue *queue)
1858 {
1859 	switch (queue->qid) {
1860 	case QID_RX:
1861 		queue->limit = 32;
1862 		queue->data_size = DATA_FRAME_SIZE;
1863 		queue->desc_size = RXD_DESC_SIZE;
1864 		queue->priv_size = sizeof(struct queue_entry_priv_usb);
1865 		break;
1866 
1867 	case QID_AC_VO:
1868 	case QID_AC_VI:
1869 	case QID_AC_BE:
1870 	case QID_AC_BK:
1871 		queue->limit = 32;
1872 		queue->data_size = DATA_FRAME_SIZE;
1873 		queue->desc_size = TXD_DESC_SIZE;
1874 		queue->priv_size = sizeof(struct queue_entry_priv_usb);
1875 		break;
1876 
1877 	case QID_BEACON:
1878 		queue->limit = 1;
1879 		queue->data_size = MGMT_FRAME_SIZE;
1880 		queue->desc_size = TXD_DESC_SIZE;
1881 		queue->priv_size = sizeof(struct queue_entry_priv_usb_bcn);
1882 		break;
1883 
1884 	case QID_ATIM:
1885 		queue->limit = 8;
1886 		queue->data_size = DATA_FRAME_SIZE;
1887 		queue->desc_size = TXD_DESC_SIZE;
1888 		queue->priv_size = sizeof(struct queue_entry_priv_usb);
1889 		break;
1890 
1891 	default:
1892 		BUG();
1893 		break;
1894 	}
1895 }
1896 
1897 static const struct rt2x00_ops rt2500usb_ops = {
1898 	.name			= KBUILD_MODNAME,
1899 	.max_ap_intf		= 1,
1900 	.eeprom_size		= EEPROM_SIZE,
1901 	.rf_size		= RF_SIZE,
1902 	.tx_queues		= NUM_TX_QUEUES,
1903 	.queue_init		= rt2500usb_queue_init,
1904 	.lib			= &rt2500usb_rt2x00_ops,
1905 	.hw			= &rt2500usb_mac80211_ops,
1906 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
1907 	.debugfs		= &rt2500usb_rt2x00debug,
1908 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1909 };
1910 
1911 /*
1912  * rt2500usb module information.
1913  */
1914 static const struct usb_device_id rt2500usb_device_table[] = {
1915 	/* ASUS */
1916 	{ USB_DEVICE(0x0b05, 0x1706) },
1917 	{ USB_DEVICE(0x0b05, 0x1707) },
1918 	/* Belkin */
1919 	{ USB_DEVICE(0x050d, 0x7050) },	/* FCC ID: K7SF5D7050A ver. 2.x */
1920 	{ USB_DEVICE(0x050d, 0x7051) },
1921 	/* Cisco Systems */
1922 	{ USB_DEVICE(0x13b1, 0x000d) },
1923 	{ USB_DEVICE(0x13b1, 0x0011) },
1924 	{ USB_DEVICE(0x13b1, 0x001a) },
1925 	/* Conceptronic */
1926 	{ USB_DEVICE(0x14b2, 0x3c02) },
1927 	/* D-LINK */
1928 	{ USB_DEVICE(0x2001, 0x3c00) },
1929 	/* Gigabyte */
1930 	{ USB_DEVICE(0x1044, 0x8001) },
1931 	{ USB_DEVICE(0x1044, 0x8007) },
1932 	/* Hercules */
1933 	{ USB_DEVICE(0x06f8, 0xe000) },
1934 	/* Melco */
1935 	{ USB_DEVICE(0x0411, 0x005e) },
1936 	{ USB_DEVICE(0x0411, 0x0066) },
1937 	{ USB_DEVICE(0x0411, 0x0067) },
1938 	{ USB_DEVICE(0x0411, 0x008b) },
1939 	{ USB_DEVICE(0x0411, 0x0097) },
1940 	/* MSI */
1941 	{ USB_DEVICE(0x0db0, 0x6861) },
1942 	{ USB_DEVICE(0x0db0, 0x6865) },
1943 	{ USB_DEVICE(0x0db0, 0x6869) },
1944 	/* Ralink */
1945 	{ USB_DEVICE(0x148f, 0x1706) },
1946 	{ USB_DEVICE(0x148f, 0x2570) },
1947 	{ USB_DEVICE(0x148f, 0x9020) },
1948 	/* Sagem */
1949 	{ USB_DEVICE(0x079b, 0x004b) },
1950 	/* Siemens */
1951 	{ USB_DEVICE(0x0681, 0x3c06) },
1952 	/* SMC */
1953 	{ USB_DEVICE(0x0707, 0xee13) },
1954 	/* Spairon */
1955 	{ USB_DEVICE(0x114b, 0x0110) },
1956 	/* SURECOM */
1957 	{ USB_DEVICE(0x0769, 0x11f3) },
1958 	/* Trust */
1959 	{ USB_DEVICE(0x0eb0, 0x9020) },
1960 	/* VTech */
1961 	{ USB_DEVICE(0x0f88, 0x3012) },
1962 	/* Zinwell */
1963 	{ USB_DEVICE(0x5a57, 0x0260) },
1964 	{ 0, }
1965 };
1966 
1967 MODULE_AUTHOR(DRV_PROJECT);
1968 MODULE_VERSION(DRV_VERSION);
1969 MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
1970 MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
1971 MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
1972 MODULE_LICENSE("GPL");
1973 
1974 static int rt2500usb_probe(struct usb_interface *usb_intf,
1975 			   const struct usb_device_id *id)
1976 {
1977 	return rt2x00usb_probe(usb_intf, &rt2500usb_ops);
1978 }
1979 
1980 static struct usb_driver rt2500usb_driver = {
1981 	.name		= KBUILD_MODNAME,
1982 	.id_table	= rt2500usb_device_table,
1983 	.probe		= rt2500usb_probe,
1984 	.disconnect	= rt2x00usb_disconnect,
1985 	.suspend	= rt2x00usb_suspend,
1986 	.resume		= rt2x00usb_resume,
1987 	.reset_resume	= rt2x00usb_resume,
1988 	.disable_hub_initiated_lpm = 1,
1989 };
1990 
1991 module_usb_driver(rt2500usb_driver);
1992