1b458a033SSergey Matyukevich /* SPDX-License-Identifier: GPL-2.0+ */ 2b458a033SSergey Matyukevich /* Copyright (c) 2015-2016 Quantenna Communications */ 32ef0ecd7SIgor Mitsyanko 42ef0ecd7SIgor Mitsyanko #ifndef _QTN_FMAC_PCIE_IPC_H_ 52ef0ecd7SIgor Mitsyanko #define _QTN_FMAC_PCIE_IPC_H_ 62ef0ecd7SIgor Mitsyanko 72ef0ecd7SIgor Mitsyanko #include <linux/types.h> 82ef0ecd7SIgor Mitsyanko 92ef0ecd7SIgor Mitsyanko #include "shm_ipc_defs.h" 102ef0ecd7SIgor Mitsyanko 112ef0ecd7SIgor Mitsyanko /* bitmap for EP status and flags: updated by EP, read by RC */ 122ef0ecd7SIgor Mitsyanko #define QTN_EP_HAS_UBOOT BIT(0) 132ef0ecd7SIgor Mitsyanko #define QTN_EP_HAS_FIRMWARE BIT(1) 142ef0ecd7SIgor Mitsyanko #define QTN_EP_REQ_UBOOT BIT(2) 152ef0ecd7SIgor Mitsyanko #define QTN_EP_REQ_FIRMWARE BIT(3) 162ef0ecd7SIgor Mitsyanko #define QTN_EP_ERROR_UBOOT BIT(4) 172ef0ecd7SIgor Mitsyanko #define QTN_EP_ERROR_FIRMWARE BIT(5) 182ef0ecd7SIgor Mitsyanko 192ef0ecd7SIgor Mitsyanko #define QTN_EP_FW_LOADRDY BIT(8) 202ef0ecd7SIgor Mitsyanko #define QTN_EP_FW_SYNC BIT(9) 212ef0ecd7SIgor Mitsyanko #define QTN_EP_FW_RETRY BIT(10) 222ef0ecd7SIgor Mitsyanko #define QTN_EP_FW_QLINK_DONE BIT(15) 232ef0ecd7SIgor Mitsyanko #define QTN_EP_FW_DONE BIT(16) 242ef0ecd7SIgor Mitsyanko 252ef0ecd7SIgor Mitsyanko /* bitmap for RC status and flags: updated by RC, read by EP */ 262ef0ecd7SIgor Mitsyanko #define QTN_RC_PCIE_LINK BIT(0) 272ef0ecd7SIgor Mitsyanko #define QTN_RC_NET_LINK BIT(1) 282ef0ecd7SIgor Mitsyanko #define QTN_RC_FW_FLASHBOOT BIT(5) 292ef0ecd7SIgor Mitsyanko #define QTN_RC_FW_QLINK BIT(7) 302ef0ecd7SIgor Mitsyanko #define QTN_RC_FW_LOADRDY BIT(8) 312ef0ecd7SIgor Mitsyanko #define QTN_RC_FW_SYNC BIT(9) 322ef0ecd7SIgor Mitsyanko 332ef0ecd7SIgor Mitsyanko #define PCIE_HDP_INT_RX_BITS (0 \ 342ef0ecd7SIgor Mitsyanko | PCIE_HDP_INT_EP_TXDMA \ 352ef0ecd7SIgor Mitsyanko | PCIE_HDP_INT_EP_TXEMPTY \ 362ef0ecd7SIgor Mitsyanko | PCIE_HDP_INT_HHBM_UF \ 372ef0ecd7SIgor Mitsyanko ) 382ef0ecd7SIgor Mitsyanko 392ef0ecd7SIgor Mitsyanko #define PCIE_HDP_INT_TX_BITS (0 \ 402ef0ecd7SIgor Mitsyanko | PCIE_HDP_INT_EP_RXDMA \ 412ef0ecd7SIgor Mitsyanko ) 422ef0ecd7SIgor Mitsyanko 432ef0ecd7SIgor Mitsyanko #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT 442ef0ecd7SIgor Mitsyanko #define QTN_HOST_HI32(a) ((u32)(((u64)a) >> 32)) 452ef0ecd7SIgor Mitsyanko #define QTN_HOST_LO32(a) ((u32)(((u64)a) & 0xffffffffUL)) 462ef0ecd7SIgor Mitsyanko #define QTN_HOST_ADDR(h, l) ((((u64)h) << 32) | ((u64)l)) 472ef0ecd7SIgor Mitsyanko #else 482ef0ecd7SIgor Mitsyanko #define QTN_HOST_HI32(a) 0 492ef0ecd7SIgor Mitsyanko #define QTN_HOST_LO32(a) ((u32)(((u32)a) & 0xffffffffUL)) 502ef0ecd7SIgor Mitsyanko #define QTN_HOST_ADDR(h, l) ((u32)l) 512ef0ecd7SIgor Mitsyanko #endif 522ef0ecd7SIgor Mitsyanko 532ef0ecd7SIgor Mitsyanko #define QTN_PCIE_BDA_VERSION 0x1002 542ef0ecd7SIgor Mitsyanko 552ef0ecd7SIgor Mitsyanko #define PCIE_BDA_NAMELEN 32 562ef0ecd7SIgor Mitsyanko #define PCIE_HHBM_MAX_SIZE 2048 572ef0ecd7SIgor Mitsyanko 582ef0ecd7SIgor Mitsyanko #define QTN_PCIE_BOARDFLG "PCIEQTN" 592ef0ecd7SIgor Mitsyanko #define QTN_PCIE_FW_DLMASK 0xF 602ef0ecd7SIgor Mitsyanko #define QTN_PCIE_FW_BUFSZ 2048 612ef0ecd7SIgor Mitsyanko 622ef0ecd7SIgor Mitsyanko #define QTN_ENET_ADDR_LENGTH 6 632ef0ecd7SIgor Mitsyanko 642ef0ecd7SIgor Mitsyanko #define QTN_TXDONE_MASK ((u32)0x80000000) 652ef0ecd7SIgor Mitsyanko #define QTN_GET_LEN(x) ((x) & 0xFFFF) 662ef0ecd7SIgor Mitsyanko 672ef0ecd7SIgor Mitsyanko #define QTN_PCIE_TX_DESC_LEN_MASK 0xFFFF 682ef0ecd7SIgor Mitsyanko #define QTN_PCIE_TX_DESC_LEN_SHIFT 0 692ef0ecd7SIgor Mitsyanko #define QTN_PCIE_TX_DESC_PORT_MASK 0xF 702ef0ecd7SIgor Mitsyanko #define QTN_PCIE_TX_DESC_PORT_SHIFT 16 712ef0ecd7SIgor Mitsyanko #define QTN_PCIE_TX_DESC_TQE_BIT BIT(24) 722ef0ecd7SIgor Mitsyanko 732ef0ecd7SIgor Mitsyanko #define QTN_EP_LHOST_TQE_PORT 4 742ef0ecd7SIgor Mitsyanko 752ef0ecd7SIgor Mitsyanko enum qtnf_fw_loadtype { 762ef0ecd7SIgor Mitsyanko QTN_FW_DBEGIN, 772ef0ecd7SIgor Mitsyanko QTN_FW_DSUB, 782ef0ecd7SIgor Mitsyanko QTN_FW_DEND, 792ef0ecd7SIgor Mitsyanko QTN_FW_CTRL 802ef0ecd7SIgor Mitsyanko }; 812ef0ecd7SIgor Mitsyanko 822ef0ecd7SIgor Mitsyanko #endif /* _QTN_FMAC_PCIE_IPC_H_ */ 83