1c9ff6c91SIgor Mitsyanko /* SPDX-License-Identifier: GPL-2.0+ */
2c9ff6c91SIgor Mitsyanko /* Copyright (c) 2018 Quantenna Communications, Inc. All rights reserved. */
3c9ff6c91SIgor Mitsyanko 
4c9ff6c91SIgor Mitsyanko #ifndef _QTN_FMAC_PCIE_H_
5c9ff6c91SIgor Mitsyanko #define _QTN_FMAC_PCIE_H_
6c9ff6c91SIgor Mitsyanko 
7c9ff6c91SIgor Mitsyanko #include <linux/pci.h>
8c9ff6c91SIgor Mitsyanko #include <linux/spinlock.h>
9c9ff6c91SIgor Mitsyanko #include <linux/io.h>
10c9ff6c91SIgor Mitsyanko #include <linux/skbuff.h>
11c9ff6c91SIgor Mitsyanko #include <linux/workqueue.h>
12c9ff6c91SIgor Mitsyanko #include <linux/interrupt.h>
13c9ff6c91SIgor Mitsyanko 
14c9ff6c91SIgor Mitsyanko #include "shm_ipc.h"
15addc7540SIgor Mitsyanko #include "bus.h"
16c9ff6c91SIgor Mitsyanko 
17c9ff6c91SIgor Mitsyanko #define SKB_BUF_SIZE		2048
18c9ff6c91SIgor Mitsyanko 
19c9ff6c91SIgor Mitsyanko #define QTN_FW_DL_TIMEOUT_MS	3000
20c9ff6c91SIgor Mitsyanko #define QTN_FW_QLINK_TIMEOUT_MS	30000
21c9ff6c91SIgor Mitsyanko #define QTN_EP_RESET_WAIT_MS	1000
22c9ff6c91SIgor Mitsyanko 
23c9ff6c91SIgor Mitsyanko struct qtnf_pcie_bus_priv {
24c9ff6c91SIgor Mitsyanko 	struct pci_dev *pdev;
25c9ff6c91SIgor Mitsyanko 
26b7da53cdSIgor Mitsyanko 	int (*probe_cb)(struct qtnf_bus *bus, unsigned int tx_bd_size);
27b7da53cdSIgor Mitsyanko 	void (*remove_cb)(struct qtnf_bus *bus);
28b7da53cdSIgor Mitsyanko 	int (*suspend_cb)(struct qtnf_bus *bus);
29b7da53cdSIgor Mitsyanko 	int (*resume_cb)(struct qtnf_bus *bus);
30b7da53cdSIgor Mitsyanko 	u64 (*dma_mask_get_cb)(void);
31b7da53cdSIgor Mitsyanko 
32c9ff6c91SIgor Mitsyanko 	spinlock_t tx_reclaim_lock;
33c9ff6c91SIgor Mitsyanko 	spinlock_t tx_lock;
34c9ff6c91SIgor Mitsyanko 
35c9ff6c91SIgor Mitsyanko 	struct workqueue_struct *workqueue;
36c9ff6c91SIgor Mitsyanko 	struct tasklet_struct reclaim_tq;
37c9ff6c91SIgor Mitsyanko 
38c9ff6c91SIgor Mitsyanko 	void __iomem *sysctl_bar;
39c9ff6c91SIgor Mitsyanko 	void __iomem *epmem_bar;
40c9ff6c91SIgor Mitsyanko 	void __iomem *dmareg_bar;
41c9ff6c91SIgor Mitsyanko 
42c9ff6c91SIgor Mitsyanko 	struct qtnf_shm_ipc shm_ipc_ep_in;
43c9ff6c91SIgor Mitsyanko 	struct qtnf_shm_ipc shm_ipc_ep_out;
44c9ff6c91SIgor Mitsyanko 
45c9ff6c91SIgor Mitsyanko 	u16 tx_bd_num;
46c9ff6c91SIgor Mitsyanko 	u16 rx_bd_num;
47c9ff6c91SIgor Mitsyanko 
48c9ff6c91SIgor Mitsyanko 	struct sk_buff **tx_skb;
49c9ff6c91SIgor Mitsyanko 	struct sk_buff **rx_skb;
50c9ff6c91SIgor Mitsyanko 
51b7da53cdSIgor Mitsyanko 	unsigned int fw_blksize;
52b7da53cdSIgor Mitsyanko 
53c9ff6c91SIgor Mitsyanko 	u32 rx_bd_w_index;
54c9ff6c91SIgor Mitsyanko 	u32 rx_bd_r_index;
55c9ff6c91SIgor Mitsyanko 
56c9ff6c91SIgor Mitsyanko 	u32 tx_bd_w_index;
57c9ff6c91SIgor Mitsyanko 	u32 tx_bd_r_index;
58c9ff6c91SIgor Mitsyanko 
59c9ff6c91SIgor Mitsyanko 	/* diagnostics stats */
60c9ff6c91SIgor Mitsyanko 	u32 pcie_irq_count;
61c9ff6c91SIgor Mitsyanko 	u32 tx_full_count;
62c9ff6c91SIgor Mitsyanko 	u32 tx_done_count;
63c9ff6c91SIgor Mitsyanko 	u32 tx_reclaim_done;
64c9ff6c91SIgor Mitsyanko 	u32 tx_reclaim_req;
65c9ff6c91SIgor Mitsyanko 
66c9ff6c91SIgor Mitsyanko 	u8 msi_enabled;
67c9ff6c91SIgor Mitsyanko 	u8 tx_stopped;
68b7da53cdSIgor Mitsyanko 	bool flashboot;
69c9ff6c91SIgor Mitsyanko };
70c9ff6c91SIgor Mitsyanko 
71addc7540SIgor Mitsyanko int qtnf_pcie_control_tx(struct qtnf_bus *bus, struct sk_buff *skb);
72addc7540SIgor Mitsyanko int qtnf_pcie_alloc_skb_array(struct qtnf_pcie_bus_priv *priv);
73b7da53cdSIgor Mitsyanko void qtnf_pcie_fw_boot_done(struct qtnf_bus *bus, bool boot_success);
74addc7540SIgor Mitsyanko void qtnf_pcie_init_shm_ipc(struct qtnf_pcie_bus_priv *priv,
75addc7540SIgor Mitsyanko 			    struct qtnf_shm_ipc_region __iomem *ipc_tx_reg,
76addc7540SIgor Mitsyanko 			    struct qtnf_shm_ipc_region __iomem *ipc_rx_reg,
77addc7540SIgor Mitsyanko 			    const struct qtnf_shm_ipc_int *ipc_int);
78b7da53cdSIgor Mitsyanko struct qtnf_bus *qtnf_pcie_pearl_alloc(struct pci_dev *pdev);
79e401fa25SSergey Matyukevich struct qtnf_bus *qtnf_pcie_topaz_alloc(struct pci_dev *pdev);
80addc7540SIgor Mitsyanko 
81c9ff6c91SIgor Mitsyanko static inline void qtnf_non_posted_write(u32 val, void __iomem *basereg)
82c9ff6c91SIgor Mitsyanko {
83c9ff6c91SIgor Mitsyanko 	writel(val, basereg);
84c9ff6c91SIgor Mitsyanko 
85c9ff6c91SIgor Mitsyanko 	/* flush posted write */
86c9ff6c91SIgor Mitsyanko 	readl(basereg);
87c9ff6c91SIgor Mitsyanko }
88c9ff6c91SIgor Mitsyanko 
89c9ff6c91SIgor Mitsyanko #endif /* _QTN_FMAC_PCIE_H_ */
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