15625f965SAjay Singh // SPDX-License-Identifier: GPL-2.0
25625f965SAjay Singh /*
35625f965SAjay Singh * Copyright (c) 2012 - 2018 Microchip Technology Inc., and its subsidiaries.
45625f965SAjay Singh * All rights reserved.
55625f965SAjay Singh */
65625f965SAjay Singh
75625f965SAjay Singh #include <linux/clk.h>
85625f965SAjay Singh #include <linux/spi/spi.h>
95625f965SAjay Singh #include <linux/crc7.h>
10c872e7aeSDavid Mosberger-Tang #include <linux/crc-itu-t.h>
11ec031ac4SDavid Mosberger-Tang #include <linux/gpio/consumer.h>
125625f965SAjay Singh
135625f965SAjay Singh #include "netdev.h"
145625f965SAjay Singh #include "cfg80211.h"
155625f965SAjay Singh
164347d34eSDavid Mosberger-Tang #define SPI_MODALIAS "wilc1000_spi"
174347d34eSDavid Mosberger-Tang
18c872e7aeSDavid Mosberger-Tang static bool enable_crc7; /* protect SPI commands with CRC7 */
19c872e7aeSDavid Mosberger-Tang module_param(enable_crc7, bool, 0644);
20c872e7aeSDavid Mosberger-Tang MODULE_PARM_DESC(enable_crc7,
21c872e7aeSDavid Mosberger-Tang "Enable CRC7 checksum to protect command transfers\n"
22c872e7aeSDavid Mosberger-Tang "\t\t\tagainst corruption during the SPI transfer.\n"
23c872e7aeSDavid Mosberger-Tang "\t\t\tCommand transfers are short and the CPU-cycle cost\n"
24c872e7aeSDavid Mosberger-Tang "\t\t\tof enabling this is small.");
25c872e7aeSDavid Mosberger-Tang
26c872e7aeSDavid Mosberger-Tang static bool enable_crc16; /* protect SPI data with CRC16 */
27c872e7aeSDavid Mosberger-Tang module_param(enable_crc16, bool, 0644);
28c872e7aeSDavid Mosberger-Tang MODULE_PARM_DESC(enable_crc16,
29c872e7aeSDavid Mosberger-Tang "Enable CRC16 checksum to protect data transfers\n"
30c872e7aeSDavid Mosberger-Tang "\t\t\tagainst corruption during the SPI transfer.\n"
31c872e7aeSDavid Mosberger-Tang "\t\t\tData transfers can be large and the CPU-cycle cost\n"
32c872e7aeSDavid Mosberger-Tang "\t\t\tof enabling this may be substantial.");
33c872e7aeSDavid Mosberger-Tang
34f2131fa5SDavid Mosberger-Tang /*
35f2131fa5SDavid Mosberger-Tang * For CMD_SINGLE_READ and CMD_INTERNAL_READ, WILC may insert one or
36f2131fa5SDavid Mosberger-Tang * more zero bytes between the command response and the DATA Start tag
37f2131fa5SDavid Mosberger-Tang * (0xf3). This behavior appears to be undocumented in "ATWILC1000
38f2131fa5SDavid Mosberger-Tang * USER GUIDE" (https://tinyurl.com/4hhshdts) but we have observed 1-4
39f2131fa5SDavid Mosberger-Tang * zero bytes when the SPI bus operates at 48MHz and none when it
40f2131fa5SDavid Mosberger-Tang * operates at 1MHz.
41f2131fa5SDavid Mosberger-Tang */
42f2131fa5SDavid Mosberger-Tang #define WILC_SPI_RSP_HDR_EXTRA_DATA 8
43f2131fa5SDavid Mosberger-Tang
445625f965SAjay Singh struct wilc_spi {
4550cbbfd4SDavid Mosberger-Tang bool isinit; /* true if SPI protocol has been configured */
46c872e7aeSDavid Mosberger-Tang bool probing_crc; /* true if we're probing chip's CRC config */
47c872e7aeSDavid Mosberger-Tang bool crc7_enabled; /* true if crc7 is currently enabled */
48c872e7aeSDavid Mosberger-Tang bool crc16_enabled; /* true if crc16 is currently enabled */
49ec031ac4SDavid Mosberger-Tang struct wilc_gpios {
50ec031ac4SDavid Mosberger-Tang struct gpio_desc *enable; /* ENABLE GPIO or NULL */
51ec031ac4SDavid Mosberger-Tang struct gpio_desc *reset; /* RESET GPIO or NULL */
52ec031ac4SDavid Mosberger-Tang } gpios;
535625f965SAjay Singh };
545625f965SAjay Singh
555625f965SAjay Singh static const struct wilc_hif_func wilc_hif_spi;
565625f965SAjay Singh
57c2dcb476SAjay Singh static int wilc_spi_reset(struct wilc *wilc);
58c2dcb476SAjay Singh
595625f965SAjay Singh /********************************************
605625f965SAjay Singh *
615625f965SAjay Singh * Spi protocol Function
625625f965SAjay Singh *
635625f965SAjay Singh ********************************************/
645625f965SAjay Singh
655625f965SAjay Singh #define CMD_DMA_WRITE 0xc1
665625f965SAjay Singh #define CMD_DMA_READ 0xc2
675625f965SAjay Singh #define CMD_INTERNAL_WRITE 0xc3
685625f965SAjay Singh #define CMD_INTERNAL_READ 0xc4
695625f965SAjay Singh #define CMD_TERMINATE 0xc5
705625f965SAjay Singh #define CMD_REPEAT 0xc6
715625f965SAjay Singh #define CMD_DMA_EXT_WRITE 0xc7
725625f965SAjay Singh #define CMD_DMA_EXT_READ 0xc8
735625f965SAjay Singh #define CMD_SINGLE_WRITE 0xc9
745625f965SAjay Singh #define CMD_SINGLE_READ 0xca
755625f965SAjay Singh #define CMD_RESET 0xcf
765625f965SAjay Singh
776fd879f9SAmisha Patel #define SPI_RETRY_MAX_LIMIT 10
78382726d1SAjay Singh #define SPI_ENABLE_VMM_RETRY_LIMIT 2
795ee2d9ddSDavid Mosberger-Tang
80ce3b9338SDavid Mosberger-Tang /* SPI response fields (section 11.1.2 in ATWILC1000 User Guide): */
81ce3b9338SDavid Mosberger-Tang #define RSP_START_FIELD GENMASK(7, 4)
82ce3b9338SDavid Mosberger-Tang #define RSP_TYPE_FIELD GENMASK(3, 0)
83ce3b9338SDavid Mosberger-Tang
84ce3b9338SDavid Mosberger-Tang /* SPI response values for the response fields: */
85ce3b9338SDavid Mosberger-Tang #define RSP_START_TAG 0xc
86ce3b9338SDavid Mosberger-Tang #define RSP_TYPE_FIRST_PACKET 0x1
87ce3b9338SDavid Mosberger-Tang #define RSP_TYPE_INNER_PACKET 0x2
88ce3b9338SDavid Mosberger-Tang #define RSP_TYPE_LAST_PACKET 0x3
89ce3b9338SDavid Mosberger-Tang #define RSP_STATE_NO_ERROR 0x00
90ce3b9338SDavid Mosberger-Tang
915ee2d9ddSDavid Mosberger-Tang #define PROTOCOL_REG_PKT_SZ_MASK GENMASK(6, 4)
925ee2d9ddSDavid Mosberger-Tang #define PROTOCOL_REG_CRC16_MASK GENMASK(3, 3)
935ee2d9ddSDavid Mosberger-Tang #define PROTOCOL_REG_CRC7_MASK GENMASK(2, 2)
945ee2d9ddSDavid Mosberger-Tang
955ee2d9ddSDavid Mosberger-Tang /*
965ee2d9ddSDavid Mosberger-Tang * The SPI data packet size may be any integer power of two in the
975ee2d9ddSDavid Mosberger-Tang * range from 256 to 8192 bytes.
985ee2d9ddSDavid Mosberger-Tang */
995ee2d9ddSDavid Mosberger-Tang #define DATA_PKT_LOG_SZ_MIN 8 /* 256 B */
1005ee2d9ddSDavid Mosberger-Tang #define DATA_PKT_LOG_SZ_MAX 13 /* 8 KiB */
1015ee2d9ddSDavid Mosberger-Tang
1025ee2d9ddSDavid Mosberger-Tang /*
1035ee2d9ddSDavid Mosberger-Tang * Select the data packet size (log2 of number of bytes): Use the
1045ee2d9ddSDavid Mosberger-Tang * maximum data packet size. We only retransmit complete packets, so
1055ee2d9ddSDavid Mosberger-Tang * there is no benefit from using smaller data packets.
1065ee2d9ddSDavid Mosberger-Tang */
1075ee2d9ddSDavid Mosberger-Tang #define DATA_PKT_LOG_SZ DATA_PKT_LOG_SZ_MAX
1085ee2d9ddSDavid Mosberger-Tang #define DATA_PKT_SZ (1 << DATA_PKT_LOG_SZ)
1095625f965SAjay Singh
1105625f965SAjay Singh #define WILC_SPI_COMMAND_STAT_SUCCESS 0
1115625f965SAjay Singh #define WILC_GET_RESP_HDR_START(h) (((h) >> 4) & 0xf)
1125625f965SAjay Singh
1135625f965SAjay Singh struct wilc_spi_cmd {
1145625f965SAjay Singh u8 cmd_type;
1155625f965SAjay Singh union {
1165625f965SAjay Singh struct {
1175625f965SAjay Singh u8 addr[3];
1185625f965SAjay Singh u8 crc[];
1195625f965SAjay Singh } __packed simple_cmd;
1205625f965SAjay Singh struct {
1215625f965SAjay Singh u8 addr[3];
1225625f965SAjay Singh u8 size[2];
1235625f965SAjay Singh u8 crc[];
1245625f965SAjay Singh } __packed dma_cmd;
1255625f965SAjay Singh struct {
1265625f965SAjay Singh u8 addr[3];
1275625f965SAjay Singh u8 size[3];
1285625f965SAjay Singh u8 crc[];
1295625f965SAjay Singh } __packed dma_cmd_ext;
1305625f965SAjay Singh struct {
1315625f965SAjay Singh u8 addr[2];
1325625f965SAjay Singh __be32 data;
1335625f965SAjay Singh u8 crc[];
1345625f965SAjay Singh } __packed internal_w_cmd;
1355625f965SAjay Singh struct {
1365625f965SAjay Singh u8 addr[3];
1375625f965SAjay Singh __be32 data;
1385625f965SAjay Singh u8 crc[];
1395625f965SAjay Singh } __packed w_cmd;
1405625f965SAjay Singh } u;
1415625f965SAjay Singh } __packed;
1425625f965SAjay Singh
1435625f965SAjay Singh struct wilc_spi_read_rsp_data {
144f2131fa5SDavid Mosberger-Tang u8 header;
145f2131fa5SDavid Mosberger-Tang u8 data[4];
1465625f965SAjay Singh u8 crc[];
1475625f965SAjay Singh } __packed;
1485625f965SAjay Singh
1495625f965SAjay Singh struct wilc_spi_rsp_data {
1505625f965SAjay Singh u8 rsp_cmd_type;
1515625f965SAjay Singh u8 status;
152f2131fa5SDavid Mosberger-Tang u8 data[];
1535625f965SAjay Singh } __packed;
1545625f965SAjay Singh
1551bcc0879SAjay Singh struct wilc_spi_special_cmd_rsp {
1561bcc0879SAjay Singh u8 skip_byte;
1571bcc0879SAjay Singh u8 rsp_cmd_type;
1581bcc0879SAjay Singh u8 status;
1591bcc0879SAjay Singh } __packed;
1601bcc0879SAjay Singh
wilc_parse_gpios(struct wilc * wilc)161ec031ac4SDavid Mosberger-Tang static int wilc_parse_gpios(struct wilc *wilc)
162ec031ac4SDavid Mosberger-Tang {
163ec031ac4SDavid Mosberger-Tang struct spi_device *spi = to_spi_device(wilc->dev);
164ec031ac4SDavid Mosberger-Tang struct wilc_spi *spi_priv = wilc->bus_data;
165ec031ac4SDavid Mosberger-Tang struct wilc_gpios *gpios = &spi_priv->gpios;
166ec031ac4SDavid Mosberger-Tang
167ec031ac4SDavid Mosberger-Tang /* get ENABLE pin and deassert it (if it is defined): */
168ec031ac4SDavid Mosberger-Tang gpios->enable = devm_gpiod_get_optional(&spi->dev,
169ec031ac4SDavid Mosberger-Tang "enable", GPIOD_OUT_LOW);
170ec031ac4SDavid Mosberger-Tang /* get RESET pin and assert it (if it is defined): */
171ec031ac4SDavid Mosberger-Tang if (gpios->enable) {
172ec031ac4SDavid Mosberger-Tang /* if enable pin exists, reset must exist as well */
173ec031ac4SDavid Mosberger-Tang gpios->reset = devm_gpiod_get(&spi->dev,
174ec031ac4SDavid Mosberger-Tang "reset", GPIOD_OUT_HIGH);
175ec031ac4SDavid Mosberger-Tang if (IS_ERR(gpios->reset)) {
176ec031ac4SDavid Mosberger-Tang dev_err(&spi->dev, "missing reset gpio.\n");
177ec031ac4SDavid Mosberger-Tang return PTR_ERR(gpios->reset);
178ec031ac4SDavid Mosberger-Tang }
179ec031ac4SDavid Mosberger-Tang } else {
180ec031ac4SDavid Mosberger-Tang gpios->reset = devm_gpiod_get_optional(&spi->dev,
181ec031ac4SDavid Mosberger-Tang "reset", GPIOD_OUT_HIGH);
182ec031ac4SDavid Mosberger-Tang }
183ec031ac4SDavid Mosberger-Tang return 0;
184ec031ac4SDavid Mosberger-Tang }
185ec031ac4SDavid Mosberger-Tang
wilc_wlan_power(struct wilc * wilc,bool on)186ec031ac4SDavid Mosberger-Tang static void wilc_wlan_power(struct wilc *wilc, bool on)
187ec031ac4SDavid Mosberger-Tang {
188ec031ac4SDavid Mosberger-Tang struct wilc_spi *spi_priv = wilc->bus_data;
189ec031ac4SDavid Mosberger-Tang struct wilc_gpios *gpios = &spi_priv->gpios;
190ec031ac4SDavid Mosberger-Tang
191ec031ac4SDavid Mosberger-Tang if (on) {
192ec031ac4SDavid Mosberger-Tang /* assert ENABLE: */
193ec031ac4SDavid Mosberger-Tang gpiod_set_value(gpios->enable, 1);
194ec031ac4SDavid Mosberger-Tang mdelay(5);
195fcf690b0SAjay Singh /* deassert RESET: */
196fcf690b0SAjay Singh gpiod_set_value(gpios->reset, 0);
197*0f7bdcbbSAlexis Lothoré } else {
198*0f7bdcbbSAlexis Lothoré /* assert RESET: */
199*0f7bdcbbSAlexis Lothoré gpiod_set_value(gpios->reset, 1);
200ec031ac4SDavid Mosberger-Tang /* deassert ENABLE: */
201ec031ac4SDavid Mosberger-Tang gpiod_set_value(gpios->enable, 0);
202ec031ac4SDavid Mosberger-Tang }
203ec031ac4SDavid Mosberger-Tang }
204ec031ac4SDavid Mosberger-Tang
wilc_bus_probe(struct spi_device * spi)2055625f965SAjay Singh static int wilc_bus_probe(struct spi_device *spi)
2065625f965SAjay Singh {
2075625f965SAjay Singh int ret;
2085625f965SAjay Singh struct wilc *wilc;
2095625f965SAjay Singh struct wilc_spi *spi_priv;
2105625f965SAjay Singh
2115625f965SAjay Singh spi_priv = kzalloc(sizeof(*spi_priv), GFP_KERNEL);
2125625f965SAjay Singh if (!spi_priv)
2135625f965SAjay Singh return -ENOMEM;
2145625f965SAjay Singh
2155625f965SAjay Singh ret = wilc_cfg80211_init(&wilc, &spi->dev, WILC_HIF_SPI, &wilc_hif_spi);
216dc8b338fSClaudiu Beznea if (ret)
217dc8b338fSClaudiu Beznea goto free;
2185625f965SAjay Singh
2195625f965SAjay Singh spi_set_drvdata(spi, wilc);
2205625f965SAjay Singh wilc->dev = &spi->dev;
2215625f965SAjay Singh wilc->bus_data = spi_priv;
2225625f965SAjay Singh wilc->dev_irq_num = spi->irq;
2235625f965SAjay Singh
224ec031ac4SDavid Mosberger-Tang ret = wilc_parse_gpios(wilc);
225ec031ac4SDavid Mosberger-Tang if (ret < 0)
226ec031ac4SDavid Mosberger-Tang goto netdev_cleanup;
227ec031ac4SDavid Mosberger-Tang
2281d89fd1aSClaudiu Beznea wilc->rtc_clk = devm_clk_get_optional(&spi->dev, "rtc");
2291d89fd1aSClaudiu Beznea if (IS_ERR(wilc->rtc_clk)) {
2301d89fd1aSClaudiu Beznea ret = PTR_ERR(wilc->rtc_clk);
231dc8b338fSClaudiu Beznea goto netdev_cleanup;
2321d89fd1aSClaudiu Beznea }
2335625f965SAjay Singh clk_prepare_enable(wilc->rtc_clk);
2345625f965SAjay Singh
2355625f965SAjay Singh return 0;
236dc8b338fSClaudiu Beznea
237dc8b338fSClaudiu Beznea netdev_cleanup:
238dc8b338fSClaudiu Beznea wilc_netdev_cleanup(wilc);
239dc8b338fSClaudiu Beznea free:
240dc8b338fSClaudiu Beznea kfree(spi_priv);
241dc8b338fSClaudiu Beznea return ret;
2425625f965SAjay Singh }
2435625f965SAjay Singh
wilc_bus_remove(struct spi_device * spi)244a0386bbaSUwe Kleine-König static void wilc_bus_remove(struct spi_device *spi)
2455625f965SAjay Singh {
2465625f965SAjay Singh struct wilc *wilc = spi_get_drvdata(spi);
2474894edacSDan Carpenter struct wilc_spi *spi_priv = wilc->bus_data;
2485625f965SAjay Singh
2495625f965SAjay Singh clk_disable_unprepare(wilc->rtc_clk);
2505625f965SAjay Singh wilc_netdev_cleanup(wilc);
2514894edacSDan Carpenter kfree(spi_priv);
2525625f965SAjay Singh }
2535625f965SAjay Singh
2545625f965SAjay Singh static const struct of_device_id wilc_of_match[] = {
2555625f965SAjay Singh { .compatible = "microchip,wilc1000", },
2565625f965SAjay Singh { /* sentinel */ }
2575625f965SAjay Singh };
2585625f965SAjay Singh MODULE_DEVICE_TABLE(of, wilc_of_match);
2595625f965SAjay Singh
260f2f16ae9SDavid Mosberger-Tang static const struct spi_device_id wilc_spi_id[] = {
261f2f16ae9SDavid Mosberger-Tang { "wilc1000", 0 },
262f2f16ae9SDavid Mosberger-Tang { /* sentinel */ }
263f2f16ae9SDavid Mosberger-Tang };
264f2f16ae9SDavid Mosberger-Tang MODULE_DEVICE_TABLE(spi, wilc_spi_id);
265f2f16ae9SDavid Mosberger-Tang
2665625f965SAjay Singh static struct spi_driver wilc_spi_driver = {
2675625f965SAjay Singh .driver = {
2684347d34eSDavid Mosberger-Tang .name = SPI_MODALIAS,
2695625f965SAjay Singh .of_match_table = wilc_of_match,
2705625f965SAjay Singh },
271f2f16ae9SDavid Mosberger-Tang .id_table = wilc_spi_id,
2725625f965SAjay Singh .probe = wilc_bus_probe,
2735625f965SAjay Singh .remove = wilc_bus_remove,
2745625f965SAjay Singh };
2755625f965SAjay Singh module_spi_driver(wilc_spi_driver);
2765625f965SAjay Singh MODULE_LICENSE("GPL");
2775625f965SAjay Singh
wilc_spi_tx(struct wilc * wilc,u8 * b,u32 len)2785625f965SAjay Singh static int wilc_spi_tx(struct wilc *wilc, u8 *b, u32 len)
2795625f965SAjay Singh {
2805625f965SAjay Singh struct spi_device *spi = to_spi_device(wilc->dev);
2815625f965SAjay Singh int ret;
2825625f965SAjay Singh struct spi_message msg;
2835625f965SAjay Singh
2845625f965SAjay Singh if (len > 0 && b) {
2855625f965SAjay Singh struct spi_transfer tr = {
2865625f965SAjay Singh .tx_buf = b,
2875625f965SAjay Singh .len = len,
2885625f965SAjay Singh .delay = {
2895625f965SAjay Singh .value = 0,
2905625f965SAjay Singh .unit = SPI_DELAY_UNIT_USECS
2915625f965SAjay Singh },
2925625f965SAjay Singh };
2935625f965SAjay Singh char *r_buffer = kzalloc(len, GFP_KERNEL);
2945625f965SAjay Singh
2955625f965SAjay Singh if (!r_buffer)
2965625f965SAjay Singh return -ENOMEM;
2975625f965SAjay Singh
2985625f965SAjay Singh tr.rx_buf = r_buffer;
2995625f965SAjay Singh dev_dbg(&spi->dev, "Request writing %d bytes\n", len);
3005625f965SAjay Singh
3015625f965SAjay Singh memset(&msg, 0, sizeof(msg));
3025625f965SAjay Singh spi_message_init(&msg);
3035625f965SAjay Singh msg.spi = spi;
3045625f965SAjay Singh spi_message_add_tail(&tr, &msg);
3055625f965SAjay Singh
3065625f965SAjay Singh ret = spi_sync(spi, &msg);
3075625f965SAjay Singh if (ret < 0)
3085625f965SAjay Singh dev_err(&spi->dev, "SPI transaction failed\n");
3095625f965SAjay Singh
3105625f965SAjay Singh kfree(r_buffer);
3115625f965SAjay Singh } else {
3125625f965SAjay Singh dev_err(&spi->dev,
3135625f965SAjay Singh "can't write data with the following length: %d\n",
3145625f965SAjay Singh len);
3155625f965SAjay Singh ret = -EINVAL;
3165625f965SAjay Singh }
3175625f965SAjay Singh
3185625f965SAjay Singh return ret;
3195625f965SAjay Singh }
3205625f965SAjay Singh
wilc_spi_rx(struct wilc * wilc,u8 * rb,u32 rlen)3215625f965SAjay Singh static int wilc_spi_rx(struct wilc *wilc, u8 *rb, u32 rlen)
3225625f965SAjay Singh {
3235625f965SAjay Singh struct spi_device *spi = to_spi_device(wilc->dev);
3245625f965SAjay Singh int ret;
3255625f965SAjay Singh
3265625f965SAjay Singh if (rlen > 0) {
3275625f965SAjay Singh struct spi_message msg;
3285625f965SAjay Singh struct spi_transfer tr = {
3295625f965SAjay Singh .rx_buf = rb,
3305625f965SAjay Singh .len = rlen,
3315625f965SAjay Singh .delay = {
3325625f965SAjay Singh .value = 0,
3335625f965SAjay Singh .unit = SPI_DELAY_UNIT_USECS
3345625f965SAjay Singh },
3355625f965SAjay Singh
3365625f965SAjay Singh };
3375625f965SAjay Singh char *t_buffer = kzalloc(rlen, GFP_KERNEL);
3385625f965SAjay Singh
3395625f965SAjay Singh if (!t_buffer)
3405625f965SAjay Singh return -ENOMEM;
3415625f965SAjay Singh
3425625f965SAjay Singh tr.tx_buf = t_buffer;
3435625f965SAjay Singh
3445625f965SAjay Singh memset(&msg, 0, sizeof(msg));
3455625f965SAjay Singh spi_message_init(&msg);
3465625f965SAjay Singh msg.spi = spi;
3475625f965SAjay Singh spi_message_add_tail(&tr, &msg);
3485625f965SAjay Singh
3495625f965SAjay Singh ret = spi_sync(spi, &msg);
3505625f965SAjay Singh if (ret < 0)
3515625f965SAjay Singh dev_err(&spi->dev, "SPI transaction failed\n");
3525625f965SAjay Singh kfree(t_buffer);
3535625f965SAjay Singh } else {
3545625f965SAjay Singh dev_err(&spi->dev,
3555625f965SAjay Singh "can't read data with the following length: %u\n",
3565625f965SAjay Singh rlen);
3575625f965SAjay Singh ret = -EINVAL;
3585625f965SAjay Singh }
3595625f965SAjay Singh
3605625f965SAjay Singh return ret;
3615625f965SAjay Singh }
3625625f965SAjay Singh
wilc_spi_tx_rx(struct wilc * wilc,u8 * wb,u8 * rb,u32 rlen)3635625f965SAjay Singh static int wilc_spi_tx_rx(struct wilc *wilc, u8 *wb, u8 *rb, u32 rlen)
3645625f965SAjay Singh {
3655625f965SAjay Singh struct spi_device *spi = to_spi_device(wilc->dev);
3665625f965SAjay Singh int ret;
3675625f965SAjay Singh
3685625f965SAjay Singh if (rlen > 0) {
3695625f965SAjay Singh struct spi_message msg;
3705625f965SAjay Singh struct spi_transfer tr = {
3715625f965SAjay Singh .rx_buf = rb,
3725625f965SAjay Singh .tx_buf = wb,
3735625f965SAjay Singh .len = rlen,
3745625f965SAjay Singh .bits_per_word = 8,
3755625f965SAjay Singh .delay = {
3765625f965SAjay Singh .value = 0,
3775625f965SAjay Singh .unit = SPI_DELAY_UNIT_USECS
3785625f965SAjay Singh },
3795625f965SAjay Singh
3805625f965SAjay Singh };
3815625f965SAjay Singh
3825625f965SAjay Singh memset(&msg, 0, sizeof(msg));
3835625f965SAjay Singh spi_message_init(&msg);
3845625f965SAjay Singh msg.spi = spi;
3855625f965SAjay Singh
3865625f965SAjay Singh spi_message_add_tail(&tr, &msg);
3875625f965SAjay Singh ret = spi_sync(spi, &msg);
3885625f965SAjay Singh if (ret < 0)
3895625f965SAjay Singh dev_err(&spi->dev, "SPI transaction failed\n");
3905625f965SAjay Singh } else {
3915625f965SAjay Singh dev_err(&spi->dev,
3925625f965SAjay Singh "can't read data with the following length: %u\n",
3935625f965SAjay Singh rlen);
3945625f965SAjay Singh ret = -EINVAL;
3955625f965SAjay Singh }
3965625f965SAjay Singh
3975625f965SAjay Singh return ret;
3985625f965SAjay Singh }
3995625f965SAjay Singh
spi_data_write(struct wilc * wilc,u8 * b,u32 sz)4005625f965SAjay Singh static int spi_data_write(struct wilc *wilc, u8 *b, u32 sz)
4015625f965SAjay Singh {
4025625f965SAjay Singh struct spi_device *spi = to_spi_device(wilc->dev);
4035625f965SAjay Singh struct wilc_spi *spi_priv = wilc->bus_data;
4045625f965SAjay Singh int ix, nbytes;
4055625f965SAjay Singh int result = 0;
406c872e7aeSDavid Mosberger-Tang u8 cmd, order, crc[2];
407c872e7aeSDavid Mosberger-Tang u16 crc_calc;
4085625f965SAjay Singh
4095625f965SAjay Singh /*
4105625f965SAjay Singh * Data
4115625f965SAjay Singh */
4125625f965SAjay Singh ix = 0;
4135625f965SAjay Singh do {
4145625f965SAjay Singh if (sz <= DATA_PKT_SZ) {
4155625f965SAjay Singh nbytes = sz;
4165625f965SAjay Singh order = 0x3;
4175625f965SAjay Singh } else {
4185625f965SAjay Singh nbytes = DATA_PKT_SZ;
4195625f965SAjay Singh if (ix == 0)
4205625f965SAjay Singh order = 0x1;
4215625f965SAjay Singh else
4225625f965SAjay Singh order = 0x02;
4235625f965SAjay Singh }
4245625f965SAjay Singh
4255625f965SAjay Singh /*
4265625f965SAjay Singh * Write command
4275625f965SAjay Singh */
4285625f965SAjay Singh cmd = 0xf0;
4295625f965SAjay Singh cmd |= order;
4305625f965SAjay Singh
4315625f965SAjay Singh if (wilc_spi_tx(wilc, &cmd, 1)) {
4325625f965SAjay Singh dev_err(&spi->dev,
4335625f965SAjay Singh "Failed data block cmd write, bus error...\n");
4345625f965SAjay Singh result = -EINVAL;
4355625f965SAjay Singh break;
4365625f965SAjay Singh }
4375625f965SAjay Singh
4385625f965SAjay Singh /*
4395625f965SAjay Singh * Write data
4405625f965SAjay Singh */
4415625f965SAjay Singh if (wilc_spi_tx(wilc, &b[ix], nbytes)) {
4425625f965SAjay Singh dev_err(&spi->dev,
4435625f965SAjay Singh "Failed data block write, bus error...\n");
4445625f965SAjay Singh result = -EINVAL;
4455625f965SAjay Singh break;
4465625f965SAjay Singh }
4475625f965SAjay Singh
4485625f965SAjay Singh /*
449c872e7aeSDavid Mosberger-Tang * Write CRC
4505625f965SAjay Singh */
451c872e7aeSDavid Mosberger-Tang if (spi_priv->crc16_enabled) {
452c872e7aeSDavid Mosberger-Tang crc_calc = crc_itu_t(0xffff, &b[ix], nbytes);
453c872e7aeSDavid Mosberger-Tang crc[0] = crc_calc >> 8;
454c872e7aeSDavid Mosberger-Tang crc[1] = crc_calc;
4555625f965SAjay Singh if (wilc_spi_tx(wilc, crc, 2)) {
4565625f965SAjay Singh dev_err(&spi->dev, "Failed data block crc write, bus error...\n");
4575625f965SAjay Singh result = -EINVAL;
4585625f965SAjay Singh break;
4595625f965SAjay Singh }
4605625f965SAjay Singh }
4615625f965SAjay Singh
4625625f965SAjay Singh /*
4635625f965SAjay Singh * No need to wait for response
4645625f965SAjay Singh */
4655625f965SAjay Singh ix += nbytes;
4665625f965SAjay Singh sz -= nbytes;
4675625f965SAjay Singh } while (sz);
4685625f965SAjay Singh
4695625f965SAjay Singh return result;
4705625f965SAjay Singh }
4715625f965SAjay Singh
4725625f965SAjay Singh /********************************************
4735625f965SAjay Singh *
4745625f965SAjay Singh * Spi Internal Read/Write Function
4755625f965SAjay Singh *
4765625f965SAjay Singh ********************************************/
wilc_get_crc7(u8 * buffer,u32 len)4775625f965SAjay Singh static u8 wilc_get_crc7(u8 *buffer, u32 len)
4785625f965SAjay Singh {
4795625f965SAjay Singh return crc7_be(0xfe, buffer, len);
4805625f965SAjay Singh }
4815625f965SAjay Singh
wilc_spi_single_read(struct wilc * wilc,u8 cmd,u32 adr,void * b,u8 clockless)4825625f965SAjay Singh static int wilc_spi_single_read(struct wilc *wilc, u8 cmd, u32 adr, void *b,
4835625f965SAjay Singh u8 clockless)
4845625f965SAjay Singh {
4855625f965SAjay Singh struct spi_device *spi = to_spi_device(wilc->dev);
4865625f965SAjay Singh struct wilc_spi *spi_priv = wilc->bus_data;
4875625f965SAjay Singh u8 wb[32], rb[32];
488f2131fa5SDavid Mosberger-Tang int cmd_len, resp_len, i;
489c872e7aeSDavid Mosberger-Tang u16 crc_calc, crc_recv;
4905625f965SAjay Singh struct wilc_spi_cmd *c;
491f2131fa5SDavid Mosberger-Tang struct wilc_spi_rsp_data *r;
492c872e7aeSDavid Mosberger-Tang struct wilc_spi_read_rsp_data *r_data;
4935625f965SAjay Singh
4945625f965SAjay Singh memset(wb, 0x0, sizeof(wb));
4955625f965SAjay Singh memset(rb, 0x0, sizeof(rb));
4965625f965SAjay Singh c = (struct wilc_spi_cmd *)wb;
4975625f965SAjay Singh c->cmd_type = cmd;
4985625f965SAjay Singh if (cmd == CMD_SINGLE_READ) {
4995625f965SAjay Singh c->u.simple_cmd.addr[0] = adr >> 16;
5005625f965SAjay Singh c->u.simple_cmd.addr[1] = adr >> 8;
5015625f965SAjay Singh c->u.simple_cmd.addr[2] = adr;
5025625f965SAjay Singh } else if (cmd == CMD_INTERNAL_READ) {
5035625f965SAjay Singh c->u.simple_cmd.addr[0] = adr >> 8;
5045625f965SAjay Singh if (clockless == 1)
5055625f965SAjay Singh c->u.simple_cmd.addr[0] |= BIT(7);
5065625f965SAjay Singh c->u.simple_cmd.addr[1] = adr;
5075625f965SAjay Singh c->u.simple_cmd.addr[2] = 0x0;
5085625f965SAjay Singh } else {
5095625f965SAjay Singh dev_err(&spi->dev, "cmd [%x] not supported\n", cmd);
5105625f965SAjay Singh return -EINVAL;
5115625f965SAjay Singh }
5125625f965SAjay Singh
5135625f965SAjay Singh cmd_len = offsetof(struct wilc_spi_cmd, u.simple_cmd.crc);
514f2131fa5SDavid Mosberger-Tang resp_len = sizeof(*r) + sizeof(*r_data) + WILC_SPI_RSP_HDR_EXTRA_DATA;
515f2131fa5SDavid Mosberger-Tang
516c872e7aeSDavid Mosberger-Tang if (spi_priv->crc7_enabled) {
5175625f965SAjay Singh c->u.simple_cmd.crc[0] = wilc_get_crc7(wb, cmd_len);
5185625f965SAjay Singh cmd_len += 1;
5195625f965SAjay Singh resp_len += 2;
5205625f965SAjay Singh }
5215625f965SAjay Singh
5225625f965SAjay Singh if (cmd_len + resp_len > ARRAY_SIZE(wb)) {
5235625f965SAjay Singh dev_err(&spi->dev,
5245625f965SAjay Singh "spi buffer size too small (%d) (%d) (%zu)\n",
5255625f965SAjay Singh cmd_len, resp_len, ARRAY_SIZE(wb));
5265625f965SAjay Singh return -EINVAL;
5275625f965SAjay Singh }
5285625f965SAjay Singh
5295625f965SAjay Singh if (wilc_spi_tx_rx(wilc, wb, rb, cmd_len + resp_len)) {
5305625f965SAjay Singh dev_err(&spi->dev, "Failed cmd write, bus error...\n");
5315625f965SAjay Singh return -EINVAL;
5325625f965SAjay Singh }
5335625f965SAjay Singh
534f2131fa5SDavid Mosberger-Tang r = (struct wilc_spi_rsp_data *)&rb[cmd_len];
535aa3fda4fSAjay Singh if (r->rsp_cmd_type != cmd && !clockless) {
536c872e7aeSDavid Mosberger-Tang if (!spi_priv->probing_crc)
5375625f965SAjay Singh dev_err(&spi->dev,
538c872e7aeSDavid Mosberger-Tang "Failed cmd, cmd (%02x), resp (%02x)\n",
5395625f965SAjay Singh cmd, r->rsp_cmd_type);
5405625f965SAjay Singh return -EINVAL;
5415625f965SAjay Singh }
5425625f965SAjay Singh
543aa3fda4fSAjay Singh if (r->status != WILC_SPI_COMMAND_STAT_SUCCESS && !clockless) {
5445625f965SAjay Singh dev_err(&spi->dev, "Failed cmd state response state (%02x)\n",
5455625f965SAjay Singh r->status);
5465625f965SAjay Singh return -EINVAL;
5475625f965SAjay Singh }
5485625f965SAjay Singh
549f2131fa5SDavid Mosberger-Tang for (i = 0; i < WILC_SPI_RSP_HDR_EXTRA_DATA; ++i)
550f2131fa5SDavid Mosberger-Tang if (WILC_GET_RESP_HDR_START(r->data[i]) == 0xf)
551f2131fa5SDavid Mosberger-Tang break;
552f2131fa5SDavid Mosberger-Tang
553f2131fa5SDavid Mosberger-Tang if (i >= WILC_SPI_RSP_HDR_EXTRA_DATA) {
554f2131fa5SDavid Mosberger-Tang dev_err(&spi->dev, "Error, data start missing\n");
5555625f965SAjay Singh return -EINVAL;
5565625f965SAjay Singh }
5575625f965SAjay Singh
558f2131fa5SDavid Mosberger-Tang r_data = (struct wilc_spi_read_rsp_data *)&r->data[i];
559f2131fa5SDavid Mosberger-Tang
5605625f965SAjay Singh if (b)
561f2131fa5SDavid Mosberger-Tang memcpy(b, r_data->data, 4);
5625625f965SAjay Singh
563c872e7aeSDavid Mosberger-Tang if (!clockless && spi_priv->crc16_enabled) {
564c872e7aeSDavid Mosberger-Tang crc_recv = (r_data->crc[0] << 8) | r_data->crc[1];
565c872e7aeSDavid Mosberger-Tang crc_calc = crc_itu_t(0xffff, r_data->data, 4);
566c872e7aeSDavid Mosberger-Tang if (crc_recv != crc_calc) {
567c872e7aeSDavid Mosberger-Tang dev_err(&spi->dev, "%s: bad CRC 0x%04x "
568c872e7aeSDavid Mosberger-Tang "(calculated 0x%04x)\n", __func__,
569c872e7aeSDavid Mosberger-Tang crc_recv, crc_calc);
570c872e7aeSDavid Mosberger-Tang return -EINVAL;
571c872e7aeSDavid Mosberger-Tang }
572c872e7aeSDavid Mosberger-Tang }
5735625f965SAjay Singh
5745625f965SAjay Singh return 0;
5755625f965SAjay Singh }
5765625f965SAjay Singh
wilc_spi_write_cmd(struct wilc * wilc,u8 cmd,u32 adr,u32 data,u8 clockless)5775625f965SAjay Singh static int wilc_spi_write_cmd(struct wilc *wilc, u8 cmd, u32 adr, u32 data,
5785625f965SAjay Singh u8 clockless)
5795625f965SAjay Singh {
5805625f965SAjay Singh struct spi_device *spi = to_spi_device(wilc->dev);
5815625f965SAjay Singh struct wilc_spi *spi_priv = wilc->bus_data;
5825625f965SAjay Singh u8 wb[32], rb[32];
5835625f965SAjay Singh int cmd_len, resp_len;
5845625f965SAjay Singh struct wilc_spi_cmd *c;
5855625f965SAjay Singh struct wilc_spi_rsp_data *r;
5865625f965SAjay Singh
5875625f965SAjay Singh memset(wb, 0x0, sizeof(wb));
5885625f965SAjay Singh memset(rb, 0x0, sizeof(rb));
5895625f965SAjay Singh c = (struct wilc_spi_cmd *)wb;
5905625f965SAjay Singh c->cmd_type = cmd;
5915625f965SAjay Singh if (cmd == CMD_INTERNAL_WRITE) {
5925625f965SAjay Singh c->u.internal_w_cmd.addr[0] = adr >> 8;
5935625f965SAjay Singh if (clockless == 1)
5945625f965SAjay Singh c->u.internal_w_cmd.addr[0] |= BIT(7);
5955625f965SAjay Singh
5965625f965SAjay Singh c->u.internal_w_cmd.addr[1] = adr;
5975625f965SAjay Singh c->u.internal_w_cmd.data = cpu_to_be32(data);
5985625f965SAjay Singh cmd_len = offsetof(struct wilc_spi_cmd, u.internal_w_cmd.crc);
599c872e7aeSDavid Mosberger-Tang if (spi_priv->crc7_enabled)
6005625f965SAjay Singh c->u.internal_w_cmd.crc[0] = wilc_get_crc7(wb, cmd_len);
6015625f965SAjay Singh } else if (cmd == CMD_SINGLE_WRITE) {
6025625f965SAjay Singh c->u.w_cmd.addr[0] = adr >> 16;
6035625f965SAjay Singh c->u.w_cmd.addr[1] = adr >> 8;
6045625f965SAjay Singh c->u.w_cmd.addr[2] = adr;
6055625f965SAjay Singh c->u.w_cmd.data = cpu_to_be32(data);
6065625f965SAjay Singh cmd_len = offsetof(struct wilc_spi_cmd, u.w_cmd.crc);
607c872e7aeSDavid Mosberger-Tang if (spi_priv->crc7_enabled)
6085625f965SAjay Singh c->u.w_cmd.crc[0] = wilc_get_crc7(wb, cmd_len);
6095625f965SAjay Singh } else {
6105625f965SAjay Singh dev_err(&spi->dev, "write cmd [%x] not supported\n", cmd);
6115625f965SAjay Singh return -EINVAL;
6125625f965SAjay Singh }
6135625f965SAjay Singh
614c872e7aeSDavid Mosberger-Tang if (spi_priv->crc7_enabled)
6155625f965SAjay Singh cmd_len += 1;
6165625f965SAjay Singh
6175625f965SAjay Singh resp_len = sizeof(*r);
6185625f965SAjay Singh
6195625f965SAjay Singh if (cmd_len + resp_len > ARRAY_SIZE(wb)) {
6205625f965SAjay Singh dev_err(&spi->dev,
6215625f965SAjay Singh "spi buffer size too small (%d) (%d) (%zu)\n",
6225625f965SAjay Singh cmd_len, resp_len, ARRAY_SIZE(wb));
6235625f965SAjay Singh return -EINVAL;
6245625f965SAjay Singh }
6255625f965SAjay Singh
6265625f965SAjay Singh if (wilc_spi_tx_rx(wilc, wb, rb, cmd_len + resp_len)) {
6275625f965SAjay Singh dev_err(&spi->dev, "Failed cmd write, bus error...\n");
6285625f965SAjay Singh return -EINVAL;
6295625f965SAjay Singh }
6305625f965SAjay Singh
6315625f965SAjay Singh r = (struct wilc_spi_rsp_data *)&rb[cmd_len];
632aa3fda4fSAjay Singh /*
633aa3fda4fSAjay Singh * Clockless registers operations might return unexptected responses,
634aa3fda4fSAjay Singh * even if successful.
635aa3fda4fSAjay Singh */
636aa3fda4fSAjay Singh if (r->rsp_cmd_type != cmd && !clockless) {
6375625f965SAjay Singh dev_err(&spi->dev,
6385625f965SAjay Singh "Failed cmd response, cmd (%02x), resp (%02x)\n",
6395625f965SAjay Singh cmd, r->rsp_cmd_type);
6405625f965SAjay Singh return -EINVAL;
6415625f965SAjay Singh }
6425625f965SAjay Singh
643aa3fda4fSAjay Singh if (r->status != WILC_SPI_COMMAND_STAT_SUCCESS && !clockless) {
6445625f965SAjay Singh dev_err(&spi->dev, "Failed cmd state response state (%02x)\n",
6455625f965SAjay Singh r->status);
6465625f965SAjay Singh return -EINVAL;
6475625f965SAjay Singh }
6485625f965SAjay Singh
6495625f965SAjay Singh return 0;
6505625f965SAjay Singh }
6515625f965SAjay Singh
wilc_spi_dma_rw(struct wilc * wilc,u8 cmd,u32 adr,u8 * b,u32 sz)6525625f965SAjay Singh static int wilc_spi_dma_rw(struct wilc *wilc, u8 cmd, u32 adr, u8 *b, u32 sz)
6535625f965SAjay Singh {
6545625f965SAjay Singh struct spi_device *spi = to_spi_device(wilc->dev);
6555625f965SAjay Singh struct wilc_spi *spi_priv = wilc->bus_data;
656c872e7aeSDavid Mosberger-Tang u16 crc_recv, crc_calc;
6575625f965SAjay Singh u8 wb[32], rb[32];
6585625f965SAjay Singh int cmd_len, resp_len;
6595625f965SAjay Singh int retry, ix = 0;
6605625f965SAjay Singh u8 crc[2];
6615625f965SAjay Singh struct wilc_spi_cmd *c;
6625625f965SAjay Singh struct wilc_spi_rsp_data *r;
6635625f965SAjay Singh
6645625f965SAjay Singh memset(wb, 0x0, sizeof(wb));
6655625f965SAjay Singh memset(rb, 0x0, sizeof(rb));
6665625f965SAjay Singh c = (struct wilc_spi_cmd *)wb;
6675625f965SAjay Singh c->cmd_type = cmd;
6685625f965SAjay Singh if (cmd == CMD_DMA_WRITE || cmd == CMD_DMA_READ) {
6695625f965SAjay Singh c->u.dma_cmd.addr[0] = adr >> 16;
6705625f965SAjay Singh c->u.dma_cmd.addr[1] = adr >> 8;
6715625f965SAjay Singh c->u.dma_cmd.addr[2] = adr;
6725625f965SAjay Singh c->u.dma_cmd.size[0] = sz >> 8;
6735625f965SAjay Singh c->u.dma_cmd.size[1] = sz;
6745625f965SAjay Singh cmd_len = offsetof(struct wilc_spi_cmd, u.dma_cmd.crc);
675c872e7aeSDavid Mosberger-Tang if (spi_priv->crc7_enabled)
6765625f965SAjay Singh c->u.dma_cmd.crc[0] = wilc_get_crc7(wb, cmd_len);
6775625f965SAjay Singh } else if (cmd == CMD_DMA_EXT_WRITE || cmd == CMD_DMA_EXT_READ) {
6785625f965SAjay Singh c->u.dma_cmd_ext.addr[0] = adr >> 16;
6795625f965SAjay Singh c->u.dma_cmd_ext.addr[1] = adr >> 8;
6805625f965SAjay Singh c->u.dma_cmd_ext.addr[2] = adr;
6815625f965SAjay Singh c->u.dma_cmd_ext.size[0] = sz >> 16;
6825625f965SAjay Singh c->u.dma_cmd_ext.size[1] = sz >> 8;
6835625f965SAjay Singh c->u.dma_cmd_ext.size[2] = sz;
6845625f965SAjay Singh cmd_len = offsetof(struct wilc_spi_cmd, u.dma_cmd_ext.crc);
685c872e7aeSDavid Mosberger-Tang if (spi_priv->crc7_enabled)
6865625f965SAjay Singh c->u.dma_cmd_ext.crc[0] = wilc_get_crc7(wb, cmd_len);
6875625f965SAjay Singh } else {
6885625f965SAjay Singh dev_err(&spi->dev, "dma read write cmd [%x] not supported\n",
6895625f965SAjay Singh cmd);
6905625f965SAjay Singh return -EINVAL;
6915625f965SAjay Singh }
692c872e7aeSDavid Mosberger-Tang if (spi_priv->crc7_enabled)
6935625f965SAjay Singh cmd_len += 1;
6945625f965SAjay Singh
6955625f965SAjay Singh resp_len = sizeof(*r);
6965625f965SAjay Singh
6975625f965SAjay Singh if (cmd_len + resp_len > ARRAY_SIZE(wb)) {
6985625f965SAjay Singh dev_err(&spi->dev, "spi buffer size too small (%d)(%d) (%zu)\n",
6995625f965SAjay Singh cmd_len, resp_len, ARRAY_SIZE(wb));
7005625f965SAjay Singh return -EINVAL;
7015625f965SAjay Singh }
7025625f965SAjay Singh
7035625f965SAjay Singh if (wilc_spi_tx_rx(wilc, wb, rb, cmd_len + resp_len)) {
7045625f965SAjay Singh dev_err(&spi->dev, "Failed cmd write, bus error...\n");
7055625f965SAjay Singh return -EINVAL;
7065625f965SAjay Singh }
7075625f965SAjay Singh
7085625f965SAjay Singh r = (struct wilc_spi_rsp_data *)&rb[cmd_len];
7095625f965SAjay Singh if (r->rsp_cmd_type != cmd) {
7105625f965SAjay Singh dev_err(&spi->dev,
7115625f965SAjay Singh "Failed cmd response, cmd (%02x), resp (%02x)\n",
7125625f965SAjay Singh cmd, r->rsp_cmd_type);
7135625f965SAjay Singh return -EINVAL;
7145625f965SAjay Singh }
7155625f965SAjay Singh
7165625f965SAjay Singh if (r->status != WILC_SPI_COMMAND_STAT_SUCCESS) {
7175625f965SAjay Singh dev_err(&spi->dev, "Failed cmd state response state (%02x)\n",
7185625f965SAjay Singh r->status);
7195625f965SAjay Singh return -EINVAL;
7205625f965SAjay Singh }
7215625f965SAjay Singh
7225625f965SAjay Singh if (cmd == CMD_DMA_WRITE || cmd == CMD_DMA_EXT_WRITE)
7235625f965SAjay Singh return 0;
7245625f965SAjay Singh
7255625f965SAjay Singh while (sz > 0) {
7265625f965SAjay Singh int nbytes;
7275625f965SAjay Singh u8 rsp;
7285625f965SAjay Singh
729708db268SChangcheng Deng nbytes = min_t(u32, sz, DATA_PKT_SZ);
7305625f965SAjay Singh
7315625f965SAjay Singh /*
7325625f965SAjay Singh * Data Response header
7335625f965SAjay Singh */
7345625f965SAjay Singh retry = 100;
7355625f965SAjay Singh do {
7365625f965SAjay Singh if (wilc_spi_rx(wilc, &rsp, 1)) {
7375625f965SAjay Singh dev_err(&spi->dev,
7385625f965SAjay Singh "Failed resp read, bus err\n");
7395625f965SAjay Singh return -EINVAL;
7405625f965SAjay Singh }
7415625f965SAjay Singh if (WILC_GET_RESP_HDR_START(rsp) == 0xf)
7425625f965SAjay Singh break;
7435625f965SAjay Singh } while (retry--);
7445625f965SAjay Singh
7455625f965SAjay Singh /*
7465625f965SAjay Singh * Read bytes
7475625f965SAjay Singh */
7485625f965SAjay Singh if (wilc_spi_rx(wilc, &b[ix], nbytes)) {
7495625f965SAjay Singh dev_err(&spi->dev,
7505625f965SAjay Singh "Failed block read, bus err\n");
7515625f965SAjay Singh return -EINVAL;
7525625f965SAjay Singh }
7535625f965SAjay Singh
7545625f965SAjay Singh /*
755c872e7aeSDavid Mosberger-Tang * Read CRC
7565625f965SAjay Singh */
757c872e7aeSDavid Mosberger-Tang if (spi_priv->crc16_enabled) {
758c872e7aeSDavid Mosberger-Tang if (wilc_spi_rx(wilc, crc, 2)) {
7595625f965SAjay Singh dev_err(&spi->dev,
760c872e7aeSDavid Mosberger-Tang "Failed block CRC read, bus err\n");
7615625f965SAjay Singh return -EINVAL;
7625625f965SAjay Singh }
763c872e7aeSDavid Mosberger-Tang crc_recv = (crc[0] << 8) | crc[1];
764c872e7aeSDavid Mosberger-Tang crc_calc = crc_itu_t(0xffff, &b[ix], nbytes);
765c872e7aeSDavid Mosberger-Tang if (crc_recv != crc_calc) {
766c872e7aeSDavid Mosberger-Tang dev_err(&spi->dev, "%s: bad CRC 0x%04x "
767c872e7aeSDavid Mosberger-Tang "(calculated 0x%04x)\n", __func__,
768c872e7aeSDavid Mosberger-Tang crc_recv, crc_calc);
769c872e7aeSDavid Mosberger-Tang return -EINVAL;
770c872e7aeSDavid Mosberger-Tang }
771c872e7aeSDavid Mosberger-Tang }
7725625f965SAjay Singh
7735625f965SAjay Singh ix += nbytes;
7745625f965SAjay Singh sz -= nbytes;
7755625f965SAjay Singh }
7765625f965SAjay Singh return 0;
7775625f965SAjay Singh }
7785625f965SAjay Singh
wilc_spi_special_cmd(struct wilc * wilc,u8 cmd)7791bcc0879SAjay Singh static int wilc_spi_special_cmd(struct wilc *wilc, u8 cmd)
7801bcc0879SAjay Singh {
7811bcc0879SAjay Singh struct spi_device *spi = to_spi_device(wilc->dev);
7821bcc0879SAjay Singh struct wilc_spi *spi_priv = wilc->bus_data;
7831bcc0879SAjay Singh u8 wb[32], rb[32];
7841bcc0879SAjay Singh int cmd_len, resp_len = 0;
7851bcc0879SAjay Singh struct wilc_spi_cmd *c;
7861bcc0879SAjay Singh struct wilc_spi_special_cmd_rsp *r;
7871bcc0879SAjay Singh
7881bcc0879SAjay Singh if (cmd != CMD_TERMINATE && cmd != CMD_REPEAT && cmd != CMD_RESET)
7891bcc0879SAjay Singh return -EINVAL;
7901bcc0879SAjay Singh
7911bcc0879SAjay Singh memset(wb, 0x0, sizeof(wb));
7921bcc0879SAjay Singh memset(rb, 0x0, sizeof(rb));
7931bcc0879SAjay Singh c = (struct wilc_spi_cmd *)wb;
7941bcc0879SAjay Singh c->cmd_type = cmd;
7951bcc0879SAjay Singh
7961bcc0879SAjay Singh if (cmd == CMD_RESET)
7971bcc0879SAjay Singh memset(c->u.simple_cmd.addr, 0xFF, 3);
7981bcc0879SAjay Singh
7991bcc0879SAjay Singh cmd_len = offsetof(struct wilc_spi_cmd, u.simple_cmd.crc);
8001bcc0879SAjay Singh resp_len = sizeof(*r);
8011bcc0879SAjay Singh
8021bcc0879SAjay Singh if (spi_priv->crc7_enabled) {
8031bcc0879SAjay Singh c->u.simple_cmd.crc[0] = wilc_get_crc7(wb, cmd_len);
8041bcc0879SAjay Singh cmd_len += 1;
8051bcc0879SAjay Singh }
8061bcc0879SAjay Singh if (cmd_len + resp_len > ARRAY_SIZE(wb)) {
8071bcc0879SAjay Singh dev_err(&spi->dev, "spi buffer size too small (%d) (%d) (%zu)\n",
8081bcc0879SAjay Singh cmd_len, resp_len, ARRAY_SIZE(wb));
8091bcc0879SAjay Singh return -EINVAL;
8101bcc0879SAjay Singh }
8111bcc0879SAjay Singh
8121bcc0879SAjay Singh if (wilc_spi_tx_rx(wilc, wb, rb, cmd_len + resp_len)) {
8131bcc0879SAjay Singh dev_err(&spi->dev, "Failed cmd write, bus error...\n");
8141bcc0879SAjay Singh return -EINVAL;
8151bcc0879SAjay Singh }
8161bcc0879SAjay Singh
8171bcc0879SAjay Singh r = (struct wilc_spi_special_cmd_rsp *)&rb[cmd_len];
8181bcc0879SAjay Singh if (r->rsp_cmd_type != cmd) {
8191bcc0879SAjay Singh if (!spi_priv->probing_crc)
8201bcc0879SAjay Singh dev_err(&spi->dev,
8211bcc0879SAjay Singh "Failed cmd response, cmd (%02x), resp (%02x)\n",
8221bcc0879SAjay Singh cmd, r->rsp_cmd_type);
8231bcc0879SAjay Singh return -EINVAL;
8241bcc0879SAjay Singh }
8251bcc0879SAjay Singh
8261bcc0879SAjay Singh if (r->status != WILC_SPI_COMMAND_STAT_SUCCESS) {
8271bcc0879SAjay Singh dev_err(&spi->dev, "Failed cmd state response state (%02x)\n",
8281bcc0879SAjay Singh r->status);
8291bcc0879SAjay Singh return -EINVAL;
8301bcc0879SAjay Singh }
8311bcc0879SAjay Singh return 0;
8321bcc0879SAjay Singh }
8331bcc0879SAjay Singh
wilc_spi_reset_cmd_sequence(struct wilc * wl,u8 attempt,u32 addr)8346fd879f9SAmisha Patel static void wilc_spi_reset_cmd_sequence(struct wilc *wl, u8 attempt, u32 addr)
8356fd879f9SAmisha Patel {
8366fd879f9SAmisha Patel struct spi_device *spi = to_spi_device(wl->dev);
8376fd879f9SAmisha Patel struct wilc_spi *spi_priv = wl->bus_data;
8386fd879f9SAmisha Patel
8396fd879f9SAmisha Patel if (!spi_priv->probing_crc)
8406fd879f9SAmisha Patel dev_err(&spi->dev, "Reset and retry %d %x\n", attempt, addr);
8416fd879f9SAmisha Patel
8426fd879f9SAmisha Patel usleep_range(1000, 1100);
8436fd879f9SAmisha Patel wilc_spi_reset(wl);
8446fd879f9SAmisha Patel usleep_range(1000, 1100);
8456fd879f9SAmisha Patel }
8466fd879f9SAmisha Patel
wilc_spi_read_reg(struct wilc * wilc,u32 addr,u32 * data)8475625f965SAjay Singh static int wilc_spi_read_reg(struct wilc *wilc, u32 addr, u32 *data)
8485625f965SAjay Singh {
8495625f965SAjay Singh struct spi_device *spi = to_spi_device(wilc->dev);
8505625f965SAjay Singh int result;
8515625f965SAjay Singh u8 cmd = CMD_SINGLE_READ;
8525625f965SAjay Singh u8 clockless = 0;
8536fd879f9SAmisha Patel u8 i;
8545625f965SAjay Singh
8556fd879f9SAmisha Patel if (addr <= WILC_SPI_CLOCKLESS_ADDR_LIMIT) {
8565625f965SAjay Singh /* Clockless register */
8575625f965SAjay Singh cmd = CMD_INTERNAL_READ;
8585625f965SAjay Singh clockless = 1;
8595625f965SAjay Singh }
8605625f965SAjay Singh
8616fd879f9SAmisha Patel for (i = 0; i < SPI_RETRY_MAX_LIMIT; i++) {
8625625f965SAjay Singh result = wilc_spi_single_read(wilc, cmd, addr, data, clockless);
8636fd879f9SAmisha Patel if (!result) {
8646fd879f9SAmisha Patel le32_to_cpus(data);
8656fd879f9SAmisha Patel return 0;
8665625f965SAjay Singh }
8675625f965SAjay Singh
8686fd879f9SAmisha Patel /* retry is not applicable for clockless registers */
8696fd879f9SAmisha Patel if (clockless)
8706fd879f9SAmisha Patel break;
8715625f965SAjay Singh
8726fd879f9SAmisha Patel dev_err(&spi->dev, "Failed cmd, read reg (%08x)...\n", addr);
8736fd879f9SAmisha Patel wilc_spi_reset_cmd_sequence(wilc, i, addr);
8746fd879f9SAmisha Patel }
8756fd879f9SAmisha Patel
8766fd879f9SAmisha Patel return result;
8775625f965SAjay Singh }
8785625f965SAjay Singh
wilc_spi_read(struct wilc * wilc,u32 addr,u8 * buf,u32 size)8795625f965SAjay Singh static int wilc_spi_read(struct wilc *wilc, u32 addr, u8 *buf, u32 size)
8805625f965SAjay Singh {
8815625f965SAjay Singh struct spi_device *spi = to_spi_device(wilc->dev);
8825625f965SAjay Singh int result;
8836fd879f9SAmisha Patel u8 i;
8845625f965SAjay Singh
8855625f965SAjay Singh if (size <= 4)
8865625f965SAjay Singh return -EINVAL;
8875625f965SAjay Singh
8886fd879f9SAmisha Patel for (i = 0; i < SPI_RETRY_MAX_LIMIT; i++) {
8896fd879f9SAmisha Patel result = wilc_spi_dma_rw(wilc, CMD_DMA_EXT_READ, addr,
8906fd879f9SAmisha Patel buf, size);
8916fd879f9SAmisha Patel if (!result)
8926fd879f9SAmisha Patel return 0;
8936fd879f9SAmisha Patel
8945625f965SAjay Singh dev_err(&spi->dev, "Failed cmd, read block (%08x)...\n", addr);
8956fd879f9SAmisha Patel
8966fd879f9SAmisha Patel wilc_spi_reset_cmd_sequence(wilc, i, addr);
8975625f965SAjay Singh }
8985625f965SAjay Singh
8996fd879f9SAmisha Patel return result;
9005625f965SAjay Singh }
9015625f965SAjay Singh
spi_internal_write(struct wilc * wilc,u32 adr,u32 dat)9025625f965SAjay Singh static int spi_internal_write(struct wilc *wilc, u32 adr, u32 dat)
9035625f965SAjay Singh {
9045625f965SAjay Singh struct spi_device *spi = to_spi_device(wilc->dev);
9055625f965SAjay Singh int result;
9066fd879f9SAmisha Patel u8 i;
9075625f965SAjay Singh
9086fd879f9SAmisha Patel for (i = 0; i < SPI_RETRY_MAX_LIMIT; i++) {
9096fd879f9SAmisha Patel result = wilc_spi_write_cmd(wilc, CMD_INTERNAL_WRITE, adr,
9106fd879f9SAmisha Patel dat, 0);
9116fd879f9SAmisha Patel if (!result)
9126fd879f9SAmisha Patel return 0;
9135625f965SAjay Singh dev_err(&spi->dev, "Failed internal write cmd...\n");
9146fd879f9SAmisha Patel
9156fd879f9SAmisha Patel wilc_spi_reset_cmd_sequence(wilc, i, adr);
9165625f965SAjay Singh }
9175625f965SAjay Singh
9186fd879f9SAmisha Patel return result;
9195625f965SAjay Singh }
9205625f965SAjay Singh
spi_internal_read(struct wilc * wilc,u32 adr,u32 * data)9215625f965SAjay Singh static int spi_internal_read(struct wilc *wilc, u32 adr, u32 *data)
9225625f965SAjay Singh {
9235625f965SAjay Singh struct spi_device *spi = to_spi_device(wilc->dev);
924c872e7aeSDavid Mosberger-Tang struct wilc_spi *spi_priv = wilc->bus_data;
9255625f965SAjay Singh int result;
9266fd879f9SAmisha Patel u8 i;
9275625f965SAjay Singh
9286fd879f9SAmisha Patel for (i = 0; i < SPI_RETRY_MAX_LIMIT; i++) {
9296fd879f9SAmisha Patel result = wilc_spi_single_read(wilc, CMD_INTERNAL_READ, adr,
9306fd879f9SAmisha Patel data, 0);
9316fd879f9SAmisha Patel if (!result) {
9326fd879f9SAmisha Patel le32_to_cpus(data);
9336fd879f9SAmisha Patel return 0;
9346fd879f9SAmisha Patel }
935c872e7aeSDavid Mosberger-Tang if (!spi_priv->probing_crc)
9365625f965SAjay Singh dev_err(&spi->dev, "Failed internal read cmd...\n");
9376fd879f9SAmisha Patel
9386fd879f9SAmisha Patel wilc_spi_reset_cmd_sequence(wilc, i, adr);
9395625f965SAjay Singh }
9405625f965SAjay Singh
9416fd879f9SAmisha Patel return result;
9425625f965SAjay Singh }
9435625f965SAjay Singh
9445625f965SAjay Singh /********************************************
9455625f965SAjay Singh *
9465625f965SAjay Singh * Spi interfaces
9475625f965SAjay Singh *
9485625f965SAjay Singh ********************************************/
9495625f965SAjay Singh
wilc_spi_write_reg(struct wilc * wilc,u32 addr,u32 data)9505625f965SAjay Singh static int wilc_spi_write_reg(struct wilc *wilc, u32 addr, u32 data)
9515625f965SAjay Singh {
9525625f965SAjay Singh struct spi_device *spi = to_spi_device(wilc->dev);
9535625f965SAjay Singh int result;
9545625f965SAjay Singh u8 cmd = CMD_SINGLE_WRITE;
9555625f965SAjay Singh u8 clockless = 0;
9566fd879f9SAmisha Patel u8 i;
9575625f965SAjay Singh
9586fd879f9SAmisha Patel if (addr <= WILC_SPI_CLOCKLESS_ADDR_LIMIT) {
9595625f965SAjay Singh /* Clockless register */
9605625f965SAjay Singh cmd = CMD_INTERNAL_WRITE;
9615625f965SAjay Singh clockless = 1;
9625625f965SAjay Singh }
9635625f965SAjay Singh
9646fd879f9SAmisha Patel for (i = 0; i < SPI_RETRY_MAX_LIMIT; i++) {
9655625f965SAjay Singh result = wilc_spi_write_cmd(wilc, cmd, addr, data, clockless);
9666fd879f9SAmisha Patel if (!result)
9675625f965SAjay Singh return 0;
9686fd879f9SAmisha Patel
9696fd879f9SAmisha Patel dev_err(&spi->dev, "Failed cmd, write reg (%08x)...\n", addr);
9706fd879f9SAmisha Patel
9716fd879f9SAmisha Patel if (clockless)
9726fd879f9SAmisha Patel break;
9736fd879f9SAmisha Patel
9746fd879f9SAmisha Patel wilc_spi_reset_cmd_sequence(wilc, i, addr);
9756fd879f9SAmisha Patel }
9766fd879f9SAmisha Patel return result;
9775625f965SAjay Singh }
9785625f965SAjay Singh
spi_data_rsp(struct wilc * wilc,u8 cmd)979ce3b9338SDavid Mosberger-Tang static int spi_data_rsp(struct wilc *wilc, u8 cmd)
980ce3b9338SDavid Mosberger-Tang {
981ce3b9338SDavid Mosberger-Tang struct spi_device *spi = to_spi_device(wilc->dev);
982ce3b9338SDavid Mosberger-Tang int result, i;
983ce3b9338SDavid Mosberger-Tang u8 rsp[4];
984ce3b9338SDavid Mosberger-Tang
985ce3b9338SDavid Mosberger-Tang /*
986ce3b9338SDavid Mosberger-Tang * The response to data packets is two bytes long. For
987ce3b9338SDavid Mosberger-Tang * efficiency's sake, wilc_spi_write() wisely ignores the
988ce3b9338SDavid Mosberger-Tang * responses for all packets but the final one. The downside
989ce3b9338SDavid Mosberger-Tang * of that optimization is that when the final data packet is
990ce3b9338SDavid Mosberger-Tang * short, we may receive (part of) the response to the
991ce3b9338SDavid Mosberger-Tang * second-to-last packet before the one for the final packet.
992ce3b9338SDavid Mosberger-Tang * To handle this, we always read 4 bytes and then search for
993ce3b9338SDavid Mosberger-Tang * the last byte that contains the "Response Start" code (0xc
994ce3b9338SDavid Mosberger-Tang * in the top 4 bits). We then know that this byte is the
995ce3b9338SDavid Mosberger-Tang * first response byte of the final data packet.
996ce3b9338SDavid Mosberger-Tang */
997ce3b9338SDavid Mosberger-Tang result = wilc_spi_rx(wilc, rsp, sizeof(rsp));
998ce3b9338SDavid Mosberger-Tang if (result) {
999ce3b9338SDavid Mosberger-Tang dev_err(&spi->dev, "Failed bus error...\n");
1000ce3b9338SDavid Mosberger-Tang return result;
1001ce3b9338SDavid Mosberger-Tang }
1002ce3b9338SDavid Mosberger-Tang
1003ce3b9338SDavid Mosberger-Tang for (i = sizeof(rsp) - 2; i >= 0; --i)
1004ce3b9338SDavid Mosberger-Tang if (FIELD_GET(RSP_START_FIELD, rsp[i]) == RSP_START_TAG)
1005ce3b9338SDavid Mosberger-Tang break;
1006ce3b9338SDavid Mosberger-Tang
1007ce3b9338SDavid Mosberger-Tang if (i < 0) {
1008ce3b9338SDavid Mosberger-Tang dev_err(&spi->dev,
1009ce3b9338SDavid Mosberger-Tang "Data packet response missing (%02x %02x %02x %02x)\n",
1010ce3b9338SDavid Mosberger-Tang rsp[0], rsp[1], rsp[2], rsp[3]);
1011ce3b9338SDavid Mosberger-Tang return -1;
1012ce3b9338SDavid Mosberger-Tang }
1013ce3b9338SDavid Mosberger-Tang
1014ce3b9338SDavid Mosberger-Tang /* rsp[i] is the last response start byte */
1015ce3b9338SDavid Mosberger-Tang
1016ce3b9338SDavid Mosberger-Tang if (FIELD_GET(RSP_TYPE_FIELD, rsp[i]) != RSP_TYPE_LAST_PACKET
1017ce3b9338SDavid Mosberger-Tang || rsp[i + 1] != RSP_STATE_NO_ERROR) {
1018ce3b9338SDavid Mosberger-Tang dev_err(&spi->dev, "Data response error (%02x %02x)\n",
1019ce3b9338SDavid Mosberger-Tang rsp[i], rsp[i + 1]);
1020ce3b9338SDavid Mosberger-Tang return -1;
1021ce3b9338SDavid Mosberger-Tang }
1022ce3b9338SDavid Mosberger-Tang return 0;
1023ce3b9338SDavid Mosberger-Tang }
1024ce3b9338SDavid Mosberger-Tang
wilc_spi_write(struct wilc * wilc,u32 addr,u8 * buf,u32 size)10255625f965SAjay Singh static int wilc_spi_write(struct wilc *wilc, u32 addr, u8 *buf, u32 size)
10265625f965SAjay Singh {
10275625f965SAjay Singh struct spi_device *spi = to_spi_device(wilc->dev);
10285625f965SAjay Singh int result;
10296fd879f9SAmisha Patel u8 i;
10305625f965SAjay Singh
10315625f965SAjay Singh /*
10325625f965SAjay Singh * has to be greated than 4
10335625f965SAjay Singh */
10345625f965SAjay Singh if (size <= 4)
10355625f965SAjay Singh return -EINVAL;
10365625f965SAjay Singh
10376fd879f9SAmisha Patel for (i = 0; i < SPI_RETRY_MAX_LIMIT; i++) {
10386fd879f9SAmisha Patel result = wilc_spi_dma_rw(wilc, CMD_DMA_EXT_WRITE, addr,
10396fd879f9SAmisha Patel NULL, size);
10405625f965SAjay Singh if (result) {
10415625f965SAjay Singh dev_err(&spi->dev,
10425625f965SAjay Singh "Failed cmd, write block (%08x)...\n", addr);
10436fd879f9SAmisha Patel wilc_spi_reset_cmd_sequence(wilc, i, addr);
10446fd879f9SAmisha Patel continue;
10455625f965SAjay Singh }
10465625f965SAjay Singh
10475625f965SAjay Singh /*
10485625f965SAjay Singh * Data
10495625f965SAjay Singh */
10505625f965SAjay Singh result = spi_data_write(wilc, buf, size);
10515625f965SAjay Singh if (result) {
10525625f965SAjay Singh dev_err(&spi->dev, "Failed block data write...\n");
10536fd879f9SAmisha Patel wilc_spi_reset_cmd_sequence(wilc, i, addr);
10546fd879f9SAmisha Patel continue;
10555625f965SAjay Singh }
10565625f965SAjay Singh
1057ce3b9338SDavid Mosberger-Tang /*
1058ce3b9338SDavid Mosberger-Tang * Data response
1059ce3b9338SDavid Mosberger-Tang */
10606fd879f9SAmisha Patel result = spi_data_rsp(wilc, CMD_DMA_EXT_WRITE);
10616fd879f9SAmisha Patel if (result) {
10626fd879f9SAmisha Patel dev_err(&spi->dev, "Failed block data rsp...\n");
10636fd879f9SAmisha Patel wilc_spi_reset_cmd_sequence(wilc, i, addr);
10646fd879f9SAmisha Patel continue;
10656fd879f9SAmisha Patel }
10666fd879f9SAmisha Patel break;
10676fd879f9SAmisha Patel }
10686fd879f9SAmisha Patel return result;
10695625f965SAjay Singh }
10705625f965SAjay Singh
10715625f965SAjay Singh /********************************************
10725625f965SAjay Singh *
10735625f965SAjay Singh * Bus interfaces
10745625f965SAjay Singh *
10755625f965SAjay Singh ********************************************/
10765625f965SAjay Singh
wilc_spi_reset(struct wilc * wilc)1077c2dcb476SAjay Singh static int wilc_spi_reset(struct wilc *wilc)
1078c2dcb476SAjay Singh {
1079c2dcb476SAjay Singh struct spi_device *spi = to_spi_device(wilc->dev);
1080c2dcb476SAjay Singh struct wilc_spi *spi_priv = wilc->bus_data;
1081c2dcb476SAjay Singh int result;
1082c2dcb476SAjay Singh
1083c2dcb476SAjay Singh result = wilc_spi_special_cmd(wilc, CMD_RESET);
1084c2dcb476SAjay Singh if (result && !spi_priv->probing_crc)
1085c2dcb476SAjay Singh dev_err(&spi->dev, "Failed cmd reset\n");
1086c2dcb476SAjay Singh
1087c2dcb476SAjay Singh return result;
1088c2dcb476SAjay Singh }
1089c2dcb476SAjay Singh
wilc_spi_is_init(struct wilc * wilc)109039d0f1b0SAjay Singh static bool wilc_spi_is_init(struct wilc *wilc)
109139d0f1b0SAjay Singh {
109239d0f1b0SAjay Singh struct wilc_spi *spi_priv = wilc->bus_data;
109339d0f1b0SAjay Singh
109439d0f1b0SAjay Singh return spi_priv->isinit;
109539d0f1b0SAjay Singh }
109639d0f1b0SAjay Singh
wilc_spi_deinit(struct wilc * wilc)10975625f965SAjay Singh static int wilc_spi_deinit(struct wilc *wilc)
10985625f965SAjay Singh {
1099ec031ac4SDavid Mosberger-Tang struct wilc_spi *spi_priv = wilc->bus_data;
1100ec031ac4SDavid Mosberger-Tang
1101ec031ac4SDavid Mosberger-Tang spi_priv->isinit = false;
1102ec031ac4SDavid Mosberger-Tang wilc_wlan_power(wilc, false);
11035625f965SAjay Singh return 0;
11045625f965SAjay Singh }
11055625f965SAjay Singh
wilc_spi_init(struct wilc * wilc,bool resume)11065625f965SAjay Singh static int wilc_spi_init(struct wilc *wilc, bool resume)
11075625f965SAjay Singh {
11085625f965SAjay Singh struct spi_device *spi = to_spi_device(wilc->dev);
11095625f965SAjay Singh struct wilc_spi *spi_priv = wilc->bus_data;
11105625f965SAjay Singh u32 reg;
11115625f965SAjay Singh u32 chipid;
1112c872e7aeSDavid Mosberger-Tang int ret, i;
11135625f965SAjay Singh
111450cbbfd4SDavid Mosberger-Tang if (spi_priv->isinit) {
111550cbbfd4SDavid Mosberger-Tang /* Confirm we can read chipid register without error: */
11165625f965SAjay Singh ret = wilc_spi_read_reg(wilc, WILC_CHIPID, &chipid);
111750cbbfd4SDavid Mosberger-Tang if (ret == 0)
111850cbbfd4SDavid Mosberger-Tang return 0;
11195625f965SAjay Singh
112050cbbfd4SDavid Mosberger-Tang dev_err(&spi->dev, "Fail cmd read chip id...\n");
11215625f965SAjay Singh }
11225625f965SAjay Singh
1123ec031ac4SDavid Mosberger-Tang wilc_wlan_power(wilc, true);
1124ec031ac4SDavid Mosberger-Tang
11255625f965SAjay Singh /*
11265625f965SAjay Singh * configure protocol
11275625f965SAjay Singh */
11285625f965SAjay Singh
11295625f965SAjay Singh /*
1130c872e7aeSDavid Mosberger-Tang * Infer the CRC settings that are currently in effect. This
1131c872e7aeSDavid Mosberger-Tang * is necessary because we can't be sure that the chip has
1132c872e7aeSDavid Mosberger-Tang * been RESET (e.g, after module unload and reload).
11335625f965SAjay Singh */
1134c872e7aeSDavid Mosberger-Tang spi_priv->probing_crc = true;
1135c872e7aeSDavid Mosberger-Tang spi_priv->crc7_enabled = enable_crc7;
1136c872e7aeSDavid Mosberger-Tang spi_priv->crc16_enabled = false; /* don't check CRC16 during probing */
1137c872e7aeSDavid Mosberger-Tang for (i = 0; i < 2; ++i) {
11385625f965SAjay Singh ret = spi_internal_read(wilc, WILC_SPI_PROTOCOL_OFFSET, ®);
1139c872e7aeSDavid Mosberger-Tang if (ret == 0)
1140c872e7aeSDavid Mosberger-Tang break;
1141c872e7aeSDavid Mosberger-Tang spi_priv->crc7_enabled = !enable_crc7;
1142c872e7aeSDavid Mosberger-Tang }
11435625f965SAjay Singh if (ret) {
1144c872e7aeSDavid Mosberger-Tang dev_err(&spi->dev, "Failed with CRC7 on and off.\n");
11455625f965SAjay Singh return ret;
11465625f965SAjay Singh }
11475ee2d9ddSDavid Mosberger-Tang
1148c872e7aeSDavid Mosberger-Tang /* set up the desired CRC configuration: */
1149c872e7aeSDavid Mosberger-Tang reg &= ~(PROTOCOL_REG_CRC7_MASK | PROTOCOL_REG_CRC16_MASK);
1150c872e7aeSDavid Mosberger-Tang if (enable_crc7)
1151c872e7aeSDavid Mosberger-Tang reg |= PROTOCOL_REG_CRC7_MASK;
1152c872e7aeSDavid Mosberger-Tang if (enable_crc16)
1153c872e7aeSDavid Mosberger-Tang reg |= PROTOCOL_REG_CRC16_MASK;
1154c872e7aeSDavid Mosberger-Tang
1155c872e7aeSDavid Mosberger-Tang /* set up the data packet size: */
11565ee2d9ddSDavid Mosberger-Tang BUILD_BUG_ON(DATA_PKT_LOG_SZ < DATA_PKT_LOG_SZ_MIN
11575ee2d9ddSDavid Mosberger-Tang || DATA_PKT_LOG_SZ > DATA_PKT_LOG_SZ_MAX);
11585ee2d9ddSDavid Mosberger-Tang reg &= ~PROTOCOL_REG_PKT_SZ_MASK;
11595ee2d9ddSDavid Mosberger-Tang reg |= FIELD_PREP(PROTOCOL_REG_PKT_SZ_MASK,
11605ee2d9ddSDavid Mosberger-Tang DATA_PKT_LOG_SZ - DATA_PKT_LOG_SZ_MIN);
11615ee2d9ddSDavid Mosberger-Tang
1162c872e7aeSDavid Mosberger-Tang /* establish the new setup: */
11635625f965SAjay Singh ret = spi_internal_write(wilc, WILC_SPI_PROTOCOL_OFFSET, reg);
11645625f965SAjay Singh if (ret) {
11655625f965SAjay Singh dev_err(&spi->dev,
11665625f965SAjay Singh "[wilc spi %d]: Failed internal write reg\n",
11675625f965SAjay Singh __LINE__);
11685625f965SAjay Singh return ret;
11695625f965SAjay Singh }
1170c872e7aeSDavid Mosberger-Tang /* update our state to match new protocol settings: */
1171c872e7aeSDavid Mosberger-Tang spi_priv->crc7_enabled = enable_crc7;
1172c872e7aeSDavid Mosberger-Tang spi_priv->crc16_enabled = enable_crc16;
1173c872e7aeSDavid Mosberger-Tang
1174c872e7aeSDavid Mosberger-Tang /* re-read to make sure new settings are in effect: */
1175c872e7aeSDavid Mosberger-Tang spi_internal_read(wilc, WILC_SPI_PROTOCOL_OFFSET, ®);
1176c872e7aeSDavid Mosberger-Tang
1177c872e7aeSDavid Mosberger-Tang spi_priv->probing_crc = false;
11785625f965SAjay Singh
11795625f965SAjay Singh /*
118050cbbfd4SDavid Mosberger-Tang * make sure can read chip id without protocol error
11815625f965SAjay Singh */
11825625f965SAjay Singh ret = wilc_spi_read_reg(wilc, WILC_CHIPID, &chipid);
11835625f965SAjay Singh if (ret) {
11845625f965SAjay Singh dev_err(&spi->dev, "Fail cmd read chip id...\n");
11855625f965SAjay Singh return ret;
11865625f965SAjay Singh }
11875625f965SAjay Singh
118850cbbfd4SDavid Mosberger-Tang spi_priv->isinit = true;
11895625f965SAjay Singh
11905625f965SAjay Singh return 0;
11915625f965SAjay Singh }
11925625f965SAjay Singh
wilc_spi_read_size(struct wilc * wilc,u32 * size)11935625f965SAjay Singh static int wilc_spi_read_size(struct wilc *wilc, u32 *size)
11945625f965SAjay Singh {
11955625f965SAjay Singh int ret;
11965625f965SAjay Singh
11975625f965SAjay Singh ret = spi_internal_read(wilc,
11985625f965SAjay Singh WILC_SPI_INT_STATUS - WILC_SPI_REG_BASE, size);
11995625f965SAjay Singh *size = FIELD_GET(IRQ_DMA_WD_CNT_MASK, *size);
12005625f965SAjay Singh
12015625f965SAjay Singh return ret;
12025625f965SAjay Singh }
12035625f965SAjay Singh
wilc_spi_read_int(struct wilc * wilc,u32 * int_status)12045625f965SAjay Singh static int wilc_spi_read_int(struct wilc *wilc, u32 *int_status)
12055625f965SAjay Singh {
12065625f965SAjay Singh return spi_internal_read(wilc, WILC_SPI_INT_STATUS - WILC_SPI_REG_BASE,
12075625f965SAjay Singh int_status);
12085625f965SAjay Singh }
12095625f965SAjay Singh
wilc_spi_clear_int_ext(struct wilc * wilc,u32 val)12105625f965SAjay Singh static int wilc_spi_clear_int_ext(struct wilc *wilc, u32 val)
12115625f965SAjay Singh {
1212382726d1SAjay Singh int ret;
1213382726d1SAjay Singh int retry = SPI_ENABLE_VMM_RETRY_LIMIT;
1214382726d1SAjay Singh u32 check;
1215382726d1SAjay Singh
1216382726d1SAjay Singh while (retry) {
1217382726d1SAjay Singh ret = spi_internal_write(wilc,
1218382726d1SAjay Singh WILC_SPI_INT_CLEAR - WILC_SPI_REG_BASE,
12195625f965SAjay Singh val);
1220382726d1SAjay Singh if (ret)
1221382726d1SAjay Singh break;
1222382726d1SAjay Singh
1223382726d1SAjay Singh ret = spi_internal_read(wilc,
1224382726d1SAjay Singh WILC_SPI_INT_CLEAR - WILC_SPI_REG_BASE,
1225382726d1SAjay Singh &check);
1226382726d1SAjay Singh if (ret || ((check & EN_VMM) == (val & EN_VMM)))
1227382726d1SAjay Singh break;
1228382726d1SAjay Singh
1229382726d1SAjay Singh retry--;
1230382726d1SAjay Singh }
1231382726d1SAjay Singh return ret;
12325625f965SAjay Singh }
12335625f965SAjay Singh
wilc_spi_sync_ext(struct wilc * wilc,int nint)12345625f965SAjay Singh static int wilc_spi_sync_ext(struct wilc *wilc, int nint)
12355625f965SAjay Singh {
12365625f965SAjay Singh struct spi_device *spi = to_spi_device(wilc->dev);
12375625f965SAjay Singh u32 reg;
12385625f965SAjay Singh int ret, i;
12395625f965SAjay Singh
12405625f965SAjay Singh if (nint > MAX_NUM_INT) {
12415625f965SAjay Singh dev_err(&spi->dev, "Too many interrupts (%d)...\n", nint);
12425625f965SAjay Singh return -EINVAL;
12435625f965SAjay Singh }
12445625f965SAjay Singh
12455625f965SAjay Singh /*
12465625f965SAjay Singh * interrupt pin mux select
12475625f965SAjay Singh */
12485625f965SAjay Singh ret = wilc_spi_read_reg(wilc, WILC_PIN_MUX_0, ®);
12495625f965SAjay Singh if (ret) {
12505625f965SAjay Singh dev_err(&spi->dev, "Failed read reg (%08x)...\n",
12515625f965SAjay Singh WILC_PIN_MUX_0);
12525625f965SAjay Singh return ret;
12535625f965SAjay Singh }
12545625f965SAjay Singh reg |= BIT(8);
12555625f965SAjay Singh ret = wilc_spi_write_reg(wilc, WILC_PIN_MUX_0, reg);
12565625f965SAjay Singh if (ret) {
12575625f965SAjay Singh dev_err(&spi->dev, "Failed write reg (%08x)...\n",
12585625f965SAjay Singh WILC_PIN_MUX_0);
12595625f965SAjay Singh return ret;
12605625f965SAjay Singh }
12615625f965SAjay Singh
12625625f965SAjay Singh /*
12635625f965SAjay Singh * interrupt enable
12645625f965SAjay Singh */
12655625f965SAjay Singh ret = wilc_spi_read_reg(wilc, WILC_INTR_ENABLE, ®);
12665625f965SAjay Singh if (ret) {
12675625f965SAjay Singh dev_err(&spi->dev, "Failed read reg (%08x)...\n",
12685625f965SAjay Singh WILC_INTR_ENABLE);
12695625f965SAjay Singh return ret;
12705625f965SAjay Singh }
12715625f965SAjay Singh
12725625f965SAjay Singh for (i = 0; (i < 5) && (nint > 0); i++, nint--)
12735625f965SAjay Singh reg |= (BIT((27 + i)));
12745625f965SAjay Singh
12755625f965SAjay Singh ret = wilc_spi_write_reg(wilc, WILC_INTR_ENABLE, reg);
12765625f965SAjay Singh if (ret) {
12775625f965SAjay Singh dev_err(&spi->dev, "Failed write reg (%08x)...\n",
12785625f965SAjay Singh WILC_INTR_ENABLE);
12795625f965SAjay Singh return ret;
12805625f965SAjay Singh }
12815625f965SAjay Singh if (nint) {
12825625f965SAjay Singh ret = wilc_spi_read_reg(wilc, WILC_INTR2_ENABLE, ®);
12835625f965SAjay Singh if (ret) {
12845625f965SAjay Singh dev_err(&spi->dev, "Failed read reg (%08x)...\n",
12855625f965SAjay Singh WILC_INTR2_ENABLE);
12865625f965SAjay Singh return ret;
12875625f965SAjay Singh }
12885625f965SAjay Singh
12895625f965SAjay Singh for (i = 0; (i < 3) && (nint > 0); i++, nint--)
12905625f965SAjay Singh reg |= BIT(i);
12915625f965SAjay Singh
1292301cfbabSAjay Singh ret = wilc_spi_write_reg(wilc, WILC_INTR2_ENABLE, reg);
12935625f965SAjay Singh if (ret) {
12945625f965SAjay Singh dev_err(&spi->dev, "Failed write reg (%08x)...\n",
12955625f965SAjay Singh WILC_INTR2_ENABLE);
12965625f965SAjay Singh return ret;
12975625f965SAjay Singh }
12985625f965SAjay Singh }
12995625f965SAjay Singh
13005625f965SAjay Singh return 0;
13015625f965SAjay Singh }
13025625f965SAjay Singh
13035625f965SAjay Singh /* Global spi HIF function table */
13045625f965SAjay Singh static const struct wilc_hif_func wilc_hif_spi = {
13055625f965SAjay Singh .hif_init = wilc_spi_init,
13065625f965SAjay Singh .hif_deinit = wilc_spi_deinit,
13075625f965SAjay Singh .hif_read_reg = wilc_spi_read_reg,
13085625f965SAjay Singh .hif_write_reg = wilc_spi_write_reg,
13095625f965SAjay Singh .hif_block_rx = wilc_spi_read,
13105625f965SAjay Singh .hif_block_tx = wilc_spi_write,
13115625f965SAjay Singh .hif_read_int = wilc_spi_read_int,
13125625f965SAjay Singh .hif_clear_int_ext = wilc_spi_clear_int_ext,
13135625f965SAjay Singh .hif_read_size = wilc_spi_read_size,
13145625f965SAjay Singh .hif_block_tx_ext = wilc_spi_write,
13155625f965SAjay Singh .hif_block_rx_ext = wilc_spi_read,
13165625f965SAjay Singh .hif_sync_ext = wilc_spi_sync_ext,
1317c2dcb476SAjay Singh .hif_reset = wilc_spi_reset,
131839d0f1b0SAjay Singh .hif_is_init = wilc_spi_is_init,
13195625f965SAjay Singh };
1320