1764dee47SLorenzo Bianconi /* SPDX-License-Identifier: ISC */ 2764dee47SLorenzo Bianconi /* Copyright (C) 2020 MediaTek Inc. 3764dee47SLorenzo Bianconi * 4764dee47SLorenzo Bianconi * Author: Sean Wang <sean.wang@mediatek.com> 5764dee47SLorenzo Bianconi */ 6764dee47SLorenzo Bianconi 7764dee47SLorenzo Bianconi #ifndef __MT76S_H 8764dee47SLorenzo Bianconi #define __MT76S_H 9764dee47SLorenzo Bianconi 10764dee47SLorenzo Bianconi #define MT_PSE_PAGE_SZ 128 11764dee47SLorenzo Bianconi 12764dee47SLorenzo Bianconi #define MCR_WCIR 0x0000 13764dee47SLorenzo Bianconi #define MCR_WHLPCR 0x0004 14764dee47SLorenzo Bianconi #define WHLPCR_FW_OWN_REQ_CLR BIT(9) 15764dee47SLorenzo Bianconi #define WHLPCR_FW_OWN_REQ_SET BIT(8) 16764dee47SLorenzo Bianconi #define WHLPCR_IS_DRIVER_OWN BIT(8) 17764dee47SLorenzo Bianconi #define WHLPCR_INT_EN_CLR BIT(1) 18764dee47SLorenzo Bianconi #define WHLPCR_INT_EN_SET BIT(0) 19764dee47SLorenzo Bianconi 20764dee47SLorenzo Bianconi #define MCR_WSDIOCSR 0x0008 21764dee47SLorenzo Bianconi #define MCR_WHCR 0x000C 22764dee47SLorenzo Bianconi #define W_INT_CLR_CTRL BIT(1) 23764dee47SLorenzo Bianconi #define RECV_MAILBOX_RD_CLR_EN BIT(2) 24dacf0acfSSean Wang #define WF_SYS_RSTB BIT(4) /* supported in CONNAC2 */ 25dacf0acfSSean Wang #define WF_WHOLE_PATH_RSTB BIT(5) /* supported in CONNAC2 */ 26dacf0acfSSean Wang #define WF_SDIO_WF_PATH_RSTB BIT(6) /* supported in CONNAC2 */ 27764dee47SLorenzo Bianconi #define MAX_HIF_RX_LEN_NUM GENMASK(13, 8) 28dacf0acfSSean Wang #define MAX_HIF_RX_LEN_NUM_CONNAC2 GENMASK(14, 8) /* supported in CONNAC2 */ 29dacf0acfSSean Wang #define WF_RST_DONE BIT(15) /* supported in CONNAC2 */ 30764dee47SLorenzo Bianconi #define RX_ENHANCE_MODE BIT(16) 31764dee47SLorenzo Bianconi 32764dee47SLorenzo Bianconi #define MCR_WHISR 0x0010 33764dee47SLorenzo Bianconi #define MCR_WHIER 0x0014 34764dee47SLorenzo Bianconi #define WHIER_D2H_SW_INT GENMASK(31, 8) 35764dee47SLorenzo Bianconi #define WHIER_FW_OWN_BACK_INT_EN BIT(7) 36764dee47SLorenzo Bianconi #define WHIER_ABNORMAL_INT_EN BIT(6) 37dacf0acfSSean Wang #define WHIER_WDT_INT_EN BIT(5) /* supported in CONNAC2 */ 38764dee47SLorenzo Bianconi #define WHIER_RX1_DONE_INT_EN BIT(2) 39764dee47SLorenzo Bianconi #define WHIER_RX0_DONE_INT_EN BIT(1) 40764dee47SLorenzo Bianconi #define WHIER_TX_DONE_INT_EN BIT(0) 41764dee47SLorenzo Bianconi #define WHIER_DEFAULT (WHIER_RX0_DONE_INT_EN | \ 42764dee47SLorenzo Bianconi WHIER_RX1_DONE_INT_EN | \ 43764dee47SLorenzo Bianconi WHIER_TX_DONE_INT_EN | \ 44764dee47SLorenzo Bianconi WHIER_ABNORMAL_INT_EN | \ 45764dee47SLorenzo Bianconi WHIER_D2H_SW_INT) 46764dee47SLorenzo Bianconi 47764dee47SLorenzo Bianconi #define MCR_WASR 0x0020 48764dee47SLorenzo Bianconi #define MCR_WSICR 0x0024 49764dee47SLorenzo Bianconi #define MCR_WTSR0 0x0028 50764dee47SLorenzo Bianconi #define TQ0_CNT GENMASK(7, 0) 51764dee47SLorenzo Bianconi #define TQ1_CNT GENMASK(15, 8) 52764dee47SLorenzo Bianconi #define TQ2_CNT GENMASK(23, 16) 53764dee47SLorenzo Bianconi #define TQ3_CNT GENMASK(31, 24) 54764dee47SLorenzo Bianconi 55764dee47SLorenzo Bianconi #define MCR_WTSR1 0x002c 56764dee47SLorenzo Bianconi #define TQ4_CNT GENMASK(7, 0) 57764dee47SLorenzo Bianconi #define TQ5_CNT GENMASK(15, 8) 58764dee47SLorenzo Bianconi #define TQ6_CNT GENMASK(23, 16) 59764dee47SLorenzo Bianconi #define TQ7_CNT GENMASK(31, 24) 60764dee47SLorenzo Bianconi 61764dee47SLorenzo Bianconi #define MCR_WTDR1 0x0034 62764dee47SLorenzo Bianconi #define MCR_WRDR0 0x0050 63764dee47SLorenzo Bianconi #define MCR_WRDR1 0x0054 64764dee47SLorenzo Bianconi #define MCR_WRDR(p) (0x0050 + 4 * (p)) 65764dee47SLorenzo Bianconi #define MCR_H2DSM0R 0x0070 66764dee47SLorenzo Bianconi #define H2D_SW_INT_READ BIT(16) 67764dee47SLorenzo Bianconi #define H2D_SW_INT_WRITE BIT(17) 68*b12deb5eSLeon Yen #define H2D_SW_INT_CLEAR_MAILBOX_ACK BIT(22) 69764dee47SLorenzo Bianconi 70764dee47SLorenzo Bianconi #define MCR_H2DSM1R 0x0074 71764dee47SLorenzo Bianconi #define MCR_D2HRM0R 0x0078 72764dee47SLorenzo Bianconi #define MCR_D2HRM1R 0x007c 73764dee47SLorenzo Bianconi #define MCR_D2HRM2R 0x0080 74764dee47SLorenzo Bianconi #define MCR_WRPLR 0x0090 75764dee47SLorenzo Bianconi #define RX0_PACKET_LENGTH GENMASK(15, 0) 76764dee47SLorenzo Bianconi #define RX1_PACKET_LENGTH GENMASK(31, 16) 77764dee47SLorenzo Bianconi 78764dee47SLorenzo Bianconi #define MCR_WTMDR 0x00b0 79764dee47SLorenzo Bianconi #define MCR_WTMCR 0x00b4 80764dee47SLorenzo Bianconi #define MCR_WTMDPCR0 0x00b8 81764dee47SLorenzo Bianconi #define MCR_WTMDPCR1 0x00bc 82764dee47SLorenzo Bianconi #define MCR_WPLRCR 0x00d4 83764dee47SLorenzo Bianconi #define MCR_WSR 0x00D8 84764dee47SLorenzo Bianconi #define MCR_CLKIOCR 0x0100 85764dee47SLorenzo Bianconi #define MCR_CMDIOCR 0x0104 86764dee47SLorenzo Bianconi #define MCR_DAT0IOCR 0x0108 87764dee47SLorenzo Bianconi #define MCR_DAT1IOCR 0x010C 88764dee47SLorenzo Bianconi #define MCR_DAT2IOCR 0x0110 89764dee47SLorenzo Bianconi #define MCR_DAT3IOCR 0x0114 90764dee47SLorenzo Bianconi #define MCR_CLKDLYCR 0x0118 91764dee47SLorenzo Bianconi #define MCR_CMDDLYCR 0x011C 92764dee47SLorenzo Bianconi #define MCR_ODATDLYCR 0x0120 93764dee47SLorenzo Bianconi #define MCR_IDATDLYCR1 0x0124 94764dee47SLorenzo Bianconi #define MCR_IDATDLYCR2 0x0128 95764dee47SLorenzo Bianconi #define MCR_ILCHCR 0x012C 96764dee47SLorenzo Bianconi #define MCR_WTQCR0 0x0130 97764dee47SLorenzo Bianconi #define MCR_WTQCR1 0x0134 98764dee47SLorenzo Bianconi #define MCR_WTQCR2 0x0138 99764dee47SLorenzo Bianconi #define MCR_WTQCR3 0x013C 100764dee47SLorenzo Bianconi #define MCR_WTQCR4 0x0140 101764dee47SLorenzo Bianconi #define MCR_WTQCR5 0x0144 102764dee47SLorenzo Bianconi #define MCR_WTQCR6 0x0148 103764dee47SLorenzo Bianconi #define MCR_WTQCR7 0x014C 104764dee47SLorenzo Bianconi #define MCR_WTQCR(x) (0x130 + 4 * (x)) 105764dee47SLorenzo Bianconi #define TXQ_CNT_L GENMASK(15, 0) 106764dee47SLorenzo Bianconi #define TXQ_CNT_H GENMASK(31, 16) 107764dee47SLorenzo Bianconi 108764dee47SLorenzo Bianconi #define MCR_SWPCDBGR 0x0154 109764dee47SLorenzo Bianconi 110dacf0acfSSean Wang #define MCR_H2DSM2R 0x0160 /* supported in CONNAC2 */ 111dacf0acfSSean Wang #define MCR_H2DSM3R 0x0164 /* supported in CONNAC2 */ 112dacf0acfSSean Wang #define MCR_D2HRM3R 0x0174 /* supported in CONNAC2 */ 113*b12deb5eSLeon Yen #define D2HRM3R_IS_DRIVER_OWN BIT(0) 114dacf0acfSSean Wang #define MCR_WTQCR8 0x0190 /* supported in CONNAC2 */ 115dacf0acfSSean Wang #define MCR_WTQCR9 0x0194 /* supported in CONNAC2 */ 116dacf0acfSSean Wang #define MCR_WTQCR10 0x0198 /* supported in CONNAC2 */ 117dacf0acfSSean Wang #define MCR_WTQCR11 0x019C /* supported in CONNAC2 */ 118dacf0acfSSean Wang #define MCR_WTQCR12 0x01A0 /* supported in CONNAC2 */ 119dacf0acfSSean Wang #define MCR_WTQCR13 0x01A4 /* supported in CONNAC2 */ 120dacf0acfSSean Wang #define MCR_WTQCR14 0x01A8 /* supported in CONNAC2 */ 121dacf0acfSSean Wang #define MCR_WTQCR15 0x01AC /* supported in CONNAC2 */ 122dacf0acfSSean Wang 123dacf0acfSSean Wang enum mt76_connac_sdio_ver { 124dacf0acfSSean Wang MT76_CONNAC_SDIO, 125dacf0acfSSean Wang MT76_CONNAC2_SDIO, 126dacf0acfSSean Wang }; 127dacf0acfSSean Wang 128764dee47SLorenzo Bianconi struct mt76s_intr { 129764dee47SLorenzo Bianconi u32 isr; 1303ad08509SLorenzo Bianconi u32 *rec_mb; 131764dee47SLorenzo Bianconi struct { 1323ad08509SLorenzo Bianconi u32 *wtqcr; 133764dee47SLorenzo Bianconi } tx; 134764dee47SLorenzo Bianconi struct { 1353ad08509SLorenzo Bianconi u16 *len[2]; 1363ad08509SLorenzo Bianconi u16 *num; 137764dee47SLorenzo Bianconi } rx; 1383ad08509SLorenzo Bianconi }; 139764dee47SLorenzo Bianconi 140764dee47SLorenzo Bianconi #endif 141