1*764dee47SLorenzo Bianconi /* SPDX-License-Identifier: ISC */ 2*764dee47SLorenzo Bianconi /* Copyright (C) 2020 MediaTek Inc. 3*764dee47SLorenzo Bianconi * 4*764dee47SLorenzo Bianconi * Author: Sean Wang <sean.wang@mediatek.com> 5*764dee47SLorenzo Bianconi */ 6*764dee47SLorenzo Bianconi 7*764dee47SLorenzo Bianconi #ifndef __MT76S_H 8*764dee47SLorenzo Bianconi #define __MT76S_H 9*764dee47SLorenzo Bianconi 10*764dee47SLorenzo Bianconi #define MT_PSE_PAGE_SZ 128 11*764dee47SLorenzo Bianconi 12*764dee47SLorenzo Bianconi #define MCR_WCIR 0x0000 13*764dee47SLorenzo Bianconi #define MCR_WHLPCR 0x0004 14*764dee47SLorenzo Bianconi #define WHLPCR_FW_OWN_REQ_CLR BIT(9) 15*764dee47SLorenzo Bianconi #define WHLPCR_FW_OWN_REQ_SET BIT(8) 16*764dee47SLorenzo Bianconi #define WHLPCR_IS_DRIVER_OWN BIT(8) 17*764dee47SLorenzo Bianconi #define WHLPCR_INT_EN_CLR BIT(1) 18*764dee47SLorenzo Bianconi #define WHLPCR_INT_EN_SET BIT(0) 19*764dee47SLorenzo Bianconi 20*764dee47SLorenzo Bianconi #define MCR_WSDIOCSR 0x0008 21*764dee47SLorenzo Bianconi #define MCR_WHCR 0x000C 22*764dee47SLorenzo Bianconi #define W_INT_CLR_CTRL BIT(1) 23*764dee47SLorenzo Bianconi #define RECV_MAILBOX_RD_CLR_EN BIT(2) 24*764dee47SLorenzo Bianconi #define MAX_HIF_RX_LEN_NUM GENMASK(13, 8) 25*764dee47SLorenzo Bianconi #define RX_ENHANCE_MODE BIT(16) 26*764dee47SLorenzo Bianconi 27*764dee47SLorenzo Bianconi #define MCR_WHISR 0x0010 28*764dee47SLorenzo Bianconi #define MCR_WHIER 0x0014 29*764dee47SLorenzo Bianconi #define WHIER_D2H_SW_INT GENMASK(31, 8) 30*764dee47SLorenzo Bianconi #define WHIER_FW_OWN_BACK_INT_EN BIT(7) 31*764dee47SLorenzo Bianconi #define WHIER_ABNORMAL_INT_EN BIT(6) 32*764dee47SLorenzo Bianconi #define WHIER_RX1_DONE_INT_EN BIT(2) 33*764dee47SLorenzo Bianconi #define WHIER_RX0_DONE_INT_EN BIT(1) 34*764dee47SLorenzo Bianconi #define WHIER_TX_DONE_INT_EN BIT(0) 35*764dee47SLorenzo Bianconi #define WHIER_DEFAULT (WHIER_RX0_DONE_INT_EN | \ 36*764dee47SLorenzo Bianconi WHIER_RX1_DONE_INT_EN | \ 37*764dee47SLorenzo Bianconi WHIER_TX_DONE_INT_EN | \ 38*764dee47SLorenzo Bianconi WHIER_ABNORMAL_INT_EN | \ 39*764dee47SLorenzo Bianconi WHIER_D2H_SW_INT) 40*764dee47SLorenzo Bianconi 41*764dee47SLorenzo Bianconi #define MCR_WASR 0x0020 42*764dee47SLorenzo Bianconi #define MCR_WSICR 0x0024 43*764dee47SLorenzo Bianconi #define MCR_WTSR0 0x0028 44*764dee47SLorenzo Bianconi #define TQ0_CNT GENMASK(7, 0) 45*764dee47SLorenzo Bianconi #define TQ1_CNT GENMASK(15, 8) 46*764dee47SLorenzo Bianconi #define TQ2_CNT GENMASK(23, 16) 47*764dee47SLorenzo Bianconi #define TQ3_CNT GENMASK(31, 24) 48*764dee47SLorenzo Bianconi 49*764dee47SLorenzo Bianconi #define MCR_WTSR1 0x002c 50*764dee47SLorenzo Bianconi #define TQ4_CNT GENMASK(7, 0) 51*764dee47SLorenzo Bianconi #define TQ5_CNT GENMASK(15, 8) 52*764dee47SLorenzo Bianconi #define TQ6_CNT GENMASK(23, 16) 53*764dee47SLorenzo Bianconi #define TQ7_CNT GENMASK(31, 24) 54*764dee47SLorenzo Bianconi 55*764dee47SLorenzo Bianconi #define MCR_WTDR1 0x0034 56*764dee47SLorenzo Bianconi #define MCR_WRDR0 0x0050 57*764dee47SLorenzo Bianconi #define MCR_WRDR1 0x0054 58*764dee47SLorenzo Bianconi #define MCR_WRDR(p) (0x0050 + 4 * (p)) 59*764dee47SLorenzo Bianconi #define MCR_H2DSM0R 0x0070 60*764dee47SLorenzo Bianconi #define H2D_SW_INT_READ BIT(16) 61*764dee47SLorenzo Bianconi #define H2D_SW_INT_WRITE BIT(17) 62*764dee47SLorenzo Bianconi 63*764dee47SLorenzo Bianconi #define MCR_H2DSM1R 0x0074 64*764dee47SLorenzo Bianconi #define MCR_D2HRM0R 0x0078 65*764dee47SLorenzo Bianconi #define MCR_D2HRM1R 0x007c 66*764dee47SLorenzo Bianconi #define MCR_D2HRM2R 0x0080 67*764dee47SLorenzo Bianconi #define MCR_WRPLR 0x0090 68*764dee47SLorenzo Bianconi #define RX0_PACKET_LENGTH GENMASK(15, 0) 69*764dee47SLorenzo Bianconi #define RX1_PACKET_LENGTH GENMASK(31, 16) 70*764dee47SLorenzo Bianconi 71*764dee47SLorenzo Bianconi #define MCR_WTMDR 0x00b0 72*764dee47SLorenzo Bianconi #define MCR_WTMCR 0x00b4 73*764dee47SLorenzo Bianconi #define MCR_WTMDPCR0 0x00b8 74*764dee47SLorenzo Bianconi #define MCR_WTMDPCR1 0x00bc 75*764dee47SLorenzo Bianconi #define MCR_WPLRCR 0x00d4 76*764dee47SLorenzo Bianconi #define MCR_WSR 0x00D8 77*764dee47SLorenzo Bianconi #define MCR_CLKIOCR 0x0100 78*764dee47SLorenzo Bianconi #define MCR_CMDIOCR 0x0104 79*764dee47SLorenzo Bianconi #define MCR_DAT0IOCR 0x0108 80*764dee47SLorenzo Bianconi #define MCR_DAT1IOCR 0x010C 81*764dee47SLorenzo Bianconi #define MCR_DAT2IOCR 0x0110 82*764dee47SLorenzo Bianconi #define MCR_DAT3IOCR 0x0114 83*764dee47SLorenzo Bianconi #define MCR_CLKDLYCR 0x0118 84*764dee47SLorenzo Bianconi #define MCR_CMDDLYCR 0x011C 85*764dee47SLorenzo Bianconi #define MCR_ODATDLYCR 0x0120 86*764dee47SLorenzo Bianconi #define MCR_IDATDLYCR1 0x0124 87*764dee47SLorenzo Bianconi #define MCR_IDATDLYCR2 0x0128 88*764dee47SLorenzo Bianconi #define MCR_ILCHCR 0x012C 89*764dee47SLorenzo Bianconi #define MCR_WTQCR0 0x0130 90*764dee47SLorenzo Bianconi #define MCR_WTQCR1 0x0134 91*764dee47SLorenzo Bianconi #define MCR_WTQCR2 0x0138 92*764dee47SLorenzo Bianconi #define MCR_WTQCR3 0x013C 93*764dee47SLorenzo Bianconi #define MCR_WTQCR4 0x0140 94*764dee47SLorenzo Bianconi #define MCR_WTQCR5 0x0144 95*764dee47SLorenzo Bianconi #define MCR_WTQCR6 0x0148 96*764dee47SLorenzo Bianconi #define MCR_WTQCR7 0x014C 97*764dee47SLorenzo Bianconi #define MCR_WTQCR(x) (0x130 + 4 * (x)) 98*764dee47SLorenzo Bianconi #define TXQ_CNT_L GENMASK(15, 0) 99*764dee47SLorenzo Bianconi #define TXQ_CNT_H GENMASK(31, 16) 100*764dee47SLorenzo Bianconi 101*764dee47SLorenzo Bianconi #define MCR_SWPCDBGR 0x0154 102*764dee47SLorenzo Bianconi 103*764dee47SLorenzo Bianconi struct mt76s_intr { 104*764dee47SLorenzo Bianconi u32 isr; 105*764dee47SLorenzo Bianconi struct { 106*764dee47SLorenzo Bianconi u32 wtqcr[8]; 107*764dee47SLorenzo Bianconi } tx; 108*764dee47SLorenzo Bianconi struct { 109*764dee47SLorenzo Bianconi u16 num[2]; 110*764dee47SLorenzo Bianconi u16 len[2][16]; 111*764dee47SLorenzo Bianconi } rx; 112*764dee47SLorenzo Bianconi u32 rec_mb[2]; 113*764dee47SLorenzo Bianconi } __packed; 114*764dee47SLorenzo Bianconi 115*764dee47SLorenzo Bianconi #endif 116