198686cd2SShayne Chen /* SPDX-License-Identifier: ISC */
298686cd2SShayne Chen /*
398686cd2SShayne Chen  * Copyright (C) 2022 MediaTek Inc.
498686cd2SShayne Chen  */
598686cd2SShayne Chen 
698686cd2SShayne Chen #ifndef __MT7996_H
798686cd2SShayne Chen #define __MT7996_H
898686cd2SShayne Chen 
998686cd2SShayne Chen #include <linux/interrupt.h>
1098686cd2SShayne Chen #include <linux/ktime.h>
1198686cd2SShayne Chen #include "../mt76_connac.h"
1298686cd2SShayne Chen #include "regs.h"
1398686cd2SShayne Chen 
1443482540SShayne Chen #define MT7996_MAX_INTERFACES		19	/* per-band */
1598686cd2SShayne Chen #define MT7996_MAX_WMM_SETS		4
1643482540SShayne Chen #define MT7996_WTBL_RESERVED		(mt7996_wtbl_size(dev) - 1)
1798686cd2SShayne Chen #define MT7996_WTBL_STA			(MT7996_WTBL_RESERVED - \
1843482540SShayne Chen 					 mt7996_max_interface_num(dev))
1998686cd2SShayne Chen 
2098686cd2SShayne Chen #define MT7996_WATCHDOG_TIME		(HZ / 10)
2198686cd2SShayne Chen #define MT7996_RESET_TIMEOUT		(30 * HZ)
2298686cd2SShayne Chen 
2398686cd2SShayne Chen #define MT7996_TX_RING_SIZE		2048
2498686cd2SShayne Chen #define MT7996_TX_MCU_RING_SIZE		256
2598686cd2SShayne Chen #define MT7996_TX_FWDL_RING_SIZE	128
2698686cd2SShayne Chen 
2798686cd2SShayne Chen #define MT7996_RX_RING_SIZE		1536
2898686cd2SShayne Chen #define MT7996_RX_MCU_RING_SIZE		512
291634de41SStanleyYP Wang #define MT7996_RX_MCU_RING_SIZE_WA	1024
3098686cd2SShayne Chen 
3198686cd2SShayne Chen #define MT7996_FIRMWARE_WA		"mediatek/mt7996/mt7996_wa.bin"
3298686cd2SShayne Chen #define MT7996_FIRMWARE_WM		"mediatek/mt7996/mt7996_wm.bin"
33a32f063dSPeter Chiu #define MT7996_FIRMWARE_DSP		"mediatek/mt7996/mt7996_dsp.bin"
3498686cd2SShayne Chen #define MT7996_ROM_PATCH		"mediatek/mt7996/mt7996_rom_patch.bin"
3598686cd2SShayne Chen 
3698686cd2SShayne Chen #define MT7996_EEPROM_DEFAULT		"mediatek/mt7996/mt7996_eeprom.bin"
3798686cd2SShayne Chen #define MT7996_EEPROM_SIZE		7680
3898686cd2SShayne Chen #define MT7996_EEPROM_BLOCK_SIZE	16
39037ae6d6SHoward Hsu #define MT7996_TOKEN_SIZE		16384
4098686cd2SShayne Chen 
4198686cd2SShayne Chen #define MT7996_CFEND_RATE_DEFAULT	0x49	/* OFDM 24M */
4298686cd2SShayne Chen #define MT7996_CFEND_RATE_11B		0x03	/* 11B LP, 11M */
4398686cd2SShayne Chen 
4498686cd2SShayne Chen #define MT7996_MAX_TWT_AGRT		16
4598686cd2SShayne Chen #define MT7996_MAX_STA_TWT_AGRT		8
46e6ed68cbSPeter Chiu #define MT7996_MIN_TWT_DUR		64
4798686cd2SShayne Chen #define MT7996_MAX_QUEUE		(__MT_RXQ_MAX +	__MT_MCUQ_MAX + 3)
4898686cd2SShayne Chen 
4915ee62e7SRyder Lee /* NOTE: used to map mt76_rates. idx may change if firmware expands table */
5015ee62e7SRyder Lee #define MT7996_BASIC_RATES_TBL		11
51c2171b06SRyder Lee #define MT7996_BEACON_RATES_TBL		25
5215ee62e7SRyder Lee 
5398686cd2SShayne Chen struct mt7996_vif;
5498686cd2SShayne Chen struct mt7996_sta;
5598686cd2SShayne Chen struct mt7996_dfs_pulse;
5698686cd2SShayne Chen struct mt7996_dfs_pattern;
5798686cd2SShayne Chen 
58a32f063dSPeter Chiu enum mt7996_ram_type {
59a32f063dSPeter Chiu 	MT7996_RAM_TYPE_WM,
60a32f063dSPeter Chiu 	MT7996_RAM_TYPE_WA,
61a32f063dSPeter Chiu 	MT7996_RAM_TYPE_DSP,
62a32f063dSPeter Chiu };
63a32f063dSPeter Chiu 
6498686cd2SShayne Chen enum mt7996_txq_id {
6598686cd2SShayne Chen 	MT7996_TXQ_FWDL = 16,
6698686cd2SShayne Chen 	MT7996_TXQ_MCU_WM,
6798686cd2SShayne Chen 	MT7996_TXQ_BAND0,
6898686cd2SShayne Chen 	MT7996_TXQ_BAND1,
6998686cd2SShayne Chen 	MT7996_TXQ_MCU_WA,
7098686cd2SShayne Chen 	MT7996_TXQ_BAND2,
7198686cd2SShayne Chen };
7298686cd2SShayne Chen 
7398686cd2SShayne Chen enum mt7996_rxq_id {
7498686cd2SShayne Chen 	MT7996_RXQ_MCU_WM = 0,
7598686cd2SShayne Chen 	MT7996_RXQ_MCU_WA,
7698686cd2SShayne Chen 	MT7996_RXQ_MCU_WA_MAIN = 2,
7798686cd2SShayne Chen 	MT7996_RXQ_MCU_WA_EXT = 2,/* unused */
7898686cd2SShayne Chen 	MT7996_RXQ_MCU_WA_TRI = 3,
7998686cd2SShayne Chen 	MT7996_RXQ_BAND0 = 4,
8098686cd2SShayne Chen 	MT7996_RXQ_BAND1 = 4,/* unused */
8198686cd2SShayne Chen 	MT7996_RXQ_BAND2 = 5,
8298686cd2SShayne Chen };
8398686cd2SShayne Chen 
8498686cd2SShayne Chen struct mt7996_twt_flow {
8598686cd2SShayne Chen 	struct list_head list;
8698686cd2SShayne Chen 	u64 start_tsf;
8798686cd2SShayne Chen 	u64 tsf;
8898686cd2SShayne Chen 	u32 duration;
8998686cd2SShayne Chen 	u16 wcid;
9098686cd2SShayne Chen 	__le16 mantissa;
9198686cd2SShayne Chen 	u8 exp;
9298686cd2SShayne Chen 	u8 table_id;
9398686cd2SShayne Chen 	u8 id;
9498686cd2SShayne Chen 	u8 protection:1;
9598686cd2SShayne Chen 	u8 flowtype:1;
9698686cd2SShayne Chen 	u8 trigger:1;
9798686cd2SShayne Chen 	u8 sched:1;
9898686cd2SShayne Chen };
9998686cd2SShayne Chen 
100ea5d99d0SRyder Lee DECLARE_EWMA(avg_signal, 10, 8)
101ea5d99d0SRyder Lee 
10298686cd2SShayne Chen struct mt7996_sta {
10398686cd2SShayne Chen 	struct mt76_wcid wcid; /* must be first */
10498686cd2SShayne Chen 
10598686cd2SShayne Chen 	struct mt7996_vif *vif;
10698686cd2SShayne Chen 
10798686cd2SShayne Chen 	struct list_head rc_list;
10898686cd2SShayne Chen 	u32 airtime_ac[8];
10998686cd2SShayne Chen 
110ea5d99d0SRyder Lee 	int ack_signal;
111ea5d99d0SRyder Lee 	struct ewma_avg_signal avg_ack_signal;
112ea5d99d0SRyder Lee 
11398686cd2SShayne Chen 	unsigned long changed;
11498686cd2SShayne Chen 	unsigned long jiffies;
11598686cd2SShayne Chen 
11698686cd2SShayne Chen 	struct mt76_connac_sta_key_conf bip;
11798686cd2SShayne Chen 
11898686cd2SShayne Chen 	struct {
11998686cd2SShayne Chen 		u8 flowid_mask;
12098686cd2SShayne Chen 		struct mt7996_twt_flow flow[MT7996_MAX_STA_TWT_AGRT];
12198686cd2SShayne Chen 	} twt;
12298686cd2SShayne Chen };
12398686cd2SShayne Chen 
12498686cd2SShayne Chen struct mt7996_vif {
12598686cd2SShayne Chen 	struct mt76_vif mt76; /* must be first */
12698686cd2SShayne Chen 
12798686cd2SShayne Chen 	struct mt7996_sta sta;
12898686cd2SShayne Chen 	struct mt7996_phy *phy;
12998686cd2SShayne Chen 
13098686cd2SShayne Chen 	struct ieee80211_tx_queue_params queue_params[IEEE80211_NUM_ACS];
13198686cd2SShayne Chen 	struct cfg80211_bitrate_mask bitrate_mask;
13298686cd2SShayne Chen };
13398686cd2SShayne Chen 
134878161d5SRyder Lee /* crash-dump */
135878161d5SRyder Lee struct mt7996_crash_data {
136878161d5SRyder Lee 	guid_t guid;
137878161d5SRyder Lee 	struct timespec64 timestamp;
138878161d5SRyder Lee 
139878161d5SRyder Lee 	u8 *memdump_buf;
140878161d5SRyder Lee 	size_t memdump_buf_len;
141878161d5SRyder Lee };
142878161d5SRyder Lee 
14398686cd2SShayne Chen struct mt7996_hif {
14498686cd2SShayne Chen 	struct list_head list;
14598686cd2SShayne Chen 
14698686cd2SShayne Chen 	struct device *dev;
14798686cd2SShayne Chen 	void __iomem *regs;
14898686cd2SShayne Chen 	int irq;
14998686cd2SShayne Chen };
15098686cd2SShayne Chen 
15198686cd2SShayne Chen struct mt7996_phy {
15298686cd2SShayne Chen 	struct mt76_phy *mt76;
15398686cd2SShayne Chen 	struct mt7996_dev *dev;
15498686cd2SShayne Chen 
15598686cd2SShayne Chen 	struct ieee80211_sband_iftype_data iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
15698686cd2SShayne Chen 
15798686cd2SShayne Chen 	struct ieee80211_vif *monitor_vif;
15898686cd2SShayne Chen 
15998686cd2SShayne Chen 	u32 rxfilter;
16098686cd2SShayne Chen 	u64 omac_mask;
16198686cd2SShayne Chen 
16298686cd2SShayne Chen 	u16 noise;
16398686cd2SShayne Chen 
16498686cd2SShayne Chen 	s16 coverage_class;
16598686cd2SShayne Chen 	u8 slottime;
16698686cd2SShayne Chen 
16798686cd2SShayne Chen 	u8 rdd_state;
16898686cd2SShayne Chen 
16998686cd2SShayne Chen 	u32 rx_ampdu_ts;
17098686cd2SShayne Chen 	u32 ampdu_ref;
17198686cd2SShayne Chen 
17298214484SLorenzo Bianconi 	struct mt76_mib_stats mib;
17398686cd2SShayne Chen 	struct mt76_channel_state state_ts;
17498686cd2SShayne Chen };
17598686cd2SShayne Chen 
17698686cd2SShayne Chen struct mt7996_dev {
17798686cd2SShayne Chen 	union { /* must be first */
17898686cd2SShayne Chen 		struct mt76_dev mt76;
17998686cd2SShayne Chen 		struct mt76_phy mphy;
18098686cd2SShayne Chen 	};
18198686cd2SShayne Chen 
18298686cd2SShayne Chen 	struct mt7996_hif *hif2;
18398686cd2SShayne Chen 	struct mt7996_reg_desc reg;
18498686cd2SShayne Chen 	u8 q_id[MT7996_MAX_QUEUE];
18598686cd2SShayne Chen 	u32 q_int_mask[MT7996_MAX_QUEUE];
18698686cd2SShayne Chen 	u32 q_wfdma_mask;
18798686cd2SShayne Chen 
18898686cd2SShayne Chen 	const struct mt76_bus_ops *bus_ops;
18998686cd2SShayne Chen 	struct mt7996_phy phy;
19098686cd2SShayne Chen 
19198686cd2SShayne Chen 	/* monitor rx chain configured channel */
19298686cd2SShayne Chen 	struct cfg80211_chan_def rdd2_chandef;
19398686cd2SShayne Chen 	struct mt7996_phy *rdd2_phy;
19498686cd2SShayne Chen 
19598686cd2SShayne Chen 	u16 chainmask;
19698686cd2SShayne Chen 	u8 chainshift[__MT_MAX_BAND];
19798686cd2SShayne Chen 	u32 hif_idx;
19898686cd2SShayne Chen 
19998686cd2SShayne Chen 	struct work_struct init_work;
20098686cd2SShayne Chen 	struct work_struct rc_work;
201878161d5SRyder Lee 	struct work_struct dump_work;
20298686cd2SShayne Chen 	struct work_struct reset_work;
20398686cd2SShayne Chen 	wait_queue_head_t reset_wait;
20427015b6fSBo Jiao 	struct {
20527015b6fSBo Jiao 		u32 state;
20627015b6fSBo Jiao 		u32 wa_reset_count;
20727015b6fSBo Jiao 		u32 wm_reset_count;
20827015b6fSBo Jiao 		bool hw_full_reset:1;
20927015b6fSBo Jiao 		bool hw_init_done:1;
21027015b6fSBo Jiao 		bool restart:1;
21127015b6fSBo Jiao 	} recovery;
21298686cd2SShayne Chen 
213878161d5SRyder Lee 	/* protects coredump data */
214878161d5SRyder Lee 	struct mutex dump_mutex;
215878161d5SRyder Lee #ifdef CONFIG_DEV_COREDUMP
216878161d5SRyder Lee 	struct {
217878161d5SRyder Lee 		struct mt7996_crash_data *crash_data;
218878161d5SRyder Lee 	} coredump;
219878161d5SRyder Lee #endif
220878161d5SRyder Lee 
22198686cd2SShayne Chen 	struct list_head sta_rc_list;
22298686cd2SShayne Chen 	struct list_head twt_list;
22398686cd2SShayne Chen 
22498686cd2SShayne Chen 	u32 hw_pattern;
22598686cd2SShayne Chen 
22698686cd2SShayne Chen 	bool dbdc_support:1;
22798686cd2SShayne Chen 	bool tbtc_support:1;
22898686cd2SShayne Chen 	bool flash_mode:1;
2295d33053bSShayne Chen 	bool has_eht:1;
23098686cd2SShayne Chen 
23198686cd2SShayne Chen 	bool ibf;
23298686cd2SShayne Chen 	u8 fw_debug_wm;
23398686cd2SShayne Chen 	u8 fw_debug_wa;
23498686cd2SShayne Chen 	u8 fw_debug_bin;
23598686cd2SShayne Chen 	u16 fw_debug_seq;
23698686cd2SShayne Chen 
23798686cd2SShayne Chen 	struct dentry *debugfs_dir;
23898686cd2SShayne Chen 	struct rchan *relay_fwlog;
23998686cd2SShayne Chen 
24098686cd2SShayne Chen 	struct {
241e6ed68cbSPeter Chiu 		u16 table_mask;
24298686cd2SShayne Chen 		u8 n_agrt;
24398686cd2SShayne Chen 	} twt;
24498686cd2SShayne Chen 
2451feb6fcfSShayne Chen 	spinlock_t reg_lock;
2465d33053bSShayne Chen 
2475d33053bSShayne Chen 	u8 wtbl_size_group;
24898686cd2SShayne Chen };
24998686cd2SShayne Chen 
25098686cd2SShayne Chen enum {
25198686cd2SShayne Chen 	WFDMA0 = 0x0,
25298686cd2SShayne Chen 	WFDMA1,
25398686cd2SShayne Chen 	WFDMA_EXT,
25498686cd2SShayne Chen 	__MT_WFDMA_MAX,
25598686cd2SShayne Chen };
25698686cd2SShayne Chen 
25798686cd2SShayne Chen enum {
25898686cd2SShayne Chen 	MT_RX_SEL0,
25998686cd2SShayne Chen 	MT_RX_SEL1,
26098686cd2SShayne Chen 	MT_RX_SEL2, /* monitor chain */
26198686cd2SShayne Chen };
26298686cd2SShayne Chen 
26398686cd2SShayne Chen enum mt7996_rdd_cmd {
26498686cd2SShayne Chen 	RDD_STOP,
26598686cd2SShayne Chen 	RDD_START,
26698686cd2SShayne Chen 	RDD_DET_MODE,
26798686cd2SShayne Chen 	RDD_RADAR_EMULATE,
26898686cd2SShayne Chen 	RDD_START_TXQ = 20,
26998686cd2SShayne Chen 	RDD_CAC_START = 50,
27098686cd2SShayne Chen 	RDD_CAC_END,
27198686cd2SShayne Chen 	RDD_NORMAL_START,
27298686cd2SShayne Chen 	RDD_DISABLE_DFS_CAL,
27398686cd2SShayne Chen 	RDD_PULSE_DBG,
27498686cd2SShayne Chen 	RDD_READ_PULSE,
27598686cd2SShayne Chen 	RDD_RESUME_BF,
27698686cd2SShayne Chen 	RDD_IRQ_OFF,
27798686cd2SShayne Chen };
27898686cd2SShayne Chen 
27998686cd2SShayne Chen static inline struct mt7996_phy *
mt7996_hw_phy(struct ieee80211_hw * hw)28098686cd2SShayne Chen mt7996_hw_phy(struct ieee80211_hw *hw)
28198686cd2SShayne Chen {
28298686cd2SShayne Chen 	struct mt76_phy *phy = hw->priv;
28398686cd2SShayne Chen 
28498686cd2SShayne Chen 	return phy->priv;
28598686cd2SShayne Chen }
28698686cd2SShayne Chen 
28798686cd2SShayne Chen static inline struct mt7996_dev *
mt7996_hw_dev(struct ieee80211_hw * hw)28898686cd2SShayne Chen mt7996_hw_dev(struct ieee80211_hw *hw)
28998686cd2SShayne Chen {
29098686cd2SShayne Chen 	struct mt76_phy *phy = hw->priv;
29198686cd2SShayne Chen 
29298686cd2SShayne Chen 	return container_of(phy->dev, struct mt7996_dev, mt76);
29398686cd2SShayne Chen }
29498686cd2SShayne Chen 
29598686cd2SShayne Chen static inline struct mt7996_phy *
__mt7996_phy(struct mt7996_dev * dev,enum mt76_band_id band)29698686cd2SShayne Chen __mt7996_phy(struct mt7996_dev *dev, enum mt76_band_id band)
29798686cd2SShayne Chen {
29898686cd2SShayne Chen 	struct mt76_phy *phy = dev->mt76.phys[band];
29998686cd2SShayne Chen 
30098686cd2SShayne Chen 	if (!phy)
30198686cd2SShayne Chen 		return NULL;
30298686cd2SShayne Chen 
30398686cd2SShayne Chen 	return phy->priv;
30498686cd2SShayne Chen }
30598686cd2SShayne Chen 
30698686cd2SShayne Chen static inline struct mt7996_phy *
mt7996_phy2(struct mt7996_dev * dev)30798686cd2SShayne Chen mt7996_phy2(struct mt7996_dev *dev)
30898686cd2SShayne Chen {
30998686cd2SShayne Chen 	return __mt7996_phy(dev, MT_BAND1);
31098686cd2SShayne Chen }
31198686cd2SShayne Chen 
31298686cd2SShayne Chen static inline struct mt7996_phy *
mt7996_phy3(struct mt7996_dev * dev)31398686cd2SShayne Chen mt7996_phy3(struct mt7996_dev *dev)
31498686cd2SShayne Chen {
31598686cd2SShayne Chen 	return __mt7996_phy(dev, MT_BAND2);
31698686cd2SShayne Chen }
31798686cd2SShayne Chen 
31898686cd2SShayne Chen extern const struct ieee80211_ops mt7996_ops;
31998686cd2SShayne Chen extern struct pci_driver mt7996_pci_driver;
32098686cd2SShayne Chen extern struct pci_driver mt7996_hif_driver;
32198686cd2SShayne Chen 
32298686cd2SShayne Chen struct mt7996_dev *mt7996_mmio_probe(struct device *pdev,
32398686cd2SShayne Chen 				     void __iomem *mem_base, u32 device_id);
32498686cd2SShayne Chen void mt7996_wfsys_reset(struct mt7996_dev *dev);
32598686cd2SShayne Chen irqreturn_t mt7996_irq_handler(int irq, void *dev_instance);
32698686cd2SShayne Chen u64 __mt7996_get_tsf(struct ieee80211_hw *hw, struct mt7996_vif *mvif);
32798686cd2SShayne Chen int mt7996_register_device(struct mt7996_dev *dev);
32898686cd2SShayne Chen void mt7996_unregister_device(struct mt7996_dev *dev);
32998686cd2SShayne Chen int mt7996_eeprom_init(struct mt7996_dev *dev);
33098686cd2SShayne Chen int mt7996_eeprom_parse_hw_cap(struct mt7996_dev *dev, struct mt7996_phy *phy);
33198686cd2SShayne Chen int mt7996_eeprom_get_target_power(struct mt7996_dev *dev,
33298686cd2SShayne Chen 				   struct ieee80211_channel *chan);
33398686cd2SShayne Chen s8 mt7996_eeprom_get_power_delta(struct mt7996_dev *dev, int band);
33498686cd2SShayne Chen int mt7996_dma_init(struct mt7996_dev *dev);
33527015b6fSBo Jiao void mt7996_dma_reset(struct mt7996_dev *dev, bool force);
33698686cd2SShayne Chen void mt7996_dma_prefetch(struct mt7996_dev *dev);
33798686cd2SShayne Chen void mt7996_dma_cleanup(struct mt7996_dev *dev);
3388e8c09c7SBo Jiao void mt7996_dma_start(struct mt7996_dev *dev, bool reset);
33927015b6fSBo Jiao void mt7996_init_txpower(struct mt7996_dev *dev,
34027015b6fSBo Jiao 			 struct ieee80211_supported_band *sband);
34127015b6fSBo Jiao int mt7996_txbf_init(struct mt7996_dev *dev);
34227015b6fSBo Jiao void mt7996_reset(struct mt7996_dev *dev);
34327015b6fSBo Jiao int mt7996_run(struct ieee80211_hw *hw);
34498686cd2SShayne Chen int mt7996_mcu_init(struct mt7996_dev *dev);
34527015b6fSBo Jiao int mt7996_mcu_init_firmware(struct mt7996_dev *dev);
34698686cd2SShayne Chen int mt7996_mcu_twt_agrt_update(struct mt7996_dev *dev,
34798686cd2SShayne Chen 			       struct mt7996_vif *mvif,
34898686cd2SShayne Chen 			       struct mt7996_twt_flow *flow,
34998686cd2SShayne Chen 			       int cmd);
35098686cd2SShayne Chen int mt7996_mcu_add_dev_info(struct mt7996_phy *phy,
35198686cd2SShayne Chen 			    struct ieee80211_vif *vif, bool enable);
35298686cd2SShayne Chen int mt7996_mcu_add_bss_info(struct mt7996_phy *phy,
35398686cd2SShayne Chen 			    struct ieee80211_vif *vif, int enable);
35498686cd2SShayne Chen int mt7996_mcu_add_sta(struct mt7996_dev *dev, struct ieee80211_vif *vif,
35598686cd2SShayne Chen 		       struct ieee80211_sta *sta, bool enable);
35698686cd2SShayne Chen int mt7996_mcu_add_tx_ba(struct mt7996_dev *dev,
35798686cd2SShayne Chen 			 struct ieee80211_ampdu_params *params,
35898686cd2SShayne Chen 			 bool add);
35998686cd2SShayne Chen int mt7996_mcu_add_rx_ba(struct mt7996_dev *dev,
36098686cd2SShayne Chen 			 struct ieee80211_ampdu_params *params,
36198686cd2SShayne Chen 			 bool add);
36298686cd2SShayne Chen int mt7996_mcu_update_bss_color(struct mt7996_dev *dev, struct ieee80211_vif *vif,
36398686cd2SShayne Chen 				struct cfg80211_he_bss_color *he_bss_color);
36498686cd2SShayne Chen int mt7996_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
36598686cd2SShayne Chen 			  int enable);
36698686cd2SShayne Chen int mt7996_mcu_beacon_inband_discov(struct mt7996_dev *dev,
36798686cd2SShayne Chen 				    struct ieee80211_vif *vif, u32 changed);
368cf6dc2dbSRyder Lee int mt7996_mcu_add_obss_spr(struct mt7996_phy *phy, struct ieee80211_vif *vif,
369cf6dc2dbSRyder Lee 			    struct ieee80211_he_obss_pd *he_obss_pd);
37098686cd2SShayne Chen int mt7996_mcu_add_rate_ctrl(struct mt7996_dev *dev, struct ieee80211_vif *vif,
37198686cd2SShayne Chen 			     struct ieee80211_sta *sta, bool changed);
37298686cd2SShayne Chen int mt7996_set_channel(struct mt7996_phy *phy);
37398686cd2SShayne Chen int mt7996_mcu_set_chan_info(struct mt7996_phy *phy, u16 tag);
37498686cd2SShayne Chen int mt7996_mcu_set_tx(struct mt7996_dev *dev, struct ieee80211_vif *vif);
37598686cd2SShayne Chen int mt7996_mcu_set_fixed_rate_ctrl(struct mt7996_dev *dev,
37698686cd2SShayne Chen 				   void *data, u16 version);
37798686cd2SShayne Chen int mt7996_mcu_set_eeprom(struct mt7996_dev *dev);
37898686cd2SShayne Chen int mt7996_mcu_get_eeprom(struct mt7996_dev *dev, u32 offset);
37998686cd2SShayne Chen int mt7996_mcu_get_eeprom_free_block(struct mt7996_dev *dev, u8 *block_num);
3805d33053bSShayne Chen int mt7996_mcu_get_chip_config(struct mt7996_dev *dev, u32 *cap);
38198686cd2SShayne Chen int mt7996_mcu_set_ser(struct mt7996_dev *dev, u8 action, u8 set, u8 band);
38298686cd2SShayne Chen int mt7996_mcu_set_txbf(struct mt7996_dev *dev, u8 action);
38398686cd2SShayne Chen int mt7996_mcu_set_fcc5_lpn(struct mt7996_dev *dev, int val);
38498686cd2SShayne Chen int mt7996_mcu_set_pulse_th(struct mt7996_dev *dev,
38598686cd2SShayne Chen 			    const struct mt7996_dfs_pulse *pulse);
38698686cd2SShayne Chen int mt7996_mcu_set_radar_th(struct mt7996_dev *dev, int index,
38798686cd2SShayne Chen 			    const struct mt7996_dfs_pattern *pattern);
38898686cd2SShayne Chen int mt7996_mcu_set_radio_en(struct mt7996_phy *phy, bool enable);
38998686cd2SShayne Chen int mt7996_mcu_set_rts_thresh(struct mt7996_phy *phy, u32 val);
39083a10ae2SPeter Chiu int mt7996_mcu_set_timing(struct mt7996_phy *phy, struct ieee80211_vif *vif);
39198686cd2SShayne Chen int mt7996_mcu_get_chan_mib_info(struct mt7996_phy *phy, bool chan_switch);
39298686cd2SShayne Chen int mt7996_mcu_rdd_cmd(struct mt7996_dev *dev, int cmd, u8 index,
39398686cd2SShayne Chen 		       u8 rx_sel, u8 val);
39498686cd2SShayne Chen int mt7996_mcu_rdd_background_enable(struct mt7996_phy *phy,
39598686cd2SShayne Chen 				     struct cfg80211_chan_def *chandef);
39698686cd2SShayne Chen int mt7996_mcu_rf_regval(struct mt7996_dev *dev, u32 regidx, u32 *val, bool set);
39798686cd2SShayne Chen int mt7996_mcu_set_hdr_trans(struct mt7996_dev *dev, bool hdr_trans);
39898686cd2SShayne Chen int mt7996_mcu_set_rro(struct mt7996_dev *dev, u16 tag, u8 val);
39998686cd2SShayne Chen int mt7996_mcu_wa_cmd(struct mt7996_dev *dev, int cmd, u32 a1, u32 a2, u32 a3);
40098686cd2SShayne Chen int mt7996_mcu_fw_log_2_host(struct mt7996_dev *dev, u8 type, u8 ctrl);
40198686cd2SShayne Chen int mt7996_mcu_fw_dbg_ctrl(struct mt7996_dev *dev, u32 module, u8 level);
402672662f0SRyder Lee int mt7996_mcu_trigger_assert(struct mt7996_dev *dev);
40398686cd2SShayne Chen void mt7996_mcu_rx_event(struct mt7996_dev *dev, struct sk_buff *skb);
40498686cd2SShayne Chen void mt7996_mcu_exit(struct mt7996_dev *dev);
40598686cd2SShayne Chen 
mt7996_max_interface_num(struct mt7996_dev * dev)40643482540SShayne Chen static inline u8 mt7996_max_interface_num(struct mt7996_dev *dev)
40743482540SShayne Chen {
40843482540SShayne Chen 	return MT7996_MAX_INTERFACES * (1 + dev->dbdc_support + dev->tbtc_support);
40943482540SShayne Chen }
41043482540SShayne Chen 
mt7996_wtbl_size(struct mt7996_dev * dev)41143482540SShayne Chen static inline u16 mt7996_wtbl_size(struct mt7996_dev *dev)
41243482540SShayne Chen {
41343482540SShayne Chen 	return (dev->wtbl_size_group << 8) + 64;
41443482540SShayne Chen }
41543482540SShayne Chen 
41698686cd2SShayne Chen void mt7996_dual_hif_set_irq_mask(struct mt7996_dev *dev, bool write_reg,
41798686cd2SShayne Chen 				  u32 clear, u32 set);
41898686cd2SShayne Chen 
mt7996_irq_enable(struct mt7996_dev * dev,u32 mask)41998686cd2SShayne Chen static inline void mt7996_irq_enable(struct mt7996_dev *dev, u32 mask)
42098686cd2SShayne Chen {
42198686cd2SShayne Chen 	if (dev->hif2)
42298686cd2SShayne Chen 		mt7996_dual_hif_set_irq_mask(dev, false, 0, mask);
42398686cd2SShayne Chen 	else
42498686cd2SShayne Chen 		mt76_set_irq_mask(&dev->mt76, 0, 0, mask);
42598686cd2SShayne Chen 
426ec193b41SLorenzo Bianconi 	tasklet_schedule(&dev->mt76.irq_tasklet);
42798686cd2SShayne Chen }
42898686cd2SShayne Chen 
mt7996_irq_disable(struct mt7996_dev * dev,u32 mask)42998686cd2SShayne Chen static inline void mt7996_irq_disable(struct mt7996_dev *dev, u32 mask)
43098686cd2SShayne Chen {
43198686cd2SShayne Chen 	if (dev->hif2)
43298686cd2SShayne Chen 		mt7996_dual_hif_set_irq_mask(dev, true, mask, 0);
43398686cd2SShayne Chen 	else
43498686cd2SShayne Chen 		mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0);
43598686cd2SShayne Chen }
43698686cd2SShayne Chen 
437878161d5SRyder Lee void mt7996_memcpy_fromio(struct mt7996_dev *dev, void *buf, u32 offset,
438878161d5SRyder Lee 			  size_t len);
439878161d5SRyder Lee 
44027015b6fSBo Jiao void mt7996_mac_init(struct mt7996_dev *dev);
44198686cd2SShayne Chen u32 mt7996_mac_wtbl_lmac_addr(struct mt7996_dev *dev, u16 wcid, u8 dw);
44298686cd2SShayne Chen bool mt7996_mac_wtbl_update(struct mt7996_dev *dev, int idx, u32 mask);
44398686cd2SShayne Chen void mt7996_mac_reset_counters(struct mt7996_phy *phy);
44498686cd2SShayne Chen void mt7996_mac_cca_stats_reset(struct mt7996_phy *phy);
44598686cd2SShayne Chen void mt7996_mac_enable_nf(struct mt7996_dev *dev, u8 band);
446d75e739bSRyder Lee void mt7996_mac_enable_rtscts(struct mt7996_dev *dev,
447d75e739bSRyder Lee 			      struct ieee80211_vif *vif, bool enable);
44815ee62e7SRyder Lee void mt7996_mac_set_fixed_rate_table(struct mt7996_dev *dev,
44915ee62e7SRyder Lee 				     u8 tbl_idx, u16 rate_idx);
45098686cd2SShayne Chen void mt7996_mac_write_txwi(struct mt7996_dev *dev, __le32 *txwi,
451d0b6f86fSShayne Chen 			   struct sk_buff *skb, struct mt76_wcid *wcid,
452d0b6f86fSShayne Chen 			   struct ieee80211_key_conf *key, int pid,
453d0b6f86fSShayne Chen 			   enum mt76_txq_id qid, u32 changed);
45483a10ae2SPeter Chiu void mt7996_mac_set_coverage_class(struct mt7996_phy *phy);
45598686cd2SShayne Chen int mt7996_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
45698686cd2SShayne Chen 		       struct ieee80211_sta *sta);
45798686cd2SShayne Chen void mt7996_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
45898686cd2SShayne Chen 			   struct ieee80211_sta *sta);
45998686cd2SShayne Chen void mt7996_mac_work(struct work_struct *work);
46098686cd2SShayne Chen void mt7996_mac_reset_work(struct work_struct *work);
461878161d5SRyder Lee void mt7996_mac_dump_work(struct work_struct *work);
46298686cd2SShayne Chen void mt7996_mac_sta_rc_work(struct work_struct *work);
46398686cd2SShayne Chen void mt7996_mac_update_stats(struct mt7996_phy *phy);
46498686cd2SShayne Chen void mt7996_mac_twt_teardown_flow(struct mt7996_dev *dev,
46598686cd2SShayne Chen 				  struct mt7996_sta *msta,
46698686cd2SShayne Chen 				  u8 flowid);
46798686cd2SShayne Chen void mt7996_mac_add_twt_setup(struct ieee80211_hw *hw,
46898686cd2SShayne Chen 			      struct ieee80211_sta *sta,
46998686cd2SShayne Chen 			      struct ieee80211_twt_setup *twt);
47098686cd2SShayne Chen int mt7996_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
47198686cd2SShayne Chen 			  enum mt76_txq_id qid, struct mt76_wcid *wcid,
47298686cd2SShayne Chen 			  struct ieee80211_sta *sta,
47398686cd2SShayne Chen 			  struct mt76_tx_info *tx_info);
47498686cd2SShayne Chen void mt7996_tx_token_put(struct mt7996_dev *dev);
47598686cd2SShayne Chen void mt7996_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
47698686cd2SShayne Chen 			 struct sk_buff *skb, u32 *info);
47798686cd2SShayne Chen bool mt7996_rx_check(struct mt76_dev *mdev, void *data, int len);
47898686cd2SShayne Chen void mt7996_stats_work(struct work_struct *work);
47998686cd2SShayne Chen int mt76_dfs_start_rdd(struct mt7996_dev *dev, bool force);
48098686cd2SShayne Chen int mt7996_dfs_init_radar_detector(struct mt7996_phy *phy);
481348533ebSShayne Chen void mt7996_set_stream_he_eht_caps(struct mt7996_phy *phy);
48298686cd2SShayne Chen void mt7996_set_stream_vht_txbf_caps(struct mt7996_phy *phy);
48398686cd2SShayne Chen void mt7996_update_channel(struct mt76_phy *mphy);
48498686cd2SShayne Chen int mt7996_init_debugfs(struct mt7996_phy *phy);
48598686cd2SShayne Chen void mt7996_debugfs_rx_fw_monitor(struct mt7996_dev *dev, const void *data, int len);
48698686cd2SShayne Chen bool mt7996_debugfs_rx_log(struct mt7996_dev *dev, const void *data, int len);
48798686cd2SShayne Chen int mt7996_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif,
48898686cd2SShayne Chen 		       struct mt76_connac_sta_key_conf *sta_key_conf,
48998686cd2SShayne Chen 		       struct ieee80211_key_conf *key, int mcu_cmd,
49098686cd2SShayne Chen 		       struct mt76_wcid *wcid, enum set_key_cmd cmd);
49198686cd2SShayne Chen int mt7996_mcu_wtbl_update_hdr_trans(struct mt7996_dev *dev,
49298686cd2SShayne Chen 				     struct ieee80211_vif *vif,
49398686cd2SShayne Chen 				     struct ieee80211_sta *sta);
49498686cd2SShayne Chen #ifdef CONFIG_MAC80211_DEBUGFS
49598686cd2SShayne Chen void mt7996_sta_add_debugfs(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
49698686cd2SShayne Chen 			    struct ieee80211_sta *sta, struct dentry *dir);
49798686cd2SShayne Chen #endif
49898686cd2SShayne Chen 
49998686cd2SShayne Chen #endif
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