1 /* SPDX-License-Identifier: ISC */ 2 /* 3 * Copyright (C) 2022 MediaTek Inc. 4 */ 5 6 #ifndef __MT7996_MCU_H 7 #define __MT7996_MCU_H 8 9 #include "../mt76_connac_mcu.h" 10 11 struct mt7996_mcu_rxd { 12 __le32 rxd[8]; 13 14 __le16 len; 15 __le16 pkt_type_id; 16 17 u8 eid; 18 u8 seq; 19 u8 option; 20 u8 __rsv; 21 22 u8 ext_eid; 23 u8 __rsv1[2]; 24 u8 s2d_index; 25 }; 26 27 struct mt7996_mcu_uni_event { 28 u8 cid; 29 u8 __rsv[3]; 30 __le32 status; /* 0: success, others: fail */ 31 } __packed; 32 33 struct mt7996_mcu_csa_notify { 34 struct mt7996_mcu_rxd rxd; 35 36 u8 omac_idx; 37 u8 csa_count; 38 u8 band_idx; 39 u8 rsv; 40 } __packed; 41 42 struct mt7996_mcu_rdd_report { 43 struct mt7996_mcu_rxd rxd; 44 45 u8 __rsv1[4]; 46 47 __le16 tag; 48 __le16 len; 49 50 u8 band_idx; 51 u8 long_detected; 52 u8 constant_prf_detected; 53 u8 staggered_prf_detected; 54 u8 radar_type_idx; 55 u8 periodic_pulse_num; 56 u8 long_pulse_num; 57 u8 hw_pulse_num; 58 59 u8 out_lpn; 60 u8 out_spn; 61 u8 out_crpn; 62 u8 out_crpw; 63 u8 out_crbn; 64 u8 out_stgpn; 65 u8 out_stgpw; 66 67 u8 __rsv2; 68 69 __le32 out_pri_const; 70 __le32 out_pri_stg[3]; 71 __le32 out_pri_stg_dmin; 72 73 struct { 74 __le32 start; 75 __le16 pulse_width; 76 __le16 pulse_power; 77 u8 mdrdy_flag; 78 u8 rsv[3]; 79 } long_pulse[32]; 80 81 struct { 82 __le32 start; 83 __le16 pulse_width; 84 __le16 pulse_power; 85 u8 mdrdy_flag; 86 u8 rsv[3]; 87 } periodic_pulse[32]; 88 89 struct { 90 __le32 start; 91 __le16 pulse_width; 92 __le16 pulse_power; 93 u8 sc_pass; 94 u8 sw_reset; 95 u8 mdrdy_flag; 96 u8 tx_active; 97 } hw_pulse[32]; 98 } __packed; 99 100 struct mt7996_mcu_background_chain_ctrl { 101 u8 _rsv[4]; 102 103 __le16 tag; 104 __le16 len; 105 106 u8 chan; /* primary channel */ 107 u8 central_chan; /* central channel */ 108 u8 bw; 109 u8 tx_stream; 110 u8 rx_stream; 111 112 u8 monitor_chan; /* monitor channel */ 113 u8 monitor_central_chan;/* monitor central channel */ 114 u8 monitor_bw; 115 u8 monitor_tx_stream; 116 u8 monitor_rx_stream; 117 118 u8 scan_mode; /* 0: ScanStop 119 * 1: ScanStart 120 * 2: ScanRunning 121 */ 122 u8 band_idx; /* DBDC */ 123 u8 monitor_scan_type; 124 u8 band; /* 0: 2.4GHz, 1: 5GHz */ 125 u8 rsv[2]; 126 } __packed; 127 128 struct mt7996_mcu_eeprom { 129 u8 _rsv[4]; 130 131 __le16 tag; 132 __le16 len; 133 u8 buffer_mode; 134 u8 format; 135 __le16 buf_len; 136 } __packed; 137 138 struct mt7996_mcu_phy_rx_info { 139 u8 category; 140 u8 rate; 141 u8 mode; 142 u8 nsts; 143 u8 gi; 144 u8 coding; 145 u8 stbc; 146 u8 bw; 147 }; 148 149 struct mt7996_mcu_mib { 150 __le16 tag; 151 __le16 len; 152 __le32 offs; 153 __le64 data; 154 } __packed; 155 156 enum mt7996_chan_mib_offs { 157 UNI_MIB_OBSS_AIRTIME = 26, 158 UNI_MIB_NON_WIFI_TIME = 27, 159 UNI_MIB_TX_TIME = 28, 160 UNI_MIB_RX_TIME = 29 161 }; 162 163 struct edca { 164 __le16 tag; 165 __le16 len; 166 167 u8 queue; 168 u8 set; 169 u8 cw_min; 170 u8 cw_max; 171 __le16 txop; 172 u8 aifs; 173 u8 __rsv; 174 }; 175 176 #define MCU_PQ_ID(p, q) (((p) << 15) | ((q) << 10)) 177 #define MCU_PKT_ID 0xa0 178 179 enum { 180 MCU_FW_LOG_WM, 181 MCU_FW_LOG_WA, 182 MCU_FW_LOG_TO_HOST, 183 MCU_FW_LOG_RELAY = 16 184 }; 185 186 enum { 187 MCU_TWT_AGRT_ADD, 188 MCU_TWT_AGRT_MODIFY, 189 MCU_TWT_AGRT_DELETE, 190 MCU_TWT_AGRT_TEARDOWN, 191 MCU_TWT_AGRT_GET_TSF, 192 }; 193 194 enum { 195 MCU_WA_PARAM_CMD_QUERY, 196 MCU_WA_PARAM_CMD_SET, 197 MCU_WA_PARAM_CMD_CAPABILITY, 198 MCU_WA_PARAM_CMD_DEBUG, 199 }; 200 201 enum { 202 MCU_WA_PARAM_PDMA_RX = 0x04, 203 MCU_WA_PARAM_CPU_UTIL = 0x0b, 204 MCU_WA_PARAM_RED = 0x0e, 205 MCU_WA_PARAM_HW_PATH_HIF_VER = 0x2f, 206 }; 207 208 enum mcu_mmps_mode { 209 MCU_MMPS_STATIC, 210 MCU_MMPS_DYNAMIC, 211 MCU_MMPS_RSV, 212 MCU_MMPS_DISABLE, 213 }; 214 215 struct bss_rate_tlv { 216 __le16 tag; 217 __le16 len; 218 u8 __rsv1[4]; 219 __le16 bc_trans; 220 __le16 mc_trans; 221 u8 short_preamble; 222 u8 bc_fixed_rate; 223 u8 mc_fixed_rate; 224 u8 __rsv2[1]; 225 } __packed; 226 227 struct bss_ra_tlv { 228 __le16 tag; 229 __le16 len; 230 u8 short_preamble; 231 u8 force_sgi; 232 u8 force_gf; 233 u8 ht_mode; 234 u8 se_off; 235 u8 antenna_idx; 236 __le16 max_phyrate; 237 u8 force_tx_streams; 238 u8 __rsv[3]; 239 } __packed; 240 241 struct bss_rlm_tlv { 242 __le16 tag; 243 __le16 len; 244 u8 control_channel; 245 u8 center_chan; 246 u8 center_chan2; 247 u8 bw; 248 u8 tx_streams; 249 u8 rx_streams; 250 u8 ht_op_info; 251 u8 sco; 252 u8 band; 253 u8 __rsv[3]; 254 } __packed; 255 256 struct bss_color_tlv { 257 __le16 tag; 258 __le16 len; 259 u8 enable; 260 u8 color; 261 u8 rsv[2]; 262 } __packed; 263 264 struct bss_inband_discovery_tlv { 265 __le16 tag; 266 __le16 len; 267 u8 tx_type; 268 u8 tx_mode; 269 u8 tx_interval; 270 u8 enable; 271 __le16 wcid; 272 __le16 prob_rsp_len; 273 } __packed; 274 275 struct bss_bcn_content_tlv { 276 __le16 tag; 277 __le16 len; 278 __le16 tim_ie_pos; 279 __le16 csa_ie_pos; 280 __le16 bcc_ie_pos; 281 u8 enable; 282 u8 type; 283 __le16 pkt_len; 284 } __packed; 285 286 struct bss_bcn_cntdwn_tlv { 287 __le16 tag; 288 __le16 len; 289 u8 cnt; 290 u8 rsv[3]; 291 } __packed; 292 293 struct bss_bcn_mbss_tlv { 294 __le16 tag; 295 __le16 len; 296 __le32 bitmap; 297 #define MAX_BEACON_NUM 32 298 __le16 offset[MAX_BEACON_NUM]; 299 } __packed __aligned(4); 300 301 struct bss_txcmd_tlv { 302 __le16 tag; 303 __le16 len; 304 u8 txcmd_mode; 305 u8 __rsv[3]; 306 } __packed; 307 308 struct bss_sec_tlv { 309 __le16 tag; 310 __le16 len; 311 u8 __rsv1[2]; 312 u8 cipher; 313 u8 __rsv2[1]; 314 } __packed; 315 316 struct bss_ifs_time_tlv { 317 __le16 tag; 318 __le16 len; 319 u8 slot_valid; 320 u8 sifs_valid; 321 u8 rifs_valid; 322 u8 eifs_valid; 323 __le16 slot_time; 324 __le16 sifs_time; 325 __le16 rifs_time; 326 __le16 eifs_time; 327 u8 eifs_cck_valid; 328 u8 rsv; 329 __le16 eifs_cck_time; 330 } __packed; 331 332 struct bss_power_save { 333 __le16 tag; 334 __le16 len; 335 u8 profile; 336 u8 _rsv[3]; 337 } __packed; 338 339 struct bss_mld_tlv { 340 __le16 tag; 341 __le16 len; 342 u8 group_mld_id; 343 u8 own_mld_id; 344 u8 mac_addr[ETH_ALEN]; 345 u8 remap_idx; 346 u8 __rsv[3]; 347 } __packed; 348 349 struct sta_rec_ba_uni { 350 __le16 tag; 351 __le16 len; 352 u8 tid; 353 u8 ba_type; 354 u8 amsdu; 355 u8 ba_en; 356 __le16 ssn; 357 __le16 winsize; 358 u8 ba_rdd_rro; 359 u8 __rsv[3]; 360 } __packed; 361 362 struct sta_rec_eht { 363 __le16 tag; 364 __le16 len; 365 u8 tid_bitmap; 366 u8 _rsv; 367 __le16 mac_cap; 368 __le64 phy_cap; 369 __le64 phy_cap_ext; 370 u8 mcs_map_bw20[4]; 371 u8 mcs_map_bw80[3]; 372 u8 mcs_map_bw160[3]; 373 u8 mcs_map_bw320[3]; 374 u8 _rsv2[3]; 375 } __packed; 376 377 struct sec_key_uni { 378 __le16 wlan_idx; 379 u8 mgmt_prot; 380 u8 cipher_id; 381 u8 cipher_len; 382 u8 key_id; 383 u8 key_len; 384 u8 need_resp; 385 u8 key[32]; 386 } __packed; 387 388 struct sta_rec_sec_uni { 389 __le16 tag; 390 __le16 len; 391 u8 add; 392 u8 n_cipher; 393 u8 rsv[2]; 394 395 struct sec_key_uni key[2]; 396 } __packed; 397 398 struct sta_rec_hdrt { 399 __le16 tag; 400 __le16 len; 401 u8 hdrt_mode; 402 u8 rsv[3]; 403 } __packed; 404 405 struct sta_rec_hdr_trans { 406 __le16 tag; 407 __le16 len; 408 u8 from_ds; 409 u8 to_ds; 410 u8 dis_rx_hdr_tran; 411 u8 mesh; 412 } __packed; 413 414 struct hdr_trans_en { 415 __le16 tag; 416 __le16 len; 417 u8 enable; 418 u8 check_bssid; 419 u8 mode; 420 u8 __rsv; 421 } __packed; 422 423 struct hdr_trans_vlan { 424 __le16 tag; 425 __le16 len; 426 u8 insert_vlan; 427 u8 remove_vlan; 428 u8 tid; 429 u8 __rsv; 430 } __packed; 431 432 struct hdr_trans_blacklist { 433 __le16 tag; 434 __le16 len; 435 u8 idx; 436 u8 enable; 437 __le16 type; 438 } __packed; 439 440 struct uni_header { 441 u8 __rsv[4]; 442 } __packed; 443 444 struct vow_rx_airtime { 445 __le16 tag; 446 __le16 len; 447 448 u8 enable; 449 u8 band; 450 u8 __rsv[2]; 451 } __packed; 452 453 struct bf_sounding_on { 454 __le16 tag; 455 __le16 len; 456 457 u8 snd_mode; 458 u8 sta_num; 459 u8 __rsv[2]; 460 __le16 wlan_id[4]; 461 __le32 snd_period; 462 } __packed; 463 464 struct bf_hw_en_status_update { 465 __le16 tag; 466 __le16 len; 467 468 bool ebf; 469 bool ibf; 470 u8 __rsv[2]; 471 } __packed; 472 473 struct bf_mod_en_ctrl { 474 __le16 tag; 475 __le16 len; 476 477 u8 bf_num; 478 u8 bf_bitmap; 479 u8 bf_sel[8]; 480 u8 __rsv[2]; 481 } __packed; 482 483 union bf_tag_tlv { 484 struct bf_sounding_on bf_snd; 485 struct bf_hw_en_status_update bf_hw_en; 486 struct bf_mod_en_ctrl bf_mod_en; 487 }; 488 489 struct ra_rate { 490 __le16 wlan_idx; 491 u8 mode; 492 u8 stbc; 493 __le16 gi; 494 u8 bw; 495 u8 ldpc; 496 u8 mcs; 497 u8 nss; 498 __le16 ltf; 499 u8 spe; 500 u8 preamble; 501 u8 __rsv[2]; 502 } __packed; 503 504 struct ra_fixed_rate { 505 __le16 tag; 506 __le16 len; 507 508 __le16 version; 509 struct ra_rate rate; 510 } __packed; 511 512 enum { 513 UNI_RA_FIXED_RATE = 0xf, 514 }; 515 516 #define MT7996_HDR_TRANS_MAX_SIZE (sizeof(struct hdr_trans_en) + \ 517 sizeof(struct hdr_trans_vlan) + \ 518 sizeof(struct hdr_trans_blacklist)) 519 520 enum { 521 UNI_HDR_TRANS_EN, 522 UNI_HDR_TRANS_VLAN, 523 UNI_HDR_TRANS_BLACKLIST, 524 }; 525 526 enum { 527 RATE_PARAM_FIXED = 3, 528 RATE_PARAM_MMPS_UPDATE = 5, 529 RATE_PARAM_FIXED_HE_LTF = 7, 530 RATE_PARAM_FIXED_MCS, 531 RATE_PARAM_FIXED_GI = 11, 532 RATE_PARAM_AUTO = 20, 533 }; 534 535 enum { 536 BF_SOUNDING_ON = 1, 537 BF_HW_EN_UPDATE = 17, 538 BF_MOD_EN_CTRL = 20, 539 }; 540 541 enum { 542 CMD_BAND_NONE, 543 CMD_BAND_24G, 544 CMD_BAND_5G, 545 CMD_BAND_6G, 546 }; 547 548 struct bss_req_hdr { 549 u8 bss_idx; 550 u8 __rsv[3]; 551 } __packed; 552 553 enum { 554 UNI_CHANNEL_SWITCH, 555 UNI_CHANNEL_RX_PATH, 556 }; 557 558 #define MT7996_BSS_UPDATE_MAX_SIZE (sizeof(struct bss_req_hdr) + \ 559 sizeof(struct mt76_connac_bss_basic_tlv) + \ 560 sizeof(struct bss_rlm_tlv) + \ 561 sizeof(struct bss_ra_tlv) + \ 562 sizeof(struct bss_info_uni_he) + \ 563 sizeof(struct bss_rate_tlv) + \ 564 sizeof(struct bss_txcmd_tlv) + \ 565 sizeof(struct bss_power_save) + \ 566 sizeof(struct bss_sec_tlv) + \ 567 sizeof(struct bss_ifs_time_tlv) + \ 568 sizeof(struct bss_mld_tlv)) 569 570 #define MT7996_STA_UPDATE_MAX_SIZE (sizeof(struct sta_req_hdr) + \ 571 sizeof(struct sta_rec_basic) + \ 572 sizeof(struct sta_rec_bf) + \ 573 sizeof(struct sta_rec_ht) + \ 574 sizeof(struct sta_rec_he_v2) + \ 575 sizeof(struct sta_rec_ba_uni) + \ 576 sizeof(struct sta_rec_vht) + \ 577 sizeof(struct sta_rec_uapsd) + \ 578 sizeof(struct sta_rec_amsdu) + \ 579 sizeof(struct sta_rec_bfee) + \ 580 sizeof(struct sta_rec_phy) + \ 581 sizeof(struct sta_rec_ra) + \ 582 sizeof(struct sta_rec_sec) + \ 583 sizeof(struct sta_rec_ra_fixed) + \ 584 sizeof(struct sta_rec_he_6g_capa) + \ 585 sizeof(struct sta_rec_eht) + \ 586 sizeof(struct sta_rec_hdrt) + \ 587 sizeof(struct sta_rec_hdr_trans) + \ 588 sizeof(struct tlv)) 589 590 #define MT7996_MAX_BEACON_SIZE 1342 591 #define MT7996_BEACON_UPDATE_SIZE (sizeof(struct bss_req_hdr) + \ 592 sizeof(struct bss_bcn_content_tlv) + \ 593 MT_TXD_SIZE + \ 594 sizeof(struct bss_bcn_cntdwn_tlv) + \ 595 sizeof(struct bss_bcn_mbss_tlv)) 596 #define MT7996_MAX_BSS_OFFLOAD_SIZE (MT7996_MAX_BEACON_SIZE + \ 597 MT7996_BEACON_UPDATE_SIZE) 598 599 enum { 600 UNI_BAND_CONFIG_RADIO_ENABLE, 601 UNI_BAND_CONFIG_RTS_THRESHOLD = 0x08, 602 }; 603 604 enum { 605 UNI_WSYS_CONFIG_FW_LOG_CTRL, 606 UNI_WSYS_CONFIG_FW_DBG_CTRL, 607 }; 608 609 enum { 610 UNI_RDD_CTRL_PARM, 611 UNI_RDD_CTRL_SET_TH = 0x3, 612 }; 613 614 enum { 615 UNI_EFUSE_ACCESS = 1, 616 UNI_EFUSE_BUFFER_MODE, 617 UNI_EFUSE_FREE_BLOCK, 618 UNI_EFUSE_BUFFER_RD, 619 }; 620 621 enum { 622 UNI_VOW_DRR_CTRL, 623 UNI_VOW_RX_AT_AIRTIME_EN = 0x0b, 624 UNI_VOW_RX_AT_AIRTIME_CLR_EN = 0x0e, 625 }; 626 627 enum { 628 UNI_CMD_MIB_DATA, 629 }; 630 631 enum { 632 UNI_POWER_OFF, 633 }; 634 635 enum { 636 UNI_CMD_TWT_ARGT_UPDATE = 0x0, 637 UNI_CMD_TWT_MGMT_OFFLOAD, 638 }; 639 640 enum { 641 UNI_RRO_DEL_ENTRY = 0x1, 642 UNI_RRO_SET_PLATFORM_TYPE, 643 UNI_RRO_GET_BA_SESSION_TABLE, 644 UNI_RRO_SET_BYPASS_MODE, 645 UNI_RRO_SET_TXFREE_PATH, 646 }; 647 648 enum{ 649 UNI_CMD_SR_ENABLE = 0x1, 650 UNI_CMD_SR_ENABLE_SD, 651 UNI_CMD_SR_ENABLE_MODE, 652 UNI_CMD_SR_ENABLE_DPD = 0x12, 653 UNI_CMD_SR_ENABLE_TX, 654 UNI_CMD_SR_SET_SRG_BITMAP = 0x80, 655 UNI_CMD_SR_SET_PARAM = 0xc1, 656 UNI_CMD_SR_SET_SIGA = 0xd0, 657 }; 658 659 enum { 660 UNI_CMD_ACCESS_REG_BASIC = 0x0, 661 UNI_CMD_ACCESS_RF_REG_BASIC, 662 }; 663 664 enum { 665 UNI_CMD_SER_QUERY, 666 /* recovery */ 667 UNI_CMD_SER_SET_RECOVER_L1, 668 UNI_CMD_SER_SET_RECOVER_L2, 669 UNI_CMD_SER_SET_RECOVER_L3_RX_ABORT, 670 UNI_CMD_SER_SET_RECOVER_L3_TX_ABORT, 671 UNI_CMD_SER_SET_RECOVER_L3_TX_DISABLE, 672 UNI_CMD_SER_SET_RECOVER_L3_BF, 673 UNI_CMD_SER_SET_RECOVER_L4_MDP, 674 UNI_CMD_SER_SET_RECOVER_FULL, 675 UNI_CMD_SER_SET_SYSTEM_ASSERT, 676 /* action */ 677 UNI_CMD_SER_ENABLE = 1, 678 UNI_CMD_SER_SET, 679 UNI_CMD_SER_TRIGGER 680 }; 681 682 enum { 683 MT7996_SEC_MODE_PLAIN, 684 MT7996_SEC_MODE_AES, 685 MT7996_SEC_MODE_SCRAMBLE, 686 MT7996_SEC_MODE_MAX, 687 }; 688 689 #define MT7996_PATCH_SEC GENMASK(31, 24) 690 #define MT7996_PATCH_SCRAMBLE_KEY GENMASK(15, 8) 691 #define MT7996_PATCH_AES_KEY GENMASK(7, 0) 692 693 #define MT7996_SEC_ENCRYPT BIT(0) 694 #define MT7996_SEC_KEY_IDX GENMASK(2, 1) 695 #define MT7996_SEC_IV BIT(3) 696 697 #endif 698