198686cd2SShayne Chen /* SPDX-License-Identifier: ISC */ 298686cd2SShayne Chen /* 398686cd2SShayne Chen * Copyright (C) 2022 MediaTek Inc. 498686cd2SShayne Chen */ 598686cd2SShayne Chen 698686cd2SShayne Chen #ifndef __MT7996_MCU_H 798686cd2SShayne Chen #define __MT7996_MCU_H 898686cd2SShayne Chen 998686cd2SShayne Chen #include "../mt76_connac_mcu.h" 1098686cd2SShayne Chen 1198686cd2SShayne Chen struct mt7996_mcu_rxd { 1298686cd2SShayne Chen __le32 rxd[8]; 1398686cd2SShayne Chen 1498686cd2SShayne Chen __le16 len; 1598686cd2SShayne Chen __le16 pkt_type_id; 1698686cd2SShayne Chen 1798686cd2SShayne Chen u8 eid; 1898686cd2SShayne Chen u8 seq; 1998686cd2SShayne Chen u8 option; 2098686cd2SShayne Chen u8 __rsv; 2198686cd2SShayne Chen 2298686cd2SShayne Chen u8 ext_eid; 2398686cd2SShayne Chen u8 __rsv1[2]; 2498686cd2SShayne Chen u8 s2d_index; 2598686cd2SShayne Chen }; 2698686cd2SShayne Chen 2798686cd2SShayne Chen struct mt7996_mcu_uni_event { 2898686cd2SShayne Chen u8 cid; 2998686cd2SShayne Chen u8 __rsv[3]; 3098686cd2SShayne Chen __le32 status; /* 0: success, others: fail */ 3198686cd2SShayne Chen } __packed; 3298686cd2SShayne Chen 3398686cd2SShayne Chen struct mt7996_mcu_csa_notify { 3498686cd2SShayne Chen struct mt7996_mcu_rxd rxd; 3598686cd2SShayne Chen 3698686cd2SShayne Chen u8 omac_idx; 3798686cd2SShayne Chen u8 csa_count; 3898686cd2SShayne Chen u8 band_idx; 3998686cd2SShayne Chen u8 rsv; 4098686cd2SShayne Chen } __packed; 4198686cd2SShayne Chen 4298686cd2SShayne Chen struct mt7996_mcu_rdd_report { 4398686cd2SShayne Chen struct mt7996_mcu_rxd rxd; 4498686cd2SShayne Chen 4598686cd2SShayne Chen u8 __rsv1[4]; 4698686cd2SShayne Chen 4798686cd2SShayne Chen __le16 tag; 4898686cd2SShayne Chen __le16 len; 4998686cd2SShayne Chen 5098686cd2SShayne Chen u8 band_idx; 5198686cd2SShayne Chen u8 long_detected; 5298686cd2SShayne Chen u8 constant_prf_detected; 5398686cd2SShayne Chen u8 staggered_prf_detected; 5498686cd2SShayne Chen u8 radar_type_idx; 5598686cd2SShayne Chen u8 periodic_pulse_num; 5698686cd2SShayne Chen u8 long_pulse_num; 5798686cd2SShayne Chen u8 hw_pulse_num; 5898686cd2SShayne Chen 5998686cd2SShayne Chen u8 out_lpn; 6098686cd2SShayne Chen u8 out_spn; 6198686cd2SShayne Chen u8 out_crpn; 6298686cd2SShayne Chen u8 out_crpw; 6398686cd2SShayne Chen u8 out_crbn; 6498686cd2SShayne Chen u8 out_stgpn; 6598686cd2SShayne Chen u8 out_stgpw; 6698686cd2SShayne Chen 6798686cd2SShayne Chen u8 __rsv2; 6898686cd2SShayne Chen 6998686cd2SShayne Chen __le32 out_pri_const; 7098686cd2SShayne Chen __le32 out_pri_stg[3]; 7198686cd2SShayne Chen __le32 out_pri_stg_dmin; 7298686cd2SShayne Chen 7398686cd2SShayne Chen struct { 7498686cd2SShayne Chen __le32 start; 7598686cd2SShayne Chen __le16 pulse_width; 7698686cd2SShayne Chen __le16 pulse_power; 7798686cd2SShayne Chen u8 mdrdy_flag; 7898686cd2SShayne Chen u8 rsv[3]; 7998686cd2SShayne Chen } long_pulse[32]; 8098686cd2SShayne Chen 8198686cd2SShayne Chen struct { 8298686cd2SShayne Chen __le32 start; 8398686cd2SShayne Chen __le16 pulse_width; 8498686cd2SShayne Chen __le16 pulse_power; 8598686cd2SShayne Chen u8 mdrdy_flag; 8698686cd2SShayne Chen u8 rsv[3]; 8798686cd2SShayne Chen } periodic_pulse[32]; 8898686cd2SShayne Chen 8998686cd2SShayne Chen struct { 9098686cd2SShayne Chen __le32 start; 9198686cd2SShayne Chen __le16 pulse_width; 9298686cd2SShayne Chen __le16 pulse_power; 9398686cd2SShayne Chen u8 sc_pass; 9498686cd2SShayne Chen u8 sw_reset; 9598686cd2SShayne Chen u8 mdrdy_flag; 9698686cd2SShayne Chen u8 tx_active; 9798686cd2SShayne Chen } hw_pulse[32]; 9898686cd2SShayne Chen } __packed; 9998686cd2SShayne Chen 10098686cd2SShayne Chen struct mt7996_mcu_background_chain_ctrl { 10198686cd2SShayne Chen u8 _rsv[4]; 10298686cd2SShayne Chen 10398686cd2SShayne Chen __le16 tag; 10498686cd2SShayne Chen __le16 len; 10598686cd2SShayne Chen 10698686cd2SShayne Chen u8 chan; /* primary channel */ 10798686cd2SShayne Chen u8 central_chan; /* central channel */ 10898686cd2SShayne Chen u8 bw; 10998686cd2SShayne Chen u8 tx_stream; 11098686cd2SShayne Chen u8 rx_stream; 11198686cd2SShayne Chen 11298686cd2SShayne Chen u8 monitor_chan; /* monitor channel */ 11398686cd2SShayne Chen u8 monitor_central_chan;/* monitor central channel */ 11498686cd2SShayne Chen u8 monitor_bw; 11598686cd2SShayne Chen u8 monitor_tx_stream; 11698686cd2SShayne Chen u8 monitor_rx_stream; 11798686cd2SShayne Chen 11898686cd2SShayne Chen u8 scan_mode; /* 0: ScanStop 11998686cd2SShayne Chen * 1: ScanStart 12098686cd2SShayne Chen * 2: ScanRunning 12198686cd2SShayne Chen */ 12298686cd2SShayne Chen u8 band_idx; /* DBDC */ 12398686cd2SShayne Chen u8 monitor_scan_type; 12498686cd2SShayne Chen u8 band; /* 0: 2.4GHz, 1: 5GHz */ 12598686cd2SShayne Chen u8 rsv[2]; 12698686cd2SShayne Chen } __packed; 12798686cd2SShayne Chen 12898686cd2SShayne Chen struct mt7996_mcu_eeprom { 12998686cd2SShayne Chen u8 _rsv[4]; 13098686cd2SShayne Chen 13198686cd2SShayne Chen __le16 tag; 13298686cd2SShayne Chen __le16 len; 13398686cd2SShayne Chen u8 buffer_mode; 13498686cd2SShayne Chen u8 format; 13598686cd2SShayne Chen __le16 buf_len; 13698686cd2SShayne Chen } __packed; 13798686cd2SShayne Chen 13898686cd2SShayne Chen struct mt7996_mcu_phy_rx_info { 13998686cd2SShayne Chen u8 category; 14098686cd2SShayne Chen u8 rate; 14198686cd2SShayne Chen u8 mode; 14298686cd2SShayne Chen u8 nsts; 14398686cd2SShayne Chen u8 gi; 14498686cd2SShayne Chen u8 coding; 14598686cd2SShayne Chen u8 stbc; 14698686cd2SShayne Chen u8 bw; 14798686cd2SShayne Chen }; 14898686cd2SShayne Chen 14998686cd2SShayne Chen struct mt7996_mcu_mib { 15098686cd2SShayne Chen __le16 tag; 15198686cd2SShayne Chen __le16 len; 15298686cd2SShayne Chen __le32 offs; 15398686cd2SShayne Chen __le64 data; 15498686cd2SShayne Chen } __packed; 15598686cd2SShayne Chen 15698686cd2SShayne Chen enum mt7996_chan_mib_offs { 15798686cd2SShayne Chen UNI_MIB_OBSS_AIRTIME = 26, 15898686cd2SShayne Chen UNI_MIB_NON_WIFI_TIME = 27, 15998686cd2SShayne Chen UNI_MIB_TX_TIME = 28, 16098686cd2SShayne Chen UNI_MIB_RX_TIME = 29 16198686cd2SShayne Chen }; 16298686cd2SShayne Chen 16398686cd2SShayne Chen struct edca { 16498686cd2SShayne Chen __le16 tag; 16598686cd2SShayne Chen __le16 len; 16698686cd2SShayne Chen 16798686cd2SShayne Chen u8 queue; 16898686cd2SShayne Chen u8 set; 16998686cd2SShayne Chen u8 cw_min; 17098686cd2SShayne Chen u8 cw_max; 17198686cd2SShayne Chen __le16 txop; 17298686cd2SShayne Chen u8 aifs; 17398686cd2SShayne Chen u8 __rsv; 17498686cd2SShayne Chen }; 17598686cd2SShayne Chen 17698686cd2SShayne Chen #define MCU_PQ_ID(p, q) (((p) << 15) | ((q) << 10)) 17798686cd2SShayne Chen #define MCU_PKT_ID 0xa0 17898686cd2SShayne Chen 17998686cd2SShayne Chen enum { 18098686cd2SShayne Chen MCU_FW_LOG_WM, 18198686cd2SShayne Chen MCU_FW_LOG_WA, 18298686cd2SShayne Chen MCU_FW_LOG_TO_HOST, 18398686cd2SShayne Chen MCU_FW_LOG_RELAY = 16 18498686cd2SShayne Chen }; 18598686cd2SShayne Chen 18698686cd2SShayne Chen enum { 18798686cd2SShayne Chen MCU_TWT_AGRT_ADD, 18898686cd2SShayne Chen MCU_TWT_AGRT_MODIFY, 18998686cd2SShayne Chen MCU_TWT_AGRT_DELETE, 19098686cd2SShayne Chen MCU_TWT_AGRT_TEARDOWN, 19198686cd2SShayne Chen MCU_TWT_AGRT_GET_TSF, 19298686cd2SShayne Chen }; 19398686cd2SShayne Chen 19498686cd2SShayne Chen enum { 19598686cd2SShayne Chen MCU_WA_PARAM_CMD_QUERY, 19698686cd2SShayne Chen MCU_WA_PARAM_CMD_SET, 19798686cd2SShayne Chen MCU_WA_PARAM_CMD_CAPABILITY, 19898686cd2SShayne Chen MCU_WA_PARAM_CMD_DEBUG, 19998686cd2SShayne Chen }; 20098686cd2SShayne Chen 20198686cd2SShayne Chen enum { 20298686cd2SShayne Chen MCU_WA_PARAM_PDMA_RX = 0x04, 20398686cd2SShayne Chen MCU_WA_PARAM_CPU_UTIL = 0x0b, 20498686cd2SShayne Chen MCU_WA_PARAM_RED = 0x0e, 20598686cd2SShayne Chen MCU_WA_PARAM_HW_PATH_HIF_VER = 0x2f, 20698686cd2SShayne Chen }; 20798686cd2SShayne Chen 20898686cd2SShayne Chen enum mcu_mmps_mode { 20998686cd2SShayne Chen MCU_MMPS_STATIC, 21098686cd2SShayne Chen MCU_MMPS_DYNAMIC, 21198686cd2SShayne Chen MCU_MMPS_RSV, 21298686cd2SShayne Chen MCU_MMPS_DISABLE, 21398686cd2SShayne Chen }; 21498686cd2SShayne Chen 21598686cd2SShayne Chen struct bss_rate_tlv { 21698686cd2SShayne Chen __le16 tag; 21798686cd2SShayne Chen __le16 len; 21898686cd2SShayne Chen u8 __rsv1[4]; 21998686cd2SShayne Chen __le16 bc_trans; 22098686cd2SShayne Chen __le16 mc_trans; 22198686cd2SShayne Chen u8 short_preamble; 22298686cd2SShayne Chen u8 bc_fixed_rate; 22398686cd2SShayne Chen u8 mc_fixed_rate; 22498686cd2SShayne Chen u8 __rsv2[1]; 22598686cd2SShayne Chen } __packed; 22698686cd2SShayne Chen 22798686cd2SShayne Chen struct bss_ra_tlv { 22898686cd2SShayne Chen __le16 tag; 22998686cd2SShayne Chen __le16 len; 23098686cd2SShayne Chen u8 short_preamble; 23198686cd2SShayne Chen u8 force_sgi; 23298686cd2SShayne Chen u8 force_gf; 23398686cd2SShayne Chen u8 ht_mode; 23498686cd2SShayne Chen u8 se_off; 23598686cd2SShayne Chen u8 antenna_idx; 23698686cd2SShayne Chen __le16 max_phyrate; 23798686cd2SShayne Chen u8 force_tx_streams; 23898686cd2SShayne Chen u8 __rsv[3]; 23998686cd2SShayne Chen } __packed; 24098686cd2SShayne Chen 24198686cd2SShayne Chen struct bss_rlm_tlv { 24298686cd2SShayne Chen __le16 tag; 24398686cd2SShayne Chen __le16 len; 24498686cd2SShayne Chen u8 control_channel; 24598686cd2SShayne Chen u8 center_chan; 24698686cd2SShayne Chen u8 center_chan2; 24798686cd2SShayne Chen u8 bw; 24898686cd2SShayne Chen u8 tx_streams; 24998686cd2SShayne Chen u8 rx_streams; 25098686cd2SShayne Chen u8 ht_op_info; 25198686cd2SShayne Chen u8 sco; 25298686cd2SShayne Chen u8 band; 25398686cd2SShayne Chen u8 __rsv[3]; 25498686cd2SShayne Chen } __packed; 25598686cd2SShayne Chen 25698686cd2SShayne Chen struct bss_color_tlv { 25798686cd2SShayne Chen __le16 tag; 25898686cd2SShayne Chen __le16 len; 25998686cd2SShayne Chen u8 enable; 26098686cd2SShayne Chen u8 color; 26198686cd2SShayne Chen u8 rsv[2]; 26298686cd2SShayne Chen } __packed; 26398686cd2SShayne Chen 26498686cd2SShayne Chen struct bss_inband_discovery_tlv { 26598686cd2SShayne Chen __le16 tag; 26698686cd2SShayne Chen __le16 len; 26798686cd2SShayne Chen u8 tx_type; 26898686cd2SShayne Chen u8 tx_mode; 26998686cd2SShayne Chen u8 tx_interval; 27098686cd2SShayne Chen u8 enable; 27198686cd2SShayne Chen __le16 wcid; 27298686cd2SShayne Chen __le16 prob_rsp_len; 27398686cd2SShayne Chen #define MAX_INBAND_FRAME_SIZE 512 27498686cd2SShayne Chen u8 pkt[MAX_INBAND_FRAME_SIZE]; 27598686cd2SShayne Chen } __packed; 27698686cd2SShayne Chen 27798686cd2SShayne Chen struct bss_bcn_content_tlv { 27898686cd2SShayne Chen __le16 tag; 27998686cd2SShayne Chen __le16 len; 28098686cd2SShayne Chen __le16 tim_ie_pos; 28198686cd2SShayne Chen __le16 csa_ie_pos; 28298686cd2SShayne Chen __le16 bcc_ie_pos; 28398686cd2SShayne Chen u8 enable; 28498686cd2SShayne Chen u8 type; 28598686cd2SShayne Chen __le16 pkt_len; 28698686cd2SShayne Chen #define MAX_BEACON_SIZE 512 28798686cd2SShayne Chen u8 pkt[MAX_BEACON_SIZE]; 28898686cd2SShayne Chen } __packed; 28998686cd2SShayne Chen 29098686cd2SShayne Chen struct bss_bcn_cntdwn_tlv { 29198686cd2SShayne Chen __le16 tag; 29298686cd2SShayne Chen __le16 len; 29398686cd2SShayne Chen u8 cnt; 29498686cd2SShayne Chen u8 rsv[3]; 29598686cd2SShayne Chen } __packed; 29698686cd2SShayne Chen 29798686cd2SShayne Chen struct bss_bcn_mbss_tlv { 29898686cd2SShayne Chen __le16 tag; 29998686cd2SShayne Chen __le16 len; 30098686cd2SShayne Chen __le32 bitmap; 30198686cd2SShayne Chen #define MAX_BEACON_NUM 32 30298686cd2SShayne Chen __le16 offset[MAX_BEACON_NUM]; 30398686cd2SShayne Chen } __packed __aligned(4); 30498686cd2SShayne Chen 30598686cd2SShayne Chen struct bss_txcmd_tlv { 30698686cd2SShayne Chen __le16 tag; 30798686cd2SShayne Chen __le16 len; 30898686cd2SShayne Chen u8 txcmd_mode; 30998686cd2SShayne Chen u8 __rsv[3]; 31098686cd2SShayne Chen } __packed; 31198686cd2SShayne Chen 31298686cd2SShayne Chen struct bss_sec_tlv { 31398686cd2SShayne Chen __le16 tag; 31498686cd2SShayne Chen __le16 len; 31598686cd2SShayne Chen u8 __rsv1[2]; 31698686cd2SShayne Chen u8 cipher; 31798686cd2SShayne Chen u8 __rsv2[1]; 31898686cd2SShayne Chen } __packed; 31998686cd2SShayne Chen 32098686cd2SShayne Chen struct bss_power_save { 32198686cd2SShayne Chen __le16 tag; 32298686cd2SShayne Chen __le16 len; 32398686cd2SShayne Chen u8 profile; 32498686cd2SShayne Chen u8 _rsv[3]; 32598686cd2SShayne Chen } __packed; 32698686cd2SShayne Chen 32798686cd2SShayne Chen struct bss_mld_tlv { 32898686cd2SShayne Chen __le16 tag; 32998686cd2SShayne Chen __le16 len; 33098686cd2SShayne Chen u8 group_mld_id; 33198686cd2SShayne Chen u8 own_mld_id; 33298686cd2SShayne Chen u8 mac_addr[ETH_ALEN]; 33398686cd2SShayne Chen u8 remap_idx; 33498686cd2SShayne Chen u8 __rsv[3]; 33598686cd2SShayne Chen } __packed; 33698686cd2SShayne Chen 33798686cd2SShayne Chen struct sta_rec_ba_uni { 33898686cd2SShayne Chen __le16 tag; 33998686cd2SShayne Chen __le16 len; 34098686cd2SShayne Chen u8 tid; 34198686cd2SShayne Chen u8 ba_type; 34298686cd2SShayne Chen u8 amsdu; 34398686cd2SShayne Chen u8 ba_en; 34498686cd2SShayne Chen __le16 ssn; 34598686cd2SShayne Chen __le16 winsize; 34698686cd2SShayne Chen u8 ba_rdd_rro; 34798686cd2SShayne Chen u8 __rsv[3]; 34898686cd2SShayne Chen } __packed; 34998686cd2SShayne Chen 35092aa2da9SShayne Chen struct sta_rec_eht { 35192aa2da9SShayne Chen __le16 tag; 35292aa2da9SShayne Chen __le16 len; 35392aa2da9SShayne Chen u8 tid_bitmap; 35492aa2da9SShayne Chen u8 _rsv; 35592aa2da9SShayne Chen __le16 mac_cap; 35692aa2da9SShayne Chen __le64 phy_cap; 35792aa2da9SShayne Chen __le64 phy_cap_ext; 35892aa2da9SShayne Chen u8 mcs_map_bw20[4]; 35992aa2da9SShayne Chen u8 mcs_map_bw80[3]; 36092aa2da9SShayne Chen u8 mcs_map_bw160[3]; 36192aa2da9SShayne Chen u8 mcs_map_bw320[3]; 36292aa2da9SShayne Chen u8 _rsv2[3]; 36392aa2da9SShayne Chen } __packed; 36492aa2da9SShayne Chen 36598686cd2SShayne Chen struct sec_key_uni { 36698686cd2SShayne Chen __le16 wlan_idx; 36798686cd2SShayne Chen u8 mgmt_prot; 36898686cd2SShayne Chen u8 cipher_id; 36998686cd2SShayne Chen u8 cipher_len; 37098686cd2SShayne Chen u8 key_id; 37198686cd2SShayne Chen u8 key_len; 37298686cd2SShayne Chen u8 need_resp; 37398686cd2SShayne Chen u8 key[32]; 37498686cd2SShayne Chen } __packed; 37598686cd2SShayne Chen 37698686cd2SShayne Chen struct sta_rec_sec_uni { 37798686cd2SShayne Chen __le16 tag; 37898686cd2SShayne Chen __le16 len; 37998686cd2SShayne Chen u8 add; 38098686cd2SShayne Chen u8 n_cipher; 38198686cd2SShayne Chen u8 rsv[2]; 38298686cd2SShayne Chen 38398686cd2SShayne Chen struct sec_key_uni key[2]; 38498686cd2SShayne Chen } __packed; 38598686cd2SShayne Chen 38698686cd2SShayne Chen struct sta_rec_hdrt { 38798686cd2SShayne Chen __le16 tag; 38898686cd2SShayne Chen __le16 len; 38998686cd2SShayne Chen u8 hdrt_mode; 39098686cd2SShayne Chen u8 rsv[3]; 39198686cd2SShayne Chen } __packed; 39298686cd2SShayne Chen 39398686cd2SShayne Chen struct sta_rec_hdr_trans { 39498686cd2SShayne Chen __le16 tag; 39598686cd2SShayne Chen __le16 len; 39698686cd2SShayne Chen u8 from_ds; 39798686cd2SShayne Chen u8 to_ds; 39898686cd2SShayne Chen u8 dis_rx_hdr_tran; 399*27db47abSRyder Lee u8 mesh; 40098686cd2SShayne Chen } __packed; 40198686cd2SShayne Chen 40298686cd2SShayne Chen struct hdr_trans_en { 40398686cd2SShayne Chen __le16 tag; 40498686cd2SShayne Chen __le16 len; 40598686cd2SShayne Chen u8 enable; 40698686cd2SShayne Chen u8 check_bssid; 40798686cd2SShayne Chen u8 mode; 40898686cd2SShayne Chen u8 __rsv; 40998686cd2SShayne Chen } __packed; 41098686cd2SShayne Chen 41198686cd2SShayne Chen struct hdr_trans_vlan { 41298686cd2SShayne Chen __le16 tag; 41398686cd2SShayne Chen __le16 len; 41498686cd2SShayne Chen u8 insert_vlan; 41598686cd2SShayne Chen u8 remove_vlan; 41698686cd2SShayne Chen u8 tid; 41798686cd2SShayne Chen u8 __rsv; 41898686cd2SShayne Chen } __packed; 41998686cd2SShayne Chen 42098686cd2SShayne Chen struct hdr_trans_blacklist { 42198686cd2SShayne Chen __le16 tag; 42298686cd2SShayne Chen __le16 len; 42398686cd2SShayne Chen u8 idx; 42498686cd2SShayne Chen u8 enable; 42598686cd2SShayne Chen __le16 type; 42698686cd2SShayne Chen } __packed; 42798686cd2SShayne Chen 42898686cd2SShayne Chen struct uni_header { 42998686cd2SShayne Chen u8 __rsv[4]; 43098686cd2SShayne Chen } __packed; 43198686cd2SShayne Chen 43298686cd2SShayne Chen struct vow_rx_airtime { 43398686cd2SShayne Chen __le16 tag; 43498686cd2SShayne Chen __le16 len; 43598686cd2SShayne Chen 43698686cd2SShayne Chen u8 enable; 43798686cd2SShayne Chen u8 band; 43898686cd2SShayne Chen u8 __rsv[2]; 43998686cd2SShayne Chen } __packed; 44098686cd2SShayne Chen 44198686cd2SShayne Chen struct bf_sounding_on { 44298686cd2SShayne Chen __le16 tag; 44398686cd2SShayne Chen __le16 len; 44498686cd2SShayne Chen 44598686cd2SShayne Chen u8 snd_mode; 44698686cd2SShayne Chen u8 sta_num; 44798686cd2SShayne Chen u8 __rsv[2]; 44898686cd2SShayne Chen __le16 wlan_id[4]; 44998686cd2SShayne Chen __le32 snd_period; 45098686cd2SShayne Chen } __packed; 45198686cd2SShayne Chen 45298686cd2SShayne Chen struct bf_hw_en_status_update { 45398686cd2SShayne Chen __le16 tag; 45498686cd2SShayne Chen __le16 len; 45598686cd2SShayne Chen 45698686cd2SShayne Chen bool ebf; 45798686cd2SShayne Chen bool ibf; 45898686cd2SShayne Chen u8 __rsv[2]; 45998686cd2SShayne Chen } __packed; 46098686cd2SShayne Chen 46198686cd2SShayne Chen struct bf_mod_en_ctrl { 46298686cd2SShayne Chen __le16 tag; 46398686cd2SShayne Chen __le16 len; 46498686cd2SShayne Chen 46598686cd2SShayne Chen u8 bf_num; 46698686cd2SShayne Chen u8 bf_bitmap; 46798686cd2SShayne Chen u8 bf_sel[8]; 46898686cd2SShayne Chen u8 __rsv[2]; 46998686cd2SShayne Chen } __packed; 47098686cd2SShayne Chen 47198686cd2SShayne Chen union bf_tag_tlv { 47298686cd2SShayne Chen struct bf_sounding_on bf_snd; 47398686cd2SShayne Chen struct bf_hw_en_status_update bf_hw_en; 47498686cd2SShayne Chen struct bf_mod_en_ctrl bf_mod_en; 47598686cd2SShayne Chen }; 47698686cd2SShayne Chen 47798686cd2SShayne Chen struct ra_rate { 47898686cd2SShayne Chen __le16 wlan_idx; 47998686cd2SShayne Chen u8 mode; 48098686cd2SShayne Chen u8 stbc; 48198686cd2SShayne Chen __le16 gi; 48298686cd2SShayne Chen u8 bw; 48398686cd2SShayne Chen u8 ldpc; 48498686cd2SShayne Chen u8 mcs; 48598686cd2SShayne Chen u8 nss; 48698686cd2SShayne Chen __le16 ltf; 48798686cd2SShayne Chen u8 spe; 48898686cd2SShayne Chen u8 preamble; 48998686cd2SShayne Chen u8 __rsv[2]; 49098686cd2SShayne Chen } __packed; 49198686cd2SShayne Chen 49298686cd2SShayne Chen struct ra_fixed_rate { 49398686cd2SShayne Chen __le16 tag; 49498686cd2SShayne Chen __le16 len; 49598686cd2SShayne Chen 49698686cd2SShayne Chen __le16 version; 49798686cd2SShayne Chen struct ra_rate rate; 49898686cd2SShayne Chen } __packed; 49998686cd2SShayne Chen 50098686cd2SShayne Chen enum { 50198686cd2SShayne Chen UNI_RA_FIXED_RATE = 0xf, 50298686cd2SShayne Chen }; 50398686cd2SShayne Chen 50498686cd2SShayne Chen #define MT7996_HDR_TRANS_MAX_SIZE (sizeof(struct hdr_trans_en) + \ 50598686cd2SShayne Chen sizeof(struct hdr_trans_vlan) + \ 50698686cd2SShayne Chen sizeof(struct hdr_trans_blacklist)) 50798686cd2SShayne Chen 50898686cd2SShayne Chen enum { 50998686cd2SShayne Chen UNI_HDR_TRANS_EN, 51098686cd2SShayne Chen UNI_HDR_TRANS_VLAN, 51198686cd2SShayne Chen UNI_HDR_TRANS_BLACKLIST, 51298686cd2SShayne Chen }; 51398686cd2SShayne Chen 51498686cd2SShayne Chen enum { 51598686cd2SShayne Chen RATE_PARAM_FIXED = 3, 51698686cd2SShayne Chen RATE_PARAM_MMPS_UPDATE = 5, 51798686cd2SShayne Chen RATE_PARAM_FIXED_HE_LTF = 7, 51898686cd2SShayne Chen RATE_PARAM_FIXED_MCS, 51998686cd2SShayne Chen RATE_PARAM_FIXED_GI = 11, 52098686cd2SShayne Chen RATE_PARAM_AUTO = 20, 52198686cd2SShayne Chen }; 52298686cd2SShayne Chen 52398686cd2SShayne Chen enum { 52498686cd2SShayne Chen BF_SOUNDING_ON = 1, 52598686cd2SShayne Chen BF_HW_EN_UPDATE = 17, 52698686cd2SShayne Chen BF_MOD_EN_CTRL = 20, 52798686cd2SShayne Chen }; 52898686cd2SShayne Chen 52998686cd2SShayne Chen enum { 53098686cd2SShayne Chen CMD_BAND_NONE, 53198686cd2SShayne Chen CMD_BAND_24G, 53298686cd2SShayne Chen CMD_BAND_5G, 53398686cd2SShayne Chen CMD_BAND_6G, 53498686cd2SShayne Chen }; 53598686cd2SShayne Chen 53698686cd2SShayne Chen struct bss_req_hdr { 53798686cd2SShayne Chen u8 bss_idx; 53898686cd2SShayne Chen u8 __rsv[3]; 53998686cd2SShayne Chen } __packed; 54098686cd2SShayne Chen 54198686cd2SShayne Chen enum { 54298686cd2SShayne Chen UNI_CHANNEL_SWITCH, 54398686cd2SShayne Chen UNI_CHANNEL_RX_PATH, 54498686cd2SShayne Chen }; 54598686cd2SShayne Chen 54698686cd2SShayne Chen #define MT7996_BSS_UPDATE_MAX_SIZE (sizeof(struct bss_req_hdr) + \ 54798686cd2SShayne Chen sizeof(struct mt76_connac_bss_basic_tlv) + \ 54898686cd2SShayne Chen sizeof(struct bss_rlm_tlv) + \ 54998686cd2SShayne Chen sizeof(struct bss_ra_tlv) + \ 55098686cd2SShayne Chen sizeof(struct bss_info_uni_he) + \ 55198686cd2SShayne Chen sizeof(struct bss_rate_tlv) + \ 55298686cd2SShayne Chen sizeof(struct bss_txcmd_tlv) + \ 55398686cd2SShayne Chen sizeof(struct bss_power_save) + \ 55498686cd2SShayne Chen sizeof(struct bss_sec_tlv) + \ 55598686cd2SShayne Chen sizeof(struct bss_mld_tlv)) 55698686cd2SShayne Chen 55798686cd2SShayne Chen #define MT7996_STA_UPDATE_MAX_SIZE (sizeof(struct sta_req_hdr) + \ 55898686cd2SShayne Chen sizeof(struct sta_rec_basic) + \ 55998686cd2SShayne Chen sizeof(struct sta_rec_bf) + \ 56098686cd2SShayne Chen sizeof(struct sta_rec_ht) + \ 56198686cd2SShayne Chen sizeof(struct sta_rec_he_v2) + \ 56298686cd2SShayne Chen sizeof(struct sta_rec_ba_uni) + \ 56398686cd2SShayne Chen sizeof(struct sta_rec_vht) + \ 56498686cd2SShayne Chen sizeof(struct sta_rec_uapsd) + \ 56598686cd2SShayne Chen sizeof(struct sta_rec_amsdu) + \ 56698686cd2SShayne Chen sizeof(struct sta_rec_bfee) + \ 56798686cd2SShayne Chen sizeof(struct sta_rec_phy) + \ 56898686cd2SShayne Chen sizeof(struct sta_rec_ra) + \ 56998686cd2SShayne Chen sizeof(struct sta_rec_sec) + \ 57098686cd2SShayne Chen sizeof(struct sta_rec_ra_fixed) + \ 57198686cd2SShayne Chen sizeof(struct sta_rec_he_6g_capa) + \ 57292aa2da9SShayne Chen sizeof(struct sta_rec_eht) + \ 57398686cd2SShayne Chen sizeof(struct sta_rec_hdrt) + \ 57498686cd2SShayne Chen sizeof(struct sta_rec_hdr_trans) + \ 57598686cd2SShayne Chen sizeof(struct tlv)) 57698686cd2SShayne Chen 57798686cd2SShayne Chen #define MT7996_BEACON_UPDATE_SIZE (sizeof(struct bss_req_hdr) + \ 57898686cd2SShayne Chen sizeof(struct bss_bcn_content_tlv) + \ 57998686cd2SShayne Chen sizeof(struct bss_bcn_cntdwn_tlv) + \ 58098686cd2SShayne Chen sizeof(struct bss_bcn_mbss_tlv)) 58198686cd2SShayne Chen 58298686cd2SShayne Chen #define MT7996_INBAND_FRAME_SIZE (sizeof(struct bss_req_hdr) + \ 58398686cd2SShayne Chen sizeof(struct bss_inband_discovery_tlv)) 58498686cd2SShayne Chen 58598686cd2SShayne Chen enum { 58698686cd2SShayne Chen UNI_BAND_CONFIG_RADIO_ENABLE, 58798686cd2SShayne Chen UNI_BAND_CONFIG_RTS_THRESHOLD = 0x08, 58898686cd2SShayne Chen }; 58998686cd2SShayne Chen 59098686cd2SShayne Chen enum { 59198686cd2SShayne Chen UNI_WSYS_CONFIG_FW_LOG_CTRL, 59298686cd2SShayne Chen UNI_WSYS_CONFIG_FW_DBG_CTRL, 59398686cd2SShayne Chen }; 59498686cd2SShayne Chen 59598686cd2SShayne Chen enum { 59698686cd2SShayne Chen UNI_RDD_CTRL_PARM, 59798686cd2SShayne Chen UNI_RDD_CTRL_SET_TH = 0x3, 59898686cd2SShayne Chen }; 59998686cd2SShayne Chen 60098686cd2SShayne Chen enum { 60198686cd2SShayne Chen UNI_EFUSE_ACCESS = 1, 60298686cd2SShayne Chen UNI_EFUSE_BUFFER_MODE, 60398686cd2SShayne Chen UNI_EFUSE_FREE_BLOCK, 60498686cd2SShayne Chen UNI_EFUSE_BUFFER_RD, 60598686cd2SShayne Chen }; 60698686cd2SShayne Chen 60798686cd2SShayne Chen enum { 60898686cd2SShayne Chen UNI_VOW_DRR_CTRL, 60998686cd2SShayne Chen UNI_VOW_RX_AT_AIRTIME_EN = 0x0b, 61098686cd2SShayne Chen UNI_VOW_RX_AT_AIRTIME_CLR_EN = 0x0e, 61198686cd2SShayne Chen }; 61298686cd2SShayne Chen 61398686cd2SShayne Chen enum { 61498686cd2SShayne Chen UNI_CMD_MIB_DATA, 61598686cd2SShayne Chen }; 61698686cd2SShayne Chen 61798686cd2SShayne Chen enum { 61898686cd2SShayne Chen UNI_POWER_OFF, 61998686cd2SShayne Chen }; 62098686cd2SShayne Chen 62198686cd2SShayne Chen enum { 62298686cd2SShayne Chen UNI_CMD_TWT_ARGT_UPDATE = 0x0, 62398686cd2SShayne Chen UNI_CMD_TWT_MGMT_OFFLOAD, 62498686cd2SShayne Chen }; 62598686cd2SShayne Chen 62698686cd2SShayne Chen enum { 62798686cd2SShayne Chen UNI_RRO_DEL_ENTRY = 0x1, 62898686cd2SShayne Chen UNI_RRO_SET_PLATFORM_TYPE, 62998686cd2SShayne Chen UNI_RRO_GET_BA_SESSION_TABLE, 63098686cd2SShayne Chen UNI_RRO_SET_BYPASS_MODE, 63198686cd2SShayne Chen UNI_RRO_SET_TXFREE_PATH, 63298686cd2SShayne Chen }; 63398686cd2SShayne Chen 63498686cd2SShayne Chen enum{ 63598686cd2SShayne Chen UNI_CMD_SR_ENABLE = 0x1, 636cf6dc2dbSRyder Lee UNI_CMD_SR_ENABLE_SD, 637cf6dc2dbSRyder Lee UNI_CMD_SR_ENABLE_MODE, 638cf6dc2dbSRyder Lee UNI_CMD_SR_ENABLE_DPD = 0x12, 639cf6dc2dbSRyder Lee UNI_CMD_SR_ENABLE_TX, 640cf6dc2dbSRyder Lee UNI_CMD_SR_SET_SRG_BITMAP = 0x80, 641cf6dc2dbSRyder Lee UNI_CMD_SR_SET_PARAM = 0xc1, 642cf6dc2dbSRyder Lee UNI_CMD_SR_SET_SIGA = 0xd0, 64398686cd2SShayne Chen }; 64498686cd2SShayne Chen 64598686cd2SShayne Chen enum { 64698686cd2SShayne Chen UNI_CMD_ACCESS_REG_BASIC = 0x0, 64798686cd2SShayne Chen UNI_CMD_ACCESS_RF_REG_BASIC, 64898686cd2SShayne Chen }; 64998686cd2SShayne Chen 65098686cd2SShayne Chen enum { 651672662f0SRyder Lee UNI_CMD_SER_QUERY, 65298686cd2SShayne Chen /* recovery */ 653672662f0SRyder Lee UNI_CMD_SER_SET_RECOVER_L1, 654672662f0SRyder Lee UNI_CMD_SER_SET_RECOVER_L2, 655672662f0SRyder Lee UNI_CMD_SER_SET_RECOVER_L3_RX_ABORT, 656672662f0SRyder Lee UNI_CMD_SER_SET_RECOVER_L3_TX_ABORT, 657672662f0SRyder Lee UNI_CMD_SER_SET_RECOVER_L3_TX_DISABLE, 658672662f0SRyder Lee UNI_CMD_SER_SET_RECOVER_L3_BF, 659672662f0SRyder Lee UNI_CMD_SER_SET_RECOVER_L4_MDP, 660672662f0SRyder Lee UNI_CMD_SER_SET_RECOVER_FULL, 661672662f0SRyder Lee UNI_CMD_SER_SET_SYSTEM_ASSERT, 66298686cd2SShayne Chen /* action */ 663672662f0SRyder Lee UNI_CMD_SER_ENABLE = 1, 664672662f0SRyder Lee UNI_CMD_SER_SET, 665672662f0SRyder Lee UNI_CMD_SER_TRIGGER 66698686cd2SShayne Chen }; 66798686cd2SShayne Chen 66898686cd2SShayne Chen enum { 66998686cd2SShayne Chen MT7996_SEC_MODE_PLAIN, 67098686cd2SShayne Chen MT7996_SEC_MODE_AES, 67198686cd2SShayne Chen MT7996_SEC_MODE_SCRAMBLE, 67298686cd2SShayne Chen MT7996_SEC_MODE_MAX, 67398686cd2SShayne Chen }; 67498686cd2SShayne Chen 67598686cd2SShayne Chen #define MT7996_PATCH_SEC GENMASK(31, 24) 67698686cd2SShayne Chen #define MT7996_PATCH_SCRAMBLE_KEY GENMASK(15, 8) 67798686cd2SShayne Chen #define MT7996_PATCH_AES_KEY GENMASK(7, 0) 67898686cd2SShayne Chen 67998686cd2SShayne Chen #define MT7996_SEC_ENCRYPT BIT(0) 68098686cd2SShayne Chen #define MT7996_SEC_KEY_IDX GENMASK(2, 1) 68198686cd2SShayne Chen #define MT7996_SEC_IV BIT(3) 68298686cd2SShayne Chen 68398686cd2SShayne Chen #endif 684