1 // SPDX-License-Identifier: ISC
2 /*
3  * Copyright (C) 2022 MediaTek Inc.
4  */
5 
6 #include <linux/firmware.h>
7 #include <linux/fs.h>
8 #include "mt7996.h"
9 #include "mcu.h"
10 #include "mac.h"
11 #include "eeprom.h"
12 
13 struct mt7996_patch_hdr {
14 	char build_date[16];
15 	char platform[4];
16 	__be32 hw_sw_ver;
17 	__be32 patch_ver;
18 	__be16 checksum;
19 	u16 reserved;
20 	struct {
21 		__be32 patch_ver;
22 		__be32 subsys;
23 		__be32 feature;
24 		__be32 n_region;
25 		__be32 crc;
26 		u32 reserved[11];
27 	} desc;
28 } __packed;
29 
30 struct mt7996_patch_sec {
31 	__be32 type;
32 	__be32 offs;
33 	__be32 size;
34 	union {
35 		__be32 spec[13];
36 		struct {
37 			__be32 addr;
38 			__be32 len;
39 			__be32 sec_key_idx;
40 			__be32 align_len;
41 			u32 reserved[9];
42 		} info;
43 	};
44 } __packed;
45 
46 struct mt7996_fw_trailer {
47 	u8 chip_id;
48 	u8 eco_code;
49 	u8 n_region;
50 	u8 format_ver;
51 	u8 format_flag;
52 	u8 reserved[2];
53 	char fw_ver[10];
54 	char build_date[15];
55 	u32 crc;
56 } __packed;
57 
58 struct mt7996_fw_region {
59 	__le32 decomp_crc;
60 	__le32 decomp_len;
61 	__le32 decomp_blk_sz;
62 	u8 reserved[4];
63 	__le32 addr;
64 	__le32 len;
65 	u8 feature_set;
66 	u8 reserved1[15];
67 } __packed;
68 
69 #define MCU_PATCH_ADDRESS		0x200000
70 
71 #define HE_PHY(p, c)			u8_get_bits(c, IEEE80211_HE_PHY_##p)
72 #define HE_MAC(m, c)			u8_get_bits(c, IEEE80211_HE_MAC_##m)
73 #define EHT_PHY(p, c)			u8_get_bits(c, IEEE80211_EHT_PHY_##p)
74 
75 static bool sr_scene_detect = true;
76 module_param(sr_scene_detect, bool, 0644);
77 MODULE_PARM_DESC(sr_scene_detect, "Enable firmware scene detection algorithm");
78 
79 static u8
80 mt7996_mcu_get_sta_nss(u16 mcs_map)
81 {
82 	u8 nss;
83 
84 	for (nss = 8; nss > 0; nss--) {
85 		u8 nss_mcs = (mcs_map >> (2 * (nss - 1))) & 3;
86 
87 		if (nss_mcs != IEEE80211_VHT_MCS_NOT_SUPPORTED)
88 			break;
89 	}
90 
91 	return nss - 1;
92 }
93 
94 static void
95 mt7996_mcu_set_sta_he_mcs(struct ieee80211_sta *sta, __le16 *he_mcs,
96 			  u16 mcs_map)
97 {
98 	struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv;
99 	enum nl80211_band band = msta->vif->phy->mt76->chandef.chan->band;
100 	const u16 *mask = msta->vif->bitrate_mask.control[band].he_mcs;
101 	int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss;
102 
103 	for (nss = 0; nss < max_nss; nss++) {
104 		int mcs;
105 
106 		switch ((mcs_map >> (2 * nss)) & 0x3) {
107 		case IEEE80211_HE_MCS_SUPPORT_0_11:
108 			mcs = GENMASK(11, 0);
109 			break;
110 		case IEEE80211_HE_MCS_SUPPORT_0_9:
111 			mcs = GENMASK(9, 0);
112 			break;
113 		case IEEE80211_HE_MCS_SUPPORT_0_7:
114 			mcs = GENMASK(7, 0);
115 			break;
116 		default:
117 			mcs = 0;
118 		}
119 
120 		mcs = mcs ? fls(mcs & mask[nss]) - 1 : -1;
121 
122 		switch (mcs) {
123 		case 0 ... 7:
124 			mcs = IEEE80211_HE_MCS_SUPPORT_0_7;
125 			break;
126 		case 8 ... 9:
127 			mcs = IEEE80211_HE_MCS_SUPPORT_0_9;
128 			break;
129 		case 10 ... 11:
130 			mcs = IEEE80211_HE_MCS_SUPPORT_0_11;
131 			break;
132 		default:
133 			mcs = IEEE80211_HE_MCS_NOT_SUPPORTED;
134 			break;
135 		}
136 		mcs_map &= ~(0x3 << (nss * 2));
137 		mcs_map |= mcs << (nss * 2);
138 	}
139 
140 	*he_mcs = cpu_to_le16(mcs_map);
141 }
142 
143 static void
144 mt7996_mcu_set_sta_vht_mcs(struct ieee80211_sta *sta, __le16 *vht_mcs,
145 			   const u16 *mask)
146 {
147 	u16 mcs, mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map);
148 	int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss;
149 
150 	for (nss = 0; nss < max_nss; nss++, mcs_map >>= 2) {
151 		switch (mcs_map & 0x3) {
152 		case IEEE80211_VHT_MCS_SUPPORT_0_9:
153 			mcs = GENMASK(9, 0);
154 			break;
155 		case IEEE80211_VHT_MCS_SUPPORT_0_8:
156 			mcs = GENMASK(8, 0);
157 			break;
158 		case IEEE80211_VHT_MCS_SUPPORT_0_7:
159 			mcs = GENMASK(7, 0);
160 			break;
161 		default:
162 			mcs = 0;
163 		}
164 
165 		vht_mcs[nss] = cpu_to_le16(mcs & mask[nss]);
166 	}
167 }
168 
169 static void
170 mt7996_mcu_set_sta_ht_mcs(struct ieee80211_sta *sta, u8 *ht_mcs,
171 			  const u8 *mask)
172 {
173 	int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss;
174 
175 	for (nss = 0; nss < max_nss; nss++)
176 		ht_mcs[nss] = sta->deflink.ht_cap.mcs.rx_mask[nss] & mask[nss];
177 }
178 
179 static int
180 mt7996_mcu_parse_response(struct mt76_dev *mdev, int cmd,
181 			  struct sk_buff *skb, int seq)
182 {
183 	struct mt7996_mcu_rxd *rxd;
184 	struct mt7996_mcu_uni_event *event;
185 	int mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd);
186 	int ret = 0;
187 
188 	if (!skb) {
189 		dev_err(mdev->dev, "Message %08x (seq %d) timeout\n",
190 			cmd, seq);
191 		return -ETIMEDOUT;
192 	}
193 
194 	rxd = (struct mt7996_mcu_rxd *)skb->data;
195 	if (seq != rxd->seq)
196 		return -EAGAIN;
197 
198 	if (cmd == MCU_CMD(PATCH_SEM_CONTROL)) {
199 		skb_pull(skb, sizeof(*rxd) - 4);
200 		ret = *skb->data;
201 	} else if ((rxd->option & MCU_UNI_CMD_EVENT) &&
202 		    rxd->eid == MCU_UNI_EVENT_RESULT) {
203 		skb_pull(skb, sizeof(*rxd));
204 		event = (struct mt7996_mcu_uni_event *)skb->data;
205 		ret = le32_to_cpu(event->status);
206 		/* skip invalid event */
207 		if (mcu_cmd != event->cid)
208 			ret = -EAGAIN;
209 	} else {
210 		skb_pull(skb, sizeof(struct mt7996_mcu_rxd));
211 	}
212 
213 	return ret;
214 }
215 
216 static int
217 mt7996_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb,
218 			int cmd, int *wait_seq)
219 {
220 	struct mt7996_dev *dev = container_of(mdev, struct mt7996_dev, mt76);
221 	int txd_len, mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd);
222 	struct mt76_connac2_mcu_uni_txd *uni_txd;
223 	struct mt76_connac2_mcu_txd *mcu_txd;
224 	enum mt76_mcuq_id qid;
225 	__le32 *txd;
226 	u32 val;
227 	u8 seq;
228 
229 	mdev->mcu.timeout = 20 * HZ;
230 
231 	seq = ++dev->mt76.mcu.msg_seq & 0xf;
232 	if (!seq)
233 		seq = ++dev->mt76.mcu.msg_seq & 0xf;
234 
235 	if (cmd == MCU_CMD(FW_SCATTER)) {
236 		qid = MT_MCUQ_FWDL;
237 		goto exit;
238 	}
239 
240 	txd_len = cmd & __MCU_CMD_FIELD_UNI ? sizeof(*uni_txd) : sizeof(*mcu_txd);
241 	txd = (__le32 *)skb_push(skb, txd_len);
242 	if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state))
243 		qid = MT_MCUQ_WA;
244 	else
245 		qid = MT_MCUQ_WM;
246 
247 	val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) |
248 	      FIELD_PREP(MT_TXD0_PKT_FMT, MT_TX_TYPE_CMD) |
249 	      FIELD_PREP(MT_TXD0_Q_IDX, MT_TX_MCU_PORT_RX_Q0);
250 	txd[0] = cpu_to_le32(val);
251 
252 	val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD);
253 	txd[1] = cpu_to_le32(val);
254 
255 	if (cmd & __MCU_CMD_FIELD_UNI) {
256 		uni_txd = (struct mt76_connac2_mcu_uni_txd *)txd;
257 		uni_txd->len = cpu_to_le16(skb->len - sizeof(uni_txd->txd));
258 		uni_txd->cid = cpu_to_le16(mcu_cmd);
259 		uni_txd->s2d_index = MCU_S2D_H2CN;
260 		uni_txd->pkt_type = MCU_PKT_ID;
261 		uni_txd->seq = seq;
262 
263 		if (cmd & __MCU_CMD_FIELD_QUERY)
264 			uni_txd->option = MCU_CMD_UNI_QUERY_ACK;
265 		else
266 			uni_txd->option = MCU_CMD_UNI_EXT_ACK;
267 
268 		if ((cmd & __MCU_CMD_FIELD_WA) && (cmd & __MCU_CMD_FIELD_WM))
269 			uni_txd->s2d_index = MCU_S2D_H2CN;
270 		else if (cmd & __MCU_CMD_FIELD_WA)
271 			uni_txd->s2d_index = MCU_S2D_H2C;
272 		else if (cmd & __MCU_CMD_FIELD_WM)
273 			uni_txd->s2d_index = MCU_S2D_H2N;
274 
275 		goto exit;
276 	}
277 
278 	mcu_txd = (struct mt76_connac2_mcu_txd *)txd;
279 	mcu_txd->len = cpu_to_le16(skb->len - sizeof(mcu_txd->txd));
280 	mcu_txd->pq_id = cpu_to_le16(MCU_PQ_ID(MT_TX_PORT_IDX_MCU,
281 					       MT_TX_MCU_PORT_RX_Q0));
282 	mcu_txd->pkt_type = MCU_PKT_ID;
283 	mcu_txd->seq = seq;
284 
285 	mcu_txd->cid = FIELD_GET(__MCU_CMD_FIELD_ID, cmd);
286 	mcu_txd->set_query = MCU_Q_NA;
287 	mcu_txd->ext_cid = FIELD_GET(__MCU_CMD_FIELD_EXT_ID, cmd);
288 	if (mcu_txd->ext_cid) {
289 		mcu_txd->ext_cid_ack = 1;
290 
291 		if (cmd & __MCU_CMD_FIELD_QUERY)
292 			mcu_txd->set_query = MCU_Q_QUERY;
293 		else
294 			mcu_txd->set_query = MCU_Q_SET;
295 	}
296 
297 	if (cmd & __MCU_CMD_FIELD_WA)
298 		mcu_txd->s2d_index = MCU_S2D_H2C;
299 	else
300 		mcu_txd->s2d_index = MCU_S2D_H2N;
301 
302 exit:
303 	if (wait_seq)
304 		*wait_seq = seq;
305 
306 	return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[qid], skb, 0);
307 }
308 
309 int mt7996_mcu_wa_cmd(struct mt7996_dev *dev, int cmd, u32 a1, u32 a2, u32 a3)
310 {
311 	struct {
312 		__le32 args[3];
313 	} req = {
314 		.args = {
315 			cpu_to_le32(a1),
316 			cpu_to_le32(a2),
317 			cpu_to_le32(a3),
318 		},
319 	};
320 
321 	return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), false);
322 }
323 
324 static void
325 mt7996_mcu_csa_finish(void *priv, u8 *mac, struct ieee80211_vif *vif)
326 {
327 	if (vif->bss_conf.csa_active)
328 		ieee80211_csa_finish(vif);
329 }
330 
331 static void
332 mt7996_mcu_rx_radar_detected(struct mt7996_dev *dev, struct sk_buff *skb)
333 {
334 	struct mt76_phy *mphy = &dev->mt76.phy;
335 	struct mt7996_mcu_rdd_report *r;
336 
337 	r = (struct mt7996_mcu_rdd_report *)skb->data;
338 
339 	if (r->band_idx >= ARRAY_SIZE(dev->mt76.phys))
340 		return;
341 
342 	if (dev->rdd2_phy && r->band_idx == MT_RX_SEL2)
343 		mphy = dev->rdd2_phy->mt76;
344 	else
345 		mphy = dev->mt76.phys[r->band_idx];
346 
347 	if (!mphy)
348 		return;
349 
350 	if (r->band_idx == MT_RX_SEL2)
351 		cfg80211_background_radar_event(mphy->hw->wiphy,
352 						&dev->rdd2_chandef,
353 						GFP_ATOMIC);
354 	else
355 		ieee80211_radar_detected(mphy->hw);
356 	dev->hw_pattern++;
357 }
358 
359 static void
360 mt7996_mcu_rx_log_message(struct mt7996_dev *dev, struct sk_buff *skb)
361 {
362 #define UNI_EVENT_FW_LOG_FORMAT 0
363 	struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data;
364 	const char *data = (char *)&rxd[1] + 4, *type;
365 	struct tlv *tlv = (struct tlv *)data;
366 	int len;
367 
368 	if (!(rxd->option & MCU_UNI_CMD_EVENT)) {
369 		len = skb->len - sizeof(*rxd);
370 		data = (char *)&rxd[1];
371 		goto out;
372 	}
373 
374 	if (le16_to_cpu(tlv->tag) != UNI_EVENT_FW_LOG_FORMAT)
375 		return;
376 
377 	data += sizeof(*tlv) + 4;
378 	len = le16_to_cpu(tlv->len) - sizeof(*tlv) - 4;
379 
380 out:
381 	switch (rxd->s2d_index) {
382 	case 0:
383 		if (mt7996_debugfs_rx_log(dev, data, len))
384 			return;
385 
386 		type = "WM";
387 		break;
388 	case 2:
389 		type = "WA";
390 		break;
391 	default:
392 		type = "unknown";
393 		break;
394 	}
395 
396 	wiphy_info(mt76_hw(dev)->wiphy, "%s: %.*s", type, len, data);
397 }
398 
399 static void
400 mt7996_mcu_cca_finish(void *priv, u8 *mac, struct ieee80211_vif *vif)
401 {
402 	if (!vif->bss_conf.color_change_active)
403 		return;
404 
405 	ieee80211_color_change_finish(vif);
406 }
407 
408 static void
409 mt7996_mcu_ie_countdown(struct mt7996_dev *dev, struct sk_buff *skb)
410 {
411 #define UNI_EVENT_IE_COUNTDOWN_CSA 0
412 #define UNI_EVENT_IE_COUNTDOWN_BCC 1
413 	struct header {
414 		u8 band;
415 		u8 rsv[3];
416 	};
417 	struct mt76_phy *mphy = &dev->mt76.phy;
418 	struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data;
419 	const char *data = (char *)&rxd[1], *tail;
420 	struct header *hdr = (struct header *)data;
421 	struct tlv *tlv = (struct tlv *)(data + 4);
422 
423 	if (hdr->band >= ARRAY_SIZE(dev->mt76.phys))
424 		return;
425 
426 	if (hdr->band && dev->mt76.phys[hdr->band])
427 		mphy = dev->mt76.phys[hdr->band];
428 
429 	tail = skb->data + skb->len;
430 	data += sizeof(struct header);
431 	while (data + sizeof(struct tlv) < tail && le16_to_cpu(tlv->len)) {
432 		switch (le16_to_cpu(tlv->tag)) {
433 		case UNI_EVENT_IE_COUNTDOWN_CSA:
434 			ieee80211_iterate_active_interfaces_atomic(mphy->hw,
435 					IEEE80211_IFACE_ITER_RESUME_ALL,
436 					mt7996_mcu_csa_finish, mphy->hw);
437 			break;
438 		case UNI_EVENT_IE_COUNTDOWN_BCC:
439 			ieee80211_iterate_active_interfaces_atomic(mphy->hw,
440 					IEEE80211_IFACE_ITER_RESUME_ALL,
441 					mt7996_mcu_cca_finish, mphy->hw);
442 			break;
443 		}
444 
445 		data += le16_to_cpu(tlv->len);
446 		tlv = (struct tlv *)data;
447 	}
448 }
449 
450 static void
451 mt7996_mcu_rx_ext_event(struct mt7996_dev *dev, struct sk_buff *skb)
452 {
453 	struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data;
454 
455 	switch (rxd->ext_eid) {
456 	case MCU_EXT_EVENT_FW_LOG_2_HOST:
457 		mt7996_mcu_rx_log_message(dev, skb);
458 		break;
459 	default:
460 		break;
461 	}
462 }
463 
464 static void
465 mt7996_mcu_rx_unsolicited_event(struct mt7996_dev *dev, struct sk_buff *skb)
466 {
467 	struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data;
468 
469 	switch (rxd->eid) {
470 	case MCU_EVENT_EXT:
471 		mt7996_mcu_rx_ext_event(dev, skb);
472 		break;
473 	default:
474 		break;
475 	}
476 	dev_kfree_skb(skb);
477 }
478 
479 static void
480 mt7996_mcu_uni_rx_unsolicited_event(struct mt7996_dev *dev, struct sk_buff *skb)
481 {
482 	struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data;
483 
484 	switch (rxd->eid) {
485 	case MCU_UNI_EVENT_FW_LOG_2_HOST:
486 		mt7996_mcu_rx_log_message(dev, skb);
487 		break;
488 	case MCU_UNI_EVENT_IE_COUNTDOWN:
489 		mt7996_mcu_ie_countdown(dev, skb);
490 		break;
491 	case MCU_UNI_EVENT_RDD_REPORT:
492 		mt7996_mcu_rx_radar_detected(dev, skb);
493 		break;
494 	default:
495 		break;
496 	}
497 	dev_kfree_skb(skb);
498 }
499 
500 void mt7996_mcu_rx_event(struct mt7996_dev *dev, struct sk_buff *skb)
501 {
502 	struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data;
503 
504 	if (rxd->option & MCU_UNI_CMD_UNSOLICITED_EVENT) {
505 		mt7996_mcu_uni_rx_unsolicited_event(dev, skb);
506 		return;
507 	}
508 
509 	/* WA still uses legacy event*/
510 	if (rxd->ext_eid == MCU_EXT_EVENT_FW_LOG_2_HOST ||
511 	    !rxd->seq)
512 		mt7996_mcu_rx_unsolicited_event(dev, skb);
513 	else
514 		mt76_mcu_rx_event(&dev->mt76, skb);
515 }
516 
517 static struct tlv *
518 mt7996_mcu_add_uni_tlv(struct sk_buff *skb, u16 tag, u16 len)
519 {
520 	struct tlv *ptlv, tlv = {
521 		.tag = cpu_to_le16(tag),
522 		.len = cpu_to_le16(len),
523 	};
524 
525 	ptlv = skb_put(skb, len);
526 	memcpy(ptlv, &tlv, sizeof(tlv));
527 
528 	return ptlv;
529 }
530 
531 static void
532 mt7996_mcu_bss_rfch_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,
533 			struct mt7996_phy *phy)
534 {
535 	static const u8 rlm_ch_band[] = {
536 		[NL80211_BAND_2GHZ] = 1,
537 		[NL80211_BAND_5GHZ] = 2,
538 		[NL80211_BAND_6GHZ] = 3,
539 	};
540 	struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
541 	struct bss_rlm_tlv *ch;
542 	struct tlv *tlv;
543 	int freq1 = chandef->center_freq1;
544 
545 	tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RLM, sizeof(*ch));
546 
547 	ch = (struct bss_rlm_tlv *)tlv;
548 	ch->control_channel = chandef->chan->hw_value;
549 	ch->center_chan = ieee80211_frequency_to_channel(freq1);
550 	ch->bw = mt76_connac_chan_bw(chandef);
551 	ch->tx_streams = hweight8(phy->mt76->antenna_mask);
552 	ch->rx_streams = hweight8(phy->mt76->antenna_mask);
553 	ch->band = rlm_ch_band[chandef->chan->band];
554 
555 	if (chandef->width == NL80211_CHAN_WIDTH_80P80) {
556 		int freq2 = chandef->center_freq2;
557 
558 		ch->center_chan2 = ieee80211_frequency_to_channel(freq2);
559 	}
560 }
561 
562 static void
563 mt7996_mcu_bss_ra_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,
564 		      struct mt7996_phy *phy)
565 {
566 	struct bss_ra_tlv *ra;
567 	struct tlv *tlv;
568 
569 	tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RA, sizeof(*ra));
570 
571 	ra = (struct bss_ra_tlv *)tlv;
572 	ra->short_preamble = true;
573 }
574 
575 static void
576 mt7996_mcu_bss_he_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,
577 		      struct mt7996_phy *phy)
578 {
579 #define DEFAULT_HE_PE_DURATION		4
580 #define DEFAULT_HE_DURATION_RTS_THRES	1023
581 	const struct ieee80211_sta_he_cap *cap;
582 	struct bss_info_uni_he *he;
583 	struct tlv *tlv;
584 
585 	cap = mt76_connac_get_he_phy_cap(phy->mt76, vif);
586 
587 	tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_HE_BASIC, sizeof(*he));
588 
589 	he = (struct bss_info_uni_he *)tlv;
590 	he->he_pe_duration = vif->bss_conf.htc_trig_based_pkt_ext;
591 	if (!he->he_pe_duration)
592 		he->he_pe_duration = DEFAULT_HE_PE_DURATION;
593 
594 	he->he_rts_thres = cpu_to_le16(vif->bss_conf.frame_time_rts_th);
595 	if (!he->he_rts_thres)
596 		he->he_rts_thres = cpu_to_le16(DEFAULT_HE_DURATION_RTS_THRES);
597 
598 	he->max_nss_mcs[CMD_HE_MCS_BW80] = cap->he_mcs_nss_supp.tx_mcs_80;
599 	he->max_nss_mcs[CMD_HE_MCS_BW160] = cap->he_mcs_nss_supp.tx_mcs_160;
600 	he->max_nss_mcs[CMD_HE_MCS_BW8080] = cap->he_mcs_nss_supp.tx_mcs_80p80;
601 }
602 
603 static void
604 mt7996_mcu_bss_bmc_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,
605 		       struct mt7996_phy *phy)
606 {
607 	struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
608 	struct bss_rate_tlv *bmc;
609 	struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
610 	enum nl80211_band band = chandef->chan->band;
611 	struct tlv *tlv;
612 	u8 idx = mvif->mcast_rates_idx ?
613 		 mvif->mcast_rates_idx : mvif->basic_rates_idx;
614 
615 	tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RATE, sizeof(*bmc));
616 
617 	bmc = (struct bss_rate_tlv *)tlv;
618 
619 	bmc->short_preamble = (band == NL80211_BAND_2GHZ);
620 	bmc->bc_fixed_rate = idx;
621 	bmc->mc_fixed_rate = idx;
622 }
623 
624 static void
625 mt7996_mcu_bss_txcmd_tlv(struct sk_buff *skb, bool en)
626 {
627 	struct bss_txcmd_tlv *txcmd;
628 	struct tlv *tlv;
629 
630 	tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_TXCMD, sizeof(*txcmd));
631 
632 	txcmd = (struct bss_txcmd_tlv *)tlv;
633 	txcmd->txcmd_mode = en;
634 }
635 
636 static void
637 mt7996_mcu_bss_mld_tlv(struct sk_buff *skb, struct ieee80211_vif *vif)
638 {
639 	struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
640 	struct bss_mld_tlv *mld;
641 	struct tlv *tlv;
642 
643 	tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_MLD, sizeof(*mld));
644 
645 	mld = (struct bss_mld_tlv *)tlv;
646 	mld->group_mld_id = 0xff;
647 	mld->own_mld_id = mvif->mt76.idx;
648 	mld->remap_idx = 0xff;
649 }
650 
651 static void
652 mt7996_mcu_bss_sec_tlv(struct sk_buff *skb, struct ieee80211_vif *vif)
653 {
654 	struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
655 	struct bss_sec_tlv *sec;
656 	struct tlv *tlv;
657 
658 	tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_SEC, sizeof(*sec));
659 
660 	sec = (struct bss_sec_tlv *)tlv;
661 	sec->cipher = mvif->cipher;
662 }
663 
664 static int
665 mt7996_mcu_muar_config(struct mt7996_phy *phy, struct ieee80211_vif *vif,
666 		       bool bssid, bool enable)
667 {
668 #define UNI_MUAR_ENTRY 2
669 	struct mt7996_dev *dev = phy->dev;
670 	struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
671 	u32 idx = mvif->mt76.omac_idx - REPEATER_BSSID_START;
672 	const u8 *addr = vif->addr;
673 
674 	struct {
675 		struct {
676 			u8 band;
677 			u8 __rsv[3];
678 		} hdr;
679 
680 		__le16 tag;
681 		__le16 len;
682 
683 		bool smesh;
684 		u8 bssid;
685 		u8 index;
686 		u8 entry_add;
687 		u8 addr[ETH_ALEN];
688 		u8 __rsv[2];
689 	} __packed req = {
690 		.hdr.band = phy->mt76->band_idx,
691 		.tag = cpu_to_le16(UNI_MUAR_ENTRY),
692 		.len = cpu_to_le16(sizeof(req) - sizeof(req.hdr)),
693 		.smesh = false,
694 		.index = idx * 2 + bssid,
695 		.entry_add = true,
696 	};
697 
698 	if (bssid)
699 		addr = vif->bss_conf.bssid;
700 
701 	if (enable)
702 		memcpy(req.addr, addr, ETH_ALEN);
703 
704 	return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(REPT_MUAR), &req,
705 				 sizeof(req), true);
706 }
707 
708 static void
709 mt7996_mcu_bss_ifs_timing_tlv(struct sk_buff *skb, struct ieee80211_vif *vif)
710 {
711 	struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
712 	struct mt7996_phy *phy = mvif->phy;
713 	struct bss_ifs_time_tlv *ifs_time;
714 	struct tlv *tlv;
715 	bool is_2ghz = phy->mt76->chandef.chan->band == NL80211_BAND_2GHZ;
716 
717 	tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_IFS_TIME, sizeof(*ifs_time));
718 
719 	ifs_time = (struct bss_ifs_time_tlv *)tlv;
720 	ifs_time->slot_valid = true;
721 	ifs_time->sifs_valid = true;
722 	ifs_time->rifs_valid = true;
723 	ifs_time->eifs_valid = true;
724 
725 	ifs_time->slot_time = cpu_to_le16(phy->slottime);
726 	ifs_time->sifs_time = cpu_to_le16(10);
727 	ifs_time->rifs_time = cpu_to_le16(2);
728 	ifs_time->eifs_time = cpu_to_le16(is_2ghz ? 78 : 84);
729 
730 	if (is_2ghz) {
731 		ifs_time->eifs_cck_valid = true;
732 		ifs_time->eifs_cck_time = cpu_to_le16(314);
733 	}
734 }
735 
736 static int
737 mt7996_mcu_bss_basic_tlv(struct sk_buff *skb,
738 			 struct ieee80211_vif *vif,
739 			 struct ieee80211_sta *sta,
740 			 struct mt76_phy *phy, u16 wlan_idx,
741 			 bool enable)
742 {
743 	struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
744 	struct cfg80211_chan_def *chandef = &phy->chandef;
745 	struct mt76_connac_bss_basic_tlv *bss;
746 	u32 type = CONNECTION_INFRA_AP;
747 	u16 sta_wlan_idx = wlan_idx;
748 	struct tlv *tlv;
749 	int idx;
750 
751 	switch (vif->type) {
752 	case NL80211_IFTYPE_MESH_POINT:
753 	case NL80211_IFTYPE_AP:
754 	case NL80211_IFTYPE_MONITOR:
755 		break;
756 	case NL80211_IFTYPE_STATION:
757 		if (enable) {
758 			rcu_read_lock();
759 			if (!sta)
760 				sta = ieee80211_find_sta(vif,
761 							 vif->bss_conf.bssid);
762 			/* TODO: enable BSS_INFO_UAPSD & BSS_INFO_PM */
763 			if (sta) {
764 				struct mt76_wcid *wcid;
765 
766 				wcid = (struct mt76_wcid *)sta->drv_priv;
767 				sta_wlan_idx = wcid->idx;
768 			}
769 			rcu_read_unlock();
770 		}
771 		type = CONNECTION_INFRA_STA;
772 		break;
773 	case NL80211_IFTYPE_ADHOC:
774 		type = CONNECTION_IBSS_ADHOC;
775 		break;
776 	default:
777 		WARN_ON(1);
778 		break;
779 	}
780 
781 	tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_BASIC, sizeof(*bss));
782 
783 	bss = (struct mt76_connac_bss_basic_tlv *)tlv;
784 	bss->bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int);
785 	bss->dtim_period = vif->bss_conf.dtim_period;
786 	bss->bmc_tx_wlan_idx = cpu_to_le16(wlan_idx);
787 	bss->sta_idx = cpu_to_le16(sta_wlan_idx);
788 	bss->conn_type = cpu_to_le32(type);
789 	bss->omac_idx = mvif->omac_idx;
790 	bss->band_idx = mvif->band_idx;
791 	bss->wmm_idx = mvif->wmm_idx;
792 	bss->conn_state = !enable;
793 	bss->active = enable;
794 
795 	idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx;
796 	bss->hw_bss_idx = idx;
797 
798 	if (vif->type == NL80211_IFTYPE_MONITOR) {
799 		memcpy(bss->bssid, phy->macaddr, ETH_ALEN);
800 		return 0;
801 	}
802 
803 	memcpy(bss->bssid, vif->bss_conf.bssid, ETH_ALEN);
804 	bss->bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int);
805 	bss->dtim_period = vif->bss_conf.dtim_period;
806 	bss->phymode = mt76_connac_get_phy_mode(phy, vif,
807 						chandef->chan->band, NULL);
808 	bss->phymode_ext = mt76_connac_get_phy_mode_ext(phy, vif,
809 							chandef->chan->band);
810 
811 	return 0;
812 }
813 
814 static struct sk_buff *
815 __mt7996_mcu_alloc_bss_req(struct mt76_dev *dev, struct mt76_vif *mvif, int len)
816 {
817 	struct bss_req_hdr hdr = {
818 		.bss_idx = mvif->idx,
819 	};
820 	struct sk_buff *skb;
821 
822 	skb = mt76_mcu_msg_alloc(dev, NULL, len);
823 	if (!skb)
824 		return ERR_PTR(-ENOMEM);
825 
826 	skb_put_data(skb, &hdr, sizeof(hdr));
827 
828 	return skb;
829 }
830 
831 int mt7996_mcu_add_bss_info(struct mt7996_phy *phy,
832 			    struct ieee80211_vif *vif, int enable)
833 {
834 	struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
835 	struct mt7996_dev *dev = phy->dev;
836 	struct sk_buff *skb;
837 
838 	if (mvif->mt76.omac_idx >= REPEATER_BSSID_START) {
839 		mt7996_mcu_muar_config(phy, vif, false, enable);
840 		mt7996_mcu_muar_config(phy, vif, true, enable);
841 	}
842 
843 	skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76,
844 					 MT7996_BSS_UPDATE_MAX_SIZE);
845 	if (IS_ERR(skb))
846 		return PTR_ERR(skb);
847 
848 	/* bss_basic must be first */
849 	mt7996_mcu_bss_basic_tlv(skb, vif, NULL, phy->mt76,
850 				 mvif->sta.wcid.idx, enable);
851 	mt7996_mcu_bss_sec_tlv(skb, vif);
852 
853 	if (vif->type == NL80211_IFTYPE_MONITOR)
854 		goto out;
855 
856 	if (enable) {
857 		mt7996_mcu_bss_rfch_tlv(skb, vif, phy);
858 		mt7996_mcu_bss_bmc_tlv(skb, vif, phy);
859 		mt7996_mcu_bss_ra_tlv(skb, vif, phy);
860 		mt7996_mcu_bss_txcmd_tlv(skb, true);
861 		mt7996_mcu_bss_ifs_timing_tlv(skb, vif);
862 
863 		if (vif->bss_conf.he_support)
864 			mt7996_mcu_bss_he_tlv(skb, vif, phy);
865 
866 		/* this tag is necessary no matter if the vif is MLD */
867 		mt7996_mcu_bss_mld_tlv(skb, vif);
868 	}
869 out:
870 	return mt76_mcu_skb_send_msg(&dev->mt76, skb,
871 				     MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true);
872 }
873 
874 int mt7996_mcu_set_timing(struct mt7996_phy *phy, struct ieee80211_vif *vif)
875 {
876 	struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
877 	struct mt7996_dev *dev = phy->dev;
878 	struct sk_buff *skb;
879 
880 	skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76,
881 					 MT7996_BSS_UPDATE_MAX_SIZE);
882 	if (IS_ERR(skb))
883 		return PTR_ERR(skb);
884 
885 	mt7996_mcu_bss_ifs_timing_tlv(skb, vif);
886 
887 	return mt76_mcu_skb_send_msg(&dev->mt76, skb,
888 				     MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true);
889 }
890 
891 static int
892 mt7996_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif *mvif,
893 		  struct ieee80211_ampdu_params *params,
894 		  bool enable, bool tx)
895 {
896 	struct mt76_wcid *wcid = (struct mt76_wcid *)params->sta->drv_priv;
897 	struct sta_rec_ba_uni *ba;
898 	struct sk_buff *skb;
899 	struct tlv *tlv;
900 
901 	skb = __mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid,
902 					      MT7996_STA_UPDATE_MAX_SIZE);
903 	if (IS_ERR(skb))
904 		return PTR_ERR(skb);
905 
906 	tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BA, sizeof(*ba));
907 
908 	ba = (struct sta_rec_ba_uni *)tlv;
909 	ba->ba_type = tx ? MT_BA_TYPE_ORIGINATOR : MT_BA_TYPE_RECIPIENT;
910 	ba->winsize = cpu_to_le16(params->buf_size);
911 	ba->ssn = cpu_to_le16(params->ssn);
912 	ba->ba_en = enable << params->tid;
913 	ba->amsdu = params->amsdu;
914 	ba->tid = params->tid;
915 
916 	return mt76_mcu_skb_send_msg(dev, skb,
917 				     MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true);
918 }
919 
920 /** starec & wtbl **/
921 int mt7996_mcu_add_tx_ba(struct mt7996_dev *dev,
922 			 struct ieee80211_ampdu_params *params,
923 			 bool enable)
924 {
925 	struct mt7996_sta *msta = (struct mt7996_sta *)params->sta->drv_priv;
926 	struct mt7996_vif *mvif = msta->vif;
927 
928 	if (enable && !params->amsdu)
929 		msta->wcid.amsdu = false;
930 
931 	return mt7996_mcu_sta_ba(&dev->mt76, &mvif->mt76, params,
932 				 enable, true);
933 }
934 
935 int mt7996_mcu_add_rx_ba(struct mt7996_dev *dev,
936 			 struct ieee80211_ampdu_params *params,
937 			 bool enable)
938 {
939 	struct mt7996_sta *msta = (struct mt7996_sta *)params->sta->drv_priv;
940 	struct mt7996_vif *mvif = msta->vif;
941 
942 	return mt7996_mcu_sta_ba(&dev->mt76, &mvif->mt76, params,
943 				 enable, false);
944 }
945 
946 static void
947 mt7996_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
948 {
949 	struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem;
950 	struct ieee80211_he_mcs_nss_supp mcs_map;
951 	struct sta_rec_he_v2 *he;
952 	struct tlv *tlv;
953 	int i = 0;
954 
955 	if (!sta->deflink.he_cap.has_he)
956 		return;
957 
958 	tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_V2, sizeof(*he));
959 
960 	he = (struct sta_rec_he_v2 *)tlv;
961 	for (i = 0; i < 11; i++) {
962 		if (i < 6)
963 			he->he_mac_cap[i] = elem->mac_cap_info[i];
964 		he->he_phy_cap[i] = elem->phy_cap_info[i];
965 	}
966 
967 	mcs_map = sta->deflink.he_cap.he_mcs_nss_supp;
968 	switch (sta->deflink.bandwidth) {
969 	case IEEE80211_STA_RX_BW_160:
970 		if (elem->phy_cap_info[0] &
971 		    IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G)
972 			mt7996_mcu_set_sta_he_mcs(sta,
973 						  &he->max_nss_mcs[CMD_HE_MCS_BW8080],
974 						  le16_to_cpu(mcs_map.rx_mcs_80p80));
975 
976 		mt7996_mcu_set_sta_he_mcs(sta,
977 					  &he->max_nss_mcs[CMD_HE_MCS_BW160],
978 					  le16_to_cpu(mcs_map.rx_mcs_160));
979 		fallthrough;
980 	default:
981 		mt7996_mcu_set_sta_he_mcs(sta,
982 					  &he->max_nss_mcs[CMD_HE_MCS_BW80],
983 					  le16_to_cpu(mcs_map.rx_mcs_80));
984 		break;
985 	}
986 
987 	he->pkt_ext = 2;
988 }
989 
990 static void
991 mt7996_mcu_sta_he_6g_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
992 {
993 	struct sta_rec_he_6g_capa *he_6g;
994 	struct tlv *tlv;
995 
996 	if (!sta->deflink.he_6ghz_capa.capa)
997 		return;
998 
999 	tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_6G, sizeof(*he_6g));
1000 
1001 	he_6g = (struct sta_rec_he_6g_capa *)tlv;
1002 	he_6g->capa = sta->deflink.he_6ghz_capa.capa;
1003 }
1004 
1005 static void
1006 mt7996_mcu_sta_eht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
1007 {
1008 	struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv;
1009 	struct ieee80211_vif *vif = container_of((void *)msta->vif,
1010 						 struct ieee80211_vif, drv_priv);
1011 	struct ieee80211_eht_mcs_nss_supp *mcs_map;
1012 	struct ieee80211_eht_cap_elem_fixed *elem;
1013 	struct sta_rec_eht *eht;
1014 	struct tlv *tlv;
1015 
1016 	if (!sta->deflink.eht_cap.has_eht)
1017 		return;
1018 
1019 	mcs_map = &sta->deflink.eht_cap.eht_mcs_nss_supp;
1020 	elem = &sta->deflink.eht_cap.eht_cap_elem;
1021 
1022 	tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_EHT, sizeof(*eht));
1023 
1024 	eht = (struct sta_rec_eht *)tlv;
1025 	eht->tid_bitmap = 0xff;
1026 	eht->mac_cap = cpu_to_le16(*(u16 *)elem->mac_cap_info);
1027 	eht->phy_cap = cpu_to_le64(*(u64 *)elem->phy_cap_info);
1028 	eht->phy_cap_ext = cpu_to_le64(elem->phy_cap_info[8]);
1029 
1030 	if (vif->type != NL80211_IFTYPE_STATION &&
1031 	    (sta->deflink.he_cap.he_cap_elem.phy_cap_info[0] &
1032 	     (IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G |
1033 	      IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G |
1034 	      IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G |
1035 	      IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G)) == 0) {
1036 		memcpy(eht->mcs_map_bw20, &mcs_map->only_20mhz,
1037 		       sizeof(eht->mcs_map_bw20));
1038 		return;
1039 	}
1040 
1041 	memcpy(eht->mcs_map_bw80, &mcs_map->bw._80, sizeof(eht->mcs_map_bw80));
1042 	memcpy(eht->mcs_map_bw160, &mcs_map->bw._160, sizeof(eht->mcs_map_bw160));
1043 	memcpy(eht->mcs_map_bw320, &mcs_map->bw._320, sizeof(eht->mcs_map_bw320));
1044 }
1045 
1046 static void
1047 mt7996_mcu_sta_ht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
1048 {
1049 	struct sta_rec_ht *ht;
1050 	struct tlv *tlv;
1051 
1052 	if (!sta->deflink.ht_cap.ht_supported)
1053 		return;
1054 
1055 	tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht));
1056 
1057 	ht = (struct sta_rec_ht *)tlv;
1058 	ht->ht_cap = cpu_to_le16(sta->deflink.ht_cap.cap);
1059 }
1060 
1061 static void
1062 mt7996_mcu_sta_vht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
1063 {
1064 	struct sta_rec_vht *vht;
1065 	struct tlv *tlv;
1066 
1067 	/* For 6G band, this tlv is necessary to let hw work normally */
1068 	if (!sta->deflink.he_6ghz_capa.capa && !sta->deflink.vht_cap.vht_supported)
1069 		return;
1070 
1071 	tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_VHT, sizeof(*vht));
1072 
1073 	vht = (struct sta_rec_vht *)tlv;
1074 	vht->vht_cap = cpu_to_le32(sta->deflink.vht_cap.cap);
1075 	vht->vht_rx_mcs_map = sta->deflink.vht_cap.vht_mcs.rx_mcs_map;
1076 	vht->vht_tx_mcs_map = sta->deflink.vht_cap.vht_mcs.tx_mcs_map;
1077 }
1078 
1079 static void
1080 mt7996_mcu_sta_amsdu_tlv(struct mt7996_dev *dev, struct sk_buff *skb,
1081 			 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1082 {
1083 	struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv;
1084 	struct sta_rec_amsdu *amsdu;
1085 	struct tlv *tlv;
1086 
1087 	if (vif->type != NL80211_IFTYPE_STATION &&
1088 	    vif->type != NL80211_IFTYPE_MESH_POINT &&
1089 	    vif->type != NL80211_IFTYPE_AP)
1090 		return;
1091 
1092 	if (!sta->deflink.agg.max_amsdu_len)
1093 		return;
1094 
1095 	tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu));
1096 	amsdu = (struct sta_rec_amsdu *)tlv;
1097 	amsdu->max_amsdu_num = 8;
1098 	amsdu->amsdu_en = true;
1099 	msta->wcid.amsdu = true;
1100 
1101 	switch (sta->deflink.agg.max_amsdu_len) {
1102 	case IEEE80211_MAX_MPDU_LEN_VHT_11454:
1103 		amsdu->max_mpdu_size =
1104 			IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
1105 		return;
1106 	case IEEE80211_MAX_MPDU_LEN_HT_7935:
1107 	case IEEE80211_MAX_MPDU_LEN_VHT_7991:
1108 		amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991;
1109 		return;
1110 	default:
1111 		amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895;
1112 		return;
1113 	}
1114 }
1115 
1116 static void
1117 mt7996_mcu_sta_muru_tlv(struct mt7996_dev *dev, struct sk_buff *skb,
1118 			struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1119 {
1120 	struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem;
1121 	struct sta_rec_muru *muru;
1122 	struct tlv *tlv;
1123 
1124 	if (vif->type != NL80211_IFTYPE_STATION &&
1125 	    vif->type != NL80211_IFTYPE_AP)
1126 		return;
1127 
1128 	tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_MURU, sizeof(*muru));
1129 
1130 	muru = (struct sta_rec_muru *)tlv;
1131 	muru->cfg.mimo_dl_en = vif->bss_conf.eht_mu_beamformer ||
1132 			       vif->bss_conf.he_mu_beamformer ||
1133 			       vif->bss_conf.vht_mu_beamformer ||
1134 			       vif->bss_conf.vht_mu_beamformee;
1135 	muru->cfg.ofdma_dl_en = true;
1136 
1137 	if (sta->deflink.vht_cap.vht_supported)
1138 		muru->mimo_dl.vht_mu_bfee =
1139 			!!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE);
1140 
1141 	if (!sta->deflink.he_cap.has_he)
1142 		return;
1143 
1144 	muru->mimo_dl.partial_bw_dl_mimo =
1145 		HE_PHY(CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO, elem->phy_cap_info[6]);
1146 
1147 	muru->mimo_ul.full_ul_mimo =
1148 		HE_PHY(CAP2_UL_MU_FULL_MU_MIMO, elem->phy_cap_info[2]);
1149 	muru->mimo_ul.partial_ul_mimo =
1150 		HE_PHY(CAP2_UL_MU_PARTIAL_MU_MIMO, elem->phy_cap_info[2]);
1151 
1152 	muru->ofdma_dl.punc_pream_rx =
1153 		HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]);
1154 	muru->ofdma_dl.he_20m_in_40m_2g =
1155 		HE_PHY(CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G, elem->phy_cap_info[8]);
1156 	muru->ofdma_dl.he_20m_in_160m =
1157 		HE_PHY(CAP8_20MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]);
1158 	muru->ofdma_dl.he_80m_in_160m =
1159 		HE_PHY(CAP8_80MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]);
1160 
1161 	muru->ofdma_ul.t_frame_dur =
1162 		HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]);
1163 	muru->ofdma_ul.mu_cascading =
1164 		HE_MAC(CAP2_MU_CASCADING, elem->mac_cap_info[2]);
1165 	muru->ofdma_ul.uo_ra =
1166 		HE_MAC(CAP3_OFDMA_RA, elem->mac_cap_info[3]);
1167 }
1168 
1169 static inline bool
1170 mt7996_is_ebf_supported(struct mt7996_phy *phy, struct ieee80211_vif *vif,
1171 			struct ieee80211_sta *sta, bool bfee)
1172 {
1173 	int sts = hweight16(phy->mt76->chainmask);
1174 
1175 	if (vif->type != NL80211_IFTYPE_STATION &&
1176 	    vif->type != NL80211_IFTYPE_AP)
1177 		return false;
1178 
1179 	if (!bfee && sts < 2)
1180 		return false;
1181 
1182 	if (sta->deflink.eht_cap.has_eht) {
1183 		struct ieee80211_sta_eht_cap *pc = &sta->deflink.eht_cap;
1184 		struct ieee80211_eht_cap_elem_fixed *pe = &pc->eht_cap_elem;
1185 
1186 		if (bfee)
1187 			return vif->bss_conf.eht_su_beamformee &&
1188 			       EHT_PHY(CAP0_SU_BEAMFORMEE, pe->phy_cap_info[0]);
1189 		else
1190 			return vif->bss_conf.eht_su_beamformer &&
1191 			       EHT_PHY(CAP0_SU_BEAMFORMER, pe->phy_cap_info[0]);
1192 	}
1193 
1194 	if (sta->deflink.he_cap.has_he) {
1195 		struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem;
1196 
1197 		if (bfee)
1198 			return vif->bss_conf.he_su_beamformee &&
1199 			       HE_PHY(CAP3_SU_BEAMFORMER, pe->phy_cap_info[3]);
1200 		else
1201 			return vif->bss_conf.he_su_beamformer &&
1202 			       HE_PHY(CAP4_SU_BEAMFORMEE, pe->phy_cap_info[4]);
1203 	}
1204 
1205 	if (sta->deflink.vht_cap.vht_supported) {
1206 		u32 cap = sta->deflink.vht_cap.cap;
1207 
1208 		if (bfee)
1209 			return vif->bss_conf.vht_su_beamformee &&
1210 			       (cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE);
1211 		else
1212 			return vif->bss_conf.vht_su_beamformer &&
1213 			       (cap & IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE);
1214 	}
1215 
1216 	return false;
1217 }
1218 
1219 static void
1220 mt7996_mcu_sta_sounding_rate(struct sta_rec_bf *bf)
1221 {
1222 	bf->sounding_phy = MT_PHY_TYPE_OFDM;
1223 	bf->ndp_rate = 0;				/* mcs0 */
1224 	bf->ndpa_rate = MT7996_CFEND_RATE_DEFAULT;	/* ofdm 24m */
1225 	bf->rept_poll_rate = MT7996_CFEND_RATE_DEFAULT;	/* ofdm 24m */
1226 }
1227 
1228 static void
1229 mt7996_mcu_sta_bfer_ht(struct ieee80211_sta *sta, struct mt7996_phy *phy,
1230 		       struct sta_rec_bf *bf)
1231 {
1232 	struct ieee80211_mcs_info *mcs = &sta->deflink.ht_cap.mcs;
1233 	u8 n = 0;
1234 
1235 	bf->tx_mode = MT_PHY_TYPE_HT;
1236 
1237 	if ((mcs->tx_params & IEEE80211_HT_MCS_TX_RX_DIFF) &&
1238 	    (mcs->tx_params & IEEE80211_HT_MCS_TX_DEFINED))
1239 		n = FIELD_GET(IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK,
1240 			      mcs->tx_params);
1241 	else if (mcs->rx_mask[3])
1242 		n = 3;
1243 	else if (mcs->rx_mask[2])
1244 		n = 2;
1245 	else if (mcs->rx_mask[1])
1246 		n = 1;
1247 
1248 	bf->nrow = hweight8(phy->mt76->antenna_mask) - 1;
1249 	bf->ncol = min_t(u8, bf->nrow, n);
1250 	bf->ibf_ncol = n;
1251 }
1252 
1253 static void
1254 mt7996_mcu_sta_bfer_vht(struct ieee80211_sta *sta, struct mt7996_phy *phy,
1255 			struct sta_rec_bf *bf, bool explicit)
1256 {
1257 	struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap;
1258 	struct ieee80211_sta_vht_cap *vc = &phy->mt76->sband_5g.sband.vht_cap;
1259 	u16 mcs_map = le16_to_cpu(pc->vht_mcs.rx_mcs_map);
1260 	u8 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map);
1261 	u8 tx_ant = hweight8(phy->mt76->antenna_mask) - 1;
1262 
1263 	bf->tx_mode = MT_PHY_TYPE_VHT;
1264 
1265 	if (explicit) {
1266 		u8 sts, snd_dim;
1267 
1268 		mt7996_mcu_sta_sounding_rate(bf);
1269 
1270 		sts = FIELD_GET(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK,
1271 				pc->cap);
1272 		snd_dim = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK,
1273 				    vc->cap);
1274 		bf->nrow = min_t(u8, min_t(u8, snd_dim, sts), tx_ant);
1275 		bf->ncol = min_t(u8, nss_mcs, bf->nrow);
1276 		bf->ibf_ncol = bf->ncol;
1277 
1278 		if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160)
1279 			bf->nrow = 1;
1280 	} else {
1281 		bf->nrow = tx_ant;
1282 		bf->ncol = min_t(u8, nss_mcs, bf->nrow);
1283 		bf->ibf_ncol = nss_mcs;
1284 
1285 		if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160)
1286 			bf->ibf_nrow = 1;
1287 	}
1288 }
1289 
1290 static void
1291 mt7996_mcu_sta_bfer_he(struct ieee80211_sta *sta, struct ieee80211_vif *vif,
1292 		       struct mt7996_phy *phy, struct sta_rec_bf *bf)
1293 {
1294 	struct ieee80211_sta_he_cap *pc = &sta->deflink.he_cap;
1295 	struct ieee80211_he_cap_elem *pe = &pc->he_cap_elem;
1296 	const struct ieee80211_sta_he_cap *vc =
1297 		mt76_connac_get_he_phy_cap(phy->mt76, vif);
1298 	const struct ieee80211_he_cap_elem *ve = &vc->he_cap_elem;
1299 	u16 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80);
1300 	u8 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map);
1301 	u8 snd_dim, sts;
1302 
1303 	bf->tx_mode = MT_PHY_TYPE_HE_SU;
1304 
1305 	mt7996_mcu_sta_sounding_rate(bf);
1306 
1307 	bf->trigger_su = HE_PHY(CAP6_TRIG_SU_BEAMFORMING_FB,
1308 				pe->phy_cap_info[6]);
1309 	bf->trigger_mu = HE_PHY(CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB,
1310 				pe->phy_cap_info[6]);
1311 	snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK,
1312 			 ve->phy_cap_info[5]);
1313 	sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_MASK,
1314 		     pe->phy_cap_info[4]);
1315 	bf->nrow = min_t(u8, snd_dim, sts);
1316 	bf->ncol = min_t(u8, nss_mcs, bf->nrow);
1317 	bf->ibf_ncol = bf->ncol;
1318 
1319 	if (sta->deflink.bandwidth != IEEE80211_STA_RX_BW_160)
1320 		return;
1321 
1322 	/* go over for 160MHz and 80p80 */
1323 	if (pe->phy_cap_info[0] &
1324 	    IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G) {
1325 		mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_160);
1326 		nss_mcs = mt7996_mcu_get_sta_nss(mcs_map);
1327 
1328 		bf->ncol_gt_bw80 = nss_mcs;
1329 	}
1330 
1331 	if (pe->phy_cap_info[0] &
1332 	    IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) {
1333 		mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80p80);
1334 		nss_mcs = mt7996_mcu_get_sta_nss(mcs_map);
1335 
1336 		if (bf->ncol_gt_bw80)
1337 			bf->ncol_gt_bw80 = min_t(u8, bf->ncol_gt_bw80, nss_mcs);
1338 		else
1339 			bf->ncol_gt_bw80 = nss_mcs;
1340 	}
1341 
1342 	snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK,
1343 			 ve->phy_cap_info[5]);
1344 	sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_MASK,
1345 		     pe->phy_cap_info[4]);
1346 
1347 	bf->nrow_gt_bw80 = min_t(int, snd_dim, sts);
1348 }
1349 
1350 static void
1351 mt7996_mcu_sta_bfer_eht(struct ieee80211_sta *sta, struct ieee80211_vif *vif,
1352 			struct mt7996_phy *phy, struct sta_rec_bf *bf)
1353 {
1354 	struct ieee80211_sta_eht_cap *pc = &sta->deflink.eht_cap;
1355 	struct ieee80211_eht_cap_elem_fixed *pe = &pc->eht_cap_elem;
1356 	struct ieee80211_eht_mcs_nss_supp *eht_nss = &pc->eht_mcs_nss_supp;
1357 	const struct ieee80211_sta_eht_cap *vc =
1358 		mt76_connac_get_eht_phy_cap(phy->mt76, vif);
1359 	const struct ieee80211_eht_cap_elem_fixed *ve = &vc->eht_cap_elem;
1360 	u8 nss_mcs = u8_get_bits(eht_nss->bw._80.rx_tx_mcs9_max_nss,
1361 				 IEEE80211_EHT_MCS_NSS_RX) - 1;
1362 	u8 snd_dim, sts;
1363 
1364 	bf->tx_mode = MT_PHY_TYPE_EHT_MU;
1365 
1366 	mt7996_mcu_sta_sounding_rate(bf);
1367 
1368 	bf->trigger_su = EHT_PHY(CAP3_TRIG_SU_BF_FDBK, pe->phy_cap_info[3]);
1369 	bf->trigger_mu = EHT_PHY(CAP3_TRIG_MU_BF_PART_BW_FDBK, pe->phy_cap_info[3]);
1370 	snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_80MHZ_MASK, ve->phy_cap_info[2]);
1371 	sts = EHT_PHY(CAP0_BEAMFORMEE_SS_80MHZ_MASK, pe->phy_cap_info[0]) +
1372 	      (EHT_PHY(CAP1_BEAMFORMEE_SS_80MHZ_MASK, pe->phy_cap_info[1]) << 1);
1373 	bf->nrow = min_t(u8, snd_dim, sts);
1374 	bf->ncol = min_t(u8, nss_mcs, bf->nrow);
1375 	bf->ibf_ncol = bf->ncol;
1376 
1377 	if (sta->deflink.bandwidth < IEEE80211_STA_RX_BW_160)
1378 		return;
1379 
1380 	switch (sta->deflink.bandwidth) {
1381 	case IEEE80211_STA_RX_BW_160:
1382 		snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_160MHZ_MASK, ve->phy_cap_info[2]);
1383 		sts = EHT_PHY(CAP1_BEAMFORMEE_SS_160MHZ_MASK, pe->phy_cap_info[1]);
1384 		nss_mcs = u8_get_bits(eht_nss->bw._160.rx_tx_mcs9_max_nss,
1385 				      IEEE80211_EHT_MCS_NSS_RX) - 1;
1386 
1387 		bf->nrow_gt_bw80 = min_t(u8, snd_dim, sts);
1388 		bf->ncol_gt_bw80 = nss_mcs;
1389 		break;
1390 	case IEEE80211_STA_RX_BW_320:
1391 		snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_320MHZ_MASK, ve->phy_cap_info[2]) +
1392 			  (EHT_PHY(CAP3_SOUNDING_DIM_320MHZ_MASK,
1393 				   ve->phy_cap_info[3]) << 1);
1394 		sts = EHT_PHY(CAP1_BEAMFORMEE_SS_320MHZ_MASK, pe->phy_cap_info[1]);
1395 		nss_mcs = u8_get_bits(eht_nss->bw._320.rx_tx_mcs9_max_nss,
1396 				      IEEE80211_EHT_MCS_NSS_RX) - 1;
1397 
1398 		bf->nrow_gt_bw80 = min_t(u8, snd_dim, sts) << 4;
1399 		bf->ncol_gt_bw80 = nss_mcs << 4;
1400 		break;
1401 	default:
1402 		break;
1403 	}
1404 }
1405 
1406 static void
1407 mt7996_mcu_sta_bfer_tlv(struct mt7996_dev *dev, struct sk_buff *skb,
1408 			struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1409 {
1410 	struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
1411 	struct mt7996_phy *phy = mvif->phy;
1412 	int tx_ant = hweight8(phy->mt76->chainmask) - 1;
1413 	struct sta_rec_bf *bf;
1414 	struct tlv *tlv;
1415 	const u8 matrix[4][4] = {
1416 		{0, 0, 0, 0},
1417 		{1, 1, 0, 0},	/* 2x1, 2x2, 2x3, 2x4 */
1418 		{2, 4, 4, 0},	/* 3x1, 3x2, 3x3, 3x4 */
1419 		{3, 5, 6, 0}	/* 4x1, 4x2, 4x3, 4x4 */
1420 	};
1421 	bool ebf;
1422 
1423 	if (!(sta->deflink.ht_cap.ht_supported || sta->deflink.he_cap.has_he))
1424 		return;
1425 
1426 	ebf = mt7996_is_ebf_supported(phy, vif, sta, false);
1427 	if (!ebf && !dev->ibf)
1428 		return;
1429 
1430 	tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BF, sizeof(*bf));
1431 	bf = (struct sta_rec_bf *)tlv;
1432 
1433 	/* he/eht: eBF only, in accordance with spec
1434 	 * vht: support eBF and iBF
1435 	 * ht: iBF only, since mac80211 lacks of eBF support
1436 	 */
1437 	if (sta->deflink.eht_cap.has_eht && ebf)
1438 		mt7996_mcu_sta_bfer_eht(sta, vif, phy, bf);
1439 	else if (sta->deflink.he_cap.has_he && ebf)
1440 		mt7996_mcu_sta_bfer_he(sta, vif, phy, bf);
1441 	else if (sta->deflink.vht_cap.vht_supported)
1442 		mt7996_mcu_sta_bfer_vht(sta, phy, bf, ebf);
1443 	else if (sta->deflink.ht_cap.ht_supported)
1444 		mt7996_mcu_sta_bfer_ht(sta, phy, bf);
1445 	else
1446 		return;
1447 
1448 	bf->bf_cap = ebf ? ebf : dev->ibf << 1;
1449 	bf->bw = sta->deflink.bandwidth;
1450 	bf->ibf_dbw = sta->deflink.bandwidth;
1451 	bf->ibf_nrow = tx_ant;
1452 
1453 	if (!ebf && sta->deflink.bandwidth <= IEEE80211_STA_RX_BW_40 && !bf->ncol)
1454 		bf->ibf_timeout = 0x48;
1455 	else
1456 		bf->ibf_timeout = 0x18;
1457 
1458 	if (ebf && bf->nrow != tx_ant)
1459 		bf->mem_20m = matrix[tx_ant][bf->ncol];
1460 	else
1461 		bf->mem_20m = matrix[bf->nrow][bf->ncol];
1462 
1463 	switch (sta->deflink.bandwidth) {
1464 	case IEEE80211_STA_RX_BW_160:
1465 	case IEEE80211_STA_RX_BW_80:
1466 		bf->mem_total = bf->mem_20m * 2;
1467 		break;
1468 	case IEEE80211_STA_RX_BW_40:
1469 		bf->mem_total = bf->mem_20m;
1470 		break;
1471 	case IEEE80211_STA_RX_BW_20:
1472 	default:
1473 		break;
1474 	}
1475 }
1476 
1477 static void
1478 mt7996_mcu_sta_bfee_tlv(struct mt7996_dev *dev, struct sk_buff *skb,
1479 			struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1480 {
1481 	struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
1482 	struct mt7996_phy *phy = mvif->phy;
1483 	int tx_ant = hweight8(phy->mt76->antenna_mask) - 1;
1484 	struct sta_rec_bfee *bfee;
1485 	struct tlv *tlv;
1486 	u8 nrow = 0;
1487 
1488 	if (!(sta->deflink.vht_cap.vht_supported || sta->deflink.he_cap.has_he))
1489 		return;
1490 
1491 	if (!mt7996_is_ebf_supported(phy, vif, sta, true))
1492 		return;
1493 
1494 	tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BFEE, sizeof(*bfee));
1495 	bfee = (struct sta_rec_bfee *)tlv;
1496 
1497 	if (sta->deflink.he_cap.has_he) {
1498 		struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem;
1499 
1500 		nrow = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK,
1501 			      pe->phy_cap_info[5]);
1502 	} else if (sta->deflink.vht_cap.vht_supported) {
1503 		struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap;
1504 
1505 		nrow = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK,
1506 				 pc->cap);
1507 	}
1508 
1509 	/* reply with identity matrix to avoid 2x2 BF negative gain */
1510 	bfee->fb_identity_matrix = (nrow == 1 && tx_ant == 2);
1511 }
1512 
1513 static void
1514 mt7996_mcu_sta_phy_tlv(struct mt7996_dev *dev, struct sk_buff *skb,
1515 		       struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1516 {
1517 	struct sta_rec_phy *phy;
1518 	struct tlv *tlv;
1519 	u8 af = 0, mm = 0;
1520 
1521 	if (!sta->deflink.ht_cap.ht_supported && !sta->deflink.he_6ghz_capa.capa)
1522 		return;
1523 
1524 	tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_PHY, sizeof(*phy));
1525 
1526 	phy = (struct sta_rec_phy *)tlv;
1527 	if (sta->deflink.ht_cap.ht_supported) {
1528 		af = sta->deflink.ht_cap.ampdu_factor;
1529 		mm = sta->deflink.ht_cap.ampdu_density;
1530 	}
1531 
1532 	if (sta->deflink.vht_cap.vht_supported) {
1533 		u8 vht_af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK,
1534 				      sta->deflink.vht_cap.cap);
1535 
1536 		af = max_t(u8, af, vht_af);
1537 	}
1538 
1539 	if (sta->deflink.he_6ghz_capa.capa) {
1540 		af = le16_get_bits(sta->deflink.he_6ghz_capa.capa,
1541 				   IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP);
1542 		mm = le16_get_bits(sta->deflink.he_6ghz_capa.capa,
1543 				   IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START);
1544 	}
1545 
1546 	phy->ampdu = FIELD_PREP(IEEE80211_HT_AMPDU_PARM_FACTOR, af) |
1547 		     FIELD_PREP(IEEE80211_HT_AMPDU_PARM_DENSITY, mm);
1548 	phy->max_ampdu_len = af;
1549 }
1550 
1551 static void
1552 mt7996_mcu_sta_hdrt_tlv(struct mt7996_dev *dev, struct sk_buff *skb)
1553 {
1554 	struct sta_rec_hdrt *hdrt;
1555 	struct tlv *tlv;
1556 
1557 	tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HDRT, sizeof(*hdrt));
1558 
1559 	hdrt = (struct sta_rec_hdrt *)tlv;
1560 	hdrt->hdrt_mode = 1;
1561 }
1562 
1563 static void
1564 mt7996_mcu_sta_hdr_trans_tlv(struct mt7996_dev *dev, struct sk_buff *skb,
1565 			     struct ieee80211_vif *vif,
1566 			     struct ieee80211_sta *sta)
1567 {
1568 	struct sta_rec_hdr_trans *hdr_trans;
1569 	struct mt76_wcid *wcid;
1570 	struct tlv *tlv;
1571 
1572 	tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HDR_TRANS, sizeof(*hdr_trans));
1573 	hdr_trans = (struct sta_rec_hdr_trans *)tlv;
1574 	hdr_trans->dis_rx_hdr_tran = true;
1575 
1576 	if (vif->type == NL80211_IFTYPE_STATION)
1577 		hdr_trans->to_ds = true;
1578 	else
1579 		hdr_trans->from_ds = true;
1580 
1581 	wcid = (struct mt76_wcid *)sta->drv_priv;
1582 	if (!wcid)
1583 		return;
1584 
1585 	hdr_trans->dis_rx_hdr_tran = !test_bit(MT_WCID_FLAG_HDR_TRANS, &wcid->flags);
1586 	if (test_bit(MT_WCID_FLAG_4ADDR, &wcid->flags)) {
1587 		hdr_trans->to_ds = true;
1588 		hdr_trans->from_ds = true;
1589 	}
1590 
1591 	if (vif->type == NL80211_IFTYPE_MESH_POINT) {
1592 		hdr_trans->to_ds = true;
1593 		hdr_trans->from_ds = true;
1594 		hdr_trans->mesh = true;
1595 	}
1596 }
1597 
1598 static enum mcu_mmps_mode
1599 mt7996_mcu_get_mmps_mode(enum ieee80211_smps_mode smps)
1600 {
1601 	switch (smps) {
1602 	case IEEE80211_SMPS_OFF:
1603 		return MCU_MMPS_DISABLE;
1604 	case IEEE80211_SMPS_STATIC:
1605 		return MCU_MMPS_STATIC;
1606 	case IEEE80211_SMPS_DYNAMIC:
1607 		return MCU_MMPS_DYNAMIC;
1608 	default:
1609 		return MCU_MMPS_DISABLE;
1610 	}
1611 }
1612 
1613 int mt7996_mcu_set_fixed_rate_ctrl(struct mt7996_dev *dev,
1614 				   void *data, u16 version)
1615 {
1616 	struct ra_fixed_rate *req;
1617 	struct uni_header hdr;
1618 	struct sk_buff *skb;
1619 	struct tlv *tlv;
1620 	int len;
1621 
1622 	len = sizeof(hdr) + sizeof(*req);
1623 
1624 	skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len);
1625 	if (!skb)
1626 		return -ENOMEM;
1627 
1628 	skb_put_data(skb, &hdr, sizeof(hdr));
1629 
1630 	tlv = mt7996_mcu_add_uni_tlv(skb, UNI_RA_FIXED_RATE, sizeof(*req));
1631 	req = (struct ra_fixed_rate *)tlv;
1632 	req->version = cpu_to_le16(version);
1633 	memcpy(&req->rate, data, sizeof(req->rate));
1634 
1635 	return mt76_mcu_skb_send_msg(&dev->mt76, skb,
1636 				     MCU_WM_UNI_CMD(RA), true);
1637 }
1638 
1639 static void
1640 mt7996_mcu_sta_rate_ctrl_tlv(struct sk_buff *skb, struct mt7996_dev *dev,
1641 			     struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1642 {
1643 	struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
1644 	struct mt76_phy *mphy = mvif->phy->mt76;
1645 	struct cfg80211_chan_def *chandef = &mphy->chandef;
1646 	struct cfg80211_bitrate_mask *mask = &mvif->bitrate_mask;
1647 	enum nl80211_band band = chandef->chan->band;
1648 	struct sta_rec_ra *ra;
1649 	struct tlv *tlv;
1650 	u32 supp_rate = sta->deflink.supp_rates[band];
1651 	u32 cap = sta->wme ? STA_CAP_WMM : 0;
1652 
1653 	tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra));
1654 	ra = (struct sta_rec_ra *)tlv;
1655 
1656 	ra->valid = true;
1657 	ra->auto_rate = true;
1658 	ra->phy_mode = mt76_connac_get_phy_mode(mphy, vif, band, sta);
1659 	ra->channel = chandef->chan->hw_value;
1660 	ra->bw = (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_320) ?
1661 		 CMD_CBW_320MHZ : sta->deflink.bandwidth;
1662 	ra->phy.bw = ra->bw;
1663 	ra->mmps_mode = mt7996_mcu_get_mmps_mode(sta->deflink.smps_mode);
1664 
1665 	if (supp_rate) {
1666 		supp_rate &= mask->control[band].legacy;
1667 		ra->rate_len = hweight32(supp_rate);
1668 
1669 		if (band == NL80211_BAND_2GHZ) {
1670 			ra->supp_mode = MODE_CCK;
1671 			ra->supp_cck_rate = supp_rate & GENMASK(3, 0);
1672 
1673 			if (ra->rate_len > 4) {
1674 				ra->supp_mode |= MODE_OFDM;
1675 				ra->supp_ofdm_rate = supp_rate >> 4;
1676 			}
1677 		} else {
1678 			ra->supp_mode = MODE_OFDM;
1679 			ra->supp_ofdm_rate = supp_rate;
1680 		}
1681 	}
1682 
1683 	if (sta->deflink.ht_cap.ht_supported) {
1684 		ra->supp_mode |= MODE_HT;
1685 		ra->af = sta->deflink.ht_cap.ampdu_factor;
1686 		ra->ht_gf = !!(sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_GRN_FLD);
1687 
1688 		cap |= STA_CAP_HT;
1689 		if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20)
1690 			cap |= STA_CAP_SGI_20;
1691 		if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40)
1692 			cap |= STA_CAP_SGI_40;
1693 		if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_TX_STBC)
1694 			cap |= STA_CAP_TX_STBC;
1695 		if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC)
1696 			cap |= STA_CAP_RX_STBC;
1697 		if (vif->bss_conf.ht_ldpc &&
1698 		    (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING))
1699 			cap |= STA_CAP_LDPC;
1700 
1701 		mt7996_mcu_set_sta_ht_mcs(sta, ra->ht_mcs,
1702 					  mask->control[band].ht_mcs);
1703 		ra->supp_ht_mcs = *(__le32 *)ra->ht_mcs;
1704 	}
1705 
1706 	if (sta->deflink.vht_cap.vht_supported) {
1707 		u8 af;
1708 
1709 		ra->supp_mode |= MODE_VHT;
1710 		af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK,
1711 			       sta->deflink.vht_cap.cap);
1712 		ra->af = max_t(u8, ra->af, af);
1713 
1714 		cap |= STA_CAP_VHT;
1715 		if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80)
1716 			cap |= STA_CAP_VHT_SGI_80;
1717 		if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160)
1718 			cap |= STA_CAP_VHT_SGI_160;
1719 		if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_TXSTBC)
1720 			cap |= STA_CAP_VHT_TX_STBC;
1721 		if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_1)
1722 			cap |= STA_CAP_VHT_RX_STBC;
1723 		if (vif->bss_conf.vht_ldpc &&
1724 		    (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC))
1725 			cap |= STA_CAP_VHT_LDPC;
1726 
1727 		mt7996_mcu_set_sta_vht_mcs(sta, ra->supp_vht_mcs,
1728 					   mask->control[band].vht_mcs);
1729 	}
1730 
1731 	if (sta->deflink.he_cap.has_he) {
1732 		ra->supp_mode |= MODE_HE;
1733 		cap |= STA_CAP_HE;
1734 
1735 		if (sta->deflink.he_6ghz_capa.capa)
1736 			ra->af = le16_get_bits(sta->deflink.he_6ghz_capa.capa,
1737 					       IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP);
1738 	}
1739 	ra->sta_cap = cpu_to_le32(cap);
1740 }
1741 
1742 int mt7996_mcu_add_rate_ctrl(struct mt7996_dev *dev, struct ieee80211_vif *vif,
1743 			     struct ieee80211_sta *sta, bool changed)
1744 {
1745 	struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
1746 	struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv;
1747 	struct sk_buff *skb;
1748 
1749 	skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
1750 					      &msta->wcid,
1751 					      MT7996_STA_UPDATE_MAX_SIZE);
1752 	if (IS_ERR(skb))
1753 		return PTR_ERR(skb);
1754 
1755 	/* firmware rc algorithm refers to sta_rec_he for HE control.
1756 	 * once dev->rc_work changes the settings driver should also
1757 	 * update sta_rec_he here.
1758 	 */
1759 	if (changed)
1760 		mt7996_mcu_sta_he_tlv(skb, sta);
1761 
1762 	/* sta_rec_ra accommodates BW, NSS and only MCS range format
1763 	 * i.e 0-{7,8,9} for VHT.
1764 	 */
1765 	mt7996_mcu_sta_rate_ctrl_tlv(skb, dev, vif, sta);
1766 
1767 	return mt76_mcu_skb_send_msg(&dev->mt76, skb,
1768 				     MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true);
1769 }
1770 
1771 static int
1772 mt7996_mcu_add_group(struct mt7996_dev *dev, struct ieee80211_vif *vif,
1773 		     struct ieee80211_sta *sta)
1774 {
1775 #define MT_STA_BSS_GROUP		1
1776 	struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
1777 	struct mt7996_sta *msta;
1778 	struct {
1779 		u8 __rsv1[4];
1780 
1781 		__le16 tag;
1782 		__le16 len;
1783 		__le16 wlan_idx;
1784 		u8 __rsv2[2];
1785 		__le32 action;
1786 		__le32 val;
1787 		u8 __rsv3[8];
1788 	} __packed req = {
1789 		.tag = cpu_to_le16(UNI_VOW_DRR_CTRL),
1790 		.len = cpu_to_le16(sizeof(req) - 4),
1791 		.action = cpu_to_le32(MT_STA_BSS_GROUP),
1792 		.val = cpu_to_le32(mvif->mt76.idx % 16),
1793 	};
1794 
1795 	msta = sta ? (struct mt7996_sta *)sta->drv_priv : &mvif->sta;
1796 	req.wlan_idx = cpu_to_le16(msta->wcid.idx);
1797 
1798 	return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(VOW), &req,
1799 				 sizeof(req), true);
1800 }
1801 
1802 int mt7996_mcu_add_sta(struct mt7996_dev *dev, struct ieee80211_vif *vif,
1803 		       struct ieee80211_sta *sta, bool enable)
1804 {
1805 	struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
1806 	struct mt7996_sta *msta;
1807 	struct sk_buff *skb;
1808 	int ret;
1809 
1810 	msta = sta ? (struct mt7996_sta *)sta->drv_priv : &mvif->sta;
1811 
1812 	skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
1813 					      &msta->wcid,
1814 					      MT7996_STA_UPDATE_MAX_SIZE);
1815 	if (IS_ERR(skb))
1816 		return PTR_ERR(skb);
1817 
1818 	/* starec basic */
1819 	mt76_connac_mcu_sta_basic_tlv(&dev->mt76, skb, vif, sta, enable,
1820 				      !rcu_access_pointer(dev->mt76.wcid[msta->wcid.idx]));
1821 	if (!enable)
1822 		goto out;
1823 
1824 	/* tag order is in accordance with firmware dependency. */
1825 	if (sta) {
1826 		/* starec phy */
1827 		mt7996_mcu_sta_phy_tlv(dev, skb, vif, sta);
1828 		/* starec hdrt mode */
1829 		mt7996_mcu_sta_hdrt_tlv(dev, skb);
1830 		/* starec bfer */
1831 		mt7996_mcu_sta_bfer_tlv(dev, skb, vif, sta);
1832 		/* starec ht */
1833 		mt7996_mcu_sta_ht_tlv(skb, sta);
1834 		/* starec vht */
1835 		mt7996_mcu_sta_vht_tlv(skb, sta);
1836 		/* starec uapsd */
1837 		mt76_connac_mcu_sta_uapsd(skb, vif, sta);
1838 		/* starec amsdu */
1839 		mt7996_mcu_sta_amsdu_tlv(dev, skb, vif, sta);
1840 		/* starec he */
1841 		mt7996_mcu_sta_he_tlv(skb, sta);
1842 		/* starec he 6g*/
1843 		mt7996_mcu_sta_he_6g_tlv(skb, sta);
1844 		/* starec eht */
1845 		mt7996_mcu_sta_eht_tlv(skb, sta);
1846 		/* starec muru */
1847 		mt7996_mcu_sta_muru_tlv(dev, skb, vif, sta);
1848 		/* starec bfee */
1849 		mt7996_mcu_sta_bfee_tlv(dev, skb, vif, sta);
1850 		/* starec hdr trans */
1851 		mt7996_mcu_sta_hdr_trans_tlv(dev, skb, vif, sta);
1852 	}
1853 
1854 	ret = mt7996_mcu_add_group(dev, vif, sta);
1855 	if (ret) {
1856 		dev_kfree_skb(skb);
1857 		return ret;
1858 	}
1859 out:
1860 	return mt76_mcu_skb_send_msg(&dev->mt76, skb,
1861 				     MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true);
1862 }
1863 
1864 static int
1865 mt7996_mcu_sta_key_tlv(struct mt76_wcid *wcid,
1866 		       struct mt76_connac_sta_key_conf *sta_key_conf,
1867 		       struct sk_buff *skb,
1868 		       struct ieee80211_key_conf *key,
1869 		       enum set_key_cmd cmd)
1870 {
1871 	struct sta_rec_sec_uni *sec;
1872 	struct tlv *tlv;
1873 
1874 	tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_KEY_V2, sizeof(*sec));
1875 	sec = (struct sta_rec_sec_uni *)tlv;
1876 	sec->add = cmd;
1877 
1878 	if (cmd == SET_KEY) {
1879 		struct sec_key_uni *sec_key;
1880 		u8 cipher;
1881 
1882 		cipher = mt76_connac_mcu_get_cipher(key->cipher);
1883 		if (cipher == MCU_CIPHER_NONE)
1884 			return -EOPNOTSUPP;
1885 
1886 		sec_key = &sec->key[0];
1887 		sec_key->cipher_len = sizeof(*sec_key);
1888 
1889 		if (cipher == MCU_CIPHER_BIP_CMAC_128) {
1890 			sec_key->wlan_idx = cpu_to_le16(wcid->idx);
1891 			sec_key->cipher_id = MCU_CIPHER_AES_CCMP;
1892 			sec_key->key_id = sta_key_conf->keyidx;
1893 			sec_key->key_len = 16;
1894 			memcpy(sec_key->key, sta_key_conf->key, 16);
1895 
1896 			sec_key = &sec->key[1];
1897 			sec_key->wlan_idx = cpu_to_le16(wcid->idx);
1898 			sec_key->cipher_id = MCU_CIPHER_BIP_CMAC_128;
1899 			sec_key->cipher_len = sizeof(*sec_key);
1900 			sec_key->key_len = 16;
1901 			memcpy(sec_key->key, key->key, 16);
1902 			sec->n_cipher = 2;
1903 		} else {
1904 			sec_key->wlan_idx = cpu_to_le16(wcid->idx);
1905 			sec_key->cipher_id = cipher;
1906 			sec_key->key_id = key->keyidx;
1907 			sec_key->key_len = key->keylen;
1908 			memcpy(sec_key->key, key->key, key->keylen);
1909 
1910 			if (cipher == MCU_CIPHER_TKIP) {
1911 				/* Rx/Tx MIC keys are swapped */
1912 				memcpy(sec_key->key + 16, key->key + 24, 8);
1913 				memcpy(sec_key->key + 24, key->key + 16, 8);
1914 			}
1915 
1916 			/* store key_conf for BIP batch update */
1917 			if (cipher == MCU_CIPHER_AES_CCMP) {
1918 				memcpy(sta_key_conf->key, key->key, key->keylen);
1919 				sta_key_conf->keyidx = key->keyidx;
1920 			}
1921 
1922 			sec->n_cipher = 1;
1923 		}
1924 	} else {
1925 		sec->n_cipher = 0;
1926 	}
1927 
1928 	return 0;
1929 }
1930 
1931 int mt7996_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif,
1932 		       struct mt76_connac_sta_key_conf *sta_key_conf,
1933 		       struct ieee80211_key_conf *key, int mcu_cmd,
1934 		       struct mt76_wcid *wcid, enum set_key_cmd cmd)
1935 {
1936 	struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
1937 	struct sk_buff *skb;
1938 	int ret;
1939 
1940 	skb = __mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid,
1941 					      MT7996_STA_UPDATE_MAX_SIZE);
1942 	if (IS_ERR(skb))
1943 		return PTR_ERR(skb);
1944 
1945 	ret = mt7996_mcu_sta_key_tlv(wcid, sta_key_conf, skb, key, cmd);
1946 	if (ret)
1947 		return ret;
1948 
1949 	return mt76_mcu_skb_send_msg(dev, skb, mcu_cmd, true);
1950 }
1951 
1952 int mt7996_mcu_add_dev_info(struct mt7996_phy *phy,
1953 			    struct ieee80211_vif *vif, bool enable)
1954 {
1955 	struct mt7996_dev *dev = phy->dev;
1956 	struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
1957 	struct {
1958 		struct req_hdr {
1959 			u8 omac_idx;
1960 			u8 band_idx;
1961 			u8 __rsv[2];
1962 		} __packed hdr;
1963 		struct req_tlv {
1964 			__le16 tag;
1965 			__le16 len;
1966 			u8 active;
1967 			u8 __rsv;
1968 			u8 omac_addr[ETH_ALEN];
1969 		} __packed tlv;
1970 	} data = {
1971 		.hdr = {
1972 			.omac_idx = mvif->mt76.omac_idx,
1973 			.band_idx = mvif->mt76.band_idx,
1974 		},
1975 		.tlv = {
1976 			.tag = cpu_to_le16(DEV_INFO_ACTIVE),
1977 			.len = cpu_to_le16(sizeof(struct req_tlv)),
1978 			.active = enable,
1979 		},
1980 	};
1981 
1982 	if (mvif->mt76.omac_idx >= REPEATER_BSSID_START)
1983 		return mt7996_mcu_muar_config(phy, vif, false, enable);
1984 
1985 	memcpy(data.tlv.omac_addr, vif->addr, ETH_ALEN);
1986 	return mt76_mcu_send_msg(&dev->mt76, MCU_WMWA_UNI_CMD(DEV_INFO_UPDATE),
1987 				 &data, sizeof(data), true);
1988 }
1989 
1990 static void
1991 mt7996_mcu_beacon_cntdwn(struct ieee80211_vif *vif, struct sk_buff *rskb,
1992 			 struct sk_buff *skb,
1993 			 struct ieee80211_mutable_offsets *offs)
1994 {
1995 	struct bss_bcn_cntdwn_tlv *info;
1996 	struct tlv *tlv;
1997 	u16 tag;
1998 
1999 	if (!offs->cntdwn_counter_offs[0])
2000 		return;
2001 
2002 	tag = vif->bss_conf.csa_active ? UNI_BSS_INFO_BCN_CSA : UNI_BSS_INFO_BCN_BCC;
2003 
2004 	tlv = mt7996_mcu_add_uni_tlv(rskb, tag, sizeof(*info));
2005 
2006 	info = (struct bss_bcn_cntdwn_tlv *)tlv;
2007 	info->cnt = skb->data[offs->cntdwn_counter_offs[0]];
2008 }
2009 
2010 static void
2011 mt7996_mcu_beacon_cont(struct mt7996_dev *dev, struct ieee80211_vif *vif,
2012 		       struct sk_buff *rskb, struct sk_buff *skb,
2013 		       struct bss_bcn_content_tlv *bcn,
2014 		       struct ieee80211_mutable_offsets *offs)
2015 {
2016 	struct mt76_wcid *wcid = &dev->mt76.global_wcid;
2017 	u8 *buf;
2018 
2019 	bcn->pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len);
2020 	bcn->tim_ie_pos = cpu_to_le16(offs->tim_offset);
2021 
2022 	if (offs->cntdwn_counter_offs[0]) {
2023 		u16 offset = offs->cntdwn_counter_offs[0];
2024 
2025 		if (vif->bss_conf.csa_active)
2026 			bcn->csa_ie_pos = cpu_to_le16(offset - 4);
2027 		if (vif->bss_conf.color_change_active)
2028 			bcn->bcc_ie_pos = cpu_to_le16(offset - 3);
2029 	}
2030 
2031 	buf = (u8 *)bcn + sizeof(*bcn);
2032 	mt7996_mac_write_txwi(dev, (__le32 *)buf, skb, wcid, NULL, 0, 0,
2033 			      BSS_CHANGED_BEACON);
2034 
2035 	memcpy(buf + MT_TXD_SIZE, skb->data, skb->len);
2036 }
2037 
2038 int mt7996_mcu_add_beacon(struct ieee80211_hw *hw,
2039 			  struct ieee80211_vif *vif, int en)
2040 {
2041 	struct mt7996_dev *dev = mt7996_hw_dev(hw);
2042 	struct mt7996_phy *phy = mt7996_hw_phy(hw);
2043 	struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
2044 	struct ieee80211_mutable_offsets offs;
2045 	struct ieee80211_tx_info *info;
2046 	struct sk_buff *skb, *rskb;
2047 	struct tlv *tlv;
2048 	struct bss_bcn_content_tlv *bcn;
2049 	int len;
2050 
2051 	rskb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76,
2052 					  MT7996_MAX_BSS_OFFLOAD_SIZE);
2053 	if (IS_ERR(rskb))
2054 		return PTR_ERR(rskb);
2055 
2056 	skb = ieee80211_beacon_get_template(hw, vif, &offs, 0);
2057 	if (!skb) {
2058 		dev_kfree_skb(rskb);
2059 		return -EINVAL;
2060 	}
2061 
2062 	if (skb->len > MT7996_MAX_BEACON_SIZE) {
2063 		dev_err(dev->mt76.dev, "Bcn size limit exceed\n");
2064 		dev_kfree_skb(rskb);
2065 		dev_kfree_skb(skb);
2066 		return -EINVAL;
2067 	}
2068 
2069 	info = IEEE80211_SKB_CB(skb);
2070 	info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->mt76->band_idx);
2071 
2072 	len = sizeof(*bcn) + MT_TXD_SIZE + skb->len;
2073 	tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_BCN_CONTENT, len);
2074 	bcn = (struct bss_bcn_content_tlv *)tlv;
2075 	bcn->enable = en;
2076 	if (!en)
2077 		goto out;
2078 
2079 	mt7996_mcu_beacon_cont(dev, vif, rskb, skb, bcn, &offs);
2080 	/* TODO: subtag - 11v MBSSID */
2081 	mt7996_mcu_beacon_cntdwn(vif, rskb, skb, &offs);
2082 out:
2083 	dev_kfree_skb(skb);
2084 	return mt76_mcu_skb_send_msg(&phy->dev->mt76, rskb,
2085 				     MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true);
2086 }
2087 
2088 int mt7996_mcu_beacon_inband_discov(struct mt7996_dev *dev,
2089 				    struct ieee80211_vif *vif, u32 changed)
2090 {
2091 #define OFFLOAD_TX_MODE_SU	BIT(0)
2092 #define OFFLOAD_TX_MODE_MU	BIT(1)
2093 	struct ieee80211_hw *hw = mt76_hw(dev);
2094 	struct mt7996_phy *phy = mt7996_hw_phy(hw);
2095 	struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
2096 	struct cfg80211_chan_def *chandef = &mvif->phy->mt76->chandef;
2097 	enum nl80211_band band = chandef->chan->band;
2098 	struct mt76_wcid *wcid = &dev->mt76.global_wcid;
2099 	struct bss_inband_discovery_tlv *discov;
2100 	struct ieee80211_tx_info *info;
2101 	struct sk_buff *rskb, *skb = NULL;
2102 	struct tlv *tlv;
2103 	u8 *buf, interval;
2104 	int len;
2105 
2106 	if (vif->bss_conf.nontransmitted)
2107 		return 0;
2108 
2109 	rskb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76,
2110 					  MT7996_MAX_BSS_OFFLOAD_SIZE);
2111 	if (IS_ERR(rskb))
2112 		return PTR_ERR(rskb);
2113 
2114 	if (changed & BSS_CHANGED_FILS_DISCOVERY &&
2115 	    vif->bss_conf.fils_discovery.max_interval) {
2116 		interval = vif->bss_conf.fils_discovery.max_interval;
2117 		skb = ieee80211_get_fils_discovery_tmpl(hw, vif);
2118 	} else if (changed & BSS_CHANGED_UNSOL_BCAST_PROBE_RESP &&
2119 		   vif->bss_conf.unsol_bcast_probe_resp_interval) {
2120 		interval = vif->bss_conf.unsol_bcast_probe_resp_interval;
2121 		skb = ieee80211_get_unsol_bcast_probe_resp_tmpl(hw, vif);
2122 	}
2123 
2124 	if (!skb) {
2125 		dev_kfree_skb(rskb);
2126 		return -EINVAL;
2127 	}
2128 
2129 	if (skb->len > MT7996_MAX_BEACON_SIZE) {
2130 		dev_err(dev->mt76.dev, "inband discovery size limit exceed\n");
2131 		dev_kfree_skb(rskb);
2132 		dev_kfree_skb(skb);
2133 		return -EINVAL;
2134 	}
2135 
2136 	info = IEEE80211_SKB_CB(skb);
2137 	info->control.vif = vif;
2138 	info->band = band;
2139 	info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->mt76->band_idx);
2140 
2141 	len = sizeof(*discov) + MT_TXD_SIZE + skb->len;
2142 
2143 	tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_OFFLOAD, len);
2144 
2145 	discov = (struct bss_inband_discovery_tlv *)tlv;
2146 	discov->tx_mode = OFFLOAD_TX_MODE_SU;
2147 	/* 0: UNSOL PROBE RESP, 1: FILS DISCOV */
2148 	discov->tx_type = !!(changed & BSS_CHANGED_FILS_DISCOVERY);
2149 	discov->tx_interval = interval;
2150 	discov->prob_rsp_len = cpu_to_le16(MT_TXD_SIZE + skb->len);
2151 	discov->enable = true;
2152 	discov->wcid = cpu_to_le16(MT7996_WTBL_RESERVED);
2153 
2154 	buf = (u8 *)tlv + sizeof(*discov);
2155 
2156 	mt7996_mac_write_txwi(dev, (__le32 *)buf, skb, wcid, NULL, 0, 0, changed);
2157 
2158 	memcpy(buf + MT_TXD_SIZE, skb->data, skb->len);
2159 
2160 	dev_kfree_skb(skb);
2161 
2162 	return mt76_mcu_skb_send_msg(&dev->mt76, rskb,
2163 				     MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true);
2164 }
2165 
2166 static int mt7996_driver_own(struct mt7996_dev *dev, u8 band)
2167 {
2168 	mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(band), MT_TOP_LPCR_HOST_DRV_OWN);
2169 	if (!mt76_poll_msec(dev, MT_TOP_LPCR_HOST_BAND(band),
2170 			    MT_TOP_LPCR_HOST_FW_OWN_STAT, 0, 500)) {
2171 		dev_err(dev->mt76.dev, "Timeout for driver own\n");
2172 		return -EIO;
2173 	}
2174 
2175 	/* clear irq when the driver own success */
2176 	mt76_wr(dev, MT_TOP_LPCR_HOST_BAND_IRQ_STAT(band),
2177 		MT_TOP_LPCR_HOST_BAND_STAT);
2178 
2179 	return 0;
2180 }
2181 
2182 static u32 mt7996_patch_sec_mode(u32 key_info)
2183 {
2184 	u32 sec = u32_get_bits(key_info, MT7996_PATCH_SEC), key = 0;
2185 
2186 	if (key_info == GENMASK(31, 0) || sec == MT7996_SEC_MODE_PLAIN)
2187 		return 0;
2188 
2189 	if (sec == MT7996_SEC_MODE_AES)
2190 		key = u32_get_bits(key_info, MT7996_PATCH_AES_KEY);
2191 	else
2192 		key = u32_get_bits(key_info, MT7996_PATCH_SCRAMBLE_KEY);
2193 
2194 	return MT7996_SEC_ENCRYPT | MT7996_SEC_IV |
2195 	       u32_encode_bits(key, MT7996_SEC_KEY_IDX);
2196 }
2197 
2198 static int mt7996_load_patch(struct mt7996_dev *dev)
2199 {
2200 	const struct mt7996_patch_hdr *hdr;
2201 	const struct firmware *fw = NULL;
2202 	int i, ret, sem;
2203 
2204 	sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, 1);
2205 	switch (sem) {
2206 	case PATCH_IS_DL:
2207 		return 0;
2208 	case PATCH_NOT_DL_SEM_SUCCESS:
2209 		break;
2210 	default:
2211 		dev_err(dev->mt76.dev, "Failed to get patch semaphore\n");
2212 		return -EAGAIN;
2213 	}
2214 
2215 	ret = request_firmware(&fw, MT7996_ROM_PATCH, dev->mt76.dev);
2216 	if (ret)
2217 		goto out;
2218 
2219 	if (!fw || !fw->data || fw->size < sizeof(*hdr)) {
2220 		dev_err(dev->mt76.dev, "Invalid firmware\n");
2221 		ret = -EINVAL;
2222 		goto out;
2223 	}
2224 
2225 	hdr = (const struct mt7996_patch_hdr *)(fw->data);
2226 
2227 	dev_info(dev->mt76.dev, "HW/SW Version: 0x%x, Build Time: %.16s\n",
2228 		 be32_to_cpu(hdr->hw_sw_ver), hdr->build_date);
2229 
2230 	for (i = 0; i < be32_to_cpu(hdr->desc.n_region); i++) {
2231 		struct mt7996_patch_sec *sec;
2232 		const u8 *dl;
2233 		u32 len, addr, sec_key_idx, mode = DL_MODE_NEED_RSP;
2234 
2235 		sec = (struct mt7996_patch_sec *)(fw->data + sizeof(*hdr) +
2236 						  i * sizeof(*sec));
2237 		if ((be32_to_cpu(sec->type) & PATCH_SEC_TYPE_MASK) !=
2238 		    PATCH_SEC_TYPE_INFO) {
2239 			ret = -EINVAL;
2240 			goto out;
2241 		}
2242 
2243 		addr = be32_to_cpu(sec->info.addr);
2244 		len = be32_to_cpu(sec->info.len);
2245 		sec_key_idx = be32_to_cpu(sec->info.sec_key_idx);
2246 		dl = fw->data + be32_to_cpu(sec->offs);
2247 
2248 		mode |= mt7996_patch_sec_mode(sec_key_idx);
2249 
2250 		ret = mt76_connac_mcu_init_download(&dev->mt76, addr, len,
2251 						    mode);
2252 		if (ret) {
2253 			dev_err(dev->mt76.dev, "Download request failed\n");
2254 			goto out;
2255 		}
2256 
2257 		ret = __mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER),
2258 					       dl, len, 4096);
2259 		if (ret) {
2260 			dev_err(dev->mt76.dev, "Failed to send patch\n");
2261 			goto out;
2262 		}
2263 	}
2264 
2265 	ret = mt76_connac_mcu_start_patch(&dev->mt76);
2266 	if (ret)
2267 		dev_err(dev->mt76.dev, "Failed to start patch\n");
2268 
2269 out:
2270 	sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, 0);
2271 	switch (sem) {
2272 	case PATCH_REL_SEM_SUCCESS:
2273 		break;
2274 	default:
2275 		ret = -EAGAIN;
2276 		dev_err(dev->mt76.dev, "Failed to release patch semaphore\n");
2277 		break;
2278 	}
2279 	release_firmware(fw);
2280 
2281 	return ret;
2282 }
2283 
2284 static int
2285 mt7996_mcu_send_ram_firmware(struct mt7996_dev *dev,
2286 			     const struct mt7996_fw_trailer *hdr,
2287 			     const u8 *data, enum mt7996_ram_type type)
2288 {
2289 	int i, offset = 0;
2290 	u32 override = 0, option = 0;
2291 
2292 	for (i = 0; i < hdr->n_region; i++) {
2293 		const struct mt7996_fw_region *region;
2294 		int err;
2295 		u32 len, addr, mode;
2296 
2297 		region = (const struct mt7996_fw_region *)((const u8 *)hdr -
2298 			 (hdr->n_region - i) * sizeof(*region));
2299 		/* DSP and WA use same mode */
2300 		mode = mt76_connac_mcu_gen_dl_mode(&dev->mt76,
2301 						   region->feature_set,
2302 						   type != MT7996_RAM_TYPE_WM);
2303 		len = le32_to_cpu(region->len);
2304 		addr = le32_to_cpu(region->addr);
2305 
2306 		if (region->feature_set & FW_FEATURE_OVERRIDE_ADDR)
2307 			override = addr;
2308 
2309 		err = mt76_connac_mcu_init_download(&dev->mt76, addr, len,
2310 						    mode);
2311 		if (err) {
2312 			dev_err(dev->mt76.dev, "Download request failed\n");
2313 			return err;
2314 		}
2315 
2316 		err = __mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER),
2317 					       data + offset, len, 4096);
2318 		if (err) {
2319 			dev_err(dev->mt76.dev, "Failed to send firmware.\n");
2320 			return err;
2321 		}
2322 
2323 		offset += len;
2324 	}
2325 
2326 	if (override)
2327 		option |= FW_START_OVERRIDE;
2328 
2329 	if (type == MT7996_RAM_TYPE_WA)
2330 		option |= FW_START_WORKING_PDA_CR4;
2331 	else if (type == MT7996_RAM_TYPE_DSP)
2332 		option |= FW_START_WORKING_PDA_DSP;
2333 
2334 	return mt76_connac_mcu_start_firmware(&dev->mt76, override, option);
2335 }
2336 
2337 static int __mt7996_load_ram(struct mt7996_dev *dev, const char *fw_type,
2338 			     const char *fw_file, enum mt7996_ram_type ram_type)
2339 {
2340 	const struct mt7996_fw_trailer *hdr;
2341 	const struct firmware *fw;
2342 	int ret;
2343 
2344 	ret = request_firmware(&fw, fw_file, dev->mt76.dev);
2345 	if (ret)
2346 		return ret;
2347 
2348 	if (!fw || !fw->data || fw->size < sizeof(*hdr)) {
2349 		dev_err(dev->mt76.dev, "Invalid firmware\n");
2350 		ret = -EINVAL;
2351 		goto out;
2352 	}
2353 
2354 	hdr = (const void *)(fw->data + fw->size - sizeof(*hdr));
2355 	dev_info(dev->mt76.dev, "%s Firmware Version: %.10s, Build Time: %.15s\n",
2356 		 fw_type, hdr->fw_ver, hdr->build_date);
2357 
2358 	ret = mt7996_mcu_send_ram_firmware(dev, hdr, fw->data, ram_type);
2359 	if (ret) {
2360 		dev_err(dev->mt76.dev, "Failed to start %s firmware\n", fw_type);
2361 		goto out;
2362 	}
2363 
2364 	snprintf(dev->mt76.hw->wiphy->fw_version,
2365 		 sizeof(dev->mt76.hw->wiphy->fw_version),
2366 		 "%.10s-%.15s", hdr->fw_ver, hdr->build_date);
2367 
2368 out:
2369 	release_firmware(fw);
2370 
2371 	return ret;
2372 }
2373 
2374 static int mt7996_load_ram(struct mt7996_dev *dev)
2375 {
2376 	int ret;
2377 
2378 	ret = __mt7996_load_ram(dev, "WM", MT7996_FIRMWARE_WM,
2379 				MT7996_RAM_TYPE_WM);
2380 	if (ret)
2381 		return ret;
2382 
2383 	ret = __mt7996_load_ram(dev, "DSP", MT7996_FIRMWARE_DSP,
2384 				MT7996_RAM_TYPE_DSP);
2385 	if (ret)
2386 		return ret;
2387 
2388 	return __mt7996_load_ram(dev, "WA", MT7996_FIRMWARE_WA,
2389 				 MT7996_RAM_TYPE_WA);
2390 }
2391 
2392 static int
2393 mt7996_firmware_state(struct mt7996_dev *dev, bool wa)
2394 {
2395 	u32 state = FIELD_PREP(MT_TOP_MISC_FW_STATE,
2396 			       wa ? FW_STATE_RDY : FW_STATE_FW_DOWNLOAD);
2397 
2398 	if (!mt76_poll_msec(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE,
2399 			    state, 1000)) {
2400 		dev_err(dev->mt76.dev, "Timeout for initializing firmware\n");
2401 		return -EIO;
2402 	}
2403 	return 0;
2404 }
2405 
2406 static int
2407 mt7996_mcu_restart(struct mt76_dev *dev)
2408 {
2409 	struct {
2410 		u8 __rsv1[4];
2411 
2412 		__le16 tag;
2413 		__le16 len;
2414 		u8 power_mode;
2415 		u8 __rsv2[3];
2416 	} __packed req = {
2417 		.tag = cpu_to_le16(UNI_POWER_OFF),
2418 		.len = cpu_to_le16(sizeof(req) - 4),
2419 		.power_mode = 1,
2420 	};
2421 
2422 	return mt76_mcu_send_msg(dev, MCU_WM_UNI_CMD(POWER_CTRL), &req,
2423 				 sizeof(req), false);
2424 }
2425 
2426 static int mt7996_load_firmware(struct mt7996_dev *dev)
2427 {
2428 	int ret;
2429 
2430 	/* make sure fw is download state */
2431 	if (mt7996_firmware_state(dev, false)) {
2432 		/* restart firmware once */
2433 		mt7996_mcu_restart(&dev->mt76);
2434 		ret = mt7996_firmware_state(dev, false);
2435 		if (ret) {
2436 			dev_err(dev->mt76.dev,
2437 				"Firmware is not ready for download\n");
2438 			return ret;
2439 		}
2440 	}
2441 
2442 	ret = mt7996_load_patch(dev);
2443 	if (ret)
2444 		return ret;
2445 
2446 	ret = mt7996_load_ram(dev);
2447 	if (ret)
2448 		return ret;
2449 
2450 	ret = mt7996_firmware_state(dev, true);
2451 	if (ret)
2452 		return ret;
2453 
2454 	mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_FWDL], false);
2455 
2456 	dev_dbg(dev->mt76.dev, "Firmware init done\n");
2457 
2458 	return 0;
2459 }
2460 
2461 int mt7996_mcu_fw_log_2_host(struct mt7996_dev *dev, u8 type, u8 ctrl)
2462 {
2463 	struct {
2464 		u8 _rsv[4];
2465 
2466 		__le16 tag;
2467 		__le16 len;
2468 		u8 ctrl;
2469 		u8 interval;
2470 		u8 _rsv2[2];
2471 	} __packed data = {
2472 		.tag = cpu_to_le16(UNI_WSYS_CONFIG_FW_LOG_CTRL),
2473 		.len = cpu_to_le16(sizeof(data) - 4),
2474 		.ctrl = ctrl,
2475 	};
2476 
2477 	if (type == MCU_FW_LOG_WA)
2478 		return mt76_mcu_send_msg(&dev->mt76, MCU_WA_UNI_CMD(WSYS_CONFIG),
2479 					 &data, sizeof(data), true);
2480 
2481 	return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(WSYS_CONFIG), &data,
2482 				 sizeof(data), true);
2483 }
2484 
2485 int mt7996_mcu_fw_dbg_ctrl(struct mt7996_dev *dev, u32 module, u8 level)
2486 {
2487 	struct {
2488 		u8 _rsv[4];
2489 
2490 		__le16 tag;
2491 		__le16 len;
2492 		__le32 module_idx;
2493 		u8 level;
2494 		u8 _rsv2[3];
2495 	} data = {
2496 		.tag = cpu_to_le16(UNI_WSYS_CONFIG_FW_DBG_CTRL),
2497 		.len = cpu_to_le16(sizeof(data) - 4),
2498 		.module_idx = cpu_to_le32(module),
2499 		.level = level,
2500 	};
2501 
2502 	return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(WSYS_CONFIG), &data,
2503 				 sizeof(data), false);
2504 }
2505 
2506 static int mt7996_mcu_set_mwds(struct mt7996_dev *dev, bool enabled)
2507 {
2508 	struct {
2509 		u8 enable;
2510 		u8 _rsv[3];
2511 	} __packed req = {
2512 		.enable = enabled
2513 	};
2514 
2515 	return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(MWDS_SUPPORT), &req,
2516 				 sizeof(req), false);
2517 }
2518 
2519 static void mt7996_add_rx_airtime_tlv(struct sk_buff *skb, u8 band_idx)
2520 {
2521 	struct vow_rx_airtime *req;
2522 	struct tlv *tlv;
2523 
2524 	tlv = mt7996_mcu_add_uni_tlv(skb, UNI_VOW_RX_AT_AIRTIME_CLR_EN, sizeof(*req));
2525 	req = (struct vow_rx_airtime *)tlv;
2526 	req->enable = true;
2527 	req->band = band_idx;
2528 
2529 	tlv = mt7996_mcu_add_uni_tlv(skb, UNI_VOW_RX_AT_AIRTIME_EN, sizeof(*req));
2530 	req = (struct vow_rx_airtime *)tlv;
2531 	req->enable = true;
2532 	req->band = band_idx;
2533 }
2534 
2535 static int
2536 mt7996_mcu_init_rx_airtime(struct mt7996_dev *dev)
2537 {
2538 	struct uni_header hdr = {};
2539 	struct sk_buff *skb;
2540 	int len, num;
2541 
2542 	num = 2 + 2 * (dev->dbdc_support + dev->tbtc_support);
2543 	len = sizeof(hdr) + num * sizeof(struct vow_rx_airtime);
2544 	skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len);
2545 	if (!skb)
2546 		return -ENOMEM;
2547 
2548 	skb_put_data(skb, &hdr, sizeof(hdr));
2549 
2550 	mt7996_add_rx_airtime_tlv(skb, dev->mt76.phy.band_idx);
2551 
2552 	if (dev->dbdc_support)
2553 		mt7996_add_rx_airtime_tlv(skb, MT_BAND1);
2554 
2555 	if (dev->tbtc_support)
2556 		mt7996_add_rx_airtime_tlv(skb, MT_BAND2);
2557 
2558 	return mt76_mcu_skb_send_msg(&dev->mt76, skb,
2559 				     MCU_WM_UNI_CMD(VOW), true);
2560 }
2561 
2562 int mt7996_mcu_init_firmware(struct mt7996_dev *dev)
2563 {
2564 	int ret;
2565 
2566 	/* force firmware operation mode into normal state,
2567 	 * which should be set before firmware download stage.
2568 	 */
2569 	mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE);
2570 
2571 	ret = mt7996_driver_own(dev, 0);
2572 	if (ret)
2573 		return ret;
2574 	/* set driver own for band1 when two hif exist */
2575 	if (dev->hif2) {
2576 		ret = mt7996_driver_own(dev, 1);
2577 		if (ret)
2578 			return ret;
2579 	}
2580 
2581 	ret = mt7996_load_firmware(dev);
2582 	if (ret)
2583 		return ret;
2584 
2585 	set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state);
2586 	ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0);
2587 	if (ret)
2588 		return ret;
2589 
2590 	ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, 0);
2591 	if (ret)
2592 		return ret;
2593 
2594 	ret = mt7996_mcu_set_mwds(dev, 1);
2595 	if (ret)
2596 		return ret;
2597 
2598 	ret = mt7996_mcu_init_rx_airtime(dev);
2599 	if (ret)
2600 		return ret;
2601 
2602 	return mt7996_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET),
2603 				 MCU_WA_PARAM_RED, 0, 0);
2604 }
2605 
2606 int mt7996_mcu_init(struct mt7996_dev *dev)
2607 {
2608 	static const struct mt76_mcu_ops mt7996_mcu_ops = {
2609 		.headroom = sizeof(struct mt76_connac2_mcu_txd), /* reuse */
2610 		.mcu_skb_send_msg = mt7996_mcu_send_message,
2611 		.mcu_parse_response = mt7996_mcu_parse_response,
2612 	};
2613 
2614 	dev->mt76.mcu_ops = &mt7996_mcu_ops;
2615 
2616 	return mt7996_mcu_init_firmware(dev);
2617 }
2618 
2619 void mt7996_mcu_exit(struct mt7996_dev *dev)
2620 {
2621 	mt7996_mcu_restart(&dev->mt76);
2622 	if (mt7996_firmware_state(dev, false)) {
2623 		dev_err(dev->mt76.dev, "Failed to exit mcu\n");
2624 		goto out;
2625 	}
2626 
2627 	mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(0), MT_TOP_LPCR_HOST_FW_OWN);
2628 	if (dev->hif2)
2629 		mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(1),
2630 			MT_TOP_LPCR_HOST_FW_OWN);
2631 out:
2632 	skb_queue_purge(&dev->mt76.mcu.res_q);
2633 }
2634 
2635 int mt7996_mcu_set_hdr_trans(struct mt7996_dev *dev, bool hdr_trans)
2636 {
2637 	struct {
2638 		u8 __rsv[4];
2639 	} __packed hdr;
2640 	struct hdr_trans_blacklist *req_blacklist;
2641 	struct hdr_trans_en *req_en;
2642 	struct sk_buff *skb;
2643 	struct tlv *tlv;
2644 	int len = MT7996_HDR_TRANS_MAX_SIZE + sizeof(hdr);
2645 
2646 	skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len);
2647 	if (!skb)
2648 		return -ENOMEM;
2649 
2650 	skb_put_data(skb, &hdr, sizeof(hdr));
2651 
2652 	tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_EN, sizeof(*req_en));
2653 	req_en = (struct hdr_trans_en *)tlv;
2654 	req_en->enable = hdr_trans;
2655 
2656 	tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_VLAN,
2657 				     sizeof(struct hdr_trans_vlan));
2658 
2659 	if (hdr_trans) {
2660 		tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_BLACKLIST,
2661 					     sizeof(*req_blacklist));
2662 		req_blacklist = (struct hdr_trans_blacklist *)tlv;
2663 		req_blacklist->enable = 1;
2664 		req_blacklist->type = cpu_to_le16(ETH_P_PAE);
2665 	}
2666 
2667 	return mt76_mcu_skb_send_msg(&dev->mt76, skb,
2668 				     MCU_WM_UNI_CMD(RX_HDR_TRANS), true);
2669 }
2670 
2671 int mt7996_mcu_set_tx(struct mt7996_dev *dev, struct ieee80211_vif *vif)
2672 {
2673 #define MCU_EDCA_AC_PARAM	0
2674 #define WMM_AIFS_SET		BIT(0)
2675 #define WMM_CW_MIN_SET		BIT(1)
2676 #define WMM_CW_MAX_SET		BIT(2)
2677 #define WMM_TXOP_SET		BIT(3)
2678 #define WMM_PARAM_SET		(WMM_AIFS_SET | WMM_CW_MIN_SET | \
2679 				 WMM_CW_MAX_SET | WMM_TXOP_SET)
2680 	struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
2681 	struct {
2682 		u8 bss_idx;
2683 		u8 __rsv[3];
2684 	} __packed hdr = {
2685 		.bss_idx = mvif->mt76.idx,
2686 	};
2687 	struct sk_buff *skb;
2688 	int len = sizeof(hdr) + IEEE80211_NUM_ACS * sizeof(struct edca);
2689 	int ac;
2690 
2691 	skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len);
2692 	if (!skb)
2693 		return -ENOMEM;
2694 
2695 	skb_put_data(skb, &hdr, sizeof(hdr));
2696 
2697 	for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) {
2698 		struct ieee80211_tx_queue_params *q = &mvif->queue_params[ac];
2699 		struct edca *e;
2700 		struct tlv *tlv;
2701 
2702 		tlv = mt7996_mcu_add_uni_tlv(skb, MCU_EDCA_AC_PARAM, sizeof(*e));
2703 
2704 		e = (struct edca *)tlv;
2705 		e->set = WMM_PARAM_SET;
2706 		e->queue = ac;
2707 		e->aifs = q->aifs;
2708 		e->txop = cpu_to_le16(q->txop);
2709 
2710 		if (q->cw_min)
2711 			e->cw_min = fls(q->cw_min);
2712 		else
2713 			e->cw_min = 5;
2714 
2715 		if (q->cw_max)
2716 			e->cw_max = fls(q->cw_max);
2717 		else
2718 			e->cw_max = 10;
2719 	}
2720 
2721 	return mt76_mcu_skb_send_msg(&dev->mt76, skb,
2722 				     MCU_WM_UNI_CMD(EDCA_UPDATE), true);
2723 }
2724 
2725 int mt7996_mcu_set_fcc5_lpn(struct mt7996_dev *dev, int val)
2726 {
2727 	struct {
2728 		u8 _rsv[4];
2729 
2730 		__le16 tag;
2731 		__le16 len;
2732 
2733 		__le32 ctrl;
2734 		__le16 min_lpn;
2735 		u8 rsv[2];
2736 	} __packed req = {
2737 		.tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH),
2738 		.len = cpu_to_le16(sizeof(req) - 4),
2739 
2740 		.ctrl = cpu_to_le32(0x1),
2741 		.min_lpn = cpu_to_le16(val),
2742 	};
2743 
2744 	return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL),
2745 				 &req, sizeof(req), true);
2746 }
2747 
2748 int mt7996_mcu_set_pulse_th(struct mt7996_dev *dev,
2749 			    const struct mt7996_dfs_pulse *pulse)
2750 {
2751 	struct {
2752 		u8 _rsv[4];
2753 
2754 		__le16 tag;
2755 		__le16 len;
2756 
2757 		__le32 ctrl;
2758 
2759 		__le32 max_width;		/* us */
2760 		__le32 max_pwr;			/* dbm */
2761 		__le32 min_pwr;			/* dbm */
2762 		__le32 min_stgr_pri;		/* us */
2763 		__le32 max_stgr_pri;		/* us */
2764 		__le32 min_cr_pri;		/* us */
2765 		__le32 max_cr_pri;		/* us */
2766 	} __packed req = {
2767 		.tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH),
2768 		.len = cpu_to_le16(sizeof(req) - 4),
2769 
2770 		.ctrl = cpu_to_le32(0x3),
2771 
2772 #define __req_field(field) .field = cpu_to_le32(pulse->field)
2773 		__req_field(max_width),
2774 		__req_field(max_pwr),
2775 		__req_field(min_pwr),
2776 		__req_field(min_stgr_pri),
2777 		__req_field(max_stgr_pri),
2778 		__req_field(min_cr_pri),
2779 		__req_field(max_cr_pri),
2780 #undef __req_field
2781 	};
2782 
2783 	return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL),
2784 				 &req, sizeof(req), true);
2785 }
2786 
2787 int mt7996_mcu_set_radar_th(struct mt7996_dev *dev, int index,
2788 			    const struct mt7996_dfs_pattern *pattern)
2789 {
2790 	struct {
2791 		u8 _rsv[4];
2792 
2793 		__le16 tag;
2794 		__le16 len;
2795 
2796 		__le32 ctrl;
2797 		__le16 radar_type;
2798 
2799 		u8 enb;
2800 		u8 stgr;
2801 		u8 min_crpn;
2802 		u8 max_crpn;
2803 		u8 min_crpr;
2804 		u8 min_pw;
2805 		__le32 min_pri;
2806 		__le32 max_pri;
2807 		u8 max_pw;
2808 		u8 min_crbn;
2809 		u8 max_crbn;
2810 		u8 min_stgpn;
2811 		u8 max_stgpn;
2812 		u8 min_stgpr;
2813 		u8 rsv[2];
2814 		__le32 min_stgpr_diff;
2815 	} __packed req = {
2816 		.tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH),
2817 		.len = cpu_to_le16(sizeof(req) - 4),
2818 
2819 		.ctrl = cpu_to_le32(0x2),
2820 		.radar_type = cpu_to_le16(index),
2821 
2822 #define __req_field_u8(field) .field = pattern->field
2823 #define __req_field_u32(field) .field = cpu_to_le32(pattern->field)
2824 		__req_field_u8(enb),
2825 		__req_field_u8(stgr),
2826 		__req_field_u8(min_crpn),
2827 		__req_field_u8(max_crpn),
2828 		__req_field_u8(min_crpr),
2829 		__req_field_u8(min_pw),
2830 		__req_field_u32(min_pri),
2831 		__req_field_u32(max_pri),
2832 		__req_field_u8(max_pw),
2833 		__req_field_u8(min_crbn),
2834 		__req_field_u8(max_crbn),
2835 		__req_field_u8(min_stgpn),
2836 		__req_field_u8(max_stgpn),
2837 		__req_field_u8(min_stgpr),
2838 		__req_field_u32(min_stgpr_diff),
2839 #undef __req_field_u8
2840 #undef __req_field_u32
2841 	};
2842 
2843 	return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL),
2844 				 &req, sizeof(req), true);
2845 }
2846 
2847 static int
2848 mt7996_mcu_background_chain_ctrl(struct mt7996_phy *phy,
2849 				 struct cfg80211_chan_def *chandef,
2850 				 int cmd)
2851 {
2852 	struct mt7996_dev *dev = phy->dev;
2853 	struct mt76_phy *mphy = phy->mt76;
2854 	struct ieee80211_channel *chan = mphy->chandef.chan;
2855 	int freq = mphy->chandef.center_freq1;
2856 	struct mt7996_mcu_background_chain_ctrl req = {
2857 		.tag = cpu_to_le16(0),
2858 		.len = cpu_to_le16(sizeof(req) - 4),
2859 		.monitor_scan_type = 2, /* simple rx */
2860 	};
2861 
2862 	if (!chandef && cmd != CH_SWITCH_BACKGROUND_SCAN_STOP)
2863 		return -EINVAL;
2864 
2865 	if (!cfg80211_chandef_valid(&mphy->chandef))
2866 		return -EINVAL;
2867 
2868 	switch (cmd) {
2869 	case CH_SWITCH_BACKGROUND_SCAN_START: {
2870 		req.chan = chan->hw_value;
2871 		req.central_chan = ieee80211_frequency_to_channel(freq);
2872 		req.bw = mt76_connac_chan_bw(&mphy->chandef);
2873 		req.monitor_chan = chandef->chan->hw_value;
2874 		req.monitor_central_chan =
2875 			ieee80211_frequency_to_channel(chandef->center_freq1);
2876 		req.monitor_bw = mt76_connac_chan_bw(chandef);
2877 		req.band_idx = phy->mt76->band_idx;
2878 		req.scan_mode = 1;
2879 		break;
2880 	}
2881 	case CH_SWITCH_BACKGROUND_SCAN_RUNNING:
2882 		req.monitor_chan = chandef->chan->hw_value;
2883 		req.monitor_central_chan =
2884 			ieee80211_frequency_to_channel(chandef->center_freq1);
2885 		req.band_idx = phy->mt76->band_idx;
2886 		req.scan_mode = 2;
2887 		break;
2888 	case CH_SWITCH_BACKGROUND_SCAN_STOP:
2889 		req.chan = chan->hw_value;
2890 		req.central_chan = ieee80211_frequency_to_channel(freq);
2891 		req.bw = mt76_connac_chan_bw(&mphy->chandef);
2892 		req.tx_stream = hweight8(mphy->antenna_mask);
2893 		req.rx_stream = mphy->antenna_mask;
2894 		break;
2895 	default:
2896 		return -EINVAL;
2897 	}
2898 	req.band = chandef ? chandef->chan->band == NL80211_BAND_5GHZ : 1;
2899 
2900 	return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(OFFCH_SCAN_CTRL),
2901 				 &req, sizeof(req), false);
2902 }
2903 
2904 int mt7996_mcu_rdd_background_enable(struct mt7996_phy *phy,
2905 				     struct cfg80211_chan_def *chandef)
2906 {
2907 	struct mt7996_dev *dev = phy->dev;
2908 	int err, region;
2909 
2910 	if (!chandef) { /* disable offchain */
2911 		err = mt7996_mcu_rdd_cmd(dev, RDD_STOP, MT_RX_SEL2,
2912 					 0, 0);
2913 		if (err)
2914 			return err;
2915 
2916 		return mt7996_mcu_background_chain_ctrl(phy, NULL,
2917 				CH_SWITCH_BACKGROUND_SCAN_STOP);
2918 	}
2919 
2920 	err = mt7996_mcu_background_chain_ctrl(phy, chandef,
2921 					       CH_SWITCH_BACKGROUND_SCAN_START);
2922 	if (err)
2923 		return err;
2924 
2925 	switch (dev->mt76.region) {
2926 	case NL80211_DFS_ETSI:
2927 		region = 0;
2928 		break;
2929 	case NL80211_DFS_JP:
2930 		region = 2;
2931 		break;
2932 	case NL80211_DFS_FCC:
2933 	default:
2934 		region = 1;
2935 		break;
2936 	}
2937 
2938 	return mt7996_mcu_rdd_cmd(dev, RDD_START, MT_RX_SEL2,
2939 				  0, region);
2940 }
2941 
2942 int mt7996_mcu_set_chan_info(struct mt7996_phy *phy, u16 tag)
2943 {
2944 	static const u8 ch_band[] = {
2945 		[NL80211_BAND_2GHZ] = 0,
2946 		[NL80211_BAND_5GHZ] = 1,
2947 		[NL80211_BAND_6GHZ] = 2,
2948 	};
2949 	struct mt7996_dev *dev = phy->dev;
2950 	struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
2951 	int freq1 = chandef->center_freq1;
2952 	u8 band_idx = phy->mt76->band_idx;
2953 	struct {
2954 		/* fixed field */
2955 		u8 __rsv[4];
2956 
2957 		__le16 tag;
2958 		__le16 len;
2959 		u8 control_ch;
2960 		u8 center_ch;
2961 		u8 bw;
2962 		u8 tx_path_num;
2963 		u8 rx_path;	/* mask or num */
2964 		u8 switch_reason;
2965 		u8 band_idx;
2966 		u8 center_ch2;	/* for 80+80 only */
2967 		__le16 cac_case;
2968 		u8 channel_band;
2969 		u8 rsv0;
2970 		__le32 outband_freq;
2971 		u8 txpower_drop;
2972 		u8 ap_bw;
2973 		u8 ap_center_ch;
2974 		u8 rsv1[53];
2975 	} __packed req = {
2976 		.tag = cpu_to_le16(tag),
2977 		.len = cpu_to_le16(sizeof(req) - 4),
2978 		.control_ch = chandef->chan->hw_value,
2979 		.center_ch = ieee80211_frequency_to_channel(freq1),
2980 		.bw = mt76_connac_chan_bw(chandef),
2981 		.tx_path_num = hweight16(phy->mt76->chainmask),
2982 		.rx_path = phy->mt76->chainmask >> dev->chainshift[band_idx],
2983 		.band_idx = band_idx,
2984 		.channel_band = ch_band[chandef->chan->band],
2985 	};
2986 
2987 	if (phy->mt76->hw->conf.flags & IEEE80211_CONF_MONITOR)
2988 		req.switch_reason = CH_SWITCH_NORMAL;
2989 	else if (phy->mt76->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL ||
2990 		 phy->mt76->hw->conf.flags & IEEE80211_CONF_IDLE)
2991 		req.switch_reason = CH_SWITCH_SCAN_BYPASS_DPD;
2992 	else if (!cfg80211_reg_can_beacon(phy->mt76->hw->wiphy, chandef,
2993 					  NL80211_IFTYPE_AP))
2994 		req.switch_reason = CH_SWITCH_DFS;
2995 	else
2996 		req.switch_reason = CH_SWITCH_NORMAL;
2997 
2998 	if (tag == UNI_CHANNEL_SWITCH)
2999 		req.rx_path = hweight8(req.rx_path);
3000 
3001 	if (chandef->width == NL80211_CHAN_WIDTH_80P80) {
3002 		int freq2 = chandef->center_freq2;
3003 
3004 		req.center_ch2 = ieee80211_frequency_to_channel(freq2);
3005 	}
3006 
3007 	return mt76_mcu_send_msg(&dev->mt76, MCU_WMWA_UNI_CMD(CHANNEL_SWITCH),
3008 				 &req, sizeof(req), true);
3009 }
3010 
3011 static int mt7996_mcu_set_eeprom_flash(struct mt7996_dev *dev)
3012 {
3013 #define MAX_PAGE_IDX_MASK	GENMASK(7, 5)
3014 #define PAGE_IDX_MASK		GENMASK(4, 2)
3015 #define PER_PAGE_SIZE		0x400
3016 	struct mt7996_mcu_eeprom req = {
3017 		.tag = cpu_to_le16(UNI_EFUSE_BUFFER_MODE),
3018 		.buffer_mode = EE_MODE_BUFFER
3019 	};
3020 	u16 eeprom_size = MT7996_EEPROM_SIZE;
3021 	u8 total = DIV_ROUND_UP(eeprom_size, PER_PAGE_SIZE);
3022 	u8 *eep = (u8 *)dev->mt76.eeprom.data;
3023 	int eep_len, i;
3024 
3025 	for (i = 0; i < total; i++, eep += eep_len) {
3026 		struct sk_buff *skb;
3027 		int ret, msg_len;
3028 
3029 		if (i == total - 1 && !!(eeprom_size % PER_PAGE_SIZE))
3030 			eep_len = eeprom_size % PER_PAGE_SIZE;
3031 		else
3032 			eep_len = PER_PAGE_SIZE;
3033 
3034 		msg_len = sizeof(req) + eep_len;
3035 		skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, msg_len);
3036 		if (!skb)
3037 			return -ENOMEM;
3038 
3039 		req.len = cpu_to_le16(msg_len - 4);
3040 		req.format = FIELD_PREP(MAX_PAGE_IDX_MASK, total - 1) |
3041 			     FIELD_PREP(PAGE_IDX_MASK, i) | EE_FORMAT_WHOLE;
3042 		req.buf_len = cpu_to_le16(eep_len);
3043 
3044 		skb_put_data(skb, &req, sizeof(req));
3045 		skb_put_data(skb, eep, eep_len);
3046 
3047 		ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,
3048 					    MCU_WM_UNI_CMD(EFUSE_CTRL), true);
3049 		if (ret)
3050 			return ret;
3051 	}
3052 
3053 	return 0;
3054 }
3055 
3056 int mt7996_mcu_set_eeprom(struct mt7996_dev *dev)
3057 {
3058 	struct mt7996_mcu_eeprom req = {
3059 		.tag = cpu_to_le16(UNI_EFUSE_BUFFER_MODE),
3060 		.len = cpu_to_le16(sizeof(req) - 4),
3061 		.buffer_mode = EE_MODE_EFUSE,
3062 		.format = EE_FORMAT_WHOLE
3063 	};
3064 
3065 	if (dev->flash_mode)
3066 		return mt7996_mcu_set_eeprom_flash(dev);
3067 
3068 	return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(EFUSE_CTRL),
3069 				 &req, sizeof(req), true);
3070 }
3071 
3072 int mt7996_mcu_get_eeprom(struct mt7996_dev *dev, u32 offset)
3073 {
3074 	struct {
3075 		u8 _rsv[4];
3076 
3077 		__le16 tag;
3078 		__le16 len;
3079 		__le32 addr;
3080 		__le32 valid;
3081 		u8 data[16];
3082 	} __packed req = {
3083 		.tag = cpu_to_le16(UNI_EFUSE_ACCESS),
3084 		.len = cpu_to_le16(sizeof(req) - 4),
3085 		.addr = cpu_to_le32(round_down(offset,
3086 				    MT7996_EEPROM_BLOCK_SIZE)),
3087 	};
3088 	struct sk_buff *skb;
3089 	bool valid;
3090 	int ret;
3091 
3092 	ret = mt76_mcu_send_and_get_msg(&dev->mt76,
3093 					MCU_WM_UNI_CMD_QUERY(EFUSE_CTRL),
3094 					&req, sizeof(req), true, &skb);
3095 	if (ret)
3096 		return ret;
3097 
3098 	valid = le32_to_cpu(*(__le32 *)(skb->data + 16));
3099 	if (valid) {
3100 		u32 addr = le32_to_cpu(*(__le32 *)(skb->data + 12));
3101 		u8 *buf = (u8 *)dev->mt76.eeprom.data + addr;
3102 
3103 		skb_pull(skb, 48);
3104 		memcpy(buf, skb->data, MT7996_EEPROM_BLOCK_SIZE);
3105 	}
3106 
3107 	dev_kfree_skb(skb);
3108 
3109 	return 0;
3110 }
3111 
3112 int mt7996_mcu_get_eeprom_free_block(struct mt7996_dev *dev, u8 *block_num)
3113 {
3114 	struct {
3115 		u8 _rsv[4];
3116 
3117 		__le16 tag;
3118 		__le16 len;
3119 		u8 num;
3120 		u8 version;
3121 		u8 die_idx;
3122 		u8 _rsv2;
3123 	} __packed req = {
3124 		.tag = cpu_to_le16(UNI_EFUSE_FREE_BLOCK),
3125 		.len = cpu_to_le16(sizeof(req) - 4),
3126 		.version = 2,
3127 	};
3128 	struct sk_buff *skb;
3129 	int ret;
3130 
3131 	ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WM_UNI_CMD_QUERY(EFUSE_CTRL), &req,
3132 					sizeof(req), true, &skb);
3133 	if (ret)
3134 		return ret;
3135 
3136 	*block_num = *(u8 *)(skb->data + 8);
3137 	dev_kfree_skb(skb);
3138 
3139 	return 0;
3140 }
3141 
3142 int mt7996_mcu_get_chip_config(struct mt7996_dev *dev, u32 *cap)
3143 {
3144 #define NIC_CAP	3
3145 #define UNI_EVENT_CHIP_CONFIG_EFUSE_VERSION	0x21
3146 	struct {
3147 		u8 _rsv[4];
3148 
3149 		__le16 tag;
3150 		__le16 len;
3151 	} __packed req = {
3152 		.tag = cpu_to_le16(NIC_CAP),
3153 		.len = cpu_to_le16(sizeof(req) - 4),
3154 	};
3155 	struct sk_buff *skb;
3156 	u8 *buf;
3157 	int ret;
3158 
3159 	ret = mt76_mcu_send_and_get_msg(&dev->mt76,
3160 					MCU_WM_UNI_CMD_QUERY(CHIP_CONFIG), &req,
3161 					sizeof(req), true, &skb);
3162 	if (ret)
3163 		return ret;
3164 
3165 	/* fixed field */
3166 	skb_pull(skb, 4);
3167 
3168 	buf = skb->data;
3169 	while (buf - skb->data < skb->len) {
3170 		struct tlv *tlv = (struct tlv *)buf;
3171 
3172 		switch (le16_to_cpu(tlv->tag)) {
3173 		case UNI_EVENT_CHIP_CONFIG_EFUSE_VERSION:
3174 			*cap = le32_to_cpu(*(__le32 *)(buf + sizeof(*tlv)));
3175 			break;
3176 		default:
3177 			break;
3178 		}
3179 
3180 		buf += le16_to_cpu(tlv->len);
3181 	}
3182 
3183 	dev_kfree_skb(skb);
3184 
3185 	return 0;
3186 }
3187 
3188 int mt7996_mcu_get_chan_mib_info(struct mt7996_phy *phy, bool chan_switch)
3189 {
3190 	struct {
3191 		struct {
3192 			u8 band;
3193 			u8 __rsv[3];
3194 		} hdr;
3195 		struct {
3196 			__le16 tag;
3197 			__le16 len;
3198 			__le32 offs;
3199 		} data[4];
3200 	} __packed req = {
3201 		.hdr.band = phy->mt76->band_idx,
3202 	};
3203 	/* strict order */
3204 	static const u32 offs[] = {
3205 		UNI_MIB_TX_TIME,
3206 		UNI_MIB_RX_TIME,
3207 		UNI_MIB_OBSS_AIRTIME,
3208 		UNI_MIB_NON_WIFI_TIME,
3209 	};
3210 	struct mt76_channel_state *state = phy->mt76->chan_state;
3211 	struct mt76_channel_state *state_ts = &phy->state_ts;
3212 	struct mt7996_dev *dev = phy->dev;
3213 	struct mt7996_mcu_mib *res;
3214 	struct sk_buff *skb;
3215 	int i, ret;
3216 
3217 	for (i = 0; i < 4; i++) {
3218 		req.data[i].tag = cpu_to_le16(UNI_CMD_MIB_DATA);
3219 		req.data[i].len = cpu_to_le16(sizeof(req.data[i]));
3220 		req.data[i].offs = cpu_to_le32(offs[i]);
3221 	}
3222 
3223 	ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WM_UNI_CMD_QUERY(GET_MIB_INFO),
3224 					&req, sizeof(req), true, &skb);
3225 	if (ret)
3226 		return ret;
3227 
3228 	skb_pull(skb, sizeof(req.hdr));
3229 
3230 	res = (struct mt7996_mcu_mib *)(skb->data);
3231 
3232 	if (chan_switch)
3233 		goto out;
3234 
3235 #define __res_u64(s) le64_to_cpu(res[s].data)
3236 	state->cc_tx += __res_u64(1) - state_ts->cc_tx;
3237 	state->cc_bss_rx += __res_u64(2) - state_ts->cc_bss_rx;
3238 	state->cc_rx += __res_u64(2) + __res_u64(3) - state_ts->cc_rx;
3239 	state->cc_busy += __res_u64(0) + __res_u64(1) + __res_u64(2) + __res_u64(3) -
3240 			  state_ts->cc_busy;
3241 
3242 out:
3243 	state_ts->cc_tx = __res_u64(1);
3244 	state_ts->cc_bss_rx = __res_u64(2);
3245 	state_ts->cc_rx = __res_u64(2) + __res_u64(3);
3246 	state_ts->cc_busy = __res_u64(0) + __res_u64(1) + __res_u64(2) + __res_u64(3);
3247 #undef __res_u64
3248 
3249 	dev_kfree_skb(skb);
3250 
3251 	return 0;
3252 }
3253 
3254 int mt7996_mcu_set_ser(struct mt7996_dev *dev, u8 action, u8 val, u8 band)
3255 {
3256 	struct {
3257 		u8 rsv[4];
3258 
3259 		__le16 tag;
3260 		__le16 len;
3261 
3262 		union {
3263 			struct {
3264 				__le32 mask;
3265 			} __packed set;
3266 
3267 			struct {
3268 				u8 method;
3269 				u8 band;
3270 				u8 rsv2[2];
3271 			} __packed trigger;
3272 		};
3273 	} __packed req = {
3274 		.tag = cpu_to_le16(action),
3275 		.len = cpu_to_le16(sizeof(req) - 4),
3276 	};
3277 
3278 	switch (action) {
3279 	case UNI_CMD_SER_SET:
3280 		req.set.mask = cpu_to_le32(val);
3281 		break;
3282 	case UNI_CMD_SER_TRIGGER:
3283 		req.trigger.method = val;
3284 		req.trigger.band = band;
3285 		break;
3286 	default:
3287 		return -EINVAL;
3288 	}
3289 
3290 	return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SER),
3291 				 &req, sizeof(req), false);
3292 }
3293 
3294 int mt7996_mcu_set_txbf(struct mt7996_dev *dev, u8 action)
3295 {
3296 #define MT7996_BF_MAX_SIZE	sizeof(union bf_tag_tlv)
3297 #define BF_PROCESSING	4
3298 	struct uni_header hdr;
3299 	struct sk_buff *skb;
3300 	struct tlv *tlv;
3301 	int len = sizeof(hdr) + MT7996_BF_MAX_SIZE;
3302 
3303 	memset(&hdr, 0, sizeof(hdr));
3304 
3305 	skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len);
3306 	if (!skb)
3307 		return -ENOMEM;
3308 
3309 	skb_put_data(skb, &hdr, sizeof(hdr));
3310 
3311 	switch (action) {
3312 	case BF_SOUNDING_ON: {
3313 		struct bf_sounding_on *req_snd_on;
3314 
3315 		tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_snd_on));
3316 		req_snd_on = (struct bf_sounding_on *)tlv;
3317 		req_snd_on->snd_mode = BF_PROCESSING;
3318 		break;
3319 	}
3320 	case BF_HW_EN_UPDATE: {
3321 		struct bf_hw_en_status_update *req_hw_en;
3322 
3323 		tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_hw_en));
3324 		req_hw_en = (struct bf_hw_en_status_update *)tlv;
3325 		req_hw_en->ebf = true;
3326 		req_hw_en->ibf = dev->ibf;
3327 		break;
3328 	}
3329 	case BF_MOD_EN_CTRL: {
3330 		struct bf_mod_en_ctrl *req_mod_en;
3331 
3332 		tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_mod_en));
3333 		req_mod_en = (struct bf_mod_en_ctrl *)tlv;
3334 		req_mod_en->bf_num = 3;
3335 		req_mod_en->bf_bitmap = GENMASK(2, 0);
3336 		break;
3337 	}
3338 	default:
3339 		return -EINVAL;
3340 	}
3341 
3342 	return mt76_mcu_skb_send_msg(&dev->mt76, skb, MCU_WM_UNI_CMD(BF), true);
3343 }
3344 
3345 static int
3346 mt7996_mcu_enable_obss_spr(struct mt7996_phy *phy, u16 action, u8 val)
3347 {
3348 	struct mt7996_dev *dev = phy->dev;
3349 	struct {
3350 		u8 band_idx;
3351 		u8 __rsv[3];
3352 
3353 		__le16 tag;
3354 		__le16 len;
3355 
3356 		__le32 val;
3357 	} __packed req = {
3358 		.band_idx = phy->mt76->band_idx,
3359 		.tag = cpu_to_le16(action),
3360 		.len = cpu_to_le16(sizeof(req) - 4),
3361 		.val = cpu_to_le32(val),
3362 	};
3363 
3364 	return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR),
3365 				 &req, sizeof(req), true);
3366 }
3367 
3368 static int
3369 mt7996_mcu_set_obss_spr_pd(struct mt7996_phy *phy,
3370 			   struct ieee80211_he_obss_pd *he_obss_pd)
3371 {
3372 	struct mt7996_dev *dev = phy->dev;
3373 	u8 max_th = 82, non_srg_max_th = 62;
3374 	struct {
3375 		u8 band_idx;
3376 		u8 __rsv[3];
3377 
3378 		__le16 tag;
3379 		__le16 len;
3380 
3381 		u8 pd_th_non_srg;
3382 		u8 pd_th_srg;
3383 		u8 period_offs;
3384 		u8 rcpi_src;
3385 		__le16 obss_pd_min;
3386 		__le16 obss_pd_min_srg;
3387 		u8 resp_txpwr_mode;
3388 		u8 txpwr_restrict_mode;
3389 		u8 txpwr_ref;
3390 		u8 __rsv2[3];
3391 	} __packed req = {
3392 		.band_idx = phy->mt76->band_idx,
3393 		.tag = cpu_to_le16(UNI_CMD_SR_SET_PARAM),
3394 		.len = cpu_to_le16(sizeof(req) - 4),
3395 		.obss_pd_min = cpu_to_le16(max_th),
3396 		.obss_pd_min_srg = cpu_to_le16(max_th),
3397 		.txpwr_restrict_mode = 2,
3398 		.txpwr_ref = 21
3399 	};
3400 	int ret;
3401 
3402 	/* disable firmware dynamical PD asjustment */
3403 	ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_DPD, false);
3404 	if (ret)
3405 		return ret;
3406 
3407 	if (he_obss_pd->sr_ctrl &
3408 	    IEEE80211_HE_SPR_NON_SRG_OBSS_PD_SR_DISALLOWED)
3409 		req.pd_th_non_srg = max_th;
3410 	else if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_NON_SRG_OFFSET_PRESENT)
3411 		req.pd_th_non_srg  = max_th - he_obss_pd->non_srg_max_offset;
3412 	else
3413 		req.pd_th_non_srg  = non_srg_max_th;
3414 
3415 	if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_SRG_INFORMATION_PRESENT)
3416 		req.pd_th_srg = max_th - he_obss_pd->max_offset;
3417 
3418 	return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR),
3419 				 &req, sizeof(req), true);
3420 }
3421 
3422 static int
3423 mt7996_mcu_set_obss_spr_siga(struct mt7996_phy *phy, struct ieee80211_vif *vif,
3424 			     struct ieee80211_he_obss_pd *he_obss_pd)
3425 {
3426 	struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
3427 	struct mt7996_dev *dev = phy->dev;
3428 	u8 omac = mvif->mt76.omac_idx;
3429 	struct {
3430 		u8 band_idx;
3431 		u8 __rsv[3];
3432 
3433 		__le16 tag;
3434 		__le16 len;
3435 
3436 		u8 omac;
3437 		u8 __rsv2[3];
3438 		u8 flag[20];
3439 	} __packed req = {
3440 		.band_idx = phy->mt76->band_idx,
3441 		.tag = cpu_to_le16(UNI_CMD_SR_SET_SIGA),
3442 		.len = cpu_to_le16(sizeof(req) - 4),
3443 		.omac = omac > HW_BSSID_MAX ? omac - 12 : omac,
3444 	};
3445 	int ret;
3446 
3447 	if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_HESIGA_SR_VAL15_ALLOWED)
3448 		req.flag[req.omac] = 0xf;
3449 	else
3450 		return 0;
3451 
3452 	/* switch to normal AP mode */
3453 	ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_MODE, 0);
3454 	if (ret)
3455 		return ret;
3456 
3457 	return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR),
3458 				 &req, sizeof(req), true);
3459 }
3460 
3461 static int
3462 mt7996_mcu_set_obss_spr_bitmap(struct mt7996_phy *phy,
3463 			       struct ieee80211_he_obss_pd *he_obss_pd)
3464 {
3465 	struct mt7996_dev *dev = phy->dev;
3466 	struct {
3467 		u8 band_idx;
3468 		u8 __rsv[3];
3469 
3470 		__le16 tag;
3471 		__le16 len;
3472 
3473 		__le32 color_l[2];
3474 		__le32 color_h[2];
3475 		__le32 bssid_l[2];
3476 		__le32 bssid_h[2];
3477 	} __packed req = {
3478 		.band_idx = phy->mt76->band_idx,
3479 		.tag = cpu_to_le16(UNI_CMD_SR_SET_SRG_BITMAP),
3480 		.len = cpu_to_le16(sizeof(req) - 4),
3481 	};
3482 	u32 bitmap;
3483 
3484 	memcpy(&bitmap, he_obss_pd->bss_color_bitmap, sizeof(bitmap));
3485 	req.color_l[req.band_idx] = cpu_to_le32(bitmap);
3486 
3487 	memcpy(&bitmap, he_obss_pd->bss_color_bitmap + 4, sizeof(bitmap));
3488 	req.color_h[req.band_idx] = cpu_to_le32(bitmap);
3489 
3490 	memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap, sizeof(bitmap));
3491 	req.bssid_l[req.band_idx] = cpu_to_le32(bitmap);
3492 
3493 	memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap + 4, sizeof(bitmap));
3494 	req.bssid_h[req.band_idx] = cpu_to_le32(bitmap);
3495 
3496 	return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), &req,
3497 				 sizeof(req), true);
3498 }
3499 
3500 int mt7996_mcu_add_obss_spr(struct mt7996_phy *phy, struct ieee80211_vif *vif,
3501 			    struct ieee80211_he_obss_pd *he_obss_pd)
3502 {
3503 	int ret;
3504 
3505 	/* enable firmware scene detection algorithms */
3506 	ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_SD,
3507 					 sr_scene_detect);
3508 	if (ret)
3509 		return ret;
3510 
3511 	/* firmware dynamically adjusts PD threshold so skip manual control */
3512 	if (sr_scene_detect && !he_obss_pd->enable)
3513 		return 0;
3514 
3515 	/* enable spatial reuse */
3516 	ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE,
3517 					 he_obss_pd->enable);
3518 	if (ret)
3519 		return ret;
3520 
3521 	if (sr_scene_detect || !he_obss_pd->enable)
3522 		return 0;
3523 
3524 	ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_TX, true);
3525 	if (ret)
3526 		return ret;
3527 
3528 	/* set SRG/non-SRG OBSS PD threshold */
3529 	ret = mt7996_mcu_set_obss_spr_pd(phy, he_obss_pd);
3530 	if (ret)
3531 		return ret;
3532 
3533 	/* Set SR prohibit */
3534 	ret = mt7996_mcu_set_obss_spr_siga(phy, vif, he_obss_pd);
3535 	if (ret)
3536 		return ret;
3537 
3538 	/* set SRG BSS color/BSSID bitmap */
3539 	return mt7996_mcu_set_obss_spr_bitmap(phy, he_obss_pd);
3540 }
3541 
3542 int mt7996_mcu_update_bss_color(struct mt7996_dev *dev, struct ieee80211_vif *vif,
3543 				struct cfg80211_he_bss_color *he_bss_color)
3544 {
3545 	int len = sizeof(struct bss_req_hdr) + sizeof(struct bss_color_tlv);
3546 	struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
3547 	struct bss_color_tlv *bss_color;
3548 	struct sk_buff *skb;
3549 	struct tlv *tlv;
3550 
3551 	skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76, len);
3552 	if (IS_ERR(skb))
3553 		return PTR_ERR(skb);
3554 
3555 	tlv = mt76_connac_mcu_add_tlv(skb, UNI_BSS_INFO_BSS_COLOR,
3556 				      sizeof(*bss_color));
3557 	bss_color = (struct bss_color_tlv *)tlv;
3558 	bss_color->enable = he_bss_color->enabled;
3559 	bss_color->color = he_bss_color->color;
3560 
3561 	return mt76_mcu_skb_send_msg(&dev->mt76, skb,
3562 				     MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true);
3563 }
3564 
3565 #define TWT_AGRT_TRIGGER	BIT(0)
3566 #define TWT_AGRT_ANNOUNCE	BIT(1)
3567 #define TWT_AGRT_PROTECT	BIT(2)
3568 
3569 int mt7996_mcu_twt_agrt_update(struct mt7996_dev *dev,
3570 			       struct mt7996_vif *mvif,
3571 			       struct mt7996_twt_flow *flow,
3572 			       int cmd)
3573 {
3574 	struct {
3575 		/* fixed field */
3576 		u8 bss;
3577 		u8 _rsv[3];
3578 
3579 		__le16 tag;
3580 		__le16 len;
3581 		u8 tbl_idx;
3582 		u8 cmd;
3583 		u8 own_mac_idx;
3584 		u8 flowid; /* 0xff for group id */
3585 		__le16 peer_id; /* specify the peer_id (msb=0)
3586 				 * or group_id (msb=1)
3587 				 */
3588 		u8 duration; /* 256 us */
3589 		u8 bss_idx;
3590 		__le64 start_tsf;
3591 		__le16 mantissa;
3592 		u8 exponent;
3593 		u8 is_ap;
3594 		u8 agrt_params;
3595 		u8 __rsv2[23];
3596 	} __packed req = {
3597 		.tag = cpu_to_le16(UNI_CMD_TWT_ARGT_UPDATE),
3598 		.len = cpu_to_le16(sizeof(req) - 4),
3599 		.tbl_idx = flow->table_id,
3600 		.cmd = cmd,
3601 		.own_mac_idx = mvif->mt76.omac_idx,
3602 		.flowid = flow->id,
3603 		.peer_id = cpu_to_le16(flow->wcid),
3604 		.duration = flow->duration,
3605 		.bss = mvif->mt76.idx,
3606 		.bss_idx = mvif->mt76.idx,
3607 		.start_tsf = cpu_to_le64(flow->tsf),
3608 		.mantissa = flow->mantissa,
3609 		.exponent = flow->exp,
3610 		.is_ap = true,
3611 	};
3612 
3613 	if (flow->protection)
3614 		req.agrt_params |= TWT_AGRT_PROTECT;
3615 	if (!flow->flowtype)
3616 		req.agrt_params |= TWT_AGRT_ANNOUNCE;
3617 	if (flow->trigger)
3618 		req.agrt_params |= TWT_AGRT_TRIGGER;
3619 
3620 	return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(TWT),
3621 				 &req, sizeof(req), true);
3622 }
3623 
3624 int mt7996_mcu_set_rts_thresh(struct mt7996_phy *phy, u32 val)
3625 {
3626 	struct {
3627 		u8 band_idx;
3628 		u8 _rsv[3];
3629 
3630 		__le16 tag;
3631 		__le16 len;
3632 		__le32 len_thresh;
3633 		__le32 pkt_thresh;
3634 	} __packed req = {
3635 		.band_idx = phy->mt76->band_idx,
3636 		.tag = cpu_to_le16(UNI_BAND_CONFIG_RTS_THRESHOLD),
3637 		.len = cpu_to_le16(sizeof(req) - 4),
3638 		.len_thresh = cpu_to_le32(val),
3639 		.pkt_thresh = cpu_to_le32(0x2),
3640 	};
3641 
3642 	return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG),
3643 				 &req, sizeof(req), true);
3644 }
3645 
3646 int mt7996_mcu_set_radio_en(struct mt7996_phy *phy, bool enable)
3647 {
3648 	struct {
3649 		u8 band_idx;
3650 		u8 _rsv[3];
3651 
3652 		__le16 tag;
3653 		__le16 len;
3654 		u8 enable;
3655 		u8 _rsv2[3];
3656 	} __packed req = {
3657 		.band_idx = phy->mt76->band_idx,
3658 		.tag = cpu_to_le16(UNI_BAND_CONFIG_RADIO_ENABLE),
3659 		.len = cpu_to_le16(sizeof(req) - 4),
3660 		.enable = enable,
3661 	};
3662 
3663 	return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG),
3664 				 &req, sizeof(req), true);
3665 }
3666 
3667 int mt7996_mcu_rdd_cmd(struct mt7996_dev *dev, int cmd, u8 index,
3668 		       u8 rx_sel, u8 val)
3669 {
3670 	struct {
3671 		u8 _rsv[4];
3672 
3673 		__le16 tag;
3674 		__le16 len;
3675 
3676 		u8 ctrl;
3677 		u8 rdd_idx;
3678 		u8 rdd_rx_sel;
3679 		u8 val;
3680 		u8 rsv[4];
3681 	} __packed req = {
3682 		.tag = cpu_to_le16(UNI_RDD_CTRL_PARM),
3683 		.len = cpu_to_le16(sizeof(req) - 4),
3684 		.ctrl = cmd,
3685 		.rdd_idx = index,
3686 		.rdd_rx_sel = rx_sel,
3687 		.val = val,
3688 	};
3689 
3690 	return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL),
3691 				 &req, sizeof(req), true);
3692 }
3693 
3694 int mt7996_mcu_wtbl_update_hdr_trans(struct mt7996_dev *dev,
3695 				     struct ieee80211_vif *vif,
3696 				     struct ieee80211_sta *sta)
3697 {
3698 	struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
3699 	struct mt7996_sta *msta;
3700 	struct sk_buff *skb;
3701 
3702 	msta = sta ? (struct mt7996_sta *)sta->drv_priv : &mvif->sta;
3703 
3704 	skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
3705 					      &msta->wcid,
3706 					      MT7996_STA_UPDATE_MAX_SIZE);
3707 	if (IS_ERR(skb))
3708 		return PTR_ERR(skb);
3709 
3710 	/* starec hdr trans */
3711 	mt7996_mcu_sta_hdr_trans_tlv(dev, skb, vif, sta);
3712 	return mt76_mcu_skb_send_msg(&dev->mt76, skb,
3713 				     MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true);
3714 }
3715 
3716 int mt7996_mcu_rf_regval(struct mt7996_dev *dev, u32 regidx, u32 *val, bool set)
3717 {
3718 	struct {
3719 		u8 __rsv1[4];
3720 
3721 		__le16 tag;
3722 		__le16 len;
3723 		__le16 idx;
3724 		u8 __rsv2[2];
3725 		__le32 ofs;
3726 		__le32 data;
3727 	} __packed *res, req = {
3728 		.tag = cpu_to_le16(UNI_CMD_ACCESS_RF_REG_BASIC),
3729 		.len = cpu_to_le16(sizeof(req) - 4),
3730 
3731 		.idx = cpu_to_le16(u32_get_bits(regidx, GENMASK(31, 24))),
3732 		.ofs = cpu_to_le32(u32_get_bits(regidx, GENMASK(23, 0))),
3733 		.data = set ? cpu_to_le32(*val) : 0,
3734 	};
3735 	struct sk_buff *skb;
3736 	int ret;
3737 
3738 	if (set)
3739 		return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(REG_ACCESS),
3740 					 &req, sizeof(req), true);
3741 
3742 	ret = mt76_mcu_send_and_get_msg(&dev->mt76,
3743 					MCU_WM_UNI_CMD_QUERY(REG_ACCESS),
3744 					&req, sizeof(req), true, &skb);
3745 	if (ret)
3746 		return ret;
3747 
3748 	res = (void *)skb->data;
3749 	*val = le32_to_cpu(res->data);
3750 	dev_kfree_skb(skb);
3751 
3752 	return 0;
3753 }
3754 
3755 int mt7996_mcu_trigger_assert(struct mt7996_dev *dev)
3756 {
3757 	struct {
3758 		__le16 tag;
3759 		__le16 len;
3760 		u8 enable;
3761 		u8 rsv[3];
3762 	} __packed req = {
3763 		.len = cpu_to_le16(sizeof(req) - 4),
3764 		.enable = true,
3765 	};
3766 
3767 	return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(ASSERT_DUMP),
3768 				 &req, sizeof(req), false);
3769 }
3770 
3771 int mt7996_mcu_set_rro(struct mt7996_dev *dev, u16 tag, u8 val)
3772 {
3773 	struct {
3774 		u8 __rsv1[4];
3775 
3776 		__le16 tag;
3777 		__le16 len;
3778 
3779 		union {
3780 			struct {
3781 				u8 type;
3782 				u8 __rsv2[3];
3783 			} __packed platform_type;
3784 			struct {
3785 				u8 type;
3786 				u8 dest;
3787 				u8 __rsv2[2];
3788 			} __packed bypass_mode;
3789 			struct {
3790 				u8 path;
3791 				u8 __rsv2[3];
3792 			} __packed txfree_path;
3793 		};
3794 	} __packed req = {
3795 		.tag = cpu_to_le16(tag),
3796 		.len = cpu_to_le16(sizeof(req) - 4),
3797 	};
3798 
3799 	switch (tag) {
3800 	case UNI_RRO_SET_PLATFORM_TYPE:
3801 		req.platform_type.type = val;
3802 		break;
3803 	case UNI_RRO_SET_BYPASS_MODE:
3804 		req.bypass_mode.type = val;
3805 		break;
3806 	case UNI_RRO_SET_TXFREE_PATH:
3807 		req.txfree_path.path = val;
3808 		break;
3809 	default:
3810 		return -EINVAL;
3811 	}
3812 
3813 	return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RRO), &req,
3814 				 sizeof(req), true);
3815 }
3816