1 // SPDX-License-Identifier: ISC
2 /*
3  * Copyright (C) 2022 MediaTek Inc.
4  */
5 
6 #include <linux/etherdevice.h>
7 #include <linux/of.h>
8 #include <linux/thermal.h>
9 #include "mt7996.h"
10 #include "mac.h"
11 #include "mcu.h"
12 #include "coredump.h"
13 #include "eeprom.h"
14 
15 static const struct ieee80211_iface_limit if_limits[] = {
16 	{
17 		.max = 1,
18 		.types = BIT(NL80211_IFTYPE_ADHOC)
19 	}, {
20 		.max = 16,
21 		.types = BIT(NL80211_IFTYPE_AP)
22 #ifdef CONFIG_MAC80211_MESH
23 			 | BIT(NL80211_IFTYPE_MESH_POINT)
24 #endif
25 	}, {
26 		.max = MT7996_MAX_INTERFACES,
27 		.types = BIT(NL80211_IFTYPE_STATION)
28 	}
29 };
30 
31 static const struct ieee80211_iface_combination if_comb[] = {
32 	{
33 		.limits = if_limits,
34 		.n_limits = ARRAY_SIZE(if_limits),
35 		.max_interfaces = MT7996_MAX_INTERFACES,
36 		.num_different_channels = 1,
37 		.beacon_int_infra_match = true,
38 		.radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |
39 				       BIT(NL80211_CHAN_WIDTH_20) |
40 				       BIT(NL80211_CHAN_WIDTH_40) |
41 				       BIT(NL80211_CHAN_WIDTH_80) |
42 				       BIT(NL80211_CHAN_WIDTH_160),
43 	}
44 };
45 
46 static void mt7996_led_set_config(struct led_classdev *led_cdev,
47 				  u8 delay_on, u8 delay_off)
48 {
49 	struct mt7996_dev *dev;
50 	struct mt76_phy *mphy;
51 	u32 val;
52 
53 	mphy = container_of(led_cdev, struct mt76_phy, leds.cdev);
54 	dev = container_of(mphy->dev, struct mt7996_dev, mt76);
55 
56 	/* select TX blink mode, 2: only data frames */
57 	mt76_rmw_field(dev, MT_TMAC_TCR0(0), MT_TMAC_TCR0_TX_BLINK, 2);
58 
59 	/* enable LED */
60 	mt76_wr(dev, MT_LED_EN(0), 1);
61 
62 	/* set LED Tx blink on/off time */
63 	val = FIELD_PREP(MT_LED_TX_BLINK_ON_MASK, delay_on) |
64 	      FIELD_PREP(MT_LED_TX_BLINK_OFF_MASK, delay_off);
65 	mt76_wr(dev, MT_LED_TX_BLINK(0), val);
66 
67 	/* control LED */
68 	val = MT_LED_CTRL_BLINK_MODE | MT_LED_CTRL_KICK;
69 	if (mphy->leds.al)
70 		val |= MT_LED_CTRL_POLARITY;
71 
72 	mt76_wr(dev, MT_LED_CTRL(0), val);
73 	mt76_clear(dev, MT_LED_CTRL(0), MT_LED_CTRL_KICK);
74 }
75 
76 static int mt7996_led_set_blink(struct led_classdev *led_cdev,
77 				unsigned long *delay_on,
78 				unsigned long *delay_off)
79 {
80 	u16 delta_on = 0, delta_off = 0;
81 
82 #define HW_TICK		10
83 #define TO_HW_TICK(_t)	(((_t) > HW_TICK) ? ((_t) / HW_TICK) : HW_TICK)
84 
85 	if (*delay_on)
86 		delta_on = TO_HW_TICK(*delay_on);
87 	if (*delay_off)
88 		delta_off = TO_HW_TICK(*delay_off);
89 
90 	mt7996_led_set_config(led_cdev, delta_on, delta_off);
91 
92 	return 0;
93 }
94 
95 static void mt7996_led_set_brightness(struct led_classdev *led_cdev,
96 				      enum led_brightness brightness)
97 {
98 	if (!brightness)
99 		mt7996_led_set_config(led_cdev, 0, 0xff);
100 	else
101 		mt7996_led_set_config(led_cdev, 0xff, 0);
102 }
103 
104 void mt7996_init_txpower(struct mt7996_dev *dev,
105 			 struct ieee80211_supported_band *sband)
106 {
107 	int i, nss = hweight8(dev->mphy.antenna_mask);
108 	int nss_delta = mt76_tx_power_nss_delta(nss);
109 	int pwr_delta = mt7996_eeprom_get_power_delta(dev, sband->band);
110 	struct mt76_power_limits limits;
111 
112 	for (i = 0; i < sband->n_channels; i++) {
113 		struct ieee80211_channel *chan = &sband->channels[i];
114 		int target_power = mt7996_eeprom_get_target_power(dev, chan);
115 
116 		target_power += pwr_delta;
117 		target_power = mt76_get_rate_power_limits(&dev->mphy, chan,
118 							  &limits,
119 							  target_power);
120 		target_power += nss_delta;
121 		target_power = DIV_ROUND_UP(target_power, 2);
122 		chan->max_power = min_t(int, chan->max_reg_power,
123 					target_power);
124 		chan->orig_mpwr = target_power;
125 	}
126 }
127 
128 static void
129 mt7996_regd_notifier(struct wiphy *wiphy,
130 		     struct regulatory_request *request)
131 {
132 	struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
133 	struct mt7996_dev *dev = mt7996_hw_dev(hw);
134 	struct mt7996_phy *phy = mt7996_hw_phy(hw);
135 
136 	memcpy(dev->mt76.alpha2, request->alpha2, sizeof(dev->mt76.alpha2));
137 	dev->mt76.region = request->dfs_region;
138 
139 	if (dev->mt76.region == NL80211_DFS_UNSET)
140 		mt7996_mcu_rdd_background_enable(phy, NULL);
141 
142 	mt7996_init_txpower(dev, &phy->mt76->sband_2g.sband);
143 	mt7996_init_txpower(dev, &phy->mt76->sband_5g.sband);
144 	mt7996_init_txpower(dev, &phy->mt76->sband_6g.sband);
145 
146 	phy->mt76->dfs_state = MT_DFS_STATE_UNKNOWN;
147 	mt7996_dfs_init_radar_detector(phy);
148 }
149 
150 static void
151 mt7996_init_wiphy(struct ieee80211_hw *hw)
152 {
153 	struct mt7996_phy *phy = mt7996_hw_phy(hw);
154 	struct mt76_dev *mdev = &phy->dev->mt76;
155 	struct wiphy *wiphy = hw->wiphy;
156 	u16 max_subframes = phy->dev->has_eht ? IEEE80211_MAX_AMPDU_BUF_EHT :
157 						IEEE80211_MAX_AMPDU_BUF_HE;
158 
159 	hw->queues = 4;
160 	hw->max_rx_aggregation_subframes = max_subframes;
161 	hw->max_tx_aggregation_subframes = max_subframes;
162 	hw->netdev_features = NETIF_F_RXCSUM;
163 
164 	hw->radiotap_timestamp.units_pos =
165 		IEEE80211_RADIOTAP_TIMESTAMP_UNIT_US;
166 
167 	phy->slottime = 9;
168 
169 	hw->sta_data_size = sizeof(struct mt7996_sta);
170 	hw->vif_data_size = sizeof(struct mt7996_vif);
171 
172 	wiphy->iface_combinations = if_comb;
173 	wiphy->n_iface_combinations = ARRAY_SIZE(if_comb);
174 	wiphy->reg_notifier = mt7996_regd_notifier;
175 	wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH;
176 
177 	wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BSS_COLOR);
178 	wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS);
179 	wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_LEGACY);
180 	wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HT);
181 	wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_VHT);
182 	wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HE);
183 	wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_UNSOL_BCAST_PROBE_RESP);
184 	wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_FILS_DISCOVERY);
185 	wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_ACK_SIGNAL_SUPPORT);
186 	wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0);
187 	wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_MU_MIMO_AIR_SNIFFER);
188 
189 	if (!mdev->dev->of_node ||
190 	    !of_property_read_bool(mdev->dev->of_node,
191 				   "mediatek,disable-radar-background"))
192 		wiphy_ext_feature_set(wiphy,
193 				      NL80211_EXT_FEATURE_RADAR_BACKGROUND);
194 
195 	ieee80211_hw_set(hw, HAS_RATE_CONTROL);
196 	ieee80211_hw_set(hw, SUPPORTS_TX_ENCAP_OFFLOAD);
197 	ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD);
198 	ieee80211_hw_set(hw, WANT_MONITOR_VIF);
199 
200 	hw->max_tx_fragments = 4;
201 
202 	if (phy->mt76->cap.has_2ghz) {
203 		phy->mt76->sband_2g.sband.ht_cap.cap |=
204 			IEEE80211_HT_CAP_LDPC_CODING |
205 			IEEE80211_HT_CAP_MAX_AMSDU;
206 		phy->mt76->sband_2g.sband.ht_cap.ampdu_density =
207 			IEEE80211_HT_MPDU_DENSITY_2;
208 	}
209 
210 	if (phy->mt76->cap.has_5ghz) {
211 		phy->mt76->sband_5g.sband.ht_cap.cap |=
212 			IEEE80211_HT_CAP_LDPC_CODING |
213 			IEEE80211_HT_CAP_MAX_AMSDU;
214 
215 		phy->mt76->sband_5g.sband.vht_cap.cap |=
216 			IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
217 			IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK |
218 			IEEE80211_VHT_CAP_SHORT_GI_160 |
219 			IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ;
220 		phy->mt76->sband_5g.sband.ht_cap.ampdu_density =
221 			IEEE80211_HT_MPDU_DENSITY_1;
222 
223 		ieee80211_hw_set(hw, SUPPORTS_VHT_EXT_NSS_BW);
224 	}
225 
226 	mt76_set_stream_caps(phy->mt76, true);
227 	mt7996_set_stream_vht_txbf_caps(phy);
228 	mt7996_set_stream_he_eht_caps(phy);
229 
230 	wiphy->available_antennas_rx = phy->mt76->antenna_mask;
231 	wiphy->available_antennas_tx = phy->mt76->antenna_mask;
232 }
233 
234 static void
235 mt7996_mac_init_band(struct mt7996_dev *dev, u8 band)
236 {
237 	u32 mask, set;
238 
239 	/* clear estimated value of EIFS for Rx duration & OBSS time */
240 	mt76_wr(dev, MT_WF_RMAC_RSVD0(band), MT_WF_RMAC_RSVD0_EIFS_CLR);
241 
242 	/* clear backoff time for Rx duration  */
243 	mt76_clear(dev, MT_WF_RMAC_MIB_AIRTIME1(band),
244 		   MT_WF_RMAC_MIB_NONQOSD_BACKOFF);
245 	mt76_clear(dev, MT_WF_RMAC_MIB_AIRTIME3(band),
246 		   MT_WF_RMAC_MIB_QOS01_BACKOFF);
247 	mt76_clear(dev, MT_WF_RMAC_MIB_AIRTIME4(band),
248 		   MT_WF_RMAC_MIB_QOS23_BACKOFF);
249 
250 	/* clear backoff time and set software compensation for OBSS time */
251 	mask = MT_WF_RMAC_MIB_OBSS_BACKOFF | MT_WF_RMAC_MIB_ED_OFFSET;
252 	set = FIELD_PREP(MT_WF_RMAC_MIB_OBSS_BACKOFF, 0) |
253 	      FIELD_PREP(MT_WF_RMAC_MIB_ED_OFFSET, 4);
254 	mt76_rmw(dev, MT_WF_RMAC_MIB_AIRTIME0(band), mask, set);
255 
256 	/* filter out non-resp frames and get instanstaeous signal reporting */
257 	mask = MT_WTBLOFF_RSCR_RCPI_MODE | MT_WTBLOFF_RSCR_RCPI_PARAM;
258 	set = FIELD_PREP(MT_WTBLOFF_RSCR_RCPI_MODE, 0) |
259 	      FIELD_PREP(MT_WTBLOFF_RSCR_RCPI_PARAM, 0x3);
260 	mt76_rmw(dev, MT_WTBLOFF_RSCR(band), mask, set);
261 }
262 
263 static void mt7996_mac_init_basic_rates(struct mt7996_dev *dev)
264 {
265 	int i;
266 
267 	for (i = 0; i < ARRAY_SIZE(mt76_rates); i++) {
268 		u16 rate = mt76_rates[i].hw_value;
269 		u16 idx = MT7996_BASIC_RATES_TBL + i;
270 
271 		rate = FIELD_PREP(MT_TX_RATE_MODE, rate >> 8) |
272 		       FIELD_PREP(MT_TX_RATE_IDX, rate & GENMASK(7, 0));
273 		mt7996_mac_set_fixed_rate_table(dev, idx, rate);
274 	}
275 }
276 
277 void mt7996_mac_init(struct mt7996_dev *dev)
278 {
279 #define HIF_TXD_V2_1	4
280 	int i;
281 
282 	mt76_clear(dev, MT_MDP_DCR2, MT_MDP_DCR2_RX_TRANS_SHORT);
283 
284 	for (i = 0; i < mt7996_wtbl_size(dev); i++)
285 		mt7996_mac_wtbl_update(dev, i,
286 				       MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
287 
288 	if (IS_ENABLED(CONFIG_MT76_LEDS)) {
289 		i = dev->mphy.leds.pin ? MT_LED_GPIO_MUX3 : MT_LED_GPIO_MUX2;
290 		mt76_rmw_field(dev, i, MT_LED_GPIO_SEL_MASK, 4);
291 	}
292 
293 	/* txs report queue */
294 	mt76_rmw_field(dev, MT_DMA_TCRF1(0), MT_DMA_TCRF1_QIDX, 0);
295 	mt76_rmw_field(dev, MT_DMA_TCRF1(1), MT_DMA_TCRF1_QIDX, 6);
296 	mt76_rmw_field(dev, MT_DMA_TCRF1(2), MT_DMA_TCRF1_QIDX, 0);
297 
298 	/* rro module init */
299 	mt7996_mcu_set_rro(dev, UNI_RRO_SET_PLATFORM_TYPE, 2);
300 	mt7996_mcu_set_rro(dev, UNI_RRO_SET_BYPASS_MODE, 3);
301 	mt7996_mcu_set_rro(dev, UNI_RRO_SET_TXFREE_PATH, 1);
302 
303 	mt7996_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET),
304 			  MCU_WA_PARAM_HW_PATH_HIF_VER,
305 			  HIF_TXD_V2_1, 0);
306 
307 	for (i = MT_BAND0; i <= MT_BAND2; i++)
308 		mt7996_mac_init_band(dev, i);
309 
310 	mt7996_mac_init_basic_rates(dev);
311 }
312 
313 int mt7996_txbf_init(struct mt7996_dev *dev)
314 {
315 	int ret;
316 
317 	if (dev->dbdc_support) {
318 		ret = mt7996_mcu_set_txbf(dev, BF_MOD_EN_CTRL);
319 		if (ret)
320 			return ret;
321 	}
322 
323 	/* trigger sounding packets */
324 	ret = mt7996_mcu_set_txbf(dev, BF_SOUNDING_ON);
325 	if (ret)
326 		return ret;
327 
328 	/* enable eBF */
329 	return mt7996_mcu_set_txbf(dev, BF_HW_EN_UPDATE);
330 }
331 
332 static int mt7996_register_phy(struct mt7996_dev *dev, struct mt7996_phy *phy,
333 			       enum mt76_band_id band)
334 {
335 	struct mt76_phy *mphy;
336 	u32 mac_ofs, hif1_ofs = 0;
337 	int ret;
338 
339 	if (band != MT_BAND1 && band != MT_BAND2)
340 		return 0;
341 
342 	if ((band == MT_BAND1 && !dev->dbdc_support) ||
343 	    (band == MT_BAND2 && !dev->tbtc_support))
344 		return 0;
345 
346 	if (phy)
347 		return 0;
348 
349 	if (band == MT_BAND2 && dev->hif2)
350 		hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0);
351 
352 	mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7996_ops, band);
353 	if (!mphy)
354 		return -ENOMEM;
355 
356 	phy = mphy->priv;
357 	phy->dev = dev;
358 	phy->mt76 = mphy;
359 	mphy->dev->phys[band] = mphy;
360 
361 	INIT_DELAYED_WORK(&mphy->mac_work, mt7996_mac_work);
362 
363 	ret = mt7996_eeprom_parse_hw_cap(dev, phy);
364 	if (ret)
365 		goto error;
366 
367 	mac_ofs = band == MT_BAND2 ? MT_EE_MAC_ADDR3 : MT_EE_MAC_ADDR2;
368 	memcpy(mphy->macaddr, dev->mt76.eeprom.data + mac_ofs, ETH_ALEN);
369 	/* Make the extra PHY MAC address local without overlapping with
370 	 * the usual MAC address allocation scheme on multiple virtual interfaces
371 	 */
372 	if (!is_valid_ether_addr(mphy->macaddr)) {
373 		memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR,
374 		       ETH_ALEN);
375 		mphy->macaddr[0] |= 2;
376 		mphy->macaddr[0] ^= BIT(7);
377 		if (band == MT_BAND2)
378 			mphy->macaddr[0] ^= BIT(6);
379 	}
380 	mt76_eeprom_override(mphy);
381 
382 	/* init wiphy according to mphy and phy */
383 	mt7996_init_wiphy(mphy->hw);
384 	ret = mt76_connac_init_tx_queues(phy->mt76,
385 					 MT_TXQ_ID(band),
386 					 MT7996_TX_RING_SIZE,
387 					 MT_TXQ_RING_BASE(band) + hif1_ofs, 0);
388 	if (ret)
389 		goto error;
390 
391 	ret = mt76_register_phy(mphy, true, mt76_rates,
392 				ARRAY_SIZE(mt76_rates));
393 	if (ret)
394 		goto error;
395 
396 	ret = mt7996_init_debugfs(phy);
397 	if (ret)
398 		goto error;
399 
400 	return 0;
401 
402 error:
403 	mphy->dev->phys[band] = NULL;
404 	ieee80211_free_hw(mphy->hw);
405 	return ret;
406 }
407 
408 static void
409 mt7996_unregister_phy(struct mt7996_phy *phy, enum mt76_band_id band)
410 {
411 	struct mt76_phy *mphy;
412 
413 	if (!phy)
414 		return;
415 
416 	mphy = phy->dev->mt76.phys[band];
417 	mt76_unregister_phy(mphy);
418 	ieee80211_free_hw(mphy->hw);
419 	phy->dev->mt76.phys[band] = NULL;
420 }
421 
422 static void mt7996_init_work(struct work_struct *work)
423 {
424 	struct mt7996_dev *dev = container_of(work, struct mt7996_dev,
425 				 init_work);
426 
427 	mt7996_mcu_set_eeprom(dev);
428 	mt7996_mac_init(dev);
429 	mt7996_init_txpower(dev, &dev->mphy.sband_2g.sband);
430 	mt7996_init_txpower(dev, &dev->mphy.sband_5g.sband);
431 	mt7996_init_txpower(dev, &dev->mphy.sband_6g.sband);
432 	mt7996_txbf_init(dev);
433 }
434 
435 void mt7996_wfsys_reset(struct mt7996_dev *dev)
436 {
437 	mt76_set(dev, MT_WF_SUBSYS_RST, 0x1);
438 	msleep(20);
439 
440 	mt76_clear(dev, MT_WF_SUBSYS_RST, 0x1);
441 	msleep(20);
442 }
443 
444 static int mt7996_init_hardware(struct mt7996_dev *dev)
445 {
446 	int ret, idx;
447 
448 	mt76_wr(dev, MT_INT_SOURCE_CSR, ~0);
449 
450 	INIT_WORK(&dev->init_work, mt7996_init_work);
451 
452 	dev->dbdc_support = true;
453 	dev->tbtc_support = true;
454 
455 	ret = mt7996_dma_init(dev);
456 	if (ret)
457 		return ret;
458 
459 	set_bit(MT76_STATE_INITIALIZED, &dev->mphy.state);
460 
461 	ret = mt7996_mcu_init(dev);
462 	if (ret)
463 		return ret;
464 
465 	ret = mt7996_eeprom_init(dev);
466 	if (ret < 0)
467 		return ret;
468 
469 	/* Beacon and mgmt frames should occupy wcid 0 */
470 	idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7996_WTBL_STA);
471 	if (idx)
472 		return -ENOSPC;
473 
474 	dev->mt76.global_wcid.idx = idx;
475 	dev->mt76.global_wcid.hw_key_idx = -1;
476 	dev->mt76.global_wcid.tx_info |= MT_WCID_TX_INFO_SET;
477 	rcu_assign_pointer(dev->mt76.wcid[idx], &dev->mt76.global_wcid);
478 
479 	return 0;
480 }
481 
482 void mt7996_set_stream_vht_txbf_caps(struct mt7996_phy *phy)
483 {
484 	int sts;
485 	u32 *cap;
486 
487 	if (!phy->mt76->cap.has_5ghz)
488 		return;
489 
490 	sts = hweight16(phy->mt76->chainmask);
491 	cap = &phy->mt76->sband_5g.sband.vht_cap.cap;
492 
493 	*cap |= IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE |
494 		IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE |
495 		FIELD_PREP(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK, sts - 1);
496 
497 	*cap &= ~(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK |
498 		  IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE |
499 		  IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE);
500 
501 	if (sts < 2)
502 		return;
503 
504 	*cap |= IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE |
505 		IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE |
506 		FIELD_PREP(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, sts - 1);
507 }
508 
509 static void
510 mt7996_set_stream_he_txbf_caps(struct mt7996_phy *phy,
511 			       struct ieee80211_sta_he_cap *he_cap, int vif)
512 {
513 	struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem;
514 	int sts = hweight16(phy->mt76->chainmask);
515 	u8 c;
516 
517 #ifdef CONFIG_MAC80211_MESH
518 	if (vif == NL80211_IFTYPE_MESH_POINT)
519 		return;
520 #endif
521 
522 	elem->phy_cap_info[3] &= ~IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER;
523 	elem->phy_cap_info[4] &= ~IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER;
524 
525 	c = IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK |
526 	    IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK;
527 	elem->phy_cap_info[5] &= ~c;
528 
529 	c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
530 	    IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB;
531 	elem->phy_cap_info[6] &= ~c;
532 
533 	elem->phy_cap_info[7] &= ~IEEE80211_HE_PHY_CAP7_MAX_NC_MASK;
534 
535 	c = IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US |
536 	    IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO |
537 	    IEEE80211_HE_PHY_CAP2_UL_MU_PARTIAL_MU_MIMO;
538 	elem->phy_cap_info[2] |= c;
539 
540 	c = IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE |
541 	    IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_4 |
542 	    IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_4;
543 	elem->phy_cap_info[4] |= c;
544 
545 	/* do not support NG16 due to spec D4.0 changes subcarrier idx */
546 	c = IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_42_SU |
547 	    IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_75_MU;
548 
549 	if (vif == NL80211_IFTYPE_STATION)
550 		c |= IEEE80211_HE_PHY_CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO;
551 
552 	elem->phy_cap_info[6] |= c;
553 
554 	if (sts < 2)
555 		return;
556 
557 	/* the maximum cap is 4 x 3, (Nr, Nc) = (3, 2) */
558 	elem->phy_cap_info[7] |= min_t(int, sts - 1, 2) << 3;
559 
560 	if (vif != NL80211_IFTYPE_AP)
561 		return;
562 
563 	elem->phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER;
564 	elem->phy_cap_info[4] |= IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER;
565 
566 	c = FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK,
567 		       sts - 1) |
568 	    FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK,
569 		       sts - 1);
570 	elem->phy_cap_info[5] |= c;
571 
572 	c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
573 	    IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB;
574 	elem->phy_cap_info[6] |= c;
575 
576 	c = IEEE80211_HE_PHY_CAP7_STBC_TX_ABOVE_80MHZ |
577 	    IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ;
578 	elem->phy_cap_info[7] |= c;
579 }
580 
581 static void
582 mt7996_init_he_caps(struct mt7996_phy *phy, enum nl80211_band band,
583 		    struct ieee80211_sband_iftype_data *data,
584 		    enum nl80211_iftype iftype)
585 {
586 	struct ieee80211_sta_he_cap *he_cap = &data->he_cap;
587 	struct ieee80211_he_cap_elem *he_cap_elem = &he_cap->he_cap_elem;
588 	struct ieee80211_he_mcs_nss_supp *he_mcs = &he_cap->he_mcs_nss_supp;
589 	int i, nss = hweight8(phy->mt76->antenna_mask);
590 	u16 mcs_map = 0;
591 
592 	for (i = 0; i < 8; i++) {
593 		if (i < nss)
594 			mcs_map |= (IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2));
595 		else
596 			mcs_map |= (IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2));
597 	}
598 
599 	he_cap->has_he = true;
600 
601 	he_cap_elem->mac_cap_info[0] = IEEE80211_HE_MAC_CAP0_HTC_HE;
602 	he_cap_elem->mac_cap_info[3] = IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
603 				       IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3;
604 	he_cap_elem->mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU;
605 
606 	if (band == NL80211_BAND_2GHZ)
607 		he_cap_elem->phy_cap_info[0] =
608 			IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G;
609 	else
610 		he_cap_elem->phy_cap_info[0] =
611 			IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G |
612 			IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G;
613 
614 	he_cap_elem->phy_cap_info[1] = IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD;
615 	he_cap_elem->phy_cap_info[2] = IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ |
616 				       IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ;
617 
618 	switch (iftype) {
619 	case NL80211_IFTYPE_AP:
620 		he_cap_elem->mac_cap_info[0] |= IEEE80211_HE_MAC_CAP0_TWT_RES;
621 		he_cap_elem->mac_cap_info[2] |= IEEE80211_HE_MAC_CAP2_BSR;
622 		he_cap_elem->mac_cap_info[4] |= IEEE80211_HE_MAC_CAP4_BQR;
623 		he_cap_elem->mac_cap_info[5] |=
624 			IEEE80211_HE_MAC_CAP5_OM_CTRL_UL_MU_DATA_DIS_RX;
625 		he_cap_elem->phy_cap_info[3] |=
626 			IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK |
627 			IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK;
628 		he_cap_elem->phy_cap_info[6] |=
629 			IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE |
630 			IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT;
631 		he_cap_elem->phy_cap_info[9] |=
632 			IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU |
633 			IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU;
634 		break;
635 	case NL80211_IFTYPE_STATION:
636 		he_cap_elem->mac_cap_info[1] |=
637 			IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US;
638 
639 		if (band == NL80211_BAND_2GHZ)
640 			he_cap_elem->phy_cap_info[0] |=
641 			IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G;
642 		else
643 			he_cap_elem->phy_cap_info[0] |=
644 			IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G;
645 
646 		he_cap_elem->phy_cap_info[1] |=
647 			IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |
648 			IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US;
649 		he_cap_elem->phy_cap_info[3] |=
650 			IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK |
651 			IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK;
652 		he_cap_elem->phy_cap_info[6] |=
653 			IEEE80211_HE_PHY_CAP6_TRIG_CQI_FB |
654 			IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE |
655 			IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT;
656 		he_cap_elem->phy_cap_info[7] |=
657 			IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP |
658 			IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI;
659 		he_cap_elem->phy_cap_info[8] |=
660 			IEEE80211_HE_PHY_CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G |
661 			IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU |
662 			IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU |
663 			IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_484;
664 		he_cap_elem->phy_cap_info[9] |=
665 			IEEE80211_HE_PHY_CAP9_LONGER_THAN_16_SIGB_OFDM_SYM |
666 			IEEE80211_HE_PHY_CAP9_NON_TRIGGERED_CQI_FEEDBACK |
667 			IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU |
668 			IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU |
669 			IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB |
670 			IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB;
671 		break;
672 	default:
673 		break;
674 	}
675 
676 	he_mcs->rx_mcs_80 = cpu_to_le16(mcs_map);
677 	he_mcs->tx_mcs_80 = cpu_to_le16(mcs_map);
678 	he_mcs->rx_mcs_160 = cpu_to_le16(mcs_map);
679 	he_mcs->tx_mcs_160 = cpu_to_le16(mcs_map);
680 
681 	mt7996_set_stream_he_txbf_caps(phy, he_cap, iftype);
682 
683 	memset(he_cap->ppe_thres, 0, sizeof(he_cap->ppe_thres));
684 	if (he_cap_elem->phy_cap_info[6] &
685 	    IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT) {
686 		mt76_connac_gen_ppe_thresh(he_cap->ppe_thres, nss);
687 	} else {
688 		he_cap_elem->phy_cap_info[9] |=
689 			u8_encode_bits(IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_16US,
690 				       IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_MASK);
691 	}
692 
693 	if (band == NL80211_BAND_6GHZ) {
694 		u16 cap = IEEE80211_HE_6GHZ_CAP_TX_ANTPAT_CONS |
695 			  IEEE80211_HE_6GHZ_CAP_RX_ANTPAT_CONS;
696 
697 		cap |= u16_encode_bits(IEEE80211_HT_MPDU_DENSITY_0_5,
698 				       IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START) |
699 		       u16_encode_bits(IEEE80211_VHT_MAX_AMPDU_1024K,
700 				       IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP) |
701 		       u16_encode_bits(IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454,
702 				       IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN);
703 
704 		data->he_6ghz_capa.capa = cpu_to_le16(cap);
705 	}
706 }
707 
708 static void
709 mt7996_init_eht_caps(struct mt7996_phy *phy, enum nl80211_band band,
710 		     struct ieee80211_sband_iftype_data *data,
711 		     enum nl80211_iftype iftype)
712 {
713 	struct ieee80211_sta_eht_cap *eht_cap = &data->eht_cap;
714 	struct ieee80211_eht_cap_elem_fixed *eht_cap_elem = &eht_cap->eht_cap_elem;
715 	struct ieee80211_eht_mcs_nss_supp *eht_nss = &eht_cap->eht_mcs_nss_supp;
716 	enum nl80211_chan_width width = phy->mt76->chandef.width;
717 	int nss = hweight8(phy->mt76->antenna_mask);
718 	int sts = hweight16(phy->mt76->chainmask);
719 	u8 val;
720 
721 	if (!phy->dev->has_eht)
722 		return;
723 
724 	eht_cap->has_eht = true;
725 
726 	eht_cap_elem->mac_cap_info[0] =
727 		IEEE80211_EHT_MAC_CAP0_EPCS_PRIO_ACCESS |
728 		IEEE80211_EHT_MAC_CAP0_OM_CONTROL;
729 
730 	eht_cap_elem->phy_cap_info[0] =
731 		IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ |
732 		IEEE80211_EHT_PHY_CAP0_NDP_4_EHT_LFT_32_GI |
733 		IEEE80211_EHT_PHY_CAP0_SU_BEAMFORMER |
734 		IEEE80211_EHT_PHY_CAP0_SU_BEAMFORMEE;
735 
736 	val = max_t(u8, sts - 1, 3);
737 	eht_cap_elem->phy_cap_info[0] |=
738 		u8_encode_bits(u8_get_bits(val, BIT(0)),
739 			       IEEE80211_EHT_PHY_CAP0_BEAMFORMEE_SS_80MHZ_MASK);
740 
741 	eht_cap_elem->phy_cap_info[1] =
742 		u8_encode_bits(u8_get_bits(val, GENMASK(2, 1)),
743 			       IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_80MHZ_MASK) |
744 		u8_encode_bits(val,
745 			       IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_160MHZ_MASK) |
746 		u8_encode_bits(val,
747 			       IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_320MHZ_MASK);
748 
749 	eht_cap_elem->phy_cap_info[2] =
750 		u8_encode_bits(sts - 1, IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_80MHZ_MASK) |
751 		u8_encode_bits(sts - 1, IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_160MHZ_MASK) |
752 		u8_encode_bits(sts - 1, IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_320MHZ_MASK);
753 
754 	eht_cap_elem->phy_cap_info[3] =
755 		IEEE80211_EHT_PHY_CAP3_NG_16_SU_FEEDBACK |
756 		IEEE80211_EHT_PHY_CAP3_NG_16_MU_FEEDBACK |
757 		IEEE80211_EHT_PHY_CAP3_CODEBOOK_4_2_SU_FDBK |
758 		IEEE80211_EHT_PHY_CAP3_CODEBOOK_7_5_MU_FDBK |
759 		IEEE80211_EHT_PHY_CAP3_TRIG_SU_BF_FDBK |
760 		IEEE80211_EHT_PHY_CAP3_TRIG_MU_BF_PART_BW_FDBK |
761 		IEEE80211_EHT_PHY_CAP3_TRIG_CQI_FDBK;
762 
763 	eht_cap_elem->phy_cap_info[4] =
764 		u8_encode_bits(min_t(int, sts - 1, 2),
765 			       IEEE80211_EHT_PHY_CAP4_MAX_NC_MASK);
766 
767 	eht_cap_elem->phy_cap_info[5] =
768 		IEEE80211_EHT_PHY_CAP5_NON_TRIG_CQI_FEEDBACK |
769 		u8_encode_bits(IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_16US,
770 			       IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_MASK) |
771 		u8_encode_bits(u8_get_bits(0x11, GENMASK(1, 0)),
772 			       IEEE80211_EHT_PHY_CAP5_MAX_NUM_SUPP_EHT_LTF_MASK);
773 
774 	val = width == NL80211_CHAN_WIDTH_320 ? 0xf :
775 	      width == NL80211_CHAN_WIDTH_160 ? 0x7 :
776 	      width == NL80211_CHAN_WIDTH_80 ? 0x3 : 0x1;
777 	eht_cap_elem->phy_cap_info[6] =
778 		u8_encode_bits(u8_get_bits(0x11, GENMASK(4, 2)),
779 			       IEEE80211_EHT_PHY_CAP6_MAX_NUM_SUPP_EHT_LTF_MASK) |
780 		u8_encode_bits(val, IEEE80211_EHT_PHY_CAP6_MCS15_SUPP_MASK);
781 
782 	eht_cap_elem->phy_cap_info[7] =
783 		IEEE80211_EHT_PHY_CAP7_NON_OFDMA_UL_MU_MIMO_80MHZ |
784 		IEEE80211_EHT_PHY_CAP7_NON_OFDMA_UL_MU_MIMO_160MHZ |
785 		IEEE80211_EHT_PHY_CAP7_NON_OFDMA_UL_MU_MIMO_320MHZ |
786 		IEEE80211_EHT_PHY_CAP7_MU_BEAMFORMER_80MHZ |
787 		IEEE80211_EHT_PHY_CAP7_MU_BEAMFORMER_160MHZ |
788 		IEEE80211_EHT_PHY_CAP7_MU_BEAMFORMER_320MHZ;
789 
790 	val = u8_encode_bits(nss, IEEE80211_EHT_MCS_NSS_RX) |
791 	      u8_encode_bits(nss, IEEE80211_EHT_MCS_NSS_TX);
792 #define SET_EHT_MAX_NSS(_bw, _val) do {				\
793 		eht_nss->bw._##_bw.rx_tx_mcs9_max_nss = _val;	\
794 		eht_nss->bw._##_bw.rx_tx_mcs11_max_nss = _val;	\
795 		eht_nss->bw._##_bw.rx_tx_mcs13_max_nss = _val;	\
796 	} while (0)
797 
798 	SET_EHT_MAX_NSS(80, val);
799 	SET_EHT_MAX_NSS(160, val);
800 	SET_EHT_MAX_NSS(320, val);
801 #undef SET_EHT_MAX_NSS
802 }
803 
804 static void
805 __mt7996_set_stream_he_eht_caps(struct mt7996_phy *phy,
806 				struct ieee80211_supported_band *sband,
807 				enum nl80211_band band)
808 {
809 	struct ieee80211_sband_iftype_data *data = phy->iftype[band];
810 	int i, n = 0;
811 
812 	for (i = 0; i < NUM_NL80211_IFTYPES; i++) {
813 		switch (i) {
814 		case NL80211_IFTYPE_STATION:
815 		case NL80211_IFTYPE_AP:
816 #ifdef CONFIG_MAC80211_MESH
817 		case NL80211_IFTYPE_MESH_POINT:
818 #endif
819 			break;
820 		default:
821 			continue;
822 		}
823 
824 		data[n].types_mask = BIT(i);
825 		mt7996_init_he_caps(phy, band, &data[n], i);
826 		mt7996_init_eht_caps(phy, band, &data[n], i);
827 
828 		n++;
829 	}
830 
831 	sband->iftype_data = data;
832 	sband->n_iftype_data = n;
833 }
834 
835 void mt7996_set_stream_he_eht_caps(struct mt7996_phy *phy)
836 {
837 	if (phy->mt76->cap.has_2ghz)
838 		__mt7996_set_stream_he_eht_caps(phy, &phy->mt76->sband_2g.sband,
839 						NL80211_BAND_2GHZ);
840 
841 	if (phy->mt76->cap.has_5ghz)
842 		__mt7996_set_stream_he_eht_caps(phy, &phy->mt76->sband_5g.sband,
843 						NL80211_BAND_5GHZ);
844 
845 	if (phy->mt76->cap.has_6ghz)
846 		__mt7996_set_stream_he_eht_caps(phy, &phy->mt76->sband_6g.sband,
847 						NL80211_BAND_6GHZ);
848 }
849 
850 int mt7996_register_device(struct mt7996_dev *dev)
851 {
852 	struct ieee80211_hw *hw = mt76_hw(dev);
853 	int ret;
854 
855 	dev->phy.dev = dev;
856 	dev->phy.mt76 = &dev->mt76.phy;
857 	dev->mt76.phy.priv = &dev->phy;
858 	INIT_WORK(&dev->rc_work, mt7996_mac_sta_rc_work);
859 	INIT_DELAYED_WORK(&dev->mphy.mac_work, mt7996_mac_work);
860 	INIT_LIST_HEAD(&dev->sta_rc_list);
861 	INIT_LIST_HEAD(&dev->twt_list);
862 
863 	init_waitqueue_head(&dev->reset_wait);
864 	INIT_WORK(&dev->reset_work, mt7996_mac_reset_work);
865 	INIT_WORK(&dev->dump_work, mt7996_mac_dump_work);
866 	mutex_init(&dev->dump_mutex);
867 
868 	ret = mt7996_init_hardware(dev);
869 	if (ret)
870 		return ret;
871 
872 	mt7996_init_wiphy(hw);
873 
874 	/* init led callbacks */
875 	if (IS_ENABLED(CONFIG_MT76_LEDS)) {
876 		dev->mphy.leds.cdev.brightness_set = mt7996_led_set_brightness;
877 		dev->mphy.leds.cdev.blink_set = mt7996_led_set_blink;
878 	}
879 
880 	ret = mt76_register_device(&dev->mt76, true, mt76_rates,
881 				   ARRAY_SIZE(mt76_rates));
882 	if (ret)
883 		return ret;
884 
885 	ieee80211_queue_work(mt76_hw(dev), &dev->init_work);
886 
887 	ret = mt7996_register_phy(dev, mt7996_phy2(dev), MT_BAND1);
888 	if (ret)
889 		return ret;
890 
891 	ret = mt7996_register_phy(dev, mt7996_phy3(dev), MT_BAND2);
892 	if (ret)
893 		return ret;
894 
895 	dev->recovery.hw_init_done = true;
896 
897 	ret = mt7996_init_debugfs(&dev->phy);
898 	if (ret)
899 		return ret;
900 
901 	return mt7996_coredump_register(dev);
902 }
903 
904 void mt7996_unregister_device(struct mt7996_dev *dev)
905 {
906 	mt7996_unregister_phy(mt7996_phy3(dev), MT_BAND2);
907 	mt7996_unregister_phy(mt7996_phy2(dev), MT_BAND1);
908 	mt7996_coredump_unregister(dev);
909 	mt76_unregister_device(&dev->mt76);
910 	mt7996_mcu_exit(dev);
911 	mt7996_tx_token_put(dev);
912 	mt7996_dma_cleanup(dev);
913 	tasklet_disable(&dev->mt76.irq_tasklet);
914 
915 	mt76_free_device(&dev->mt76);
916 }
917