1 // SPDX-License-Identifier: ISC 2 /* 3 * Copyright (C) 2022 MediaTek Inc. 4 */ 5 6 #include <linux/etherdevice.h> 7 #include <linux/thermal.h> 8 #include "mt7996.h" 9 #include "mac.h" 10 #include "mcu.h" 11 #include "eeprom.h" 12 13 static const struct ieee80211_iface_limit if_limits[] = { 14 { 15 .max = 1, 16 .types = BIT(NL80211_IFTYPE_ADHOC) 17 }, { 18 .max = 16, 19 .types = BIT(NL80211_IFTYPE_AP) 20 #ifdef CONFIG_MAC80211_MESH 21 | BIT(NL80211_IFTYPE_MESH_POINT) 22 #endif 23 }, { 24 .max = MT7996_MAX_INTERFACES, 25 .types = BIT(NL80211_IFTYPE_STATION) 26 } 27 }; 28 29 static const struct ieee80211_iface_combination if_comb[] = { 30 { 31 .limits = if_limits, 32 .n_limits = ARRAY_SIZE(if_limits), 33 .max_interfaces = MT7996_MAX_INTERFACES, 34 .num_different_channels = 1, 35 .beacon_int_infra_match = true, 36 .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) | 37 BIT(NL80211_CHAN_WIDTH_20) | 38 BIT(NL80211_CHAN_WIDTH_40) | 39 BIT(NL80211_CHAN_WIDTH_80) | 40 BIT(NL80211_CHAN_WIDTH_160) | 41 BIT(NL80211_CHAN_WIDTH_80P80), 42 } 43 }; 44 45 static void mt7996_led_set_config(struct led_classdev *led_cdev, 46 u8 delay_on, u8 delay_off) 47 { 48 struct mt7996_dev *dev; 49 struct mt76_dev *mt76; 50 u32 val; 51 52 mt76 = container_of(led_cdev, struct mt76_dev, led_cdev); 53 dev = container_of(mt76, struct mt7996_dev, mt76); 54 55 /* select TX blink mode, 2: only data frames */ 56 mt76_rmw_field(dev, MT_TMAC_TCR0(0), MT_TMAC_TCR0_TX_BLINK, 2); 57 58 /* enable LED */ 59 mt76_wr(dev, MT_LED_EN(0), 1); 60 61 /* set LED Tx blink on/off time */ 62 val = FIELD_PREP(MT_LED_TX_BLINK_ON_MASK, delay_on) | 63 FIELD_PREP(MT_LED_TX_BLINK_OFF_MASK, delay_off); 64 mt76_wr(dev, MT_LED_TX_BLINK(0), val); 65 66 /* control LED */ 67 val = MT_LED_CTRL_BLINK_MODE | MT_LED_CTRL_KICK; 68 if (dev->mt76.led_al) 69 val |= MT_LED_CTRL_POLARITY; 70 71 mt76_wr(dev, MT_LED_CTRL(0), val); 72 mt76_clear(dev, MT_LED_CTRL(0), MT_LED_CTRL_KICK); 73 } 74 75 static int mt7996_led_set_blink(struct led_classdev *led_cdev, 76 unsigned long *delay_on, 77 unsigned long *delay_off) 78 { 79 u16 delta_on = 0, delta_off = 0; 80 81 #define HW_TICK 10 82 #define TO_HW_TICK(_t) (((_t) > HW_TICK) ? ((_t) / HW_TICK) : HW_TICK) 83 84 if (*delay_on) 85 delta_on = TO_HW_TICK(*delay_on); 86 if (*delay_off) 87 delta_off = TO_HW_TICK(*delay_off); 88 89 mt7996_led_set_config(led_cdev, delta_on, delta_off); 90 91 return 0; 92 } 93 94 static void mt7996_led_set_brightness(struct led_classdev *led_cdev, 95 enum led_brightness brightness) 96 { 97 if (!brightness) 98 mt7996_led_set_config(led_cdev, 0, 0xff); 99 else 100 mt7996_led_set_config(led_cdev, 0xff, 0); 101 } 102 103 static void 104 mt7996_init_txpower(struct mt7996_dev *dev, 105 struct ieee80211_supported_band *sband) 106 { 107 int i, nss = hweight8(dev->mphy.antenna_mask); 108 int nss_delta = mt76_tx_power_nss_delta(nss); 109 int pwr_delta = mt7996_eeprom_get_power_delta(dev, sband->band); 110 struct mt76_power_limits limits; 111 112 for (i = 0; i < sband->n_channels; i++) { 113 struct ieee80211_channel *chan = &sband->channels[i]; 114 int target_power = mt7996_eeprom_get_target_power(dev, chan); 115 116 target_power += pwr_delta; 117 target_power = mt76_get_rate_power_limits(&dev->mphy, chan, 118 &limits, 119 target_power); 120 target_power += nss_delta; 121 target_power = DIV_ROUND_UP(target_power, 2); 122 chan->max_power = min_t(int, chan->max_reg_power, 123 target_power); 124 chan->orig_mpwr = target_power; 125 } 126 } 127 128 static void 129 mt7996_regd_notifier(struct wiphy *wiphy, 130 struct regulatory_request *request) 131 { 132 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); 133 struct mt7996_dev *dev = mt7996_hw_dev(hw); 134 struct mt7996_phy *phy = mt7996_hw_phy(hw); 135 136 memcpy(dev->mt76.alpha2, request->alpha2, sizeof(dev->mt76.alpha2)); 137 dev->mt76.region = request->dfs_region; 138 139 if (dev->mt76.region == NL80211_DFS_UNSET) 140 mt7996_mcu_rdd_background_enable(phy, NULL); 141 142 mt7996_init_txpower(dev, &phy->mt76->sband_2g.sband); 143 mt7996_init_txpower(dev, &phy->mt76->sband_5g.sband); 144 mt7996_init_txpower(dev, &phy->mt76->sband_6g.sband); 145 146 phy->mt76->dfs_state = MT_DFS_STATE_UNKNOWN; 147 mt7996_dfs_init_radar_detector(phy); 148 } 149 150 static void 151 mt7996_init_wiphy(struct ieee80211_hw *hw) 152 { 153 struct mt7996_phy *phy = mt7996_hw_phy(hw); 154 struct mt76_dev *mdev = &phy->dev->mt76; 155 struct wiphy *wiphy = hw->wiphy; 156 157 hw->queues = 4; 158 hw->max_rx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_HE; 159 hw->max_tx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_HE; 160 hw->netdev_features = NETIF_F_RXCSUM; 161 162 hw->radiotap_timestamp.units_pos = 163 IEEE80211_RADIOTAP_TIMESTAMP_UNIT_US; 164 165 phy->slottime = 9; 166 167 hw->sta_data_size = sizeof(struct mt7996_sta); 168 hw->vif_data_size = sizeof(struct mt7996_vif); 169 170 wiphy->iface_combinations = if_comb; 171 wiphy->n_iface_combinations = ARRAY_SIZE(if_comb); 172 wiphy->reg_notifier = mt7996_regd_notifier; 173 wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH; 174 175 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BSS_COLOR); 176 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS); 177 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_LEGACY); 178 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HT); 179 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_VHT); 180 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HE); 181 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_UNSOL_BCAST_PROBE_RESP); 182 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_FILS_DISCOVERY); 183 184 if (!mdev->dev->of_node || 185 !of_property_read_bool(mdev->dev->of_node, 186 "mediatek,disable-radar-background")) 187 wiphy_ext_feature_set(wiphy, 188 NL80211_EXT_FEATURE_RADAR_BACKGROUND); 189 190 ieee80211_hw_set(hw, HAS_RATE_CONTROL); 191 ieee80211_hw_set(hw, SUPPORTS_TX_ENCAP_OFFLOAD); 192 ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD); 193 ieee80211_hw_set(hw, WANT_MONITOR_VIF); 194 195 hw->max_tx_fragments = 4; 196 197 if (phy->mt76->cap.has_2ghz) 198 phy->mt76->sband_2g.sband.ht_cap.cap |= 199 IEEE80211_HT_CAP_LDPC_CODING | 200 IEEE80211_HT_CAP_MAX_AMSDU; 201 202 if (phy->mt76->cap.has_5ghz) { 203 phy->mt76->sband_5g.sband.ht_cap.cap |= 204 IEEE80211_HT_CAP_LDPC_CODING | 205 IEEE80211_HT_CAP_MAX_AMSDU; 206 207 phy->mt76->sband_5g.sband.vht_cap.cap |= 208 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 | 209 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK | 210 IEEE80211_VHT_CAP_SHORT_GI_160 | 211 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ; 212 } 213 214 mt76_set_stream_caps(phy->mt76, true); 215 mt7996_set_stream_vht_txbf_caps(phy); 216 mt7996_set_stream_he_caps(phy); 217 218 wiphy->available_antennas_rx = phy->mt76->antenna_mask; 219 wiphy->available_antennas_tx = phy->mt76->antenna_mask; 220 } 221 222 static void 223 mt7996_mac_init_band(struct mt7996_dev *dev, u8 band) 224 { 225 u32 mask, set; 226 227 /* clear estimated value of EIFS for Rx duration & OBSS time */ 228 mt76_wr(dev, MT_WF_RMAC_RSVD0(band), MT_WF_RMAC_RSVD0_EIFS_CLR); 229 230 /* clear backoff time for Rx duration */ 231 mt76_clear(dev, MT_WF_RMAC_MIB_AIRTIME1(band), 232 MT_WF_RMAC_MIB_NONQOSD_BACKOFF); 233 mt76_clear(dev, MT_WF_RMAC_MIB_AIRTIME3(band), 234 MT_WF_RMAC_MIB_QOS01_BACKOFF); 235 mt76_clear(dev, MT_WF_RMAC_MIB_AIRTIME4(band), 236 MT_WF_RMAC_MIB_QOS23_BACKOFF); 237 238 /* clear backoff time and set software compensation for OBSS time */ 239 mask = MT_WF_RMAC_MIB_OBSS_BACKOFF | MT_WF_RMAC_MIB_ED_OFFSET; 240 set = FIELD_PREP(MT_WF_RMAC_MIB_OBSS_BACKOFF, 0) | 241 FIELD_PREP(MT_WF_RMAC_MIB_ED_OFFSET, 4); 242 mt76_rmw(dev, MT_WF_RMAC_MIB_AIRTIME0(band), mask, set); 243 } 244 245 static void mt7996_mac_init(struct mt7996_dev *dev) 246 { 247 #define HIF_TXD_V2_1 4 248 int i; 249 250 mt76_clear(dev, MT_MDP_DCR2, MT_MDP_DCR2_RX_TRANS_SHORT); 251 252 for (i = 0; i < MT7996_WTBL_SIZE; i++) 253 mt7996_mac_wtbl_update(dev, i, 254 MT_WTBL_UPDATE_ADM_COUNT_CLEAR); 255 256 if (IS_ENABLED(CONFIG_MT76_LEDS)) { 257 i = dev->mt76.led_pin ? MT_LED_GPIO_MUX3 : MT_LED_GPIO_MUX2; 258 mt76_rmw_field(dev, i, MT_LED_GPIO_SEL_MASK, 4); 259 } 260 261 /* txs report queue */ 262 mt76_rmw_field(dev, MT_DMA_TCRF1(0), MT_DMA_TCRF1_QIDX, 0); 263 mt76_rmw_field(dev, MT_DMA_TCRF1(1), MT_DMA_TCRF1_QIDX, 6); 264 mt76_rmw_field(dev, MT_DMA_TCRF1(2), MT_DMA_TCRF1_QIDX, 0); 265 266 /* rro module init */ 267 mt7996_mcu_set_rro(dev, UNI_RRO_SET_PLATFORM_TYPE, 2); 268 mt7996_mcu_set_rro(dev, UNI_RRO_SET_BYPASS_MODE, 3); 269 mt7996_mcu_set_rro(dev, UNI_RRO_SET_TXFREE_PATH, 1); 270 271 mt7996_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET), 272 MCU_WA_PARAM_HW_PATH_HIF_VER, 273 HIF_TXD_V2_1, 0); 274 275 for (i = MT_BAND0; i <= MT_BAND2; i++) 276 mt7996_mac_init_band(dev, i); 277 } 278 279 static int mt7996_txbf_init(struct mt7996_dev *dev) 280 { 281 int ret; 282 283 if (dev->dbdc_support) { 284 ret = mt7996_mcu_set_txbf(dev, BF_MOD_EN_CTRL); 285 if (ret) 286 return ret; 287 } 288 289 /* trigger sounding packets */ 290 ret = mt7996_mcu_set_txbf(dev, BF_SOUNDING_ON); 291 if (ret) 292 return ret; 293 294 /* enable eBF */ 295 return mt7996_mcu_set_txbf(dev, BF_HW_EN_UPDATE); 296 } 297 298 static int mt7996_register_phy(struct mt7996_dev *dev, struct mt7996_phy *phy, 299 enum mt76_band_id band) 300 { 301 struct mt76_phy *mphy; 302 u32 mac_ofs, hif1_ofs = 0; 303 int ret; 304 305 if (band != MT_BAND1 && band != MT_BAND2) 306 return 0; 307 308 if ((band == MT_BAND1 && !dev->dbdc_support) || 309 (band == MT_BAND2 && !dev->tbtc_support)) 310 return 0; 311 312 if (phy) 313 return 0; 314 315 if (band == MT_BAND2 && dev->hif2) 316 hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0); 317 318 mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7996_ops, band); 319 if (!mphy) 320 return -ENOMEM; 321 322 phy = mphy->priv; 323 phy->dev = dev; 324 phy->mt76 = mphy; 325 mphy->dev->phys[band] = mphy; 326 327 INIT_DELAYED_WORK(&mphy->mac_work, mt7996_mac_work); 328 329 ret = mt7996_eeprom_parse_hw_cap(dev, phy); 330 if (ret) 331 goto error; 332 333 mac_ofs = band == MT_BAND2 ? MT_EE_MAC_ADDR3 : MT_EE_MAC_ADDR2; 334 memcpy(mphy->macaddr, dev->mt76.eeprom.data + mac_ofs, ETH_ALEN); 335 /* Make the extra PHY MAC address local without overlapping with 336 * the usual MAC address allocation scheme on multiple virtual interfaces 337 */ 338 if (!is_valid_ether_addr(mphy->macaddr)) { 339 memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR, 340 ETH_ALEN); 341 mphy->macaddr[0] |= 2; 342 mphy->macaddr[0] ^= BIT(7); 343 if (band == MT_BAND2) 344 mphy->macaddr[0] ^= BIT(6); 345 } 346 mt76_eeprom_override(mphy); 347 348 /* init wiphy according to mphy and phy */ 349 mt7996_init_wiphy(mphy->hw); 350 ret = mt76_connac_init_tx_queues(phy->mt76, 351 MT_TXQ_ID(band), 352 MT7996_TX_RING_SIZE, 353 MT_TXQ_RING_BASE(band) + hif1_ofs, 0); 354 if (ret) 355 goto error; 356 357 ret = mt76_register_phy(mphy, true, mt76_rates, 358 ARRAY_SIZE(mt76_rates)); 359 if (ret) 360 goto error; 361 362 ret = mt7996_init_debugfs(phy); 363 if (ret) 364 goto error; 365 366 return 0; 367 368 error: 369 mphy->dev->phys[band] = NULL; 370 ieee80211_free_hw(mphy->hw); 371 return ret; 372 } 373 374 static void 375 mt7996_unregister_phy(struct mt7996_phy *phy, enum mt76_band_id band) 376 { 377 struct mt76_phy *mphy; 378 379 if (!phy) 380 return; 381 382 mphy = phy->dev->mt76.phys[band]; 383 mt76_unregister_phy(mphy); 384 ieee80211_free_hw(mphy->hw); 385 phy->dev->mt76.phys[band] = NULL; 386 } 387 388 static void mt7996_init_work(struct work_struct *work) 389 { 390 struct mt7996_dev *dev = container_of(work, struct mt7996_dev, 391 init_work); 392 393 mt7996_mcu_set_eeprom(dev); 394 mt7996_mac_init(dev); 395 mt7996_init_txpower(dev, &dev->mphy.sband_2g.sband); 396 mt7996_init_txpower(dev, &dev->mphy.sband_5g.sband); 397 mt7996_init_txpower(dev, &dev->mphy.sband_6g.sband); 398 mt7996_txbf_init(dev); 399 } 400 401 void mt7996_wfsys_reset(struct mt7996_dev *dev) 402 { 403 mt76_set(dev, MT_WF_SUBSYS_RST, 0x1); 404 msleep(20); 405 406 mt76_clear(dev, MT_WF_SUBSYS_RST, 0x1); 407 msleep(20); 408 } 409 410 static int mt7996_init_hardware(struct mt7996_dev *dev) 411 { 412 int ret, idx; 413 414 mt76_wr(dev, MT_INT_SOURCE_CSR, ~0); 415 416 INIT_WORK(&dev->init_work, mt7996_init_work); 417 418 dev->dbdc_support = true; 419 dev->tbtc_support = true; 420 421 ret = mt7996_dma_init(dev); 422 if (ret) 423 return ret; 424 425 set_bit(MT76_STATE_INITIALIZED, &dev->mphy.state); 426 427 ret = mt7996_mcu_init(dev); 428 if (ret) 429 return ret; 430 431 ret = mt7996_eeprom_init(dev); 432 if (ret < 0) 433 return ret; 434 435 /* Beacon and mgmt frames should occupy wcid 0 */ 436 idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7996_WTBL_STA); 437 if (idx) 438 return -ENOSPC; 439 440 dev->mt76.global_wcid.idx = idx; 441 dev->mt76.global_wcid.hw_key_idx = -1; 442 dev->mt76.global_wcid.tx_info |= MT_WCID_TX_INFO_SET; 443 rcu_assign_pointer(dev->mt76.wcid[idx], &dev->mt76.global_wcid); 444 445 return 0; 446 } 447 448 void mt7996_set_stream_vht_txbf_caps(struct mt7996_phy *phy) 449 { 450 int sts; 451 u32 *cap; 452 453 if (!phy->mt76->cap.has_5ghz) 454 return; 455 456 sts = hweight16(phy->mt76->chainmask); 457 cap = &phy->mt76->sband_5g.sband.vht_cap.cap; 458 459 *cap |= IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE | 460 IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE | 461 (3 << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT); 462 463 *cap &= ~(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK | 464 IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE | 465 IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE); 466 467 if (sts < 2) 468 return; 469 470 *cap |= IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE | 471 IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE | 472 FIELD_PREP(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, sts - 1); 473 } 474 475 static void 476 mt7996_set_stream_he_txbf_caps(struct mt7996_phy *phy, 477 struct ieee80211_sta_he_cap *he_cap, int vif) 478 { 479 struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem; 480 int sts = hweight16(phy->mt76->chainmask); 481 u8 c; 482 483 #ifdef CONFIG_MAC80211_MESH 484 if (vif == NL80211_IFTYPE_MESH_POINT) 485 return; 486 #endif 487 488 elem->phy_cap_info[3] &= ~IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER; 489 elem->phy_cap_info[4] &= ~IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER; 490 491 c = IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK | 492 IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK; 493 elem->phy_cap_info[5] &= ~c; 494 495 c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB | 496 IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB; 497 elem->phy_cap_info[6] &= ~c; 498 499 elem->phy_cap_info[7] &= ~IEEE80211_HE_PHY_CAP7_MAX_NC_MASK; 500 501 c = IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US | 502 IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO | 503 IEEE80211_HE_PHY_CAP2_UL_MU_PARTIAL_MU_MIMO; 504 elem->phy_cap_info[2] |= c; 505 506 c = IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE | 507 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_4 | 508 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_4; 509 elem->phy_cap_info[4] |= c; 510 511 /* do not support NG16 due to spec D4.0 changes subcarrier idx */ 512 c = IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_42_SU | 513 IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_75_MU; 514 515 if (vif == NL80211_IFTYPE_STATION) 516 c |= IEEE80211_HE_PHY_CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO; 517 518 elem->phy_cap_info[6] |= c; 519 520 if (sts < 2) 521 return; 522 523 /* the maximum cap is 4 x 3, (Nr, Nc) = (3, 2) */ 524 elem->phy_cap_info[7] |= min_t(int, sts - 1, 2) << 3; 525 526 if (vif != NL80211_IFTYPE_AP) 527 return; 528 529 elem->phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER; 530 elem->phy_cap_info[4] |= IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER; 531 532 c = FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, 533 sts - 1) | 534 FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK, 535 sts - 1); 536 elem->phy_cap_info[5] |= c; 537 538 c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB | 539 IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB; 540 elem->phy_cap_info[6] |= c; 541 542 c = IEEE80211_HE_PHY_CAP7_STBC_TX_ABOVE_80MHZ | 543 IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ; 544 elem->phy_cap_info[7] |= c; 545 } 546 547 static void 548 mt7996_gen_ppe_thresh(u8 *he_ppet, int nss) 549 { 550 u8 i, ppet_bits, ppet_size, ru_bit_mask = 0x7; /* HE80 */ 551 static const u8 ppet16_ppet8_ru3_ru0[] = {0x1c, 0xc7, 0x71}; 552 553 he_ppet[0] = FIELD_PREP(IEEE80211_PPE_THRES_NSS_MASK, nss - 1) | 554 FIELD_PREP(IEEE80211_PPE_THRES_RU_INDEX_BITMASK_MASK, 555 ru_bit_mask); 556 557 ppet_bits = IEEE80211_PPE_THRES_INFO_PPET_SIZE * 558 nss * hweight8(ru_bit_mask) * 2; 559 ppet_size = DIV_ROUND_UP(ppet_bits, 8); 560 561 for (i = 0; i < ppet_size - 1; i++) 562 he_ppet[i + 1] = ppet16_ppet8_ru3_ru0[i % 3]; 563 564 he_ppet[i + 1] = ppet16_ppet8_ru3_ru0[i % 3] & 565 (0xff >> (8 - (ppet_bits - 1) % 8)); 566 } 567 568 static int 569 mt7996_init_he_caps(struct mt7996_phy *phy, enum nl80211_band band, 570 struct ieee80211_sband_iftype_data *data) 571 { 572 int i, idx = 0, nss = hweight8(phy->mt76->antenna_mask); 573 u16 mcs_map = 0; 574 575 for (i = 0; i < 8; i++) { 576 if (i < nss) 577 mcs_map |= (IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2)); 578 else 579 mcs_map |= (IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2)); 580 } 581 582 for (i = 0; i < NUM_NL80211_IFTYPES; i++) { 583 struct ieee80211_sta_he_cap *he_cap = &data[idx].he_cap; 584 struct ieee80211_he_cap_elem *he_cap_elem = 585 &he_cap->he_cap_elem; 586 struct ieee80211_he_mcs_nss_supp *he_mcs = 587 &he_cap->he_mcs_nss_supp; 588 589 switch (i) { 590 case NL80211_IFTYPE_STATION: 591 case NL80211_IFTYPE_AP: 592 #ifdef CONFIG_MAC80211_MESH 593 case NL80211_IFTYPE_MESH_POINT: 594 #endif 595 break; 596 default: 597 continue; 598 } 599 600 data[idx].types_mask = BIT(i); 601 he_cap->has_he = true; 602 603 he_cap_elem->mac_cap_info[0] = 604 IEEE80211_HE_MAC_CAP0_HTC_HE; 605 he_cap_elem->mac_cap_info[3] = 606 IEEE80211_HE_MAC_CAP3_OMI_CONTROL | 607 IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3; 608 he_cap_elem->mac_cap_info[4] = 609 IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU; 610 611 if (band == NL80211_BAND_2GHZ) 612 he_cap_elem->phy_cap_info[0] = 613 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G; 614 else 615 he_cap_elem->phy_cap_info[0] = 616 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G | 617 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G | 618 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G; 619 620 he_cap_elem->phy_cap_info[1] = 621 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD; 622 he_cap_elem->phy_cap_info[2] = 623 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ | 624 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ; 625 626 switch (i) { 627 case NL80211_IFTYPE_AP: 628 he_cap_elem->mac_cap_info[0] |= 629 IEEE80211_HE_MAC_CAP0_TWT_RES; 630 he_cap_elem->mac_cap_info[2] |= 631 IEEE80211_HE_MAC_CAP2_BSR; 632 he_cap_elem->mac_cap_info[4] |= 633 IEEE80211_HE_MAC_CAP4_BQR; 634 he_cap_elem->mac_cap_info[5] |= 635 IEEE80211_HE_MAC_CAP5_OM_CTRL_UL_MU_DATA_DIS_RX; 636 he_cap_elem->phy_cap_info[3] |= 637 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK | 638 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK; 639 he_cap_elem->phy_cap_info[6] |= 640 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE | 641 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT; 642 he_cap_elem->phy_cap_info[9] |= 643 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU | 644 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU; 645 break; 646 case NL80211_IFTYPE_STATION: 647 he_cap_elem->mac_cap_info[1] |= 648 IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US; 649 650 if (band == NL80211_BAND_2GHZ) 651 he_cap_elem->phy_cap_info[0] |= 652 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G; 653 else 654 he_cap_elem->phy_cap_info[0] |= 655 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G; 656 657 he_cap_elem->phy_cap_info[1] |= 658 IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A | 659 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US; 660 he_cap_elem->phy_cap_info[3] |= 661 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK | 662 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK; 663 he_cap_elem->phy_cap_info[6] |= 664 IEEE80211_HE_PHY_CAP6_TRIG_CQI_FB | 665 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE | 666 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT; 667 he_cap_elem->phy_cap_info[7] |= 668 IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP | 669 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI; 670 he_cap_elem->phy_cap_info[8] |= 671 IEEE80211_HE_PHY_CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G | 672 IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU | 673 IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU | 674 IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_484; 675 he_cap_elem->phy_cap_info[9] |= 676 IEEE80211_HE_PHY_CAP9_LONGER_THAN_16_SIGB_OFDM_SYM | 677 IEEE80211_HE_PHY_CAP9_NON_TRIGGERED_CQI_FEEDBACK | 678 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU | 679 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU | 680 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB | 681 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB; 682 break; 683 } 684 685 he_mcs->rx_mcs_80 = cpu_to_le16(mcs_map); 686 he_mcs->tx_mcs_80 = cpu_to_le16(mcs_map); 687 he_mcs->rx_mcs_160 = cpu_to_le16(mcs_map); 688 he_mcs->tx_mcs_160 = cpu_to_le16(mcs_map); 689 he_mcs->rx_mcs_80p80 = cpu_to_le16(mcs_map); 690 he_mcs->tx_mcs_80p80 = cpu_to_le16(mcs_map); 691 692 mt7996_set_stream_he_txbf_caps(phy, he_cap, i); 693 694 memset(he_cap->ppe_thres, 0, sizeof(he_cap->ppe_thres)); 695 if (he_cap_elem->phy_cap_info[6] & 696 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT) { 697 mt7996_gen_ppe_thresh(he_cap->ppe_thres, nss); 698 } else { 699 he_cap_elem->phy_cap_info[9] |= 700 IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_16US; 701 } 702 703 if (band == NL80211_BAND_6GHZ) { 704 u16 cap = IEEE80211_HE_6GHZ_CAP_TX_ANTPAT_CONS | 705 IEEE80211_HE_6GHZ_CAP_RX_ANTPAT_CONS; 706 707 cap |= u16_encode_bits(IEEE80211_HT_MPDU_DENSITY_2, 708 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START) | 709 u16_encode_bits(IEEE80211_VHT_MAX_AMPDU_1024K, 710 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP) | 711 u16_encode_bits(IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454, 712 IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN); 713 714 data[idx].he_6ghz_capa.capa = cpu_to_le16(cap); 715 } 716 717 idx++; 718 } 719 720 return idx; 721 } 722 723 void mt7996_set_stream_he_caps(struct mt7996_phy *phy) 724 { 725 struct ieee80211_sband_iftype_data *data; 726 struct ieee80211_supported_band *band; 727 int n; 728 729 if (phy->mt76->cap.has_2ghz) { 730 data = phy->iftype[NL80211_BAND_2GHZ]; 731 n = mt7996_init_he_caps(phy, NL80211_BAND_2GHZ, data); 732 733 band = &phy->mt76->sband_2g.sband; 734 band->iftype_data = data; 735 band->n_iftype_data = n; 736 } 737 738 if (phy->mt76->cap.has_5ghz) { 739 data = phy->iftype[NL80211_BAND_5GHZ]; 740 n = mt7996_init_he_caps(phy, NL80211_BAND_5GHZ, data); 741 742 band = &phy->mt76->sband_5g.sband; 743 band->iftype_data = data; 744 band->n_iftype_data = n; 745 } 746 747 if (phy->mt76->cap.has_6ghz) { 748 data = phy->iftype[NL80211_BAND_6GHZ]; 749 n = mt7996_init_he_caps(phy, NL80211_BAND_6GHZ, data); 750 751 band = &phy->mt76->sband_6g.sband; 752 band->iftype_data = data; 753 band->n_iftype_data = n; 754 } 755 } 756 757 int mt7996_register_device(struct mt7996_dev *dev) 758 { 759 struct ieee80211_hw *hw = mt76_hw(dev); 760 int ret; 761 762 dev->phy.dev = dev; 763 dev->phy.mt76 = &dev->mt76.phy; 764 dev->mt76.phy.priv = &dev->phy; 765 INIT_WORK(&dev->rc_work, mt7996_mac_sta_rc_work); 766 INIT_DELAYED_WORK(&dev->mphy.mac_work, mt7996_mac_work); 767 INIT_LIST_HEAD(&dev->sta_rc_list); 768 INIT_LIST_HEAD(&dev->sta_poll_list); 769 INIT_LIST_HEAD(&dev->twt_list); 770 spin_lock_init(&dev->sta_poll_lock); 771 772 init_waitqueue_head(&dev->reset_wait); 773 INIT_WORK(&dev->reset_work, mt7996_mac_reset_work); 774 775 ret = mt7996_init_hardware(dev); 776 if (ret) 777 return ret; 778 779 mt7996_init_wiphy(hw); 780 781 /* init led callbacks */ 782 if (IS_ENABLED(CONFIG_MT76_LEDS)) { 783 dev->mt76.led_cdev.brightness_set = mt7996_led_set_brightness; 784 dev->mt76.led_cdev.blink_set = mt7996_led_set_blink; 785 } 786 787 ret = mt76_register_device(&dev->mt76, true, mt76_rates, 788 ARRAY_SIZE(mt76_rates)); 789 if (ret) 790 return ret; 791 792 ieee80211_queue_work(mt76_hw(dev), &dev->init_work); 793 794 ret = mt7996_register_phy(dev, mt7996_phy2(dev), MT_BAND1); 795 if (ret) 796 return ret; 797 798 ret = mt7996_register_phy(dev, mt7996_phy3(dev), MT_BAND2); 799 if (ret) 800 return ret; 801 802 return mt7996_init_debugfs(&dev->phy); 803 } 804 805 void mt7996_unregister_device(struct mt7996_dev *dev) 806 { 807 mt7996_unregister_phy(mt7996_phy3(dev), MT_BAND2); 808 mt7996_unregister_phy(mt7996_phy2(dev), MT_BAND1); 809 mt76_unregister_device(&dev->mt76); 810 mt7996_mcu_exit(dev); 811 mt7996_tx_token_put(dev); 812 mt7996_dma_cleanup(dev); 813 tasklet_disable(&dev->irq_tasklet); 814 815 mt76_free_device(&dev->mt76); 816 } 817