1 // SPDX-License-Identifier: ISC 2 /* 3 * Copyright (C) 2022 MediaTek Inc. 4 */ 5 6 #include <linux/etherdevice.h> 7 #include <linux/thermal.h> 8 #include "mt7996.h" 9 #include "mac.h" 10 #include "mcu.h" 11 #include "eeprom.h" 12 13 static const struct ieee80211_iface_limit if_limits[] = { 14 { 15 .max = 1, 16 .types = BIT(NL80211_IFTYPE_ADHOC) 17 }, { 18 .max = 16, 19 .types = BIT(NL80211_IFTYPE_AP) 20 #ifdef CONFIG_MAC80211_MESH 21 | BIT(NL80211_IFTYPE_MESH_POINT) 22 #endif 23 }, { 24 .max = MT7996_MAX_INTERFACES, 25 .types = BIT(NL80211_IFTYPE_STATION) 26 } 27 }; 28 29 static const struct ieee80211_iface_combination if_comb[] = { 30 { 31 .limits = if_limits, 32 .n_limits = ARRAY_SIZE(if_limits), 33 .max_interfaces = MT7996_MAX_INTERFACES, 34 .num_different_channels = 1, 35 .beacon_int_infra_match = true, 36 .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) | 37 BIT(NL80211_CHAN_WIDTH_20) | 38 BIT(NL80211_CHAN_WIDTH_40) | 39 BIT(NL80211_CHAN_WIDTH_80) | 40 BIT(NL80211_CHAN_WIDTH_160), 41 } 42 }; 43 44 static void mt7996_led_set_config(struct led_classdev *led_cdev, 45 u8 delay_on, u8 delay_off) 46 { 47 struct mt7996_dev *dev; 48 struct mt76_phy *mphy; 49 u32 val; 50 51 mphy = container_of(led_cdev, struct mt76_phy, leds.cdev); 52 dev = container_of(mphy->dev, struct mt7996_dev, mt76); 53 54 /* select TX blink mode, 2: only data frames */ 55 mt76_rmw_field(dev, MT_TMAC_TCR0(0), MT_TMAC_TCR0_TX_BLINK, 2); 56 57 /* enable LED */ 58 mt76_wr(dev, MT_LED_EN(0), 1); 59 60 /* set LED Tx blink on/off time */ 61 val = FIELD_PREP(MT_LED_TX_BLINK_ON_MASK, delay_on) | 62 FIELD_PREP(MT_LED_TX_BLINK_OFF_MASK, delay_off); 63 mt76_wr(dev, MT_LED_TX_BLINK(0), val); 64 65 /* control LED */ 66 val = MT_LED_CTRL_BLINK_MODE | MT_LED_CTRL_KICK; 67 if (mphy->leds.al) 68 val |= MT_LED_CTRL_POLARITY; 69 70 mt76_wr(dev, MT_LED_CTRL(0), val); 71 mt76_clear(dev, MT_LED_CTRL(0), MT_LED_CTRL_KICK); 72 } 73 74 static int mt7996_led_set_blink(struct led_classdev *led_cdev, 75 unsigned long *delay_on, 76 unsigned long *delay_off) 77 { 78 u16 delta_on = 0, delta_off = 0; 79 80 #define HW_TICK 10 81 #define TO_HW_TICK(_t) (((_t) > HW_TICK) ? ((_t) / HW_TICK) : HW_TICK) 82 83 if (*delay_on) 84 delta_on = TO_HW_TICK(*delay_on); 85 if (*delay_off) 86 delta_off = TO_HW_TICK(*delay_off); 87 88 mt7996_led_set_config(led_cdev, delta_on, delta_off); 89 90 return 0; 91 } 92 93 static void mt7996_led_set_brightness(struct led_classdev *led_cdev, 94 enum led_brightness brightness) 95 { 96 if (!brightness) 97 mt7996_led_set_config(led_cdev, 0, 0xff); 98 else 99 mt7996_led_set_config(led_cdev, 0xff, 0); 100 } 101 102 static void 103 mt7996_init_txpower(struct mt7996_dev *dev, 104 struct ieee80211_supported_band *sband) 105 { 106 int i, nss = hweight8(dev->mphy.antenna_mask); 107 int nss_delta = mt76_tx_power_nss_delta(nss); 108 int pwr_delta = mt7996_eeprom_get_power_delta(dev, sband->band); 109 struct mt76_power_limits limits; 110 111 for (i = 0; i < sband->n_channels; i++) { 112 struct ieee80211_channel *chan = &sband->channels[i]; 113 int target_power = mt7996_eeprom_get_target_power(dev, chan); 114 115 target_power += pwr_delta; 116 target_power = mt76_get_rate_power_limits(&dev->mphy, chan, 117 &limits, 118 target_power); 119 target_power += nss_delta; 120 target_power = DIV_ROUND_UP(target_power, 2); 121 chan->max_power = min_t(int, chan->max_reg_power, 122 target_power); 123 chan->orig_mpwr = target_power; 124 } 125 } 126 127 static void 128 mt7996_regd_notifier(struct wiphy *wiphy, 129 struct regulatory_request *request) 130 { 131 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); 132 struct mt7996_dev *dev = mt7996_hw_dev(hw); 133 struct mt7996_phy *phy = mt7996_hw_phy(hw); 134 135 memcpy(dev->mt76.alpha2, request->alpha2, sizeof(dev->mt76.alpha2)); 136 dev->mt76.region = request->dfs_region; 137 138 if (dev->mt76.region == NL80211_DFS_UNSET) 139 mt7996_mcu_rdd_background_enable(phy, NULL); 140 141 mt7996_init_txpower(dev, &phy->mt76->sband_2g.sband); 142 mt7996_init_txpower(dev, &phy->mt76->sband_5g.sband); 143 mt7996_init_txpower(dev, &phy->mt76->sband_6g.sband); 144 145 phy->mt76->dfs_state = MT_DFS_STATE_UNKNOWN; 146 mt7996_dfs_init_radar_detector(phy); 147 } 148 149 static void 150 mt7996_init_wiphy(struct ieee80211_hw *hw) 151 { 152 struct mt7996_phy *phy = mt7996_hw_phy(hw); 153 struct mt76_dev *mdev = &phy->dev->mt76; 154 struct wiphy *wiphy = hw->wiphy; 155 u16 max_subframes = phy->dev->has_eht ? IEEE80211_MAX_AMPDU_BUF_EHT : 156 IEEE80211_MAX_AMPDU_BUF_HE; 157 158 hw->queues = 4; 159 hw->max_rx_aggregation_subframes = max_subframes; 160 hw->max_tx_aggregation_subframes = max_subframes; 161 hw->netdev_features = NETIF_F_RXCSUM; 162 163 hw->radiotap_timestamp.units_pos = 164 IEEE80211_RADIOTAP_TIMESTAMP_UNIT_US; 165 166 phy->slottime = 9; 167 168 hw->sta_data_size = sizeof(struct mt7996_sta); 169 hw->vif_data_size = sizeof(struct mt7996_vif); 170 171 wiphy->iface_combinations = if_comb; 172 wiphy->n_iface_combinations = ARRAY_SIZE(if_comb); 173 wiphy->reg_notifier = mt7996_regd_notifier; 174 wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH; 175 176 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BSS_COLOR); 177 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS); 178 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_LEGACY); 179 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HT); 180 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_VHT); 181 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HE); 182 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_UNSOL_BCAST_PROBE_RESP); 183 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_FILS_DISCOVERY); 184 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_ACK_SIGNAL_SUPPORT); 185 186 if (!mdev->dev->of_node || 187 !of_property_read_bool(mdev->dev->of_node, 188 "mediatek,disable-radar-background")) 189 wiphy_ext_feature_set(wiphy, 190 NL80211_EXT_FEATURE_RADAR_BACKGROUND); 191 192 ieee80211_hw_set(hw, HAS_RATE_CONTROL); 193 ieee80211_hw_set(hw, SUPPORTS_TX_ENCAP_OFFLOAD); 194 ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD); 195 ieee80211_hw_set(hw, WANT_MONITOR_VIF); 196 197 hw->max_tx_fragments = 4; 198 199 if (phy->mt76->cap.has_2ghz) 200 phy->mt76->sband_2g.sband.ht_cap.cap |= 201 IEEE80211_HT_CAP_LDPC_CODING | 202 IEEE80211_HT_CAP_MAX_AMSDU; 203 204 if (phy->mt76->cap.has_5ghz) { 205 phy->mt76->sband_5g.sband.ht_cap.cap |= 206 IEEE80211_HT_CAP_LDPC_CODING | 207 IEEE80211_HT_CAP_MAX_AMSDU; 208 209 phy->mt76->sband_5g.sband.vht_cap.cap |= 210 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 | 211 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK | 212 IEEE80211_VHT_CAP_SHORT_GI_160 | 213 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ; 214 } 215 216 mt76_set_stream_caps(phy->mt76, true); 217 mt7996_set_stream_vht_txbf_caps(phy); 218 mt7996_set_stream_he_eht_caps(phy); 219 220 wiphy->available_antennas_rx = phy->mt76->antenna_mask; 221 wiphy->available_antennas_tx = phy->mt76->antenna_mask; 222 } 223 224 static void 225 mt7996_mac_init_band(struct mt7996_dev *dev, u8 band) 226 { 227 u32 mask, set; 228 229 /* clear estimated value of EIFS for Rx duration & OBSS time */ 230 mt76_wr(dev, MT_WF_RMAC_RSVD0(band), MT_WF_RMAC_RSVD0_EIFS_CLR); 231 232 /* clear backoff time for Rx duration */ 233 mt76_clear(dev, MT_WF_RMAC_MIB_AIRTIME1(band), 234 MT_WF_RMAC_MIB_NONQOSD_BACKOFF); 235 mt76_clear(dev, MT_WF_RMAC_MIB_AIRTIME3(band), 236 MT_WF_RMAC_MIB_QOS01_BACKOFF); 237 mt76_clear(dev, MT_WF_RMAC_MIB_AIRTIME4(band), 238 MT_WF_RMAC_MIB_QOS23_BACKOFF); 239 240 /* clear backoff time and set software compensation for OBSS time */ 241 mask = MT_WF_RMAC_MIB_OBSS_BACKOFF | MT_WF_RMAC_MIB_ED_OFFSET; 242 set = FIELD_PREP(MT_WF_RMAC_MIB_OBSS_BACKOFF, 0) | 243 FIELD_PREP(MT_WF_RMAC_MIB_ED_OFFSET, 4); 244 mt76_rmw(dev, MT_WF_RMAC_MIB_AIRTIME0(band), mask, set); 245 246 /* filter out non-resp frames and get instanstaeous signal reporting */ 247 mask = MT_WTBLOFF_RSCR_RCPI_MODE | MT_WTBLOFF_RSCR_RCPI_PARAM; 248 set = FIELD_PREP(MT_WTBLOFF_RSCR_RCPI_MODE, 0) | 249 FIELD_PREP(MT_WTBLOFF_RSCR_RCPI_PARAM, 0x3); 250 mt76_rmw(dev, MT_WTBLOFF_RSCR(band), mask, set); 251 } 252 253 static void mt7996_mac_init(struct mt7996_dev *dev) 254 { 255 #define HIF_TXD_V2_1 4 256 int i; 257 258 mt76_clear(dev, MT_MDP_DCR2, MT_MDP_DCR2_RX_TRANS_SHORT); 259 260 for (i = 0; i < mt7996_wtbl_size(dev); i++) 261 mt7996_mac_wtbl_update(dev, i, 262 MT_WTBL_UPDATE_ADM_COUNT_CLEAR); 263 264 if (IS_ENABLED(CONFIG_MT76_LEDS)) { 265 i = dev->mphy.leds.pin ? MT_LED_GPIO_MUX3 : MT_LED_GPIO_MUX2; 266 mt76_rmw_field(dev, i, MT_LED_GPIO_SEL_MASK, 4); 267 } 268 269 /* txs report queue */ 270 mt76_rmw_field(dev, MT_DMA_TCRF1(0), MT_DMA_TCRF1_QIDX, 0); 271 mt76_rmw_field(dev, MT_DMA_TCRF1(1), MT_DMA_TCRF1_QIDX, 6); 272 mt76_rmw_field(dev, MT_DMA_TCRF1(2), MT_DMA_TCRF1_QIDX, 0); 273 274 /* rro module init */ 275 mt7996_mcu_set_rro(dev, UNI_RRO_SET_PLATFORM_TYPE, 2); 276 mt7996_mcu_set_rro(dev, UNI_RRO_SET_BYPASS_MODE, 3); 277 mt7996_mcu_set_rro(dev, UNI_RRO_SET_TXFREE_PATH, 1); 278 279 mt7996_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET), 280 MCU_WA_PARAM_HW_PATH_HIF_VER, 281 HIF_TXD_V2_1, 0); 282 283 for (i = MT_BAND0; i <= MT_BAND2; i++) 284 mt7996_mac_init_band(dev, i); 285 } 286 287 static int mt7996_txbf_init(struct mt7996_dev *dev) 288 { 289 int ret; 290 291 if (dev->dbdc_support) { 292 ret = mt7996_mcu_set_txbf(dev, BF_MOD_EN_CTRL); 293 if (ret) 294 return ret; 295 } 296 297 /* trigger sounding packets */ 298 ret = mt7996_mcu_set_txbf(dev, BF_SOUNDING_ON); 299 if (ret) 300 return ret; 301 302 /* enable eBF */ 303 return mt7996_mcu_set_txbf(dev, BF_HW_EN_UPDATE); 304 } 305 306 static int mt7996_register_phy(struct mt7996_dev *dev, struct mt7996_phy *phy, 307 enum mt76_band_id band) 308 { 309 struct mt76_phy *mphy; 310 u32 mac_ofs, hif1_ofs = 0; 311 int ret; 312 313 if (band != MT_BAND1 && band != MT_BAND2) 314 return 0; 315 316 if ((band == MT_BAND1 && !dev->dbdc_support) || 317 (band == MT_BAND2 && !dev->tbtc_support)) 318 return 0; 319 320 if (phy) 321 return 0; 322 323 if (band == MT_BAND2 && dev->hif2) 324 hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0); 325 326 mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7996_ops, band); 327 if (!mphy) 328 return -ENOMEM; 329 330 phy = mphy->priv; 331 phy->dev = dev; 332 phy->mt76 = mphy; 333 mphy->dev->phys[band] = mphy; 334 335 INIT_DELAYED_WORK(&mphy->mac_work, mt7996_mac_work); 336 337 ret = mt7996_eeprom_parse_hw_cap(dev, phy); 338 if (ret) 339 goto error; 340 341 mac_ofs = band == MT_BAND2 ? MT_EE_MAC_ADDR3 : MT_EE_MAC_ADDR2; 342 memcpy(mphy->macaddr, dev->mt76.eeprom.data + mac_ofs, ETH_ALEN); 343 /* Make the extra PHY MAC address local without overlapping with 344 * the usual MAC address allocation scheme on multiple virtual interfaces 345 */ 346 if (!is_valid_ether_addr(mphy->macaddr)) { 347 memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR, 348 ETH_ALEN); 349 mphy->macaddr[0] |= 2; 350 mphy->macaddr[0] ^= BIT(7); 351 if (band == MT_BAND2) 352 mphy->macaddr[0] ^= BIT(6); 353 } 354 mt76_eeprom_override(mphy); 355 356 /* init wiphy according to mphy and phy */ 357 mt7996_init_wiphy(mphy->hw); 358 ret = mt76_connac_init_tx_queues(phy->mt76, 359 MT_TXQ_ID(band), 360 MT7996_TX_RING_SIZE, 361 MT_TXQ_RING_BASE(band) + hif1_ofs, 0); 362 if (ret) 363 goto error; 364 365 ret = mt76_register_phy(mphy, true, mt76_rates, 366 ARRAY_SIZE(mt76_rates)); 367 if (ret) 368 goto error; 369 370 ret = mt7996_init_debugfs(phy); 371 if (ret) 372 goto error; 373 374 return 0; 375 376 error: 377 mphy->dev->phys[band] = NULL; 378 ieee80211_free_hw(mphy->hw); 379 return ret; 380 } 381 382 static void 383 mt7996_unregister_phy(struct mt7996_phy *phy, enum mt76_band_id band) 384 { 385 struct mt76_phy *mphy; 386 387 if (!phy) 388 return; 389 390 mphy = phy->dev->mt76.phys[band]; 391 mt76_unregister_phy(mphy); 392 ieee80211_free_hw(mphy->hw); 393 phy->dev->mt76.phys[band] = NULL; 394 } 395 396 static void mt7996_init_work(struct work_struct *work) 397 { 398 struct mt7996_dev *dev = container_of(work, struct mt7996_dev, 399 init_work); 400 401 mt7996_mcu_set_eeprom(dev); 402 mt7996_mac_init(dev); 403 mt7996_init_txpower(dev, &dev->mphy.sband_2g.sband); 404 mt7996_init_txpower(dev, &dev->mphy.sband_5g.sband); 405 mt7996_init_txpower(dev, &dev->mphy.sband_6g.sband); 406 mt7996_txbf_init(dev); 407 } 408 409 void mt7996_wfsys_reset(struct mt7996_dev *dev) 410 { 411 mt76_set(dev, MT_WF_SUBSYS_RST, 0x1); 412 msleep(20); 413 414 mt76_clear(dev, MT_WF_SUBSYS_RST, 0x1); 415 msleep(20); 416 } 417 418 static int mt7996_init_hardware(struct mt7996_dev *dev) 419 { 420 int ret, idx; 421 422 mt76_wr(dev, MT_INT_SOURCE_CSR, ~0); 423 424 INIT_WORK(&dev->init_work, mt7996_init_work); 425 426 dev->dbdc_support = true; 427 dev->tbtc_support = true; 428 429 ret = mt7996_dma_init(dev); 430 if (ret) 431 return ret; 432 433 set_bit(MT76_STATE_INITIALIZED, &dev->mphy.state); 434 435 ret = mt7996_mcu_init(dev); 436 if (ret) 437 return ret; 438 439 ret = mt7996_eeprom_init(dev); 440 if (ret < 0) 441 return ret; 442 443 /* Beacon and mgmt frames should occupy wcid 0 */ 444 idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7996_WTBL_STA); 445 if (idx) 446 return -ENOSPC; 447 448 dev->mt76.global_wcid.idx = idx; 449 dev->mt76.global_wcid.hw_key_idx = -1; 450 dev->mt76.global_wcid.tx_info |= MT_WCID_TX_INFO_SET; 451 rcu_assign_pointer(dev->mt76.wcid[idx], &dev->mt76.global_wcid); 452 453 return 0; 454 } 455 456 void mt7996_set_stream_vht_txbf_caps(struct mt7996_phy *phy) 457 { 458 int sts; 459 u32 *cap; 460 461 if (!phy->mt76->cap.has_5ghz) 462 return; 463 464 sts = hweight16(phy->mt76->chainmask); 465 cap = &phy->mt76->sband_5g.sband.vht_cap.cap; 466 467 *cap |= IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE | 468 IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE | 469 FIELD_PREP(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK, sts - 1); 470 471 *cap &= ~(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK | 472 IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE | 473 IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE); 474 475 if (sts < 2) 476 return; 477 478 *cap |= IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE | 479 IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE | 480 FIELD_PREP(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, sts - 1); 481 } 482 483 static void 484 mt7996_set_stream_he_txbf_caps(struct mt7996_phy *phy, 485 struct ieee80211_sta_he_cap *he_cap, int vif) 486 { 487 struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem; 488 int sts = hweight16(phy->mt76->chainmask); 489 u8 c; 490 491 #ifdef CONFIG_MAC80211_MESH 492 if (vif == NL80211_IFTYPE_MESH_POINT) 493 return; 494 #endif 495 496 elem->phy_cap_info[3] &= ~IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER; 497 elem->phy_cap_info[4] &= ~IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER; 498 499 c = IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK | 500 IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK; 501 elem->phy_cap_info[5] &= ~c; 502 503 c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB | 504 IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB; 505 elem->phy_cap_info[6] &= ~c; 506 507 elem->phy_cap_info[7] &= ~IEEE80211_HE_PHY_CAP7_MAX_NC_MASK; 508 509 c = IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US | 510 IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO | 511 IEEE80211_HE_PHY_CAP2_UL_MU_PARTIAL_MU_MIMO; 512 elem->phy_cap_info[2] |= c; 513 514 c = IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE | 515 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_4 | 516 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_4; 517 elem->phy_cap_info[4] |= c; 518 519 /* do not support NG16 due to spec D4.0 changes subcarrier idx */ 520 c = IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_42_SU | 521 IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_75_MU; 522 523 if (vif == NL80211_IFTYPE_STATION) 524 c |= IEEE80211_HE_PHY_CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO; 525 526 elem->phy_cap_info[6] |= c; 527 528 if (sts < 2) 529 return; 530 531 /* the maximum cap is 4 x 3, (Nr, Nc) = (3, 2) */ 532 elem->phy_cap_info[7] |= min_t(int, sts - 1, 2) << 3; 533 534 if (vif != NL80211_IFTYPE_AP) 535 return; 536 537 elem->phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER; 538 elem->phy_cap_info[4] |= IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER; 539 540 c = FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, 541 sts - 1) | 542 FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK, 543 sts - 1); 544 elem->phy_cap_info[5] |= c; 545 546 c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB | 547 IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB; 548 elem->phy_cap_info[6] |= c; 549 550 c = IEEE80211_HE_PHY_CAP7_STBC_TX_ABOVE_80MHZ | 551 IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ; 552 elem->phy_cap_info[7] |= c; 553 } 554 555 static void 556 mt7996_gen_ppe_thresh(u8 *he_ppet, int nss) 557 { 558 u8 i, ppet_bits, ppet_size, ru_bit_mask = 0x7; /* HE80 */ 559 static const u8 ppet16_ppet8_ru3_ru0[] = {0x1c, 0xc7, 0x71}; 560 561 he_ppet[0] = FIELD_PREP(IEEE80211_PPE_THRES_NSS_MASK, nss - 1) | 562 FIELD_PREP(IEEE80211_PPE_THRES_RU_INDEX_BITMASK_MASK, 563 ru_bit_mask); 564 565 ppet_bits = IEEE80211_PPE_THRES_INFO_PPET_SIZE * 566 nss * hweight8(ru_bit_mask) * 2; 567 ppet_size = DIV_ROUND_UP(ppet_bits, 8); 568 569 for (i = 0; i < ppet_size - 1; i++) 570 he_ppet[i + 1] = ppet16_ppet8_ru3_ru0[i % 3]; 571 572 he_ppet[i + 1] = ppet16_ppet8_ru3_ru0[i % 3] & 573 (0xff >> (8 - (ppet_bits - 1) % 8)); 574 } 575 576 static void 577 mt7996_init_he_caps(struct mt7996_phy *phy, enum nl80211_band band, 578 struct ieee80211_sband_iftype_data *data, 579 enum nl80211_iftype iftype) 580 { 581 struct ieee80211_sta_he_cap *he_cap = &data->he_cap; 582 struct ieee80211_he_cap_elem *he_cap_elem = &he_cap->he_cap_elem; 583 struct ieee80211_he_mcs_nss_supp *he_mcs = &he_cap->he_mcs_nss_supp; 584 int i, nss = hweight8(phy->mt76->antenna_mask); 585 u16 mcs_map = 0; 586 587 for (i = 0; i < 8; i++) { 588 if (i < nss) 589 mcs_map |= (IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2)); 590 else 591 mcs_map |= (IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2)); 592 } 593 594 he_cap->has_he = true; 595 596 he_cap_elem->mac_cap_info[0] = IEEE80211_HE_MAC_CAP0_HTC_HE; 597 he_cap_elem->mac_cap_info[3] = IEEE80211_HE_MAC_CAP3_OMI_CONTROL | 598 IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3; 599 he_cap_elem->mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU; 600 601 if (band == NL80211_BAND_2GHZ) 602 he_cap_elem->phy_cap_info[0] = 603 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G; 604 else 605 he_cap_elem->phy_cap_info[0] = 606 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G | 607 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G; 608 609 he_cap_elem->phy_cap_info[1] = IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD; 610 he_cap_elem->phy_cap_info[2] = IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ | 611 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ; 612 613 switch (iftype) { 614 case NL80211_IFTYPE_AP: 615 he_cap_elem->mac_cap_info[0] |= IEEE80211_HE_MAC_CAP0_TWT_RES; 616 he_cap_elem->mac_cap_info[2] |= IEEE80211_HE_MAC_CAP2_BSR; 617 he_cap_elem->mac_cap_info[4] |= IEEE80211_HE_MAC_CAP4_BQR; 618 he_cap_elem->mac_cap_info[5] |= 619 IEEE80211_HE_MAC_CAP5_OM_CTRL_UL_MU_DATA_DIS_RX; 620 he_cap_elem->phy_cap_info[3] |= 621 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK | 622 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK; 623 he_cap_elem->phy_cap_info[6] |= 624 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE | 625 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT; 626 he_cap_elem->phy_cap_info[9] |= 627 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU | 628 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU; 629 break; 630 case NL80211_IFTYPE_STATION: 631 he_cap_elem->mac_cap_info[1] |= 632 IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US; 633 634 if (band == NL80211_BAND_2GHZ) 635 he_cap_elem->phy_cap_info[0] |= 636 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G; 637 else 638 he_cap_elem->phy_cap_info[0] |= 639 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G; 640 641 he_cap_elem->phy_cap_info[1] |= 642 IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A | 643 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US; 644 he_cap_elem->phy_cap_info[3] |= 645 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK | 646 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK; 647 he_cap_elem->phy_cap_info[6] |= 648 IEEE80211_HE_PHY_CAP6_TRIG_CQI_FB | 649 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE | 650 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT; 651 he_cap_elem->phy_cap_info[7] |= 652 IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP | 653 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI; 654 he_cap_elem->phy_cap_info[8] |= 655 IEEE80211_HE_PHY_CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G | 656 IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU | 657 IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU | 658 IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_484; 659 he_cap_elem->phy_cap_info[9] |= 660 IEEE80211_HE_PHY_CAP9_LONGER_THAN_16_SIGB_OFDM_SYM | 661 IEEE80211_HE_PHY_CAP9_NON_TRIGGERED_CQI_FEEDBACK | 662 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU | 663 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU | 664 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB | 665 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB; 666 break; 667 default: 668 break; 669 } 670 671 he_mcs->rx_mcs_80 = cpu_to_le16(mcs_map); 672 he_mcs->tx_mcs_80 = cpu_to_le16(mcs_map); 673 he_mcs->rx_mcs_160 = cpu_to_le16(mcs_map); 674 he_mcs->tx_mcs_160 = cpu_to_le16(mcs_map); 675 676 mt7996_set_stream_he_txbf_caps(phy, he_cap, iftype); 677 678 memset(he_cap->ppe_thres, 0, sizeof(he_cap->ppe_thres)); 679 if (he_cap_elem->phy_cap_info[6] & 680 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT) { 681 mt7996_gen_ppe_thresh(he_cap->ppe_thres, nss); 682 } else { 683 he_cap_elem->phy_cap_info[9] |= 684 u8_encode_bits(IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_16US, 685 IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_MASK); 686 } 687 688 if (band == NL80211_BAND_6GHZ) { 689 u16 cap = IEEE80211_HE_6GHZ_CAP_TX_ANTPAT_CONS | 690 IEEE80211_HE_6GHZ_CAP_RX_ANTPAT_CONS; 691 692 cap |= u16_encode_bits(IEEE80211_HT_MPDU_DENSITY_2, 693 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START) | 694 u16_encode_bits(IEEE80211_VHT_MAX_AMPDU_1024K, 695 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP) | 696 u16_encode_bits(IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454, 697 IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN); 698 699 data->he_6ghz_capa.capa = cpu_to_le16(cap); 700 } 701 } 702 703 static void 704 mt7996_init_eht_caps(struct mt7996_phy *phy, enum nl80211_band band, 705 struct ieee80211_sband_iftype_data *data, 706 enum nl80211_iftype iftype) 707 { 708 struct ieee80211_sta_eht_cap *eht_cap = &data->eht_cap; 709 struct ieee80211_eht_cap_elem_fixed *eht_cap_elem = &eht_cap->eht_cap_elem; 710 struct ieee80211_eht_mcs_nss_supp *eht_nss = &eht_cap->eht_mcs_nss_supp; 711 enum nl80211_chan_width width = phy->mt76->chandef.width; 712 int nss = hweight8(phy->mt76->antenna_mask); 713 int sts = hweight16(phy->mt76->chainmask); 714 u8 val; 715 716 if (!phy->dev->has_eht) 717 return; 718 719 eht_cap->has_eht = true; 720 721 eht_cap_elem->mac_cap_info[0] = 722 IEEE80211_EHT_MAC_CAP0_EPCS_PRIO_ACCESS | 723 IEEE80211_EHT_MAC_CAP0_OM_CONTROL; 724 725 eht_cap_elem->phy_cap_info[0] = 726 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ | 727 IEEE80211_EHT_PHY_CAP0_NDP_4_EHT_LFT_32_GI | 728 IEEE80211_EHT_PHY_CAP0_SU_BEAMFORMER | 729 IEEE80211_EHT_PHY_CAP0_SU_BEAMFORMEE; 730 731 eht_cap_elem->phy_cap_info[0] |= 732 u8_encode_bits(u8_get_bits(sts - 1, BIT(0)), 733 IEEE80211_EHT_PHY_CAP0_BEAMFORMEE_SS_80MHZ_MASK); 734 735 eht_cap_elem->phy_cap_info[1] = 736 u8_encode_bits(u8_get_bits(sts - 1, GENMASK(2, 1)), 737 IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_80MHZ_MASK) | 738 u8_encode_bits(sts - 1, 739 IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_160MHZ_MASK) | 740 u8_encode_bits(sts - 1, 741 IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_320MHZ_MASK); 742 743 eht_cap_elem->phy_cap_info[2] = 744 u8_encode_bits(sts - 1, IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_80MHZ_MASK) | 745 u8_encode_bits(sts - 1, IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_160MHZ_MASK) | 746 u8_encode_bits(sts - 1, IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_320MHZ_MASK); 747 748 eht_cap_elem->phy_cap_info[3] = 749 IEEE80211_EHT_PHY_CAP3_NG_16_SU_FEEDBACK | 750 IEEE80211_EHT_PHY_CAP3_NG_16_MU_FEEDBACK | 751 IEEE80211_EHT_PHY_CAP3_CODEBOOK_4_2_SU_FDBK | 752 IEEE80211_EHT_PHY_CAP3_CODEBOOK_7_5_MU_FDBK | 753 IEEE80211_EHT_PHY_CAP3_TRIG_SU_BF_FDBK | 754 IEEE80211_EHT_PHY_CAP3_TRIG_MU_BF_PART_BW_FDBK | 755 IEEE80211_EHT_PHY_CAP3_TRIG_CQI_FDBK; 756 757 eht_cap_elem->phy_cap_info[4] = 758 u8_encode_bits(min_t(int, sts - 1, 2), 759 IEEE80211_EHT_PHY_CAP4_MAX_NC_MASK); 760 761 eht_cap_elem->phy_cap_info[5] = 762 IEEE80211_EHT_PHY_CAP5_NON_TRIG_CQI_FEEDBACK | 763 u8_encode_bits(IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_16US, 764 IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_MASK) | 765 u8_encode_bits(u8_get_bits(0x11, GENMASK(1, 0)), 766 IEEE80211_EHT_PHY_CAP5_MAX_NUM_SUPP_EHT_LTF_MASK); 767 768 val = width == NL80211_CHAN_WIDTH_320 ? 0xf : 769 width == NL80211_CHAN_WIDTH_160 ? 0x7 : 770 width == NL80211_CHAN_WIDTH_80 ? 0x3 : 0x1; 771 eht_cap_elem->phy_cap_info[6] = 772 u8_encode_bits(u8_get_bits(0x11, GENMASK(4, 2)), 773 IEEE80211_EHT_PHY_CAP6_MAX_NUM_SUPP_EHT_LTF_MASK) | 774 u8_encode_bits(val, IEEE80211_EHT_PHY_CAP6_MCS15_SUPP_MASK); 775 776 eht_cap_elem->phy_cap_info[7] = 777 IEEE80211_EHT_PHY_CAP7_NON_OFDMA_UL_MU_MIMO_80MHZ | 778 IEEE80211_EHT_PHY_CAP7_NON_OFDMA_UL_MU_MIMO_160MHZ | 779 IEEE80211_EHT_PHY_CAP7_NON_OFDMA_UL_MU_MIMO_320MHZ | 780 IEEE80211_EHT_PHY_CAP7_MU_BEAMFORMER_80MHZ | 781 IEEE80211_EHT_PHY_CAP7_MU_BEAMFORMER_160MHZ | 782 IEEE80211_EHT_PHY_CAP7_MU_BEAMFORMER_320MHZ; 783 784 val = u8_encode_bits(nss, IEEE80211_EHT_MCS_NSS_RX) | 785 u8_encode_bits(nss, IEEE80211_EHT_MCS_NSS_TX); 786 #define SET_EHT_MAX_NSS(_bw, _val) do { \ 787 eht_nss->bw._##_bw.rx_tx_mcs9_max_nss = _val; \ 788 eht_nss->bw._##_bw.rx_tx_mcs11_max_nss = _val; \ 789 eht_nss->bw._##_bw.rx_tx_mcs13_max_nss = _val; \ 790 } while (0) 791 792 SET_EHT_MAX_NSS(80, val); 793 SET_EHT_MAX_NSS(160, val); 794 SET_EHT_MAX_NSS(320, val); 795 #undef SET_EHT_MAX_NSS 796 } 797 798 static void 799 __mt7996_set_stream_he_eht_caps(struct mt7996_phy *phy, 800 struct ieee80211_supported_band *sband, 801 enum nl80211_band band) 802 { 803 struct ieee80211_sband_iftype_data *data = phy->iftype[band]; 804 int i, n = 0; 805 806 for (i = 0; i < NUM_NL80211_IFTYPES; i++) { 807 switch (i) { 808 case NL80211_IFTYPE_STATION: 809 case NL80211_IFTYPE_AP: 810 #ifdef CONFIG_MAC80211_MESH 811 case NL80211_IFTYPE_MESH_POINT: 812 #endif 813 break; 814 default: 815 continue; 816 } 817 818 data[n].types_mask = BIT(i); 819 mt7996_init_he_caps(phy, band, &data[n], i); 820 mt7996_init_eht_caps(phy, band, &data[n], i); 821 822 n++; 823 } 824 825 sband->iftype_data = data; 826 sband->n_iftype_data = n; 827 } 828 829 void mt7996_set_stream_he_eht_caps(struct mt7996_phy *phy) 830 { 831 if (phy->mt76->cap.has_2ghz) 832 __mt7996_set_stream_he_eht_caps(phy, &phy->mt76->sband_2g.sband, 833 NL80211_BAND_2GHZ); 834 835 if (phy->mt76->cap.has_5ghz) 836 __mt7996_set_stream_he_eht_caps(phy, &phy->mt76->sband_5g.sband, 837 NL80211_BAND_5GHZ); 838 839 if (phy->mt76->cap.has_6ghz) 840 __mt7996_set_stream_he_eht_caps(phy, &phy->mt76->sband_6g.sband, 841 NL80211_BAND_6GHZ); 842 } 843 844 int mt7996_register_device(struct mt7996_dev *dev) 845 { 846 struct ieee80211_hw *hw = mt76_hw(dev); 847 int ret; 848 849 dev->phy.dev = dev; 850 dev->phy.mt76 = &dev->mt76.phy; 851 dev->mt76.phy.priv = &dev->phy; 852 INIT_WORK(&dev->rc_work, mt7996_mac_sta_rc_work); 853 INIT_DELAYED_WORK(&dev->mphy.mac_work, mt7996_mac_work); 854 INIT_LIST_HEAD(&dev->sta_rc_list); 855 INIT_LIST_HEAD(&dev->sta_poll_list); 856 INIT_LIST_HEAD(&dev->twt_list); 857 spin_lock_init(&dev->sta_poll_lock); 858 859 init_waitqueue_head(&dev->reset_wait); 860 INIT_WORK(&dev->reset_work, mt7996_mac_reset_work); 861 862 ret = mt7996_init_hardware(dev); 863 if (ret) 864 return ret; 865 866 mt7996_init_wiphy(hw); 867 868 /* init led callbacks */ 869 if (IS_ENABLED(CONFIG_MT76_LEDS)) { 870 dev->mphy.leds.cdev.brightness_set = mt7996_led_set_brightness; 871 dev->mphy.leds.cdev.blink_set = mt7996_led_set_blink; 872 } 873 874 ret = mt76_register_device(&dev->mt76, true, mt76_rates, 875 ARRAY_SIZE(mt76_rates)); 876 if (ret) 877 return ret; 878 879 ieee80211_queue_work(mt76_hw(dev), &dev->init_work); 880 881 ret = mt7996_register_phy(dev, mt7996_phy2(dev), MT_BAND1); 882 if (ret) 883 return ret; 884 885 ret = mt7996_register_phy(dev, mt7996_phy3(dev), MT_BAND2); 886 if (ret) 887 return ret; 888 889 return mt7996_init_debugfs(&dev->phy); 890 } 891 892 void mt7996_unregister_device(struct mt7996_dev *dev) 893 { 894 mt7996_unregister_phy(mt7996_phy3(dev), MT_BAND2); 895 mt7996_unregister_phy(mt7996_phy2(dev), MT_BAND1); 896 mt76_unregister_device(&dev->mt76); 897 mt7996_mcu_exit(dev); 898 mt7996_tx_token_put(dev); 899 mt7996_dma_cleanup(dev); 900 tasklet_disable(&dev->irq_tasklet); 901 902 mt76_free_device(&dev->mt76); 903 } 904