198686cd2SShayne Chen /* SPDX-License-Identifier: ISC */
298686cd2SShayne Chen /*
398686cd2SShayne Chen * Copyright (C) 2022 MediaTek Inc.
498686cd2SShayne Chen */
598686cd2SShayne Chen
698686cd2SShayne Chen #ifndef __MT7996_EEPROM_H
798686cd2SShayne Chen #define __MT7996_EEPROM_H
898686cd2SShayne Chen
998686cd2SShayne Chen #include "mt7996.h"
1098686cd2SShayne Chen
1198686cd2SShayne Chen enum mt7996_eeprom_field {
1298686cd2SShayne Chen MT_EE_CHIP_ID = 0x000,
1398686cd2SShayne Chen MT_EE_VERSION = 0x002,
1498686cd2SShayne Chen MT_EE_MAC_ADDR = 0x004,
1598686cd2SShayne Chen MT_EE_MAC_ADDR2 = 0x00a,
1698686cd2SShayne Chen MT_EE_WIFI_CONF = 0x190,
1798686cd2SShayne Chen MT_EE_MAC_ADDR3 = 0x2c0,
1898686cd2SShayne Chen MT_EE_RATE_DELTA_2G = 0x1400,
1998686cd2SShayne Chen MT_EE_RATE_DELTA_5G = 0x147d,
2098686cd2SShayne Chen MT_EE_RATE_DELTA_6G = 0x154a,
2198686cd2SShayne Chen MT_EE_TX0_POWER_2G = 0x1300,
2298686cd2SShayne Chen MT_EE_TX0_POWER_5G = 0x1301,
2398686cd2SShayne Chen MT_EE_TX0_POWER_6G = 0x1310,
2498686cd2SShayne Chen
2598686cd2SShayne Chen __MT_EE_MAX = 0x1dff,
2698686cd2SShayne Chen };
2798686cd2SShayne Chen
2898686cd2SShayne Chen #define MT_EE_WIFI_CONF0_TX_PATH GENMASK(2, 0)
2998686cd2SShayne Chen #define MT_EE_WIFI_CONF0_BAND_SEL GENMASK(2, 0)
3098686cd2SShayne Chen #define MT_EE_WIFI_CONF1_BAND_SEL GENMASK(5, 3)
3198686cd2SShayne Chen #define MT_EE_WIFI_CONF2_BAND_SEL GENMASK(2, 0)
3298686cd2SShayne Chen
3398686cd2SShayne Chen #define MT_EE_WIFI_CONF1_TX_PATH_BAND0 GENMASK(5, 3)
34*72fc0df3SStanleyYP Wang #define MT_EE_WIFI_CONF2_TX_PATH_BAND1 GENMASK(2, 0)
35*72fc0df3SStanleyYP Wang #define MT_EE_WIFI_CONF2_TX_PATH_BAND2 GENMASK(5, 3)
3698686cd2SShayne Chen #define MT_EE_WIFI_CONF4_STREAM_NUM_BAND0 GENMASK(5, 3)
37*72fc0df3SStanleyYP Wang #define MT_EE_WIFI_CONF5_STREAM_NUM_BAND1 GENMASK(2, 0)
38*72fc0df3SStanleyYP Wang #define MT_EE_WIFI_CONF5_STREAM_NUM_BAND2 GENMASK(5, 3)
3998686cd2SShayne Chen
4098686cd2SShayne Chen #define MT_EE_RATE_DELTA_MASK GENMASK(5, 0)
4198686cd2SShayne Chen #define MT_EE_RATE_DELTA_SIGN BIT(6)
4298686cd2SShayne Chen #define MT_EE_RATE_DELTA_EN BIT(7)
4398686cd2SShayne Chen
4498686cd2SShayne Chen enum mt7996_eeprom_band {
4598686cd2SShayne Chen MT_EE_BAND_SEL_DEFAULT,
4698686cd2SShayne Chen MT_EE_BAND_SEL_2GHZ,
4798686cd2SShayne Chen MT_EE_BAND_SEL_5GHZ,
4898686cd2SShayne Chen MT_EE_BAND_SEL_6GHZ,
4998686cd2SShayne Chen };
5098686cd2SShayne Chen
5198686cd2SShayne Chen static inline int
mt7996_get_channel_group_5g(int channel)5298686cd2SShayne Chen mt7996_get_channel_group_5g(int channel)
5398686cd2SShayne Chen {
5498686cd2SShayne Chen if (channel <= 64)
5598686cd2SShayne Chen return 0;
5698686cd2SShayne Chen if (channel <= 96)
5798686cd2SShayne Chen return 1;
5898686cd2SShayne Chen if (channel <= 128)
5998686cd2SShayne Chen return 2;
6098686cd2SShayne Chen if (channel <= 144)
6198686cd2SShayne Chen return 3;
6298686cd2SShayne Chen return 4;
6398686cd2SShayne Chen }
6498686cd2SShayne Chen
6598686cd2SShayne Chen static inline int
mt7996_get_channel_group_6g(int channel)6698686cd2SShayne Chen mt7996_get_channel_group_6g(int channel)
6798686cd2SShayne Chen {
6898686cd2SShayne Chen if (channel <= 29)
6998686cd2SShayne Chen return 0;
7098686cd2SShayne Chen
7198686cd2SShayne Chen return DIV_ROUND_UP(channel - 29, 32);
7298686cd2SShayne Chen }
7398686cd2SShayne Chen
7498686cd2SShayne Chen #endif
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