1 // SPDX-License-Identifier: ISC 2 /* 3 * Copyright (C) 2022 MediaTek Inc. 4 */ 5 6 #include <linux/relay.h> 7 #include "mt7996.h" 8 #include "eeprom.h" 9 #include "mcu.h" 10 #include "mac.h" 11 12 #define FW_BIN_LOG_MAGIC 0x44d9c99a 13 14 /** global debugfs **/ 15 16 struct hw_queue_map { 17 const char *name; 18 u8 index; 19 u8 pid; 20 u8 qid; 21 }; 22 23 static int 24 mt7996_implicit_txbf_set(void *data, u64 val) 25 { 26 struct mt7996_dev *dev = data; 27 28 /* The existing connected stations shall reconnect to apply 29 * new implicit txbf configuration. 30 */ 31 dev->ibf = !!val; 32 33 return mt7996_mcu_set_txbf(dev, BF_HW_EN_UPDATE); 34 } 35 36 static int 37 mt7996_implicit_txbf_get(void *data, u64 *val) 38 { 39 struct mt7996_dev *dev = data; 40 41 *val = dev->ibf; 42 43 return 0; 44 } 45 46 DEFINE_DEBUGFS_ATTRIBUTE(fops_implicit_txbf, mt7996_implicit_txbf_get, 47 mt7996_implicit_txbf_set, "%lld\n"); 48 49 /* test knob of system error recovery */ 50 static ssize_t 51 mt7996_fw_ser_set(struct file *file, const char __user *user_buf, 52 size_t count, loff_t *ppos) 53 { 54 struct mt7996_phy *phy = file->private_data; 55 struct mt7996_dev *dev = phy->dev; 56 u8 band_idx = phy->mt76->band_idx; 57 char buf[16]; 58 int ret = 0; 59 u16 val; 60 61 if (count >= sizeof(buf)) 62 return -EINVAL; 63 64 if (copy_from_user(buf, user_buf, count)) 65 return -EFAULT; 66 67 if (count && buf[count - 1] == '\n') 68 buf[count - 1] = '\0'; 69 else 70 buf[count] = '\0'; 71 72 if (kstrtou16(buf, 0, &val)) 73 return -EINVAL; 74 75 switch (val) { 76 case SER_SET_RECOVER_L1: 77 case SER_SET_RECOVER_L2: 78 case SER_SET_RECOVER_L3_RX_ABORT: 79 case SER_SET_RECOVER_L3_TX_ABORT: 80 case SER_SET_RECOVER_L3_TX_DISABLE: 81 case SER_SET_RECOVER_L3_BF: 82 ret = mt7996_mcu_set_ser(dev, SER_ENABLE, BIT(val), band_idx); 83 if (ret) 84 return ret; 85 86 ret = mt7996_mcu_set_ser(dev, SER_RECOVER, val, band_idx); 87 break; 88 default: 89 break; 90 } 91 92 return ret ? ret : count; 93 } 94 95 static const struct file_operations mt7996_fw_ser_ops = { 96 .write = mt7996_fw_ser_set, 97 /* TODO: ser read */ 98 .open = simple_open, 99 .llseek = default_llseek, 100 }; 101 102 static int 103 mt7996_radar_trigger(void *data, u64 val) 104 { 105 struct mt7996_dev *dev = data; 106 107 if (val > MT_RX_SEL2) 108 return -EINVAL; 109 110 return mt7996_mcu_rdd_cmd(dev, RDD_RADAR_EMULATE, 111 val, 0, 0); 112 } 113 114 DEFINE_DEBUGFS_ATTRIBUTE(fops_radar_trigger, NULL, 115 mt7996_radar_trigger, "%lld\n"); 116 117 static int 118 mt7996_rdd_monitor(struct seq_file *s, void *data) 119 { 120 struct mt7996_dev *dev = dev_get_drvdata(s->private); 121 struct cfg80211_chan_def *chandef = &dev->rdd2_chandef; 122 const char *bw; 123 int ret = 0; 124 125 mutex_lock(&dev->mt76.mutex); 126 127 if (!cfg80211_chandef_valid(chandef)) { 128 ret = -EINVAL; 129 goto out; 130 } 131 132 if (!dev->rdd2_phy) { 133 seq_puts(s, "not running\n"); 134 goto out; 135 } 136 137 switch (chandef->width) { 138 case NL80211_CHAN_WIDTH_40: 139 bw = "40"; 140 break; 141 case NL80211_CHAN_WIDTH_80: 142 bw = "80"; 143 break; 144 case NL80211_CHAN_WIDTH_160: 145 bw = "160"; 146 break; 147 case NL80211_CHAN_WIDTH_80P80: 148 bw = "80P80"; 149 break; 150 default: 151 bw = "20"; 152 break; 153 } 154 155 seq_printf(s, "channel %d (%d MHz) width %s MHz center1: %d MHz\n", 156 chandef->chan->hw_value, chandef->chan->center_freq, 157 bw, chandef->center_freq1); 158 out: 159 mutex_unlock(&dev->mt76.mutex); 160 161 return ret; 162 } 163 164 static int 165 mt7996_fw_debug_wm_set(void *data, u64 val) 166 { 167 struct mt7996_dev *dev = data; 168 enum { 169 DEBUG_TXCMD = 62, 170 DEBUG_CMD_RPT_TX, 171 DEBUG_CMD_RPT_TRIG, 172 DEBUG_SPL, 173 DEBUG_RPT_RX, 174 DEBUG_RPT_RA = 68, 175 } debug; 176 bool tx, rx, en; 177 int ret; 178 179 dev->fw_debug_wm = val ? MCU_FW_LOG_TO_HOST : 0; 180 181 if (dev->fw_debug_bin) 182 val = MCU_FW_LOG_RELAY; 183 else 184 val = dev->fw_debug_wm; 185 186 tx = dev->fw_debug_wm || (dev->fw_debug_bin & BIT(1)); 187 rx = dev->fw_debug_wm || (dev->fw_debug_bin & BIT(2)); 188 en = dev->fw_debug_wm || (dev->fw_debug_bin & BIT(0)); 189 190 ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, val); 191 if (ret) 192 return ret; 193 194 for (debug = DEBUG_TXCMD; debug <= DEBUG_RPT_RA; debug++) { 195 if (debug == 67) 196 continue; 197 198 if (debug == DEBUG_RPT_RX) 199 val = en && rx; 200 else 201 val = en && tx; 202 203 ret = mt7996_mcu_fw_dbg_ctrl(dev, debug, val); 204 if (ret) 205 return ret; 206 } 207 208 return 0; 209 } 210 211 static int 212 mt7996_fw_debug_wm_get(void *data, u64 *val) 213 { 214 struct mt7996_dev *dev = data; 215 216 *val = dev->fw_debug_wm; 217 218 return 0; 219 } 220 221 DEFINE_DEBUGFS_ATTRIBUTE(fops_fw_debug_wm, mt7996_fw_debug_wm_get, 222 mt7996_fw_debug_wm_set, "%lld\n"); 223 224 static int 225 mt7996_fw_debug_wa_set(void *data, u64 val) 226 { 227 struct mt7996_dev *dev = data; 228 int ret; 229 230 dev->fw_debug_wa = val ? MCU_FW_LOG_TO_HOST : 0; 231 232 ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, dev->fw_debug_wa); 233 if (ret) 234 return ret; 235 236 return mt7996_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET), MCU_WA_PARAM_PDMA_RX, 237 !!dev->fw_debug_wa, 0); 238 } 239 240 static int 241 mt7996_fw_debug_wa_get(void *data, u64 *val) 242 { 243 struct mt7996_dev *dev = data; 244 245 *val = dev->fw_debug_wa; 246 247 return 0; 248 } 249 250 DEFINE_DEBUGFS_ATTRIBUTE(fops_fw_debug_wa, mt7996_fw_debug_wa_get, 251 mt7996_fw_debug_wa_set, "%lld\n"); 252 253 static struct dentry * 254 create_buf_file_cb(const char *filename, struct dentry *parent, umode_t mode, 255 struct rchan_buf *buf, int *is_global) 256 { 257 struct dentry *f; 258 259 f = debugfs_create_file("fwlog_data", mode, parent, buf, 260 &relay_file_operations); 261 if (IS_ERR(f)) 262 return NULL; 263 264 *is_global = 1; 265 266 return f; 267 } 268 269 static int 270 remove_buf_file_cb(struct dentry *f) 271 { 272 debugfs_remove(f); 273 274 return 0; 275 } 276 277 static int 278 mt7996_fw_debug_bin_set(void *data, u64 val) 279 { 280 static struct rchan_callbacks relay_cb = { 281 .create_buf_file = create_buf_file_cb, 282 .remove_buf_file = remove_buf_file_cb, 283 }; 284 struct mt7996_dev *dev = data; 285 286 if (!dev->relay_fwlog) 287 dev->relay_fwlog = relay_open("fwlog_data", dev->debugfs_dir, 288 1500, 512, &relay_cb, NULL); 289 if (!dev->relay_fwlog) 290 return -ENOMEM; 291 292 dev->fw_debug_bin = val; 293 294 relay_reset(dev->relay_fwlog); 295 296 return mt7996_fw_debug_wm_set(dev, dev->fw_debug_wm); 297 } 298 299 static int 300 mt7996_fw_debug_bin_get(void *data, u64 *val) 301 { 302 struct mt7996_dev *dev = data; 303 304 *val = dev->fw_debug_bin; 305 306 return 0; 307 } 308 309 DEFINE_DEBUGFS_ATTRIBUTE(fops_fw_debug_bin, mt7996_fw_debug_bin_get, 310 mt7996_fw_debug_bin_set, "%lld\n"); 311 312 static int 313 mt7996_fw_util_wa_show(struct seq_file *file, void *data) 314 { 315 struct mt7996_dev *dev = file->private; 316 317 if (dev->fw_debug_wa) 318 return mt7996_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(QUERY), 319 MCU_WA_PARAM_CPU_UTIL, 0, 0); 320 321 return 0; 322 } 323 324 DEFINE_SHOW_ATTRIBUTE(mt7996_fw_util_wa); 325 326 static void 327 mt7996_ampdu_stat_read_phy(struct mt7996_phy *phy, struct seq_file *file) 328 { 329 struct mt7996_dev *dev = phy->dev; 330 int bound[15], range[8], i; 331 u8 band_idx = phy->mt76->band_idx; 332 333 /* Tx ampdu stat */ 334 for (i = 0; i < ARRAY_SIZE(range); i++) 335 range[i] = mt76_rr(dev, MT_MIB_ARNG(band_idx, i)); 336 337 for (i = 0; i < ARRAY_SIZE(bound); i++) 338 bound[i] = MT_MIB_ARNCR_RANGE(range[i / 2], i % 2) + 1; 339 340 seq_printf(file, "\nPhy %s, Phy band %d\n", 341 wiphy_name(phy->mt76->hw->wiphy), band_idx); 342 343 seq_printf(file, "Length: %8d | ", bound[0]); 344 for (i = 0; i < ARRAY_SIZE(bound) - 1; i++) 345 seq_printf(file, "%3d -%3d | ", 346 bound[i] + 1, bound[i + 1]); 347 348 seq_puts(file, "\nCount: "); 349 for (i = 0; i < ARRAY_SIZE(bound); i++) 350 seq_printf(file, "%8d | ", phy->mt76->aggr_stats[i]); 351 seq_puts(file, "\n"); 352 353 seq_printf(file, "BA miss count: %d\n", phy->mib.ba_miss_cnt); 354 } 355 356 static void 357 mt7996_txbf_stat_read_phy(struct mt7996_phy *phy, struct seq_file *s) 358 { 359 static const char * const bw[] = { 360 "BW20", "BW40", "BW80", "BW160" 361 }; 362 struct mib_stats *mib = &phy->mib; 363 364 /* Tx Beamformer monitor */ 365 seq_puts(s, "\nTx Beamformer applied PPDU counts: "); 366 367 seq_printf(s, "iBF: %d, eBF: %d\n", 368 mib->tx_bf_ibf_ppdu_cnt, 369 mib->tx_bf_ebf_ppdu_cnt); 370 371 /* Tx Beamformer Rx feedback monitor */ 372 seq_puts(s, "Tx Beamformer Rx feedback statistics: "); 373 374 seq_printf(s, "All: %d, HE: %d, VHT: %d, HT: %d, ", 375 mib->tx_bf_rx_fb_all_cnt, 376 mib->tx_bf_rx_fb_he_cnt, 377 mib->tx_bf_rx_fb_vht_cnt, 378 mib->tx_bf_rx_fb_ht_cnt); 379 380 seq_printf(s, "%s, NC: %d, NR: %d\n", 381 bw[mib->tx_bf_rx_fb_bw], 382 mib->tx_bf_rx_fb_nc_cnt, 383 mib->tx_bf_rx_fb_nr_cnt); 384 385 /* Tx Beamformee Rx NDPA & Tx feedback report */ 386 seq_printf(s, "Tx Beamformee successful feedback frames: %d\n", 387 mib->tx_bf_fb_cpl_cnt); 388 seq_printf(s, "Tx Beamformee feedback triggered counts: %d\n", 389 mib->tx_bf_fb_trig_cnt); 390 391 /* Tx SU & MU counters */ 392 seq_printf(s, "Tx multi-user Beamforming counts: %d\n", 393 mib->tx_mu_bf_cnt); 394 seq_printf(s, "Tx multi-user MPDU counts: %d\n", mib->tx_mu_mpdu_cnt); 395 seq_printf(s, "Tx multi-user successful MPDU counts: %d\n", 396 mib->tx_mu_acked_mpdu_cnt); 397 seq_printf(s, "Tx single-user successful MPDU counts: %d\n", 398 mib->tx_su_acked_mpdu_cnt); 399 400 seq_puts(s, "\n"); 401 } 402 403 static int 404 mt7996_tx_stats_show(struct seq_file *file, void *data) 405 { 406 struct mt7996_phy *phy = file->private; 407 struct mt7996_dev *dev = phy->dev; 408 struct mib_stats *mib = &phy->mib; 409 int i; 410 u32 attempts, success, per; 411 412 mutex_lock(&dev->mt76.mutex); 413 414 mt7996_mac_update_stats(phy); 415 mt7996_ampdu_stat_read_phy(phy, file); 416 417 attempts = mib->tx_mpdu_attempts_cnt; 418 success = mib->tx_mpdu_success_cnt; 419 per = attempts ? 100 - success * 100 / attempts : 100; 420 seq_printf(file, "Tx attempts: %8u (MPDUs)\n", attempts); 421 seq_printf(file, "Tx success: %8u (MPDUs)\n", success); 422 seq_printf(file, "Tx PER: %u%%\n", per); 423 424 mt7996_txbf_stat_read_phy(phy, file); 425 426 /* Tx amsdu info */ 427 seq_puts(file, "Tx MSDU statistics:\n"); 428 for (i = 0; i < ARRAY_SIZE(mib->tx_amsdu); i++) { 429 seq_printf(file, "AMSDU pack count of %d MSDU in TXD: %8d ", 430 i + 1, mib->tx_amsdu[i]); 431 if (mib->tx_amsdu_cnt) 432 seq_printf(file, "(%3d%%)\n", 433 mib->tx_amsdu[i] * 100 / mib->tx_amsdu_cnt); 434 else 435 seq_puts(file, "\n"); 436 } 437 438 mutex_unlock(&dev->mt76.mutex); 439 440 return 0; 441 } 442 443 DEFINE_SHOW_ATTRIBUTE(mt7996_tx_stats); 444 445 static void 446 mt7996_hw_queue_read(struct seq_file *s, u32 size, 447 const struct hw_queue_map *map) 448 { 449 struct mt7996_phy *phy = s->private; 450 struct mt7996_dev *dev = phy->dev; 451 u32 i, val; 452 453 val = mt76_rr(dev, MT_FL_Q_EMPTY); 454 for (i = 0; i < size; i++) { 455 u32 ctrl, head, tail, queued; 456 457 if (val & BIT(map[i].index)) 458 continue; 459 460 ctrl = BIT(31) | (map[i].pid << 10) | (map[i].qid << 24); 461 mt76_wr(dev, MT_FL_Q0_CTRL, ctrl); 462 463 head = mt76_get_field(dev, MT_FL_Q2_CTRL, 464 GENMASK(11, 0)); 465 tail = mt76_get_field(dev, MT_FL_Q2_CTRL, 466 GENMASK(27, 16)); 467 queued = mt76_get_field(dev, MT_FL_Q3_CTRL, 468 GENMASK(11, 0)); 469 470 seq_printf(s, "\t%s: ", map[i].name); 471 seq_printf(s, "queued:0x%03x head:0x%03x tail:0x%03x\n", 472 queued, head, tail); 473 } 474 } 475 476 static void 477 mt7996_sta_hw_queue_read(void *data, struct ieee80211_sta *sta) 478 { 479 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 480 struct mt7996_dev *dev = msta->vif->phy->dev; 481 struct seq_file *s = data; 482 u8 ac; 483 484 for (ac = 0; ac < 4; ac++) { 485 u32 qlen, ctrl, val; 486 u32 idx = msta->wcid.idx >> 5; 487 u8 offs = msta->wcid.idx & GENMASK(4, 0); 488 489 ctrl = BIT(31) | BIT(11) | (ac << 24); 490 val = mt76_rr(dev, MT_PLE_AC_QEMPTY(ac, idx)); 491 492 if (val & BIT(offs)) 493 continue; 494 495 mt76_wr(dev, MT_FL_Q0_CTRL, ctrl | msta->wcid.idx); 496 qlen = mt76_get_field(dev, MT_FL_Q3_CTRL, 497 GENMASK(11, 0)); 498 seq_printf(s, "\tSTA %pM wcid %d: AC%d%d queued:%d\n", 499 sta->addr, msta->wcid.idx, 500 msta->vif->mt76.wmm_idx, ac, qlen); 501 } 502 } 503 504 static int 505 mt7996_hw_queues_show(struct seq_file *file, void *data) 506 { 507 struct mt7996_phy *phy = file->private; 508 struct mt7996_dev *dev = phy->dev; 509 static const struct hw_queue_map ple_queue_map[] = { 510 { "CPU_Q0", 0, 1, MT_CTX0 }, 511 { "CPU_Q1", 1, 1, MT_CTX0 + 1 }, 512 { "CPU_Q2", 2, 1, MT_CTX0 + 2 }, 513 { "CPU_Q3", 3, 1, MT_CTX0 + 3 }, 514 { "ALTX_Q0", 8, 2, MT_LMAC_ALTX0 }, 515 { "BMC_Q0", 9, 2, MT_LMAC_BMC0 }, 516 { "BCN_Q0", 10, 2, MT_LMAC_BCN0 }, 517 { "PSMP_Q0", 11, 2, MT_LMAC_PSMP0 }, 518 { "ALTX_Q1", 12, 2, MT_LMAC_ALTX0 + 4 }, 519 { "BMC_Q1", 13, 2, MT_LMAC_BMC0 + 4 }, 520 { "BCN_Q1", 14, 2, MT_LMAC_BCN0 + 4 }, 521 { "PSMP_Q1", 15, 2, MT_LMAC_PSMP0 + 4 }, 522 }; 523 static const struct hw_queue_map pse_queue_map[] = { 524 { "CPU Q0", 0, 1, MT_CTX0 }, 525 { "CPU Q1", 1, 1, MT_CTX0 + 1 }, 526 { "CPU Q2", 2, 1, MT_CTX0 + 2 }, 527 { "CPU Q3", 3, 1, MT_CTX0 + 3 }, 528 { "HIF_Q0", 8, 0, MT_HIF0 }, 529 { "HIF_Q1", 9, 0, MT_HIF0 + 1 }, 530 { "HIF_Q2", 10, 0, MT_HIF0 + 2 }, 531 { "HIF_Q3", 11, 0, MT_HIF0 + 3 }, 532 { "HIF_Q4", 12, 0, MT_HIF0 + 4 }, 533 { "HIF_Q5", 13, 0, MT_HIF0 + 5 }, 534 { "LMAC_Q", 16, 2, 0 }, 535 { "MDP_TXQ", 17, 2, 1 }, 536 { "MDP_RXQ", 18, 2, 2 }, 537 { "SEC_TXQ", 19, 2, 3 }, 538 { "SEC_RXQ", 20, 2, 4 }, 539 }; 540 u32 val, head, tail; 541 542 /* ple queue */ 543 val = mt76_rr(dev, MT_PLE_FREEPG_CNT); 544 head = mt76_get_field(dev, MT_PLE_FREEPG_HEAD_TAIL, GENMASK(11, 0)); 545 tail = mt76_get_field(dev, MT_PLE_FREEPG_HEAD_TAIL, GENMASK(27, 16)); 546 seq_puts(file, "PLE page info:\n"); 547 seq_printf(file, 548 "\tTotal free page: 0x%08x head: 0x%03x tail: 0x%03x\n", 549 val, head, tail); 550 551 val = mt76_rr(dev, MT_PLE_PG_HIF_GROUP); 552 head = mt76_get_field(dev, MT_PLE_HIF_PG_INFO, GENMASK(11, 0)); 553 tail = mt76_get_field(dev, MT_PLE_HIF_PG_INFO, GENMASK(27, 16)); 554 seq_printf(file, "\tHIF free page: 0x%03x res: 0x%03x used: 0x%03x\n", 555 val, head, tail); 556 557 seq_puts(file, "PLE non-empty queue info:\n"); 558 mt7996_hw_queue_read(file, ARRAY_SIZE(ple_queue_map), 559 &ple_queue_map[0]); 560 561 /* iterate per-sta ple queue */ 562 ieee80211_iterate_stations_atomic(phy->mt76->hw, 563 mt7996_sta_hw_queue_read, file); 564 /* pse queue */ 565 seq_puts(file, "PSE non-empty queue info:\n"); 566 mt7996_hw_queue_read(file, ARRAY_SIZE(pse_queue_map), 567 &pse_queue_map[0]); 568 569 return 0; 570 } 571 572 DEFINE_SHOW_ATTRIBUTE(mt7996_hw_queues); 573 574 static int 575 mt7996_xmit_queues_show(struct seq_file *file, void *data) 576 { 577 struct mt7996_phy *phy = file->private; 578 struct mt7996_dev *dev = phy->dev; 579 struct { 580 struct mt76_queue *q; 581 char *queue; 582 } queue_map[] = { 583 { phy->mt76->q_tx[MT_TXQ_BE], " MAIN" }, 584 { dev->mt76.q_mcu[MT_MCUQ_WM], " MCUWM" }, 585 { dev->mt76.q_mcu[MT_MCUQ_WA], " MCUWA" }, 586 { dev->mt76.q_mcu[MT_MCUQ_FWDL], "MCUFWDL" }, 587 }; 588 int i; 589 590 seq_puts(file, " queue | hw-queued | head | tail |\n"); 591 for (i = 0; i < ARRAY_SIZE(queue_map); i++) { 592 struct mt76_queue *q = queue_map[i].q; 593 594 if (!q) 595 continue; 596 597 seq_printf(file, " %s | %9d | %9d | %9d |\n", 598 queue_map[i].queue, q->queued, q->head, 599 q->tail); 600 } 601 602 return 0; 603 } 604 605 DEFINE_SHOW_ATTRIBUTE(mt7996_xmit_queues); 606 607 static int 608 mt7996_twt_stats(struct seq_file *s, void *data) 609 { 610 struct mt7996_dev *dev = dev_get_drvdata(s->private); 611 struct mt7996_twt_flow *iter; 612 613 rcu_read_lock(); 614 615 seq_puts(s, " wcid | id | flags | exp | mantissa"); 616 seq_puts(s, " | duration | tsf |\n"); 617 list_for_each_entry_rcu(iter, &dev->twt_list, list) 618 seq_printf(s, 619 "%9d | %8d | %5c%c%c%c | %8d | %8d | %8d | %14lld |\n", 620 iter->wcid, iter->id, 621 iter->sched ? 's' : 'u', 622 iter->protection ? 'p' : '-', 623 iter->trigger ? 't' : '-', 624 iter->flowtype ? '-' : 'a', 625 iter->exp, iter->mantissa, 626 iter->duration, iter->tsf); 627 628 rcu_read_unlock(); 629 630 return 0; 631 } 632 633 /* The index of RF registers use the generic regidx, combined with two parts: 634 * WF selection [31:24] and offset [23:0]. 635 */ 636 static int 637 mt7996_rf_regval_get(void *data, u64 *val) 638 { 639 struct mt7996_dev *dev = data; 640 u32 regval; 641 int ret; 642 643 ret = mt7996_mcu_rf_regval(dev, dev->mt76.debugfs_reg, ®val, false); 644 if (ret) 645 return ret; 646 647 *val = regval; 648 649 return 0; 650 } 651 652 static int 653 mt7996_rf_regval_set(void *data, u64 val) 654 { 655 struct mt7996_dev *dev = data; 656 657 return mt7996_mcu_rf_regval(dev, dev->mt76.debugfs_reg, (u32 *)&val, true); 658 } 659 660 DEFINE_DEBUGFS_ATTRIBUTE(fops_rf_regval, mt7996_rf_regval_get, 661 mt7996_rf_regval_set, "0x%08llx\n"); 662 663 int mt7996_init_debugfs(struct mt7996_phy *phy) 664 { 665 struct mt7996_dev *dev = phy->dev; 666 struct dentry *dir; 667 668 dir = mt76_register_debugfs_fops(phy->mt76, NULL); 669 if (!dir) 670 return -ENOMEM; 671 debugfs_create_file("hw-queues", 0400, dir, phy, 672 &mt7996_hw_queues_fops); 673 debugfs_create_file("xmit-queues", 0400, dir, phy, 674 &mt7996_xmit_queues_fops); 675 debugfs_create_file("tx_stats", 0400, dir, phy, &mt7996_tx_stats_fops); 676 debugfs_create_file("fw_debug_wm", 0600, dir, dev, &fops_fw_debug_wm); 677 debugfs_create_file("fw_debug_wa", 0600, dir, dev, &fops_fw_debug_wa); 678 debugfs_create_file("fw_debug_bin", 0600, dir, dev, &fops_fw_debug_bin); 679 /* TODO: wm fw cpu utilization */ 680 debugfs_create_file("fw_util_wa", 0400, dir, dev, 681 &mt7996_fw_util_wa_fops); 682 debugfs_create_file("implicit_txbf", 0600, dir, dev, 683 &fops_implicit_txbf); 684 debugfs_create_devm_seqfile(dev->mt76.dev, "twt_stats", dir, 685 mt7996_twt_stats); 686 debugfs_create_file("fw_ser", 0600, dir, phy, &mt7996_fw_ser_ops); 687 debugfs_create_file("rf_regval", 0600, dir, dev, &fops_rf_regval); 688 689 if (phy->mt76->cap.has_5ghz) { 690 debugfs_create_u32("dfs_hw_pattern", 0400, dir, 691 &dev->hw_pattern); 692 debugfs_create_file("radar_trigger", 0200, dir, dev, 693 &fops_radar_trigger); 694 debugfs_create_devm_seqfile(dev->mt76.dev, "rdd_monitor", dir, 695 mt7996_rdd_monitor); 696 } 697 698 if (phy == &dev->phy) 699 dev->debugfs_dir = dir; 700 701 return 0; 702 } 703 704 static void 705 mt7996_debugfs_write_fwlog(struct mt7996_dev *dev, const void *hdr, int hdrlen, 706 const void *data, int len) 707 { 708 static DEFINE_SPINLOCK(lock); 709 unsigned long flags; 710 void *dest; 711 712 spin_lock_irqsave(&lock, flags); 713 dest = relay_reserve(dev->relay_fwlog, hdrlen + len + 4); 714 if (dest) { 715 *(u32 *)dest = hdrlen + len; 716 dest += 4; 717 718 if (hdrlen) { 719 memcpy(dest, hdr, hdrlen); 720 dest += hdrlen; 721 } 722 723 memcpy(dest, data, len); 724 relay_flush(dev->relay_fwlog); 725 } 726 spin_unlock_irqrestore(&lock, flags); 727 } 728 729 void mt7996_debugfs_rx_fw_monitor(struct mt7996_dev *dev, const void *data, int len) 730 { 731 struct { 732 __le32 magic; 733 u8 version; 734 u8 _rsv; 735 __le16 serial_id; 736 __le32 timestamp; 737 __le16 msg_type; 738 __le16 len; 739 } hdr = { 740 .version = 0x1, 741 .magic = cpu_to_le32(FW_BIN_LOG_MAGIC), 742 .msg_type = cpu_to_le16(PKT_TYPE_RX_FW_MONITOR), 743 }; 744 745 if (!dev->relay_fwlog) 746 return; 747 748 hdr.serial_id = cpu_to_le16(dev->fw_debug_seq++); 749 hdr.timestamp = cpu_to_le32(mt76_rr(dev, MT_LPON_FRCR(0))); 750 hdr.len = *(__le16 *)data; 751 mt7996_debugfs_write_fwlog(dev, &hdr, sizeof(hdr), data, len); 752 } 753 754 bool mt7996_debugfs_rx_log(struct mt7996_dev *dev, const void *data, int len) 755 { 756 if (get_unaligned_le32(data) != FW_BIN_LOG_MAGIC) 757 return false; 758 759 if (dev->relay_fwlog) 760 mt7996_debugfs_write_fwlog(dev, NULL, 0, data, len); 761 762 return true; 763 } 764 765 #ifdef CONFIG_MAC80211_DEBUGFS 766 /** per-station debugfs **/ 767 768 static ssize_t mt7996_sta_fixed_rate_set(struct file *file, 769 const char __user *user_buf, 770 size_t count, loff_t *ppos) 771 { 772 #define SHORT_PREAMBLE 0 773 #define LONG_PREAMBLE 1 774 struct ieee80211_sta *sta = file->private_data; 775 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 776 struct mt7996_dev *dev = msta->vif->phy->dev; 777 struct ra_rate phy = {}; 778 char buf[100]; 779 int ret; 780 u16 gi, ltf; 781 782 if (count >= sizeof(buf)) 783 return -EINVAL; 784 785 if (copy_from_user(buf, user_buf, count)) 786 return -EFAULT; 787 788 if (count && buf[count - 1] == '\n') 789 buf[count - 1] = '\0'; 790 else 791 buf[count] = '\0'; 792 793 /* mode - cck: 0, ofdm: 1, ht: 2, gf: 3, vht: 4, he_su: 8, he_er: 9 794 * bw - bw20: 0, bw40: 1, bw80: 2, bw160: 3 795 * nss - vht: 1~4, he: 1~4, others: ignore 796 * mcs - cck: 0~4, ofdm: 0~7, ht: 0~32, vht: 0~9, he_su: 0~11, he_er: 0~2 797 * gi - (ht/vht) lgi: 0, sgi: 1; (he) 0.8us: 0, 1.6us: 1, 3.2us: 2 798 * preamble - short: 1, long: 0 799 * ldpc - off: 0, on: 1 800 * stbc - off: 0, on: 1 801 * ltf - 1xltf: 0, 2xltf: 1, 4xltf: 2 802 */ 803 if (sscanf(buf, "%hhu %hhu %hhu %hhu %hu %hhu %hhu %hhu %hhu %hu", 804 &phy.mode, &phy.bw, &phy.mcs, &phy.nss, &gi, 805 &phy.preamble, &phy.stbc, &phy.ldpc, &phy.spe, <f) != 10) { 806 dev_warn(dev->mt76.dev, 807 "format: Mode BW MCS NSS GI Preamble STBC LDPC SPE ltf\n"); 808 goto out; 809 } 810 811 phy.wlan_idx = cpu_to_le16(msta->wcid.idx); 812 phy.gi = cpu_to_le16(gi); 813 phy.ltf = cpu_to_le16(ltf); 814 phy.ldpc = phy.ldpc ? 7 : 0; 815 phy.preamble = phy.preamble ? SHORT_PREAMBLE : LONG_PREAMBLE; 816 817 ret = mt7996_mcu_set_fixed_rate_ctrl(dev, &phy, 0); 818 if (ret) 819 return -EFAULT; 820 821 out: 822 return count; 823 } 824 825 static const struct file_operations fops_fixed_rate = { 826 .write = mt7996_sta_fixed_rate_set, 827 .open = simple_open, 828 .owner = THIS_MODULE, 829 .llseek = default_llseek, 830 }; 831 832 static int 833 mt7996_queues_show(struct seq_file *s, void *data) 834 { 835 struct ieee80211_sta *sta = s->private; 836 837 mt7996_sta_hw_queue_read(s, sta); 838 839 return 0; 840 } 841 842 DEFINE_SHOW_ATTRIBUTE(mt7996_queues); 843 844 void mt7996_sta_add_debugfs(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 845 struct ieee80211_sta *sta, struct dentry *dir) 846 { 847 debugfs_create_file("fixed_rate", 0600, dir, sta, &fops_fixed_rate); 848 debugfs_create_file("hw-queues", 0400, dir, sta, &mt7996_queues_fops); 849 } 850 851 #endif 852