1 // SPDX-License-Identifier: ISC 2 /* Copyright (C) 2020 MediaTek Inc. 3 * 4 */ 5 6 #include <linux/kernel.h> 7 #include <linux/module.h> 8 #include <linux/pci.h> 9 10 #include "mt7921.h" 11 #include "mac.h" 12 #include "mcu.h" 13 #include "../trace.h" 14 15 static const struct pci_device_id mt7921_pci_device_table[] = { 16 { PCI_DEVICE(0x14c3, 0x7961) }, 17 { }, 18 }; 19 20 static void 21 mt7921_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q) 22 { 23 struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); 24 25 if (q == MT_RXQ_MAIN) 26 mt7921_irq_enable(dev, MT_INT_RX_DONE_DATA); 27 else if (q == MT_RXQ_MCU_WA) 28 mt7921_irq_enable(dev, MT_INT_RX_DONE_WM2); 29 else 30 mt7921_irq_enable(dev, MT_INT_RX_DONE_WM); 31 } 32 33 static irqreturn_t mt7921_irq_handler(int irq, void *dev_instance) 34 { 35 struct mt7921_dev *dev = dev_instance; 36 37 mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0); 38 39 if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state)) 40 return IRQ_NONE; 41 42 tasklet_schedule(&dev->irq_tasklet); 43 44 return IRQ_HANDLED; 45 } 46 47 static void mt7921_irq_tasklet(unsigned long data) 48 { 49 struct mt7921_dev *dev = (struct mt7921_dev *)data; 50 u32 intr, mask = 0; 51 52 mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0); 53 54 intr = mt76_rr(dev, MT_WFDMA0_HOST_INT_STA); 55 intr &= dev->mt76.mmio.irqmask; 56 mt76_wr(dev, MT_WFDMA0_HOST_INT_STA, intr); 57 58 trace_dev_irq(&dev->mt76, intr, dev->mt76.mmio.irqmask); 59 60 mask |= intr & MT_INT_RX_DONE_ALL; 61 if (intr & MT_INT_TX_DONE_MCU) 62 mask |= MT_INT_TX_DONE_MCU; 63 64 mt76_set_irq_mask(&dev->mt76, MT_WFDMA0_HOST_INT_ENA, mask, 0); 65 66 if (intr & MT_INT_TX_DONE_ALL) 67 napi_schedule(&dev->mt76.tx_napi); 68 69 if (intr & MT_INT_RX_DONE_WM) 70 napi_schedule(&dev->mt76.napi[MT_RXQ_MCU]); 71 72 if (intr & MT_INT_RX_DONE_WM2) 73 napi_schedule(&dev->mt76.napi[MT_RXQ_MCU_WA]); 74 75 if (intr & MT_INT_RX_DONE_DATA) 76 napi_schedule(&dev->mt76.napi[MT_RXQ_MAIN]); 77 } 78 79 static int mt7921_pci_probe(struct pci_dev *pdev, 80 const struct pci_device_id *id) 81 { 82 static const struct mt76_driver_ops drv_ops = { 83 /* txwi_size = txd size + txp size */ 84 .txwi_size = MT_TXD_SIZE + sizeof(struct mt7921_txp_common), 85 .drv_flags = MT_DRV_TXWI_NO_FREE | MT_DRV_HW_MGMT_TXQ | 86 MT_DRV_AMSDU_OFFLOAD, 87 .survey_flags = SURVEY_INFO_TIME_TX | 88 SURVEY_INFO_TIME_RX | 89 SURVEY_INFO_TIME_BSS_RX, 90 .tx_prepare_skb = mt7921_tx_prepare_skb, 91 .tx_complete_skb = mt7921_tx_complete_skb, 92 .rx_skb = mt7921_queue_rx_skb, 93 .rx_poll_complete = mt7921_rx_poll_complete, 94 .sta_ps = mt7921_sta_ps, 95 .sta_add = mt7921_mac_sta_add, 96 .sta_remove = mt7921_mac_sta_remove, 97 .update_survey = mt7921_update_channel, 98 }; 99 struct mt7921_dev *dev; 100 struct mt76_dev *mdev; 101 int ret; 102 103 ret = pcim_enable_device(pdev); 104 if (ret) 105 return ret; 106 107 ret = pcim_iomap_regions(pdev, BIT(0), pci_name(pdev)); 108 if (ret) 109 return ret; 110 111 pci_set_master(pdev); 112 113 ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES); 114 if (ret < 0) 115 return ret; 116 117 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 118 if (ret) 119 goto err_free_pci_vec; 120 121 mt76_pci_disable_aspm(pdev); 122 123 mdev = mt76_alloc_device(&pdev->dev, sizeof(*dev), &mt7921_ops, 124 &drv_ops); 125 if (!mdev) { 126 ret = -ENOMEM; 127 goto err_free_pci_vec; 128 } 129 130 dev = container_of(mdev, struct mt7921_dev, mt76); 131 132 mt76_mmio_init(&dev->mt76, pcim_iomap_table(pdev)[0]); 133 tasklet_init(&dev->irq_tasklet, mt7921_irq_tasklet, (unsigned long)dev); 134 mdev->rev = (mt7921_l1_rr(dev, MT_HW_CHIPID) << 16) | 135 (mt7921_l1_rr(dev, MT_HW_REV) & 0xff); 136 dev_err(mdev->dev, "ASIC revision: %04x\n", mdev->rev); 137 138 mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0); 139 140 mt7921_l1_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff); 141 142 ret = devm_request_irq(mdev->dev, pdev->irq, mt7921_irq_handler, 143 IRQF_SHARED, KBUILD_MODNAME, dev); 144 if (ret) 145 goto err_free_dev; 146 147 ret = mt7921_register_device(dev); 148 if (ret) 149 goto err_free_dev; 150 151 return 0; 152 153 err_free_dev: 154 mt76_free_device(&dev->mt76); 155 err_free_pci_vec: 156 pci_free_irq_vectors(pdev); 157 158 return ret; 159 } 160 161 static void mt7921_pci_remove(struct pci_dev *pdev) 162 { 163 struct mt76_dev *mdev = pci_get_drvdata(pdev); 164 struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); 165 166 mt7921_unregister_device(dev); 167 devm_free_irq(&pdev->dev, pdev->irq, dev); 168 pci_free_irq_vectors(pdev); 169 } 170 171 #ifdef CONFIG_PM 172 static int mt7921_pci_suspend(struct pci_dev *pdev, pm_message_t state) 173 { 174 struct mt76_dev *mdev = pci_get_drvdata(pdev); 175 struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); 176 bool hif_suspend; 177 int i, err; 178 179 err = mt76_connac_pm_wake(&dev->mphy, &dev->pm); 180 if (err < 0) 181 return err; 182 183 hif_suspend = !test_bit(MT76_STATE_SUSPEND, &dev->mphy.state); 184 if (hif_suspend) { 185 err = mt76_connac_mcu_set_hif_suspend(mdev, true); 186 if (err) 187 return err; 188 } 189 190 napi_disable(&mdev->tx_napi); 191 mt76_worker_disable(&mdev->tx_worker); 192 193 mt76_for_each_q_rx(mdev, i) { 194 napi_disable(&mdev->napi[i]); 195 } 196 tasklet_kill(&dev->irq_tasklet); 197 198 pci_enable_wake(pdev, pci_choose_state(pdev, state), true); 199 200 /* wait until dma is idle */ 201 mt76_poll(dev, MT_WFDMA0_GLO_CFG, 202 MT_WFDMA0_GLO_CFG_TX_DMA_BUSY | 203 MT_WFDMA0_GLO_CFG_RX_DMA_BUSY, 0, 1000); 204 205 /* put dma disabled */ 206 mt76_clear(dev, MT_WFDMA0_GLO_CFG, 207 MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN); 208 209 /* disable interrupt */ 210 mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0); 211 212 pci_save_state(pdev); 213 err = pci_set_power_state(pdev, pci_choose_state(pdev, state)); 214 if (err) 215 goto restore; 216 217 err = mt7921_mcu_drv_pmctrl(dev); 218 if (err) 219 goto restore; 220 221 return 0; 222 223 restore: 224 mt76_for_each_q_rx(mdev, i) { 225 napi_enable(&mdev->napi[i]); 226 } 227 napi_enable(&mdev->tx_napi); 228 if (hif_suspend) 229 mt76_connac_mcu_set_hif_suspend(mdev, false); 230 231 return err; 232 } 233 234 static int mt7921_pci_resume(struct pci_dev *pdev) 235 { 236 struct mt76_dev *mdev = pci_get_drvdata(pdev); 237 struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); 238 int i, err; 239 240 err = mt7921_mcu_fw_pmctrl(dev); 241 if (err < 0) 242 return err; 243 244 err = pci_set_power_state(pdev, PCI_D0); 245 if (err) 246 return err; 247 248 pci_restore_state(pdev); 249 250 /* enable interrupt */ 251 mt7921_l1_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff); 252 mt7921_irq_enable(dev, MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL | 253 MT_INT_MCU_CMD); 254 255 /* put dma enabled */ 256 mt76_set(dev, MT_WFDMA0_GLO_CFG, 257 MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN); 258 259 mt76_worker_enable(&mdev->tx_worker); 260 mt76_for_each_q_rx(mdev, i) { 261 napi_enable(&mdev->napi[i]); 262 napi_schedule(&mdev->napi[i]); 263 } 264 napi_enable(&mdev->tx_napi); 265 napi_schedule(&mdev->tx_napi); 266 267 if (!test_bit(MT76_STATE_SUSPEND, &dev->mphy.state)) 268 err = mt76_connac_mcu_set_hif_suspend(mdev, false); 269 270 return err; 271 } 272 #endif /* CONFIG_PM */ 273 274 struct pci_driver mt7921_pci_driver = { 275 .name = KBUILD_MODNAME, 276 .id_table = mt7921_pci_device_table, 277 .probe = mt7921_pci_probe, 278 .remove = mt7921_pci_remove, 279 #ifdef CONFIG_PM 280 .suspend = mt7921_pci_suspend, 281 .resume = mt7921_pci_resume, 282 #endif /* CONFIG_PM */ 283 }; 284 285 module_pci_driver(mt7921_pci_driver); 286 287 MODULE_DEVICE_TABLE(pci, mt7921_pci_device_table); 288 MODULE_FIRMWARE(MT7921_FIRMWARE_WM); 289 MODULE_FIRMWARE(MT7921_ROM_PATCH); 290 MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>"); 291 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>"); 292 MODULE_LICENSE("Dual BSD/GPL"); 293