1 // SPDX-License-Identifier: ISC 2 /* Copyright (C) 2020 MediaTek Inc. 3 * 4 */ 5 6 #include <linux/kernel.h> 7 #include <linux/module.h> 8 #include <linux/pci.h> 9 10 #include "mt7921.h" 11 #include "mac.h" 12 #include "mcu.h" 13 #include "../trace.h" 14 15 static const struct pci_device_id mt7921_pci_device_table[] = { 16 { PCI_DEVICE(PCI_VENDOR_ID_MEDIATEK, 0x7961) }, 17 { }, 18 }; 19 20 static void 21 mt7921_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q) 22 { 23 struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); 24 25 if (q == MT_RXQ_MAIN) 26 mt7921_irq_enable(dev, MT_INT_RX_DONE_DATA); 27 else if (q == MT_RXQ_MCU_WA) 28 mt7921_irq_enable(dev, MT_INT_RX_DONE_WM2); 29 else 30 mt7921_irq_enable(dev, MT_INT_RX_DONE_WM); 31 } 32 33 static irqreturn_t mt7921_irq_handler(int irq, void *dev_instance) 34 { 35 struct mt7921_dev *dev = dev_instance; 36 37 mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0); 38 39 if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state)) 40 return IRQ_NONE; 41 42 tasklet_schedule(&dev->irq_tasklet); 43 44 return IRQ_HANDLED; 45 } 46 47 static void mt7921_irq_tasklet(unsigned long data) 48 { 49 struct mt7921_dev *dev = (struct mt7921_dev *)data; 50 u32 intr, mask = 0; 51 52 mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0); 53 54 intr = mt76_rr(dev, MT_WFDMA0_HOST_INT_STA); 55 intr &= dev->mt76.mmio.irqmask; 56 mt76_wr(dev, MT_WFDMA0_HOST_INT_STA, intr); 57 58 trace_dev_irq(&dev->mt76, intr, dev->mt76.mmio.irqmask); 59 60 mask |= intr & MT_INT_RX_DONE_ALL; 61 if (intr & MT_INT_TX_DONE_MCU) 62 mask |= MT_INT_TX_DONE_MCU; 63 64 if (intr & MT_INT_MCU_CMD) { 65 u32 intr_sw; 66 67 intr_sw = mt76_rr(dev, MT_MCU_CMD); 68 /* ack MCU2HOST_SW_INT_STA */ 69 mt76_wr(dev, MT_MCU_CMD, intr_sw); 70 if (intr_sw & MT_MCU_CMD_WAKE_RX_PCIE) { 71 mask |= MT_INT_RX_DONE_DATA; 72 intr |= MT_INT_RX_DONE_DATA; 73 } 74 } 75 76 mt76_set_irq_mask(&dev->mt76, MT_WFDMA0_HOST_INT_ENA, mask, 0); 77 78 if (intr & MT_INT_TX_DONE_ALL) 79 napi_schedule(&dev->mt76.tx_napi); 80 81 if (intr & MT_INT_RX_DONE_WM) 82 napi_schedule(&dev->mt76.napi[MT_RXQ_MCU]); 83 84 if (intr & MT_INT_RX_DONE_WM2) 85 napi_schedule(&dev->mt76.napi[MT_RXQ_MCU_WA]); 86 87 if (intr & MT_INT_RX_DONE_DATA) 88 napi_schedule(&dev->mt76.napi[MT_RXQ_MAIN]); 89 } 90 91 static int mt7921_pci_probe(struct pci_dev *pdev, 92 const struct pci_device_id *id) 93 { 94 static const struct mt76_driver_ops drv_ops = { 95 /* txwi_size = txd size + txp size */ 96 .txwi_size = MT_TXD_SIZE + sizeof(struct mt7921_txp_common), 97 .drv_flags = MT_DRV_TXWI_NO_FREE | MT_DRV_HW_MGMT_TXQ | 98 MT_DRV_AMSDU_OFFLOAD, 99 .survey_flags = SURVEY_INFO_TIME_TX | 100 SURVEY_INFO_TIME_RX | 101 SURVEY_INFO_TIME_BSS_RX, 102 .token_size = MT7921_TOKEN_SIZE, 103 .tx_prepare_skb = mt7921_tx_prepare_skb, 104 .tx_complete_skb = mt7921_tx_complete_skb, 105 .rx_skb = mt7921_queue_rx_skb, 106 .rx_poll_complete = mt7921_rx_poll_complete, 107 .sta_ps = mt7921_sta_ps, 108 .sta_add = mt7921_mac_sta_add, 109 .sta_remove = mt7921_mac_sta_remove, 110 .update_survey = mt7921_update_channel, 111 }; 112 struct mt7921_dev *dev; 113 struct mt76_dev *mdev; 114 int ret; 115 116 ret = pcim_enable_device(pdev); 117 if (ret) 118 return ret; 119 120 ret = pcim_iomap_regions(pdev, BIT(0), pci_name(pdev)); 121 if (ret) 122 return ret; 123 124 pci_set_master(pdev); 125 126 ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES); 127 if (ret < 0) 128 return ret; 129 130 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 131 if (ret) 132 goto err_free_pci_vec; 133 134 mt76_pci_disable_aspm(pdev); 135 136 mdev = mt76_alloc_device(&pdev->dev, sizeof(*dev), &mt7921_ops, 137 &drv_ops); 138 if (!mdev) { 139 ret = -ENOMEM; 140 goto err_free_pci_vec; 141 } 142 143 dev = container_of(mdev, struct mt7921_dev, mt76); 144 145 mt76_mmio_init(&dev->mt76, pcim_iomap_table(pdev)[0]); 146 tasklet_init(&dev->irq_tasklet, mt7921_irq_tasklet, (unsigned long)dev); 147 mdev->rev = (mt7921_l1_rr(dev, MT_HW_CHIPID) << 16) | 148 (mt7921_l1_rr(dev, MT_HW_REV) & 0xff); 149 dev_err(mdev->dev, "ASIC revision: %04x\n", mdev->rev); 150 151 mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0); 152 153 mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff); 154 155 ret = devm_request_irq(mdev->dev, pdev->irq, mt7921_irq_handler, 156 IRQF_SHARED, KBUILD_MODNAME, dev); 157 if (ret) 158 goto err_free_dev; 159 160 ret = mt7921_register_device(dev); 161 if (ret) 162 goto err_free_irq; 163 164 return 0; 165 166 err_free_irq: 167 devm_free_irq(&pdev->dev, pdev->irq, dev); 168 err_free_dev: 169 mt76_free_device(&dev->mt76); 170 err_free_pci_vec: 171 pci_free_irq_vectors(pdev); 172 173 return ret; 174 } 175 176 static void mt7921_pci_remove(struct pci_dev *pdev) 177 { 178 struct mt76_dev *mdev = pci_get_drvdata(pdev); 179 struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); 180 181 mt7921_unregister_device(dev); 182 devm_free_irq(&pdev->dev, pdev->irq, dev); 183 pci_free_irq_vectors(pdev); 184 } 185 186 #ifdef CONFIG_PM 187 static int mt7921_pci_suspend(struct pci_dev *pdev, pm_message_t state) 188 { 189 struct mt76_dev *mdev = pci_get_drvdata(pdev); 190 struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); 191 bool hif_suspend; 192 int i, err; 193 194 err = mt76_connac_pm_wake(&dev->mphy, &dev->pm); 195 if (err < 0) 196 return err; 197 198 hif_suspend = !test_bit(MT76_STATE_SUSPEND, &dev->mphy.state); 199 if (hif_suspend) { 200 err = mt76_connac_mcu_set_hif_suspend(mdev, true); 201 if (err) 202 return err; 203 } 204 205 if (!dev->pm.enable) 206 mt76_connac_mcu_set_deep_sleep(&dev->mt76, true); 207 208 napi_disable(&mdev->tx_napi); 209 mt76_worker_disable(&mdev->tx_worker); 210 211 mt76_for_each_q_rx(mdev, i) { 212 napi_disable(&mdev->napi[i]); 213 } 214 215 pci_enable_wake(pdev, pci_choose_state(pdev, state), true); 216 217 /* wait until dma is idle */ 218 mt76_poll(dev, MT_WFDMA0_GLO_CFG, 219 MT_WFDMA0_GLO_CFG_TX_DMA_BUSY | 220 MT_WFDMA0_GLO_CFG_RX_DMA_BUSY, 0, 1000); 221 222 /* put dma disabled */ 223 mt76_clear(dev, MT_WFDMA0_GLO_CFG, 224 MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN); 225 226 /* disable interrupt */ 227 mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0); 228 mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0x0); 229 synchronize_irq(pdev->irq); 230 tasklet_kill(&dev->irq_tasklet); 231 232 err = mt7921_mcu_fw_pmctrl(dev); 233 if (err) 234 goto restore; 235 236 pci_save_state(pdev); 237 err = pci_set_power_state(pdev, pci_choose_state(pdev, state)); 238 if (err) 239 goto restore; 240 241 return 0; 242 243 restore: 244 mt76_for_each_q_rx(mdev, i) { 245 napi_enable(&mdev->napi[i]); 246 } 247 napi_enable(&mdev->tx_napi); 248 249 if (!dev->pm.enable) 250 mt76_connac_mcu_set_deep_sleep(&dev->mt76, false); 251 252 if (hif_suspend) 253 mt76_connac_mcu_set_hif_suspend(mdev, false); 254 255 return err; 256 } 257 258 static int mt7921_pci_resume(struct pci_dev *pdev) 259 { 260 struct mt76_dev *mdev = pci_get_drvdata(pdev); 261 struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); 262 int i, err; 263 264 err = pci_set_power_state(pdev, PCI_D0); 265 if (err) 266 return err; 267 268 pci_restore_state(pdev); 269 270 err = mt7921_mcu_drv_pmctrl(dev); 271 if (err < 0) 272 return err; 273 274 mt7921_wpdma_reinit_cond(dev); 275 276 /* enable interrupt */ 277 mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff); 278 mt7921_irq_enable(dev, MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL | 279 MT_INT_MCU_CMD); 280 mt76_set(dev, MT_MCU2HOST_SW_INT_ENA, MT_MCU_CMD_WAKE_RX_PCIE); 281 282 /* put dma enabled */ 283 mt76_set(dev, MT_WFDMA0_GLO_CFG, 284 MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN); 285 286 mt76_worker_enable(&mdev->tx_worker); 287 mt76_for_each_q_rx(mdev, i) { 288 napi_enable(&mdev->napi[i]); 289 napi_schedule(&mdev->napi[i]); 290 } 291 napi_enable(&mdev->tx_napi); 292 napi_schedule(&mdev->tx_napi); 293 294 if (!dev->pm.enable) 295 mt76_connac_mcu_set_deep_sleep(&dev->mt76, false); 296 297 if (!test_bit(MT76_STATE_SUSPEND, &dev->mphy.state)) 298 err = mt76_connac_mcu_set_hif_suspend(mdev, false); 299 300 return err; 301 } 302 #endif /* CONFIG_PM */ 303 304 struct pci_driver mt7921_pci_driver = { 305 .name = KBUILD_MODNAME, 306 .id_table = mt7921_pci_device_table, 307 .probe = mt7921_pci_probe, 308 .remove = mt7921_pci_remove, 309 #ifdef CONFIG_PM 310 .suspend = mt7921_pci_suspend, 311 .resume = mt7921_pci_resume, 312 #endif /* CONFIG_PM */ 313 }; 314 315 module_pci_driver(mt7921_pci_driver); 316 317 MODULE_DEVICE_TABLE(pci, mt7921_pci_device_table); 318 MODULE_FIRMWARE(MT7921_FIRMWARE_WM); 319 MODULE_FIRMWARE(MT7921_ROM_PATCH); 320 MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>"); 321 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>"); 322 MODULE_LICENSE("Dual BSD/GPL"); 323