11c099ab4SSean Wang // SPDX-License-Identifier: ISC 21c099ab4SSean Wang /* Copyright (C) 2020 MediaTek Inc. */ 31c099ab4SSean Wang 41c099ab4SSean Wang #include <linux/firmware.h> 51c099ab4SSean Wang #include <linux/fs.h> 61c099ab4SSean Wang #include "mt7921.h" 71c099ab4SSean Wang #include "mcu.h" 81c099ab4SSean Wang #include "mac.h" 91c099ab4SSean Wang 101c099ab4SSean Wang struct mt7921_patch_hdr { 111c099ab4SSean Wang char build_date[16]; 121c099ab4SSean Wang char platform[4]; 131c099ab4SSean Wang __be32 hw_sw_ver; 141c099ab4SSean Wang __be32 patch_ver; 151c099ab4SSean Wang __be16 checksum; 161c099ab4SSean Wang u16 reserved; 171c099ab4SSean Wang struct { 181c099ab4SSean Wang __be32 patch_ver; 191c099ab4SSean Wang __be32 subsys; 201c099ab4SSean Wang __be32 feature; 211c099ab4SSean Wang __be32 n_region; 221c099ab4SSean Wang __be32 crc; 231c099ab4SSean Wang u32 reserved[11]; 241c099ab4SSean Wang } desc; 251c099ab4SSean Wang } __packed; 261c099ab4SSean Wang 271c099ab4SSean Wang struct mt7921_patch_sec { 281c099ab4SSean Wang __be32 type; 291c099ab4SSean Wang __be32 offs; 301c099ab4SSean Wang __be32 size; 311c099ab4SSean Wang union { 321c099ab4SSean Wang __be32 spec[13]; 331c099ab4SSean Wang struct { 341c099ab4SSean Wang __be32 addr; 351c099ab4SSean Wang __be32 len; 361c099ab4SSean Wang __be32 sec_key_idx; 371c099ab4SSean Wang __be32 align_len; 381c099ab4SSean Wang u32 reserved[9]; 391c099ab4SSean Wang } info; 401c099ab4SSean Wang }; 411c099ab4SSean Wang } __packed; 421c099ab4SSean Wang 431c099ab4SSean Wang struct mt7921_fw_trailer { 441c099ab4SSean Wang u8 chip_id; 451c099ab4SSean Wang u8 eco_code; 461c099ab4SSean Wang u8 n_region; 471c099ab4SSean Wang u8 format_ver; 481c099ab4SSean Wang u8 format_flag; 491c099ab4SSean Wang u8 reserved[2]; 501c099ab4SSean Wang char fw_ver[10]; 511c099ab4SSean Wang char build_date[15]; 521c099ab4SSean Wang u32 crc; 531c099ab4SSean Wang } __packed; 541c099ab4SSean Wang 551c099ab4SSean Wang struct mt7921_fw_region { 561c099ab4SSean Wang __le32 decomp_crc; 571c099ab4SSean Wang __le32 decomp_len; 581c099ab4SSean Wang __le32 decomp_blk_sz; 591c099ab4SSean Wang u8 reserved[4]; 601c099ab4SSean Wang __le32 addr; 611c099ab4SSean Wang __le32 len; 621c099ab4SSean Wang u8 feature_set; 631c099ab4SSean Wang u8 reserved1[15]; 641c099ab4SSean Wang } __packed; 651c099ab4SSean Wang 661c099ab4SSean Wang #define MT_STA_BFER BIT(0) 671c099ab4SSean Wang #define MT_STA_BFEE BIT(1) 681c099ab4SSean Wang 691c099ab4SSean Wang #define FW_FEATURE_SET_ENCRYPT BIT(0) 701c099ab4SSean Wang #define FW_FEATURE_SET_KEY_IDX GENMASK(2, 1) 711c099ab4SSean Wang #define FW_FEATURE_ENCRY_MODE BIT(4) 721c099ab4SSean Wang #define FW_FEATURE_OVERRIDE_ADDR BIT(5) 731c099ab4SSean Wang 741c099ab4SSean Wang #define DL_MODE_ENCRYPT BIT(0) 751c099ab4SSean Wang #define DL_MODE_KEY_IDX GENMASK(2, 1) 761c099ab4SSean Wang #define DL_MODE_RESET_SEC_IV BIT(3) 771c099ab4SSean Wang #define DL_MODE_WORKING_PDA_CR4 BIT(4) 781c099ab4SSean Wang #define DL_CONFIG_ENCRY_MODE_SEL BIT(6) 791c099ab4SSean Wang #define DL_MODE_NEED_RSP BIT(31) 801c099ab4SSean Wang 811c099ab4SSean Wang #define FW_START_OVERRIDE BIT(0) 821c099ab4SSean Wang #define FW_START_WORKING_PDA_CR4 BIT(2) 831c099ab4SSean Wang 841c099ab4SSean Wang #define PATCH_SEC_TYPE_MASK GENMASK(15, 0) 851c099ab4SSean Wang #define PATCH_SEC_TYPE_INFO 0x2 861c099ab4SSean Wang 871c099ab4SSean Wang #define to_wcid_lo(id) FIELD_GET(GENMASK(7, 0), (u16)id) 881c099ab4SSean Wang #define to_wcid_hi(id) FIELD_GET(GENMASK(9, 8), (u16)id) 891c099ab4SSean Wang 901c099ab4SSean Wang static enum mt7921_cipher_type 911c099ab4SSean Wang mt7921_mcu_get_cipher(int cipher) 921c099ab4SSean Wang { 931c099ab4SSean Wang switch (cipher) { 941c099ab4SSean Wang case WLAN_CIPHER_SUITE_WEP40: 951c099ab4SSean Wang return MT_CIPHER_WEP40; 961c099ab4SSean Wang case WLAN_CIPHER_SUITE_WEP104: 971c099ab4SSean Wang return MT_CIPHER_WEP104; 981c099ab4SSean Wang case WLAN_CIPHER_SUITE_TKIP: 991c099ab4SSean Wang return MT_CIPHER_TKIP; 1001c099ab4SSean Wang case WLAN_CIPHER_SUITE_AES_CMAC: 1011c099ab4SSean Wang return MT_CIPHER_BIP_CMAC_128; 1021c099ab4SSean Wang case WLAN_CIPHER_SUITE_CCMP: 1031c099ab4SSean Wang return MT_CIPHER_AES_CCMP; 1041c099ab4SSean Wang case WLAN_CIPHER_SUITE_CCMP_256: 1051c099ab4SSean Wang return MT_CIPHER_CCMP_256; 1061c099ab4SSean Wang case WLAN_CIPHER_SUITE_GCMP: 1071c099ab4SSean Wang return MT_CIPHER_GCMP; 1081c099ab4SSean Wang case WLAN_CIPHER_SUITE_GCMP_256: 1091c099ab4SSean Wang return MT_CIPHER_GCMP_256; 1101c099ab4SSean Wang case WLAN_CIPHER_SUITE_SMS4: 1111c099ab4SSean Wang return MT_CIPHER_WAPI; 1121c099ab4SSean Wang default: 1131c099ab4SSean Wang return MT_CIPHER_NONE; 1141c099ab4SSean Wang } 1151c099ab4SSean Wang } 1161c099ab4SSean Wang 1171c099ab4SSean Wang static u8 mt7921_mcu_chan_bw(struct cfg80211_chan_def *chandef) 1181c099ab4SSean Wang { 1191c099ab4SSean Wang static const u8 width_to_bw[] = { 1201c099ab4SSean Wang [NL80211_CHAN_WIDTH_40] = CMD_CBW_40MHZ, 1211c099ab4SSean Wang [NL80211_CHAN_WIDTH_80] = CMD_CBW_80MHZ, 1221c099ab4SSean Wang [NL80211_CHAN_WIDTH_80P80] = CMD_CBW_8080MHZ, 1231c099ab4SSean Wang [NL80211_CHAN_WIDTH_160] = CMD_CBW_160MHZ, 1241c099ab4SSean Wang [NL80211_CHAN_WIDTH_5] = CMD_CBW_5MHZ, 1251c099ab4SSean Wang [NL80211_CHAN_WIDTH_10] = CMD_CBW_10MHZ, 1261c099ab4SSean Wang [NL80211_CHAN_WIDTH_20] = CMD_CBW_20MHZ, 1271c099ab4SSean Wang [NL80211_CHAN_WIDTH_20_NOHT] = CMD_CBW_20MHZ, 1281c099ab4SSean Wang }; 1291c099ab4SSean Wang 1301c099ab4SSean Wang if (chandef->width >= ARRAY_SIZE(width_to_bw)) 1311c099ab4SSean Wang return 0; 1321c099ab4SSean Wang 1331c099ab4SSean Wang return width_to_bw[chandef->width]; 1341c099ab4SSean Wang } 1351c099ab4SSean Wang 1361c099ab4SSean Wang static int 1371c099ab4SSean Wang mt7921_mcu_parse_eeprom(struct mt76_dev *dev, struct sk_buff *skb) 1381c099ab4SSean Wang { 1391c099ab4SSean Wang struct mt7921_mcu_eeprom_info *res; 1401c099ab4SSean Wang u8 *buf; 1411c099ab4SSean Wang 1421c099ab4SSean Wang if (!skb) 1431c099ab4SSean Wang return -EINVAL; 1441c099ab4SSean Wang 1451c099ab4SSean Wang skb_pull(skb, sizeof(struct mt7921_mcu_rxd)); 1461c099ab4SSean Wang 1471c099ab4SSean Wang res = (struct mt7921_mcu_eeprom_info *)skb->data; 1481c099ab4SSean Wang buf = dev->eeprom.data + le32_to_cpu(res->addr); 1491c099ab4SSean Wang memcpy(buf, res->data, 16); 1501c099ab4SSean Wang 1511c099ab4SSean Wang return 0; 1521c099ab4SSean Wang } 1531c099ab4SSean Wang 1541c099ab4SSean Wang static int 1551c099ab4SSean Wang mt7921_mcu_parse_response(struct mt76_dev *mdev, int cmd, 1561c099ab4SSean Wang struct sk_buff *skb, int seq) 1571c099ab4SSean Wang { 1581c099ab4SSean Wang struct mt7921_mcu_rxd *rxd; 1591c099ab4SSean Wang int ret = 0; 1601c099ab4SSean Wang 1611c099ab4SSean Wang if (!skb) { 1621c099ab4SSean Wang dev_err(mdev->dev, "Message %d (seq %d) timeout\n", 1631c099ab4SSean Wang cmd, seq); 1641c099ab4SSean Wang return -ETIMEDOUT; 1651c099ab4SSean Wang } 1661c099ab4SSean Wang 1671c099ab4SSean Wang rxd = (struct mt7921_mcu_rxd *)skb->data; 1681c099ab4SSean Wang if (seq != rxd->seq) 1691c099ab4SSean Wang return -EAGAIN; 1701c099ab4SSean Wang 1711c099ab4SSean Wang switch (cmd) { 1721c099ab4SSean Wang case MCU_CMD_PATCH_SEM_CONTROL: 1731c099ab4SSean Wang skb_pull(skb, sizeof(*rxd) - 4); 1741c099ab4SSean Wang ret = *skb->data; 1751c099ab4SSean Wang break; 17667aa2743SLorenzo Bianconi case MCU_EXT_CMD_GET_TEMP: 1771c099ab4SSean Wang skb_pull(skb, sizeof(*rxd) + 4); 1781c099ab4SSean Wang ret = le32_to_cpu(*(__le32 *)skb->data); 1791c099ab4SSean Wang break; 1801c099ab4SSean Wang case MCU_EXT_CMD_EFUSE_ACCESS: 1811c099ab4SSean Wang ret = mt7921_mcu_parse_eeprom(mdev, skb); 1821c099ab4SSean Wang break; 1831c099ab4SSean Wang case MCU_UNI_CMD_DEV_INFO_UPDATE: 1841c099ab4SSean Wang case MCU_UNI_CMD_BSS_INFO_UPDATE: 1851c099ab4SSean Wang case MCU_UNI_CMD_STA_REC_UPDATE: 1861c099ab4SSean Wang case MCU_UNI_CMD_HIF_CTRL: 1871c099ab4SSean Wang case MCU_UNI_CMD_OFFLOAD: 1881c099ab4SSean Wang case MCU_UNI_CMD_SUSPEND: { 1891c099ab4SSean Wang struct mt7921_mcu_uni_event *event; 1901c099ab4SSean Wang 1911c099ab4SSean Wang skb_pull(skb, sizeof(*rxd)); 1921c099ab4SSean Wang event = (struct mt7921_mcu_uni_event *)skb->data; 1931c099ab4SSean Wang ret = le32_to_cpu(event->status); 1941c099ab4SSean Wang break; 1951c099ab4SSean Wang } 1961c099ab4SSean Wang case MCU_CMD_REG_READ: { 1971c099ab4SSean Wang struct mt7921_mcu_reg_event *event; 1981c099ab4SSean Wang 1991c099ab4SSean Wang skb_pull(skb, sizeof(*rxd)); 2001c099ab4SSean Wang event = (struct mt7921_mcu_reg_event *)skb->data; 2011c099ab4SSean Wang ret = (int)le32_to_cpu(event->val); 2021c099ab4SSean Wang break; 2031c099ab4SSean Wang } 2041c099ab4SSean Wang default: 2051c099ab4SSean Wang skb_pull(skb, sizeof(struct mt7921_mcu_rxd)); 2061c099ab4SSean Wang break; 2071c099ab4SSean Wang } 2081c099ab4SSean Wang 2091c099ab4SSean Wang return ret; 2101c099ab4SSean Wang } 2111c099ab4SSean Wang 2121c099ab4SSean Wang static int 2131c099ab4SSean Wang mt7921_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb, 2141c099ab4SSean Wang int cmd, int *wait_seq) 2151c099ab4SSean Wang { 2161c099ab4SSean Wang struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); 2171c099ab4SSean Wang int txd_len, mcu_cmd = cmd & MCU_CMD_MASK; 2181c099ab4SSean Wang enum mt76_mcuq_id txq = MT_MCUQ_WM; 2191c099ab4SSean Wang struct mt7921_uni_txd *uni_txd; 2201c099ab4SSean Wang struct mt7921_mcu_txd *mcu_txd; 2211c099ab4SSean Wang __le32 *txd; 2221c099ab4SSean Wang u32 val; 2231c099ab4SSean Wang u8 seq; 2241c099ab4SSean Wang 225a2a6cd54SLorenzo Bianconi switch (cmd) { 226a2a6cd54SLorenzo Bianconi case MCU_UNI_CMD_HIF_CTRL: 227a2a6cd54SLorenzo Bianconi case MCU_UNI_CMD_SUSPEND: 228a2a6cd54SLorenzo Bianconi case MCU_UNI_CMD_OFFLOAD: 229a2a6cd54SLorenzo Bianconi mdev->mcu.timeout = HZ / 3; 230a2a6cd54SLorenzo Bianconi break; 231a2a6cd54SLorenzo Bianconi default: 232a2a6cd54SLorenzo Bianconi mdev->mcu.timeout = 3 * HZ; 233a2a6cd54SLorenzo Bianconi break; 234a2a6cd54SLorenzo Bianconi } 2351c099ab4SSean Wang 2361c099ab4SSean Wang seq = ++dev->mt76.mcu.msg_seq & 0xf; 2371c099ab4SSean Wang if (!seq) 2381c099ab4SSean Wang seq = ++dev->mt76.mcu.msg_seq & 0xf; 2391c099ab4SSean Wang 2401c099ab4SSean Wang if (cmd == MCU_CMD_FW_SCATTER) { 2411c099ab4SSean Wang txq = MT_MCUQ_FWDL; 2421c099ab4SSean Wang goto exit; 2431c099ab4SSean Wang } 2441c099ab4SSean Wang 2451c099ab4SSean Wang txd_len = cmd & MCU_UNI_PREFIX ? sizeof(*uni_txd) : sizeof(*mcu_txd); 2461c099ab4SSean Wang txd = (__le32 *)skb_push(skb, txd_len); 2471c099ab4SSean Wang 2481c099ab4SSean Wang val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) | 2491c099ab4SSean Wang FIELD_PREP(MT_TXD0_PKT_FMT, MT_TX_TYPE_CMD) | 2501c099ab4SSean Wang FIELD_PREP(MT_TXD0_Q_IDX, MT_TX_MCU_PORT_RX_Q0); 2511c099ab4SSean Wang txd[0] = cpu_to_le32(val); 2521c099ab4SSean Wang 2531c099ab4SSean Wang val = MT_TXD1_LONG_FORMAT | 2541c099ab4SSean Wang FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD); 2551c099ab4SSean Wang txd[1] = cpu_to_le32(val); 2561c099ab4SSean Wang 2571c099ab4SSean Wang if (cmd & MCU_UNI_PREFIX) { 2581c099ab4SSean Wang uni_txd = (struct mt7921_uni_txd *)txd; 2591c099ab4SSean Wang uni_txd->len = cpu_to_le16(skb->len - sizeof(uni_txd->txd)); 2601c099ab4SSean Wang uni_txd->option = MCU_CMD_UNI_EXT_ACK; 2611c099ab4SSean Wang uni_txd->cid = cpu_to_le16(mcu_cmd); 2621c099ab4SSean Wang uni_txd->s2d_index = MCU_S2D_H2N; 2631c099ab4SSean Wang uni_txd->pkt_type = MCU_PKT_ID; 2641c099ab4SSean Wang uni_txd->seq = seq; 2651c099ab4SSean Wang 2661c099ab4SSean Wang goto exit; 2671c099ab4SSean Wang } 2681c099ab4SSean Wang 2691c099ab4SSean Wang mcu_txd = (struct mt7921_mcu_txd *)txd; 2701c099ab4SSean Wang mcu_txd->len = cpu_to_le16(skb->len - sizeof(mcu_txd->txd)); 2711c099ab4SSean Wang mcu_txd->pq_id = cpu_to_le16(MCU_PQ_ID(MT_TX_PORT_IDX_MCU, 2721c099ab4SSean Wang MT_TX_MCU_PORT_RX_Q0)); 2731c099ab4SSean Wang mcu_txd->pkt_type = MCU_PKT_ID; 2741c099ab4SSean Wang mcu_txd->seq = seq; 2751c099ab4SSean Wang 2761c099ab4SSean Wang switch (cmd & ~MCU_CMD_MASK) { 2771c099ab4SSean Wang case MCU_FW_PREFIX: 2781c099ab4SSean Wang mcu_txd->set_query = MCU_Q_NA; 2791c099ab4SSean Wang mcu_txd->cid = mcu_cmd; 2801c099ab4SSean Wang break; 2811c099ab4SSean Wang case MCU_CE_PREFIX: 2821c099ab4SSean Wang if (cmd & MCU_QUERY_MASK) 2831c099ab4SSean Wang mcu_txd->set_query = MCU_Q_QUERY; 2841c099ab4SSean Wang else 2851c099ab4SSean Wang mcu_txd->set_query = MCU_Q_SET; 2861c099ab4SSean Wang mcu_txd->cid = mcu_cmd; 2871c099ab4SSean Wang break; 2881c099ab4SSean Wang default: 2891c099ab4SSean Wang mcu_txd->cid = MCU_CMD_EXT_CID; 2901c099ab4SSean Wang if (cmd & MCU_QUERY_PREFIX || cmd == MCU_EXT_CMD_EFUSE_ACCESS) 2911c099ab4SSean Wang mcu_txd->set_query = MCU_Q_QUERY; 2921c099ab4SSean Wang else 2931c099ab4SSean Wang mcu_txd->set_query = MCU_Q_SET; 2941c099ab4SSean Wang mcu_txd->ext_cid = mcu_cmd; 2951c099ab4SSean Wang mcu_txd->ext_cid_ack = 1; 2961c099ab4SSean Wang break; 2971c099ab4SSean Wang } 2981c099ab4SSean Wang 2991c099ab4SSean Wang mcu_txd->s2d_index = MCU_S2D_H2N; 3001c099ab4SSean Wang WARN_ON(cmd == MCU_EXT_CMD_EFUSE_ACCESS && 3011c099ab4SSean Wang mcu_txd->set_query != MCU_Q_QUERY); 3021c099ab4SSean Wang 3031c099ab4SSean Wang exit: 3041c099ab4SSean Wang if (wait_seq) 3051c099ab4SSean Wang *wait_seq = seq; 3061c099ab4SSean Wang 3071c099ab4SSean Wang return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[txq], skb, 0); 3081c099ab4SSean Wang } 3091c099ab4SSean Wang 3101c099ab4SSean Wang static void 3111c099ab4SSean Wang mt7921_mcu_tx_rate_parse(struct mt76_phy *mphy, 3121c099ab4SSean Wang struct mt7921_mcu_peer_cap *peer, 3131c099ab4SSean Wang struct rate_info *rate, u16 r) 3141c099ab4SSean Wang { 3151c099ab4SSean Wang struct ieee80211_supported_band *sband; 3161c099ab4SSean Wang u16 flags = 0; 3171c099ab4SSean Wang u8 txmode = FIELD_GET(MT_WTBL_RATE_TX_MODE, r); 3181c099ab4SSean Wang u8 gi = 0; 3191c099ab4SSean Wang u8 bw = 0; 3201c099ab4SSean Wang 3211c099ab4SSean Wang rate->mcs = FIELD_GET(MT_WTBL_RATE_MCS, r); 3221c099ab4SSean Wang rate->nss = FIELD_GET(MT_WTBL_RATE_NSS, r) + 1; 3231c099ab4SSean Wang 3241c099ab4SSean Wang switch (peer->bw) { 3251c099ab4SSean Wang case IEEE80211_STA_RX_BW_160: 3261c099ab4SSean Wang gi = peer->g16; 3271c099ab4SSean Wang break; 3281c099ab4SSean Wang case IEEE80211_STA_RX_BW_80: 3291c099ab4SSean Wang gi = peer->g8; 3301c099ab4SSean Wang break; 3311c099ab4SSean Wang case IEEE80211_STA_RX_BW_40: 3321c099ab4SSean Wang gi = peer->g4; 3331c099ab4SSean Wang break; 3341c099ab4SSean Wang default: 3351c099ab4SSean Wang gi = peer->g2; 3361c099ab4SSean Wang break; 3371c099ab4SSean Wang } 3381c099ab4SSean Wang 3391c099ab4SSean Wang gi = txmode >= MT_PHY_TYPE_HE_SU ? 3401c099ab4SSean Wang FIELD_GET(MT_WTBL_RATE_HE_GI, gi) : 3411c099ab4SSean Wang FIELD_GET(MT_WTBL_RATE_GI, gi); 3421c099ab4SSean Wang 3431c099ab4SSean Wang switch (txmode) { 3441c099ab4SSean Wang case MT_PHY_TYPE_CCK: 3451c099ab4SSean Wang case MT_PHY_TYPE_OFDM: 3461c099ab4SSean Wang if (mphy->chandef.chan->band == NL80211_BAND_5GHZ) 3471c099ab4SSean Wang sband = &mphy->sband_5g.sband; 3481c099ab4SSean Wang else 3491c099ab4SSean Wang sband = &mphy->sband_2g.sband; 3501c099ab4SSean Wang 3511c099ab4SSean Wang rate->legacy = sband->bitrates[rate->mcs].bitrate; 3521c099ab4SSean Wang break; 3531c099ab4SSean Wang case MT_PHY_TYPE_HT: 3541c099ab4SSean Wang case MT_PHY_TYPE_HT_GF: 3551c099ab4SSean Wang flags |= RATE_INFO_FLAGS_MCS; 3561c099ab4SSean Wang 3571c099ab4SSean Wang if (gi) 3581c099ab4SSean Wang flags |= RATE_INFO_FLAGS_SHORT_GI; 3591c099ab4SSean Wang break; 3601c099ab4SSean Wang case MT_PHY_TYPE_VHT: 3611c099ab4SSean Wang flags |= RATE_INFO_FLAGS_VHT_MCS; 3621c099ab4SSean Wang 3631c099ab4SSean Wang if (gi) 3641c099ab4SSean Wang flags |= RATE_INFO_FLAGS_SHORT_GI; 3651c099ab4SSean Wang break; 3661c099ab4SSean Wang case MT_PHY_TYPE_HE_SU: 3671c099ab4SSean Wang case MT_PHY_TYPE_HE_EXT_SU: 3681c099ab4SSean Wang case MT_PHY_TYPE_HE_TB: 3691c099ab4SSean Wang case MT_PHY_TYPE_HE_MU: 3701c099ab4SSean Wang rate->he_gi = gi; 3711c099ab4SSean Wang rate->he_dcm = FIELD_GET(MT_RA_RATE_DCM_EN, r); 3721c099ab4SSean Wang 3731c099ab4SSean Wang flags |= RATE_INFO_FLAGS_HE_MCS; 3741c099ab4SSean Wang break; 3751c099ab4SSean Wang default: 3761c099ab4SSean Wang break; 3771c099ab4SSean Wang } 3781c099ab4SSean Wang rate->flags = flags; 3791c099ab4SSean Wang 3801c099ab4SSean Wang bw = mt7921_mcu_chan_bw(&mphy->chandef) - FIELD_GET(MT_RA_RATE_BW, r); 3811c099ab4SSean Wang 3821c099ab4SSean Wang switch (bw) { 3831c099ab4SSean Wang case IEEE80211_STA_RX_BW_160: 3841c099ab4SSean Wang rate->bw = RATE_INFO_BW_160; 3851c099ab4SSean Wang break; 3861c099ab4SSean Wang case IEEE80211_STA_RX_BW_80: 3871c099ab4SSean Wang rate->bw = RATE_INFO_BW_80; 3881c099ab4SSean Wang break; 3891c099ab4SSean Wang case IEEE80211_STA_RX_BW_40: 3901c099ab4SSean Wang rate->bw = RATE_INFO_BW_40; 3911c099ab4SSean Wang break; 3921c099ab4SSean Wang default: 3931c099ab4SSean Wang rate->bw = RATE_INFO_BW_20; 3941c099ab4SSean Wang break; 3951c099ab4SSean Wang } 3961c099ab4SSean Wang } 3971c099ab4SSean Wang 3981c099ab4SSean Wang static void 3991c099ab4SSean Wang mt7921_mcu_tx_rate_report(struct mt7921_dev *dev, struct sk_buff *skb, 4001c099ab4SSean Wang u16 wlan_idx) 4011c099ab4SSean Wang { 4021c099ab4SSean Wang struct mt7921_mcu_wlan_info_event *wtbl_info = 4031c099ab4SSean Wang (struct mt7921_mcu_wlan_info_event *)(skb->data); 4041c099ab4SSean Wang struct rate_info rate = {}; 4051c099ab4SSean Wang u8 curr_idx = wtbl_info->rate_info.rate_idx; 4061c099ab4SSean Wang u16 curr = le16_to_cpu(wtbl_info->rate_info.rate[curr_idx]); 4071c099ab4SSean Wang struct mt7921_mcu_peer_cap peer = wtbl_info->peer_cap; 4081c099ab4SSean Wang struct mt76_phy *mphy = &dev->mphy; 4091c099ab4SSean Wang struct mt7921_sta_stats *stats; 4101c099ab4SSean Wang struct mt7921_sta *msta; 4111c099ab4SSean Wang struct mt76_wcid *wcid; 4121c099ab4SSean Wang 4131c099ab4SSean Wang if (wlan_idx >= MT76_N_WCIDS) 4141c099ab4SSean Wang return; 4151c099ab4SSean Wang wcid = rcu_dereference(dev->mt76.wcid[wlan_idx]); 416fb5fabb1SArnd Bergmann if (!wcid) 4171c099ab4SSean Wang return; 4181c099ab4SSean Wang 4191c099ab4SSean Wang msta = container_of(wcid, struct mt7921_sta, wcid); 4201c099ab4SSean Wang stats = &msta->stats; 4211c099ab4SSean Wang 4221c099ab4SSean Wang /* current rate */ 4231c099ab4SSean Wang mt7921_mcu_tx_rate_parse(mphy, &peer, &rate, curr); 4241c099ab4SSean Wang stats->tx_rate = rate; 4251c099ab4SSean Wang } 4261c099ab4SSean Wang 4271c099ab4SSean Wang static void 4281c099ab4SSean Wang mt7921_mcu_scan_event(struct mt7921_dev *dev, struct sk_buff *skb) 4291c099ab4SSean Wang { 4301c099ab4SSean Wang struct mt76_phy *mphy = &dev->mt76.phy; 4311c099ab4SSean Wang struct mt7921_phy *phy = (struct mt7921_phy *)mphy->priv; 4321c099ab4SSean Wang 4331c099ab4SSean Wang spin_lock_bh(&dev->mt76.lock); 4341c099ab4SSean Wang __skb_queue_tail(&phy->scan_event_list, skb); 4351c099ab4SSean Wang spin_unlock_bh(&dev->mt76.lock); 4361c099ab4SSean Wang 4371c099ab4SSean Wang ieee80211_queue_delayed_work(mphy->hw, &phy->scan_work, 4381c099ab4SSean Wang MT7921_HW_SCAN_TIMEOUT); 4391c099ab4SSean Wang } 4401c099ab4SSean Wang 4411c099ab4SSean Wang static void 442b88f5c64SSean Wang mt7921_mcu_beacon_loss_event(struct mt7921_dev *dev, struct sk_buff *skb) 443b88f5c64SSean Wang { 44467aa2743SLorenzo Bianconi struct mt76_connac_beacon_loss_event *event; 445b88f5c64SSean Wang struct mt76_phy *mphy; 446b88f5c64SSean Wang u8 band_idx = 0; /* DBDC support */ 447b88f5c64SSean Wang 448b88f5c64SSean Wang skb_pull(skb, sizeof(struct mt7921_mcu_rxd)); 44967aa2743SLorenzo Bianconi event = (struct mt76_connac_beacon_loss_event *)skb->data; 450b88f5c64SSean Wang if (band_idx && dev->mt76.phy2) 451b88f5c64SSean Wang mphy = dev->mt76.phy2; 452b88f5c64SSean Wang else 453b88f5c64SSean Wang mphy = &dev->mt76.phy; 454b88f5c64SSean Wang 455b88f5c64SSean Wang ieee80211_iterate_active_interfaces_atomic(mphy->hw, 456b88f5c64SSean Wang IEEE80211_IFACE_ITER_RESUME_ALL, 45767aa2743SLorenzo Bianconi mt76_connac_mcu_beacon_loss_iter, event); 458b88f5c64SSean Wang } 459b88f5c64SSean Wang 460b88f5c64SSean Wang static void 4611c099ab4SSean Wang mt7921_mcu_bss_event(struct mt7921_dev *dev, struct sk_buff *skb) 4621c099ab4SSean Wang { 4631c099ab4SSean Wang struct mt76_phy *mphy = &dev->mt76.phy; 46467aa2743SLorenzo Bianconi struct mt76_connac_mcu_bss_event *event; 4651c099ab4SSean Wang 46667aa2743SLorenzo Bianconi skb_pull(skb, sizeof(struct mt7921_mcu_rxd)); 46767aa2743SLorenzo Bianconi event = (struct mt76_connac_mcu_bss_event *)skb->data; 4681c099ab4SSean Wang if (event->is_absent) 4691c099ab4SSean Wang ieee80211_stop_queues(mphy->hw); 4701c099ab4SSean Wang else 4711c099ab4SSean Wang ieee80211_wake_queues(mphy->hw); 4721c099ab4SSean Wang } 4731c099ab4SSean Wang 4741c099ab4SSean Wang static void 4751c099ab4SSean Wang mt7921_mcu_debug_msg_event(struct mt7921_dev *dev, struct sk_buff *skb) 4761c099ab4SSean Wang { 4771c099ab4SSean Wang struct mt7921_mcu_rxd *rxd = (struct mt7921_mcu_rxd *)skb->data; 4781c099ab4SSean Wang struct debug_msg { 4791c099ab4SSean Wang __le16 id; 4801c099ab4SSean Wang u8 type; 4811c099ab4SSean Wang u8 flag; 4821c099ab4SSean Wang __le32 value; 4831c099ab4SSean Wang __le16 len; 4841c099ab4SSean Wang u8 content[512]; 4851c099ab4SSean Wang } __packed * debug_msg; 4861c099ab4SSean Wang u16 cur_len; 4871c099ab4SSean Wang int i; 4881c099ab4SSean Wang 4891c099ab4SSean Wang skb_pull(skb, sizeof(*rxd)); 4901c099ab4SSean Wang debug_msg = (struct debug_msg *)skb->data; 4911c099ab4SSean Wang 4921c099ab4SSean Wang cur_len = min_t(u16, le16_to_cpu(debug_msg->len), 512); 4931c099ab4SSean Wang 4941c099ab4SSean Wang if (debug_msg->type == 0x3) { 4951c099ab4SSean Wang for (i = 0 ; i < cur_len; i++) 4961c099ab4SSean Wang if (!debug_msg->content[i]) 4971c099ab4SSean Wang debug_msg->content[i] = ' '; 4981c099ab4SSean Wang 4991c099ab4SSean Wang dev_dbg(dev->mt76.dev, "%s", debug_msg->content); 5001c099ab4SSean Wang } 5011c099ab4SSean Wang } 5021c099ab4SSean Wang 5031c099ab4SSean Wang static void 5041c099ab4SSean Wang mt7921_mcu_rx_unsolicited_event(struct mt7921_dev *dev, struct sk_buff *skb) 5051c099ab4SSean Wang { 5061c099ab4SSean Wang struct mt7921_mcu_rxd *rxd = (struct mt7921_mcu_rxd *)skb->data; 5071c099ab4SSean Wang 5081c099ab4SSean Wang switch (rxd->eid) { 5091c099ab4SSean Wang case MCU_EVENT_BSS_BEACON_LOSS: 510b88f5c64SSean Wang mt7921_mcu_beacon_loss_event(dev, skb); 5111c099ab4SSean Wang break; 5121c099ab4SSean Wang case MCU_EVENT_SCHED_SCAN_DONE: 5131c099ab4SSean Wang case MCU_EVENT_SCAN_DONE: 5141c099ab4SSean Wang mt7921_mcu_scan_event(dev, skb); 5151c099ab4SSean Wang return; 5161c099ab4SSean Wang case MCU_EVENT_BSS_ABSENCE: 5171c099ab4SSean Wang mt7921_mcu_bss_event(dev, skb); 5181c099ab4SSean Wang break; 5191c099ab4SSean Wang case MCU_EVENT_DBG_MSG: 5201c099ab4SSean Wang mt7921_mcu_debug_msg_event(dev, skb); 5211c099ab4SSean Wang break; 5220da3c795SSean Wang case MCU_EVENT_COREDUMP: 5230da3c795SSean Wang mt76_connac_mcu_coredump_event(&dev->mt76, skb, 5240da3c795SSean Wang &dev->coredump); 5250da3c795SSean Wang return; 5261c099ab4SSean Wang default: 5271c099ab4SSean Wang break; 5281c099ab4SSean Wang } 5291c099ab4SSean Wang dev_kfree_skb(skb); 5301c099ab4SSean Wang } 5311c099ab4SSean Wang 5321c099ab4SSean Wang void mt7921_mcu_rx_event(struct mt7921_dev *dev, struct sk_buff *skb) 5331c099ab4SSean Wang { 5341c099ab4SSean Wang struct mt7921_mcu_rxd *rxd = (struct mt7921_mcu_rxd *)skb->data; 5351c099ab4SSean Wang 5361c099ab4SSean Wang if (rxd->eid == 0x6) { 5371c099ab4SSean Wang mt76_mcu_rx_event(&dev->mt76, skb); 5381c099ab4SSean Wang return; 5391c099ab4SSean Wang } 5401c099ab4SSean Wang 5411c099ab4SSean Wang if (rxd->ext_eid == MCU_EXT_EVENT_RATE_REPORT || 5421c099ab4SSean Wang rxd->eid == MCU_EVENT_BSS_BEACON_LOSS || 5431c099ab4SSean Wang rxd->eid == MCU_EVENT_SCHED_SCAN_DONE || 5441c099ab4SSean Wang rxd->eid == MCU_EVENT_BSS_ABSENCE || 5451c099ab4SSean Wang rxd->eid == MCU_EVENT_SCAN_DONE || 5461c099ab4SSean Wang rxd->eid == MCU_EVENT_DBG_MSG || 5470da3c795SSean Wang rxd->eid == MCU_EVENT_COREDUMP || 5481c099ab4SSean Wang !rxd->seq) 5491c099ab4SSean Wang mt7921_mcu_rx_unsolicited_event(dev, skb); 5501c099ab4SSean Wang else 5511c099ab4SSean Wang mt76_mcu_rx_event(&dev->mt76, skb); 5521c099ab4SSean Wang } 5531c099ab4SSean Wang 5541c099ab4SSean Wang /** starec & wtbl **/ 5551c099ab4SSean Wang static int 5561c099ab4SSean Wang mt7921_mcu_sta_key_tlv(struct mt7921_sta *msta, struct sk_buff *skb, 5571c099ab4SSean Wang struct ieee80211_key_conf *key, enum set_key_cmd cmd) 5581c099ab4SSean Wang { 5591c099ab4SSean Wang struct mt7921_sta_key_conf *bip = &msta->bip; 5601c099ab4SSean Wang struct sta_rec_sec *sec; 5611c099ab4SSean Wang struct tlv *tlv; 5621c099ab4SSean Wang u32 len = sizeof(*sec); 5631c099ab4SSean Wang 56467aa2743SLorenzo Bianconi tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_KEY_V2, sizeof(*sec)); 5651c099ab4SSean Wang 5661c099ab4SSean Wang sec = (struct sta_rec_sec *)tlv; 5671c099ab4SSean Wang sec->add = cmd; 5681c099ab4SSean Wang 5691c099ab4SSean Wang if (cmd == SET_KEY) { 5701c099ab4SSean Wang struct sec_key *sec_key; 5711c099ab4SSean Wang u8 cipher; 5721c099ab4SSean Wang 5731c099ab4SSean Wang cipher = mt7921_mcu_get_cipher(key->cipher); 5741c099ab4SSean Wang if (cipher == MT_CIPHER_NONE) 5751c099ab4SSean Wang return -EOPNOTSUPP; 5761c099ab4SSean Wang 5771c099ab4SSean Wang sec_key = &sec->key[0]; 5781c099ab4SSean Wang sec_key->cipher_len = sizeof(*sec_key); 5791c099ab4SSean Wang 5801c099ab4SSean Wang if (cipher == MT_CIPHER_BIP_CMAC_128) { 5811c099ab4SSean Wang sec_key->cipher_id = MT_CIPHER_AES_CCMP; 5821c099ab4SSean Wang sec_key->key_id = bip->keyidx; 5831c099ab4SSean Wang sec_key->key_len = 16; 5841c099ab4SSean Wang memcpy(sec_key->key, bip->key, 16); 5851c099ab4SSean Wang 5861c099ab4SSean Wang sec_key = &sec->key[1]; 5871c099ab4SSean Wang sec_key->cipher_id = MT_CIPHER_BIP_CMAC_128; 5881c099ab4SSean Wang sec_key->cipher_len = sizeof(*sec_key); 5891c099ab4SSean Wang sec_key->key_len = 16; 5901c099ab4SSean Wang memcpy(sec_key->key, key->key, 16); 5911c099ab4SSean Wang 5921c099ab4SSean Wang sec->n_cipher = 2; 5931c099ab4SSean Wang } else { 5941c099ab4SSean Wang sec_key->cipher_id = cipher; 5951c099ab4SSean Wang sec_key->key_id = key->keyidx; 5961c099ab4SSean Wang sec_key->key_len = key->keylen; 5971c099ab4SSean Wang memcpy(sec_key->key, key->key, key->keylen); 5981c099ab4SSean Wang 5991c099ab4SSean Wang if (cipher == MT_CIPHER_TKIP) { 6001c099ab4SSean Wang /* Rx/Tx MIC keys are swapped */ 6011c099ab4SSean Wang memcpy(sec_key->key + 16, key->key + 24, 8); 6021c099ab4SSean Wang memcpy(sec_key->key + 24, key->key + 16, 8); 6031c099ab4SSean Wang } 6041c099ab4SSean Wang 6051c099ab4SSean Wang /* store key_conf for BIP batch update */ 6061c099ab4SSean Wang if (cipher == MT_CIPHER_AES_CCMP) { 6071c099ab4SSean Wang memcpy(bip->key, key->key, key->keylen); 6081c099ab4SSean Wang bip->keyidx = key->keyidx; 6091c099ab4SSean Wang } 6101c099ab4SSean Wang 6111c099ab4SSean Wang len -= sizeof(*sec_key); 6121c099ab4SSean Wang sec->n_cipher = 1; 6131c099ab4SSean Wang } 6141c099ab4SSean Wang } else { 6151c099ab4SSean Wang len -= sizeof(sec->key); 6161c099ab4SSean Wang sec->n_cipher = 0; 6171c099ab4SSean Wang } 6181c099ab4SSean Wang sec->len = cpu_to_le16(len); 6191c099ab4SSean Wang 6201c099ab4SSean Wang return 0; 6211c099ab4SSean Wang } 6221c099ab4SSean Wang 6231c099ab4SSean Wang int mt7921_mcu_add_key(struct mt7921_dev *dev, struct ieee80211_vif *vif, 6241c099ab4SSean Wang struct mt7921_sta *msta, struct ieee80211_key_conf *key, 6251c099ab4SSean Wang enum set_key_cmd cmd) 6261c099ab4SSean Wang { 6271c099ab4SSean Wang struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; 6281c099ab4SSean Wang struct sk_buff *skb; 6291c099ab4SSean Wang int ret; 6301c099ab4SSean Wang 63167aa2743SLorenzo Bianconi skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, 63267aa2743SLorenzo Bianconi &msta->wcid); 6331c099ab4SSean Wang if (IS_ERR(skb)) 6341c099ab4SSean Wang return PTR_ERR(skb); 6351c099ab4SSean Wang 6361c099ab4SSean Wang ret = mt7921_mcu_sta_key_tlv(msta, skb, key, cmd); 6371c099ab4SSean Wang if (ret) 6381c099ab4SSean Wang return ret; 6391c099ab4SSean Wang 6401c099ab4SSean Wang return mt76_mcu_skb_send_msg(&dev->mt76, skb, 6411c099ab4SSean Wang MCU_UNI_CMD_STA_REC_UPDATE, true); 6421c099ab4SSean Wang } 6431c099ab4SSean Wang 6441c099ab4SSean Wang int mt7921_mcu_uni_tx_ba(struct mt7921_dev *dev, 6451c099ab4SSean Wang struct ieee80211_ampdu_params *params, 6461c099ab4SSean Wang bool enable) 6471c099ab4SSean Wang { 64867aa2743SLorenzo Bianconi struct mt7921_sta *msta = (struct mt7921_sta *)params->sta->drv_priv; 64967aa2743SLorenzo Bianconi 65067aa2743SLorenzo Bianconi if (enable && !params->amsdu) 65167aa2743SLorenzo Bianconi msta->wcid.amsdu = false; 65267aa2743SLorenzo Bianconi 65367aa2743SLorenzo Bianconi return mt76_connac_mcu_sta_ba(&dev->mt76, &msta->vif->mt76, params, 65467aa2743SLorenzo Bianconi enable, true); 6551c099ab4SSean Wang } 6561c099ab4SSean Wang 6571c099ab4SSean Wang int mt7921_mcu_uni_rx_ba(struct mt7921_dev *dev, 6581c099ab4SSean Wang struct ieee80211_ampdu_params *params, 6591c099ab4SSean Wang bool enable) 6601c099ab4SSean Wang { 66167aa2743SLorenzo Bianconi struct mt7921_sta *msta = (struct mt7921_sta *)params->sta->drv_priv; 6621c099ab4SSean Wang 66367aa2743SLorenzo Bianconi return mt76_connac_mcu_sta_ba(&dev->mt76, &msta->vif->mt76, params, 66467aa2743SLorenzo Bianconi enable, false); 6651c099ab4SSean Wang } 6661c099ab4SSean Wang 6671c099ab4SSean Wang static int mt7921_mcu_restart(struct mt76_dev *dev) 6681c099ab4SSean Wang { 6691c099ab4SSean Wang struct { 6701c099ab4SSean Wang u8 power_mode; 6711c099ab4SSean Wang u8 rsv[3]; 6721c099ab4SSean Wang } req = { 6731c099ab4SSean Wang .power_mode = 1, 6741c099ab4SSean Wang }; 6751c099ab4SSean Wang 6761c099ab4SSean Wang return mt76_mcu_send_msg(dev, MCU_CMD_NIC_POWER_CTRL, &req, 6771c099ab4SSean Wang sizeof(req), false); 6781c099ab4SSean Wang } 6791c099ab4SSean Wang 6801c099ab4SSean Wang static int mt7921_driver_own(struct mt7921_dev *dev) 6811c099ab4SSean Wang { 6821c099ab4SSean Wang u32 reg = mt7921_reg_map_l1(dev, MT_TOP_LPCR_HOST_BAND0); 6831c099ab4SSean Wang 6841c099ab4SSean Wang mt76_wr(dev, reg, MT_TOP_LPCR_HOST_DRV_OWN); 6851c099ab4SSean Wang if (!mt76_poll_msec(dev, reg, MT_TOP_LPCR_HOST_FW_OWN, 6861c099ab4SSean Wang 0, 500)) { 6871c099ab4SSean Wang dev_err(dev->mt76.dev, "Timeout for driver own\n"); 6881c099ab4SSean Wang return -EIO; 6891c099ab4SSean Wang } 6901c099ab4SSean Wang 6911c099ab4SSean Wang return 0; 6921c099ab4SSean Wang } 6931c099ab4SSean Wang 6941c099ab4SSean Wang static int mt7921_load_patch(struct mt7921_dev *dev) 6951c099ab4SSean Wang { 6961c099ab4SSean Wang const struct mt7921_patch_hdr *hdr; 6971c099ab4SSean Wang const struct firmware *fw = NULL; 6981c099ab4SSean Wang int i, ret, sem; 6991c099ab4SSean Wang 70067aa2743SLorenzo Bianconi sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, true); 7011c099ab4SSean Wang switch (sem) { 7021c099ab4SSean Wang case PATCH_IS_DL: 7031c099ab4SSean Wang return 0; 7041c099ab4SSean Wang case PATCH_NOT_DL_SEM_SUCCESS: 7051c099ab4SSean Wang break; 7061c099ab4SSean Wang default: 7071c099ab4SSean Wang dev_err(dev->mt76.dev, "Failed to get patch semaphore\n"); 7081c099ab4SSean Wang return -EAGAIN; 7091c099ab4SSean Wang } 7101c099ab4SSean Wang 7111c099ab4SSean Wang ret = request_firmware(&fw, MT7921_ROM_PATCH, dev->mt76.dev); 7121c099ab4SSean Wang if (ret) 7131c099ab4SSean Wang goto out; 7141c099ab4SSean Wang 7151c099ab4SSean Wang if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 7161c099ab4SSean Wang dev_err(dev->mt76.dev, "Invalid firmware\n"); 7171c099ab4SSean Wang ret = -EINVAL; 7181c099ab4SSean Wang goto out; 7191c099ab4SSean Wang } 7201c099ab4SSean Wang 7211c099ab4SSean Wang hdr = (const struct mt7921_patch_hdr *)(fw->data); 7221c099ab4SSean Wang 7231c099ab4SSean Wang dev_info(dev->mt76.dev, "HW/SW Version: 0x%x, Build Time: %.16s\n", 7241c099ab4SSean Wang be32_to_cpu(hdr->hw_sw_ver), hdr->build_date); 7251c099ab4SSean Wang 7261c099ab4SSean Wang for (i = 0; i < be32_to_cpu(hdr->desc.n_region); i++) { 7271c099ab4SSean Wang struct mt7921_patch_sec *sec; 7281c099ab4SSean Wang const u8 *dl; 7291c099ab4SSean Wang u32 len, addr; 7301c099ab4SSean Wang 7311c099ab4SSean Wang sec = (struct mt7921_patch_sec *)(fw->data + sizeof(*hdr) + 7321c099ab4SSean Wang i * sizeof(*sec)); 7331c099ab4SSean Wang if ((be32_to_cpu(sec->type) & PATCH_SEC_TYPE_MASK) != 7341c099ab4SSean Wang PATCH_SEC_TYPE_INFO) { 7351c099ab4SSean Wang ret = -EINVAL; 7361c099ab4SSean Wang goto out; 7371c099ab4SSean Wang } 7381c099ab4SSean Wang 7391c099ab4SSean Wang addr = be32_to_cpu(sec->info.addr); 7401c099ab4SSean Wang len = be32_to_cpu(sec->info.len); 7411c099ab4SSean Wang dl = fw->data + be32_to_cpu(sec->offs); 7421c099ab4SSean Wang 74367aa2743SLorenzo Bianconi ret = mt76_connac_mcu_init_download(&dev->mt76, addr, len, 7441c099ab4SSean Wang DL_MODE_NEED_RSP); 7451c099ab4SSean Wang if (ret) { 7461c099ab4SSean Wang dev_err(dev->mt76.dev, "Download request failed\n"); 7471c099ab4SSean Wang goto out; 7481c099ab4SSean Wang } 7491c099ab4SSean Wang 7501c099ab4SSean Wang ret = mt76_mcu_send_firmware(&dev->mt76, MCU_CMD_FW_SCATTER, 7511c099ab4SSean Wang dl, len); 7521c099ab4SSean Wang if (ret) { 7531c099ab4SSean Wang dev_err(dev->mt76.dev, "Failed to send patch\n"); 7541c099ab4SSean Wang goto out; 7551c099ab4SSean Wang } 7561c099ab4SSean Wang } 7571c099ab4SSean Wang 75867aa2743SLorenzo Bianconi ret = mt76_connac_mcu_start_patch(&dev->mt76); 7591c099ab4SSean Wang if (ret) 7601c099ab4SSean Wang dev_err(dev->mt76.dev, "Failed to start patch\n"); 7611c099ab4SSean Wang 7621c099ab4SSean Wang out: 76367aa2743SLorenzo Bianconi sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, false); 7641c099ab4SSean Wang switch (sem) { 7651c099ab4SSean Wang case PATCH_REL_SEM_SUCCESS: 7661c099ab4SSean Wang break; 7671c099ab4SSean Wang default: 7681c099ab4SSean Wang ret = -EAGAIN; 7691c099ab4SSean Wang dev_err(dev->mt76.dev, "Failed to release patch semaphore\n"); 7701c099ab4SSean Wang goto out; 7711c099ab4SSean Wang } 7721c099ab4SSean Wang release_firmware(fw); 7731c099ab4SSean Wang 7741c099ab4SSean Wang return ret; 7751c099ab4SSean Wang } 7761c099ab4SSean Wang 7771c099ab4SSean Wang static u32 mt7921_mcu_gen_dl_mode(u8 feature_set, bool is_wa) 7781c099ab4SSean Wang { 7791c099ab4SSean Wang u32 ret = 0; 7801c099ab4SSean Wang 7811c099ab4SSean Wang ret |= (feature_set & FW_FEATURE_SET_ENCRYPT) ? 7821c099ab4SSean Wang (DL_MODE_ENCRYPT | DL_MODE_RESET_SEC_IV) : 0; 7831c099ab4SSean Wang ret |= (feature_set & FW_FEATURE_ENCRY_MODE) ? 7841c099ab4SSean Wang DL_CONFIG_ENCRY_MODE_SEL : 0; 7851c099ab4SSean Wang ret |= FIELD_PREP(DL_MODE_KEY_IDX, 7861c099ab4SSean Wang FIELD_GET(FW_FEATURE_SET_KEY_IDX, feature_set)); 7871c099ab4SSean Wang ret |= DL_MODE_NEED_RSP; 7881c099ab4SSean Wang ret |= is_wa ? DL_MODE_WORKING_PDA_CR4 : 0; 7891c099ab4SSean Wang 7901c099ab4SSean Wang return ret; 7911c099ab4SSean Wang } 7921c099ab4SSean Wang 7931c099ab4SSean Wang static int 7941c099ab4SSean Wang mt7921_mcu_send_ram_firmware(struct mt7921_dev *dev, 7951c099ab4SSean Wang const struct mt7921_fw_trailer *hdr, 7961c099ab4SSean Wang const u8 *data, bool is_wa) 7971c099ab4SSean Wang { 7981c099ab4SSean Wang int i, offset = 0; 7991c099ab4SSean Wang u32 override = 0, option = 0; 8001c099ab4SSean Wang 8011c099ab4SSean Wang for (i = 0; i < hdr->n_region; i++) { 8021c099ab4SSean Wang const struct mt7921_fw_region *region; 8031c099ab4SSean Wang int err; 8041c099ab4SSean Wang u32 len, addr, mode; 8051c099ab4SSean Wang 8061c099ab4SSean Wang region = (const struct mt7921_fw_region *)((const u8 *)hdr - 8071c099ab4SSean Wang (hdr->n_region - i) * sizeof(*region)); 8081c099ab4SSean Wang mode = mt7921_mcu_gen_dl_mode(region->feature_set, is_wa); 8091c099ab4SSean Wang len = le32_to_cpu(region->len); 8101c099ab4SSean Wang addr = le32_to_cpu(region->addr); 8111c099ab4SSean Wang 8121c099ab4SSean Wang if (region->feature_set & FW_FEATURE_OVERRIDE_ADDR) 8131c099ab4SSean Wang override = addr; 8141c099ab4SSean Wang 81567aa2743SLorenzo Bianconi err = mt76_connac_mcu_init_download(&dev->mt76, addr, len, 81667aa2743SLorenzo Bianconi mode); 8171c099ab4SSean Wang if (err) { 8181c099ab4SSean Wang dev_err(dev->mt76.dev, "Download request failed\n"); 8191c099ab4SSean Wang return err; 8201c099ab4SSean Wang } 8211c099ab4SSean Wang 8221c099ab4SSean Wang err = mt76_mcu_send_firmware(&dev->mt76, MCU_CMD_FW_SCATTER, 8231c099ab4SSean Wang data + offset, len); 8241c099ab4SSean Wang if (err) { 8251c099ab4SSean Wang dev_err(dev->mt76.dev, "Failed to send firmware.\n"); 8261c099ab4SSean Wang return err; 8271c099ab4SSean Wang } 8281c099ab4SSean Wang 8291c099ab4SSean Wang offset += len; 8301c099ab4SSean Wang } 8311c099ab4SSean Wang 8321c099ab4SSean Wang if (override) 8331c099ab4SSean Wang option |= FW_START_OVERRIDE; 8341c099ab4SSean Wang 8351c099ab4SSean Wang if (is_wa) 8361c099ab4SSean Wang option |= FW_START_WORKING_PDA_CR4; 8371c099ab4SSean Wang 83867aa2743SLorenzo Bianconi return mt76_connac_mcu_start_firmware(&dev->mt76, override, option); 8391c099ab4SSean Wang } 8401c099ab4SSean Wang 8411c099ab4SSean Wang static int mt7921_load_ram(struct mt7921_dev *dev) 8421c099ab4SSean Wang { 8431c099ab4SSean Wang const struct mt7921_fw_trailer *hdr; 8441c099ab4SSean Wang const struct firmware *fw; 8451c099ab4SSean Wang int ret; 8461c099ab4SSean Wang 8471c099ab4SSean Wang ret = request_firmware(&fw, MT7921_FIRMWARE_WM, dev->mt76.dev); 8481c099ab4SSean Wang if (ret) 8491c099ab4SSean Wang return ret; 8501c099ab4SSean Wang 8511c099ab4SSean Wang if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 8521c099ab4SSean Wang dev_err(dev->mt76.dev, "Invalid firmware\n"); 8531c099ab4SSean Wang ret = -EINVAL; 8541c099ab4SSean Wang goto out; 8551c099ab4SSean Wang } 8561c099ab4SSean Wang 8571c099ab4SSean Wang hdr = (const struct mt7921_fw_trailer *)(fw->data + fw->size - 8581c099ab4SSean Wang sizeof(*hdr)); 8591c099ab4SSean Wang 8601c099ab4SSean Wang dev_info(dev->mt76.dev, "WM Firmware Version: %.10s, Build Time: %.15s\n", 8611c099ab4SSean Wang hdr->fw_ver, hdr->build_date); 8621c099ab4SSean Wang 8631c099ab4SSean Wang ret = mt7921_mcu_send_ram_firmware(dev, hdr, fw->data, false); 8641c099ab4SSean Wang if (ret) { 8651c099ab4SSean Wang dev_err(dev->mt76.dev, "Failed to start WM firmware\n"); 8661c099ab4SSean Wang goto out; 8671c099ab4SSean Wang } 8681c099ab4SSean Wang 8691c099ab4SSean Wang snprintf(dev->mt76.hw->wiphy->fw_version, 8701c099ab4SSean Wang sizeof(dev->mt76.hw->wiphy->fw_version), 8711c099ab4SSean Wang "%.10s-%.15s", hdr->fw_ver, hdr->build_date); 8721c099ab4SSean Wang 8731c099ab4SSean Wang out: 8741c099ab4SSean Wang release_firmware(fw); 8751c099ab4SSean Wang 8761c099ab4SSean Wang return ret; 8771c099ab4SSean Wang } 8781c099ab4SSean Wang 8791c099ab4SSean Wang static int mt7921_load_firmware(struct mt7921_dev *dev) 8801c099ab4SSean Wang { 8811c099ab4SSean Wang int ret; 8821c099ab4SSean Wang 8831c099ab4SSean Wang ret = mt76_get_field(dev, MT_CONN_ON_MISC, MT_TOP_MISC2_FW_N9_RDY); 8841c099ab4SSean Wang if (ret) { 8851c099ab4SSean Wang dev_dbg(dev->mt76.dev, "Firmware is already download\n"); 8861c099ab4SSean Wang return -EIO; 8871c099ab4SSean Wang } 8881c099ab4SSean Wang 8891c099ab4SSean Wang ret = mt7921_load_patch(dev); 8901c099ab4SSean Wang if (ret) 8911c099ab4SSean Wang return ret; 8921c099ab4SSean Wang 8931c099ab4SSean Wang ret = mt7921_load_ram(dev); 8941c099ab4SSean Wang if (ret) 8951c099ab4SSean Wang return ret; 8961c099ab4SSean Wang 8971c099ab4SSean Wang if (!mt76_poll_msec(dev, MT_CONN_ON_MISC, MT_TOP_MISC2_FW_N9_RDY, 8981c099ab4SSean Wang MT_TOP_MISC2_FW_N9_RDY, 1500)) { 8991c099ab4SSean Wang dev_err(dev->mt76.dev, "Timeout for initializing firmware\n"); 9001c099ab4SSean Wang 9011c099ab4SSean Wang return -EIO; 9021c099ab4SSean Wang } 9031c099ab4SSean Wang 9041c099ab4SSean Wang mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_FWDL], false); 9051c099ab4SSean Wang 906ffa1bf97SSean Wang #ifdef CONFIG_PM 907022159b0SLorenzo Bianconi dev->mt76.hw->wiphy->wowlan = &mt76_connac_wowlan_support; 908ffa1bf97SSean Wang #endif /* CONFIG_PM */ 909ffa1bf97SSean Wang 9101d8efc74SSean Wang clear_bit(MT76_STATE_PM, &dev->mphy.state); 9111d8efc74SSean Wang 9121c099ab4SSean Wang dev_err(dev->mt76.dev, "Firmware init done\n"); 9131c099ab4SSean Wang 9141c099ab4SSean Wang return 0; 9151c099ab4SSean Wang } 9161c099ab4SSean Wang 9171c099ab4SSean Wang int mt7921_mcu_fw_log_2_host(struct mt7921_dev *dev, u8 ctrl) 9181c099ab4SSean Wang { 9191c099ab4SSean Wang struct { 9201c099ab4SSean Wang u8 ctrl_val; 9211c099ab4SSean Wang u8 pad[3]; 9221c099ab4SSean Wang } data = { 9231c099ab4SSean Wang .ctrl_val = ctrl 9241c099ab4SSean Wang }; 9251c099ab4SSean Wang 9261c099ab4SSean Wang return mt76_mcu_send_msg(&dev->mt76, MCU_CMD_FWLOG_2_HOST, &data, 9271c099ab4SSean Wang sizeof(data), false); 9281c099ab4SSean Wang } 9291c099ab4SSean Wang 930d32464e6SLorenzo Bianconi int mt7921_run_firmware(struct mt7921_dev *dev) 931d32464e6SLorenzo Bianconi { 932d32464e6SLorenzo Bianconi int err; 933d32464e6SLorenzo Bianconi 934d32464e6SLorenzo Bianconi err = mt7921_driver_own(dev); 935d32464e6SLorenzo Bianconi if (err) 936d32464e6SLorenzo Bianconi return err; 937d32464e6SLorenzo Bianconi 938d32464e6SLorenzo Bianconi err = mt7921_load_firmware(dev); 939d32464e6SLorenzo Bianconi if (err) 940d32464e6SLorenzo Bianconi return err; 941d32464e6SLorenzo Bianconi 942d32464e6SLorenzo Bianconi set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state); 943d32464e6SLorenzo Bianconi mt7921_mcu_fw_log_2_host(dev, 1); 944d32464e6SLorenzo Bianconi 945d32464e6SLorenzo Bianconi return 0; 946d32464e6SLorenzo Bianconi } 947d32464e6SLorenzo Bianconi 9481c099ab4SSean Wang int mt7921_mcu_init(struct mt7921_dev *dev) 9491c099ab4SSean Wang { 9501c099ab4SSean Wang static const struct mt76_mcu_ops mt7921_mcu_ops = { 9511c099ab4SSean Wang .headroom = sizeof(struct mt7921_mcu_txd), 9521c099ab4SSean Wang .mcu_skb_send_msg = mt7921_mcu_send_message, 9531c099ab4SSean Wang .mcu_parse_response = mt7921_mcu_parse_response, 9541c099ab4SSean Wang .mcu_restart = mt7921_mcu_restart, 955*0c1ce988SLorenzo Bianconi .mcu_reset = mt7921_reset, 9561c099ab4SSean Wang }; 9571c099ab4SSean Wang 9581c099ab4SSean Wang dev->mt76.mcu_ops = &mt7921_mcu_ops; 9591c099ab4SSean Wang 960d32464e6SLorenzo Bianconi return mt7921_run_firmware(dev); 9611c099ab4SSean Wang } 9621c099ab4SSean Wang 9631c099ab4SSean Wang void mt7921_mcu_exit(struct mt7921_dev *dev) 9641c099ab4SSean Wang { 9651c099ab4SSean Wang u32 reg = mt7921_reg_map_l1(dev, MT_TOP_MISC); 9661c099ab4SSean Wang 9671c099ab4SSean Wang __mt76_mcu_restart(&dev->mt76); 9681c099ab4SSean Wang if (!mt76_poll_msec(dev, reg, MT_TOP_MISC_FW_STATE, 9691c099ab4SSean Wang FIELD_PREP(MT_TOP_MISC_FW_STATE, 9701c099ab4SSean Wang FW_STATE_FW_DOWNLOAD), 1000)) { 9711c099ab4SSean Wang dev_err(dev->mt76.dev, "Failed to exit mcu\n"); 9721c099ab4SSean Wang return; 9731c099ab4SSean Wang } 9741c099ab4SSean Wang 9751c099ab4SSean Wang reg = mt7921_reg_map_l1(dev, MT_TOP_LPCR_HOST_BAND0); 9761c099ab4SSean Wang mt76_wr(dev, reg, MT_TOP_LPCR_HOST_FW_OWN); 9771c099ab4SSean Wang skb_queue_purge(&dev->mt76.mcu.res_q); 9781c099ab4SSean Wang } 9791c099ab4SSean Wang 9801c099ab4SSean Wang int mt7921_mcu_set_tx(struct mt7921_dev *dev, struct ieee80211_vif *vif) 9811c099ab4SSean Wang { 9821c099ab4SSean Wang #define WMM_AIFS_SET BIT(0) 9831c099ab4SSean Wang #define WMM_CW_MIN_SET BIT(1) 9841c099ab4SSean Wang #define WMM_CW_MAX_SET BIT(2) 9851c099ab4SSean Wang #define WMM_TXOP_SET BIT(3) 9861c099ab4SSean Wang #define WMM_PARAM_SET GENMASK(3, 0) 9871c099ab4SSean Wang #define TX_CMD_MODE 1 9881c099ab4SSean Wang struct edca { 9891c099ab4SSean Wang u8 queue; 9901c099ab4SSean Wang u8 set; 9911c099ab4SSean Wang u8 aifs; 9921c099ab4SSean Wang u8 cw_min; 9931c099ab4SSean Wang __le16 cw_max; 9941c099ab4SSean Wang __le16 txop; 9951c099ab4SSean Wang }; 9961c099ab4SSean Wang struct mt7921_mcu_tx { 9971c099ab4SSean Wang u8 total; 9981c099ab4SSean Wang u8 action; 9991c099ab4SSean Wang u8 valid; 10001c099ab4SSean Wang u8 mode; 10011c099ab4SSean Wang 10021c099ab4SSean Wang struct edca edca[IEEE80211_NUM_ACS]; 10031c099ab4SSean Wang } __packed req = { 10041c099ab4SSean Wang .valid = true, 10051c099ab4SSean Wang .mode = TX_CMD_MODE, 10061c099ab4SSean Wang .total = IEEE80211_NUM_ACS, 10071c099ab4SSean Wang }; 10081c099ab4SSean Wang struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; 10091c099ab4SSean Wang int ac; 10101c099ab4SSean Wang 10111c099ab4SSean Wang for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) { 10121c099ab4SSean Wang struct ieee80211_tx_queue_params *q = &mvif->queue_params[ac]; 10131c099ab4SSean Wang struct edca *e = &req.edca[ac]; 10141c099ab4SSean Wang 10151c099ab4SSean Wang e->set = WMM_PARAM_SET; 10161c099ab4SSean Wang e->queue = ac + mvif->mt76.wmm_idx * MT7921_MAX_WMM_SETS; 10171c099ab4SSean Wang e->aifs = q->aifs; 10181c099ab4SSean Wang e->txop = cpu_to_le16(q->txop); 10191c099ab4SSean Wang 10201c099ab4SSean Wang if (q->cw_min) 10211c099ab4SSean Wang e->cw_min = fls(q->cw_min); 10221c099ab4SSean Wang else 10231c099ab4SSean Wang e->cw_min = 5; 10241c099ab4SSean Wang 10251c099ab4SSean Wang if (q->cw_max) 10261c099ab4SSean Wang e->cw_max = cpu_to_le16(fls(q->cw_max)); 10271c099ab4SSean Wang else 10281c099ab4SSean Wang e->cw_max = cpu_to_le16(10); 10291c099ab4SSean Wang } 10301c099ab4SSean Wang return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_EDCA_UPDATE, &req, 10311c099ab4SSean Wang sizeof(req), true); 10321c099ab4SSean Wang } 10331c099ab4SSean Wang 10341c099ab4SSean Wang int mt7921_mcu_set_chan_info(struct mt7921_phy *phy, int cmd) 10351c099ab4SSean Wang { 10361c099ab4SSean Wang struct mt7921_dev *dev = phy->dev; 10371c099ab4SSean Wang struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 10381c099ab4SSean Wang int freq1 = chandef->center_freq1; 10391c099ab4SSean Wang struct { 10401c099ab4SSean Wang u8 control_ch; 10411c099ab4SSean Wang u8 center_ch; 10421c099ab4SSean Wang u8 bw; 10431c099ab4SSean Wang u8 tx_streams_num; 10441c099ab4SSean Wang u8 rx_streams; /* mask or num */ 10451c099ab4SSean Wang u8 switch_reason; 10461c099ab4SSean Wang u8 band_idx; 10471c099ab4SSean Wang u8 center_ch2; /* for 80+80 only */ 10481c099ab4SSean Wang __le16 cac_case; 10491c099ab4SSean Wang u8 channel_band; 10501c099ab4SSean Wang u8 rsv0; 10511c099ab4SSean Wang __le32 outband_freq; 10521c099ab4SSean Wang u8 txpower_drop; 10531c099ab4SSean Wang u8 ap_bw; 10541c099ab4SSean Wang u8 ap_center_ch; 10551c099ab4SSean Wang u8 rsv1[57]; 10561c099ab4SSean Wang } __packed req = { 10571c099ab4SSean Wang .control_ch = chandef->chan->hw_value, 10581c099ab4SSean Wang .center_ch = ieee80211_frequency_to_channel(freq1), 10591c099ab4SSean Wang .bw = mt7921_mcu_chan_bw(chandef), 10601c099ab4SSean Wang .tx_streams_num = hweight8(phy->mt76->antenna_mask), 10611c099ab4SSean Wang .rx_streams = phy->mt76->antenna_mask, 10621c099ab4SSean Wang .band_idx = phy != &dev->phy, 10631c099ab4SSean Wang .channel_band = chandef->chan->band, 10641c099ab4SSean Wang }; 10651c099ab4SSean Wang 10661c099ab4SSean Wang if (dev->mt76.hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) 10671c099ab4SSean Wang req.switch_reason = CH_SWITCH_SCAN_BYPASS_DPD; 10681c099ab4SSean Wang else if ((chandef->chan->flags & IEEE80211_CHAN_RADAR) && 10691c099ab4SSean Wang chandef->chan->dfs_state != NL80211_DFS_AVAILABLE) 10701c099ab4SSean Wang req.switch_reason = CH_SWITCH_DFS; 10711c099ab4SSean Wang else 10721c099ab4SSean Wang req.switch_reason = CH_SWITCH_NORMAL; 10731c099ab4SSean Wang 10741c099ab4SSean Wang if (cmd == MCU_EXT_CMD_CHANNEL_SWITCH) 10751c099ab4SSean Wang req.rx_streams = hweight8(req.rx_streams); 10761c099ab4SSean Wang 10771c099ab4SSean Wang if (chandef->width == NL80211_CHAN_WIDTH_80P80) { 10781c099ab4SSean Wang int freq2 = chandef->center_freq2; 10791c099ab4SSean Wang 10801c099ab4SSean Wang req.center_ch2 = ieee80211_frequency_to_channel(freq2); 10811c099ab4SSean Wang } 10821c099ab4SSean Wang 10831c099ab4SSean Wang return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), true); 10841c099ab4SSean Wang } 10851c099ab4SSean Wang 10861c099ab4SSean Wang int mt7921_mcu_set_eeprom(struct mt7921_dev *dev) 10871c099ab4SSean Wang { 10881c099ab4SSean Wang struct req_hdr { 10891c099ab4SSean Wang u8 buffer_mode; 10901c099ab4SSean Wang u8 format; 10911c099ab4SSean Wang __le16 len; 10921c099ab4SSean Wang } __packed req = { 10931c099ab4SSean Wang .buffer_mode = EE_MODE_EFUSE, 10941c099ab4SSean Wang .format = EE_FORMAT_WHOLE, 10951c099ab4SSean Wang }; 10961c099ab4SSean Wang 10971c099ab4SSean Wang return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_EFUSE_BUFFER_MODE, 10981c099ab4SSean Wang &req, sizeof(req), true); 10991c099ab4SSean Wang } 11001c099ab4SSean Wang 11011c099ab4SSean Wang int mt7921_mcu_get_eeprom(struct mt7921_dev *dev, u32 offset) 11021c099ab4SSean Wang { 11031c099ab4SSean Wang struct mt7921_mcu_eeprom_info req = { 11041c099ab4SSean Wang .addr = cpu_to_le32(round_down(offset, 16)), 11051c099ab4SSean Wang }; 11061c099ab4SSean Wang struct mt7921_mcu_eeprom_info *res; 11071c099ab4SSean Wang struct sk_buff *skb; 11081c099ab4SSean Wang int ret; 11091c099ab4SSean Wang u8 *buf; 11101c099ab4SSean Wang 11111c099ab4SSean Wang ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD_EFUSE_ACCESS, &req, 11121c099ab4SSean Wang sizeof(req), true, &skb); 11131c099ab4SSean Wang if (ret) 11141c099ab4SSean Wang return ret; 11151c099ab4SSean Wang 11161c099ab4SSean Wang res = (struct mt7921_mcu_eeprom_info *)skb->data; 11171c099ab4SSean Wang buf = dev->mt76.eeprom.data + le32_to_cpu(res->addr); 11181c099ab4SSean Wang memcpy(buf, res->data, 16); 11191c099ab4SSean Wang dev_kfree_skb(skb); 11201c099ab4SSean Wang 11211c099ab4SSean Wang return 0; 11221c099ab4SSean Wang } 11231c099ab4SSean Wang 112480fc1e37SLorenzo Bianconi u32 mt7921_get_wtbl_info(struct mt7921_dev *dev, u32 wlan_idx) 11251c099ab4SSean Wang { 11261c099ab4SSean Wang struct mt7921_mcu_wlan_info wtbl_info = { 11271c099ab4SSean Wang .wlan_idx = cpu_to_le32(wlan_idx), 11281c099ab4SSean Wang }; 11291c099ab4SSean Wang struct sk_buff *skb; 11301c099ab4SSean Wang int ret; 11311c099ab4SSean Wang 11321c099ab4SSean Wang ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_CMD_GET_WTBL, 11331c099ab4SSean Wang &wtbl_info, sizeof(wtbl_info), true, 11341c099ab4SSean Wang &skb); 11351c099ab4SSean Wang if (ret) 11361c099ab4SSean Wang return ret; 11371c099ab4SSean Wang 11381c099ab4SSean Wang mt7921_mcu_tx_rate_report(dev, skb, wlan_idx); 11391c099ab4SSean Wang dev_kfree_skb(skb); 11401c099ab4SSean Wang 11411c099ab4SSean Wang return 0; 11421c099ab4SSean Wang } 114356d965daSSean Wang 114456d965daSSean Wang int mt7921_mcu_uni_bss_ps(struct mt7921_dev *dev, struct ieee80211_vif *vif) 114556d965daSSean Wang { 114656d965daSSean Wang struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; 114756d965daSSean Wang struct { 114856d965daSSean Wang struct { 114956d965daSSean Wang u8 bss_idx; 115056d965daSSean Wang u8 pad[3]; 115156d965daSSean Wang } __packed hdr; 115256d965daSSean Wang struct ps_tlv { 115356d965daSSean Wang __le16 tag; 115456d965daSSean Wang __le16 len; 115556d965daSSean Wang u8 ps_state; /* 0: device awake 115656d965daSSean Wang * 1: static power save 115756d965daSSean Wang * 2: dynamic power saving 115856d965daSSean Wang * 3: enter TWT power saving 115956d965daSSean Wang * 4: leave TWT power saving 116056d965daSSean Wang */ 116156d965daSSean Wang u8 pad[3]; 116256d965daSSean Wang } __packed ps; 116356d965daSSean Wang } __packed ps_req = { 116456d965daSSean Wang .hdr = { 116556d965daSSean Wang .bss_idx = mvif->mt76.idx, 116656d965daSSean Wang }, 116756d965daSSean Wang .ps = { 116856d965daSSean Wang .tag = cpu_to_le16(UNI_BSS_INFO_PS), 116956d965daSSean Wang .len = cpu_to_le16(sizeof(struct ps_tlv)), 117056d965daSSean Wang .ps_state = vif->bss_conf.ps ? 2 : 0, 117156d965daSSean Wang }, 117256d965daSSean Wang }; 117356d965daSSean Wang 117456d965daSSean Wang if (vif->type != NL80211_IFTYPE_STATION) 117556d965daSSean Wang return -EOPNOTSUPP; 117656d965daSSean Wang 117756d965daSSean Wang return mt76_mcu_send_msg(&dev->mt76, MCU_UNI_CMD_BSS_INFO_UPDATE, 117856d965daSSean Wang &ps_req, sizeof(ps_req), true); 117956d965daSSean Wang } 11804086ee28SSean Wang 11814086ee28SSean Wang int mt7921_mcu_uni_bss_bcnft(struct mt7921_dev *dev, struct ieee80211_vif *vif, 11824086ee28SSean Wang bool enable) 11834086ee28SSean Wang { 11844086ee28SSean Wang struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; 11854086ee28SSean Wang struct { 11864086ee28SSean Wang struct { 11874086ee28SSean Wang u8 bss_idx; 11884086ee28SSean Wang u8 pad[3]; 11894086ee28SSean Wang } __packed hdr; 11904086ee28SSean Wang struct bcnft_tlv { 11914086ee28SSean Wang __le16 tag; 11924086ee28SSean Wang __le16 len; 11934086ee28SSean Wang __le16 bcn_interval; 11944086ee28SSean Wang u8 dtim_period; 11954086ee28SSean Wang u8 pad; 11964086ee28SSean Wang } __packed bcnft; 11974086ee28SSean Wang } __packed bcnft_req = { 11984086ee28SSean Wang .hdr = { 11994086ee28SSean Wang .bss_idx = mvif->mt76.idx, 12004086ee28SSean Wang }, 12014086ee28SSean Wang .bcnft = { 12024086ee28SSean Wang .tag = cpu_to_le16(UNI_BSS_INFO_BCNFT), 12034086ee28SSean Wang .len = cpu_to_le16(sizeof(struct bcnft_tlv)), 12044086ee28SSean Wang .bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int), 12054086ee28SSean Wang .dtim_period = vif->bss_conf.dtim_period, 12064086ee28SSean Wang }, 12074086ee28SSean Wang }; 12084086ee28SSean Wang 12094086ee28SSean Wang if (vif->type != NL80211_IFTYPE_STATION) 12104086ee28SSean Wang return 0; 12114086ee28SSean Wang 12124086ee28SSean Wang return mt76_mcu_send_msg(&dev->mt76, MCU_UNI_CMD_BSS_INFO_UPDATE, 12134086ee28SSean Wang &bcnft_req, sizeof(bcnft_req), true); 12144086ee28SSean Wang } 12154086ee28SSean Wang 12164086ee28SSean Wang int mt7921_mcu_set_bss_pm(struct mt7921_dev *dev, struct ieee80211_vif *vif, 12174086ee28SSean Wang bool enable) 12184086ee28SSean Wang { 12194086ee28SSean Wang struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; 12204086ee28SSean Wang struct { 12214086ee28SSean Wang u8 bss_idx; 12224086ee28SSean Wang u8 dtim_period; 12234086ee28SSean Wang __le16 aid; 12244086ee28SSean Wang __le16 bcn_interval; 12254086ee28SSean Wang __le16 atim_window; 12264086ee28SSean Wang u8 uapsd; 12274086ee28SSean Wang u8 bmc_delivered_ac; 12284086ee28SSean Wang u8 bmc_triggered_ac; 12294086ee28SSean Wang u8 pad; 12304086ee28SSean Wang } req = { 12314086ee28SSean Wang .bss_idx = mvif->mt76.idx, 12324086ee28SSean Wang .aid = cpu_to_le16(vif->bss_conf.aid), 12334086ee28SSean Wang .dtim_period = vif->bss_conf.dtim_period, 12344086ee28SSean Wang .bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int), 12354086ee28SSean Wang }; 12364086ee28SSean Wang struct { 12374086ee28SSean Wang u8 bss_idx; 12384086ee28SSean Wang u8 pad[3]; 12394086ee28SSean Wang } req_hdr = { 12404086ee28SSean Wang .bss_idx = mvif->mt76.idx, 12414086ee28SSean Wang }; 12424086ee28SSean Wang int err; 12434086ee28SSean Wang 12444086ee28SSean Wang if (vif->type != NL80211_IFTYPE_STATION) 12454086ee28SSean Wang return 0; 12464086ee28SSean Wang 12474086ee28SSean Wang err = mt76_mcu_send_msg(&dev->mt76, MCU_CMD_SET_BSS_ABORT, &req_hdr, 12484086ee28SSean Wang sizeof(req_hdr), false); 12494086ee28SSean Wang if (err < 0 || !enable) 12504086ee28SSean Wang return err; 12514086ee28SSean Wang 12524086ee28SSean Wang return mt76_mcu_send_msg(&dev->mt76, MCU_CMD_SET_BSS_CONNECTED, &req, 12534086ee28SSean Wang sizeof(req), false); 12544086ee28SSean Wang } 12551d8efc74SSean Wang 12561d8efc74SSean Wang int mt7921_mcu_drv_pmctrl(struct mt7921_dev *dev) 12571d8efc74SSean Wang { 12581d8efc74SSean Wang struct mt76_phy *mphy = &dev->mt76.phy; 12591d8efc74SSean Wang int i; 12601d8efc74SSean Wang 12611d8efc74SSean Wang if (!test_and_clear_bit(MT76_STATE_PM, &mphy->state)) 12621d8efc74SSean Wang goto out; 12631d8efc74SSean Wang 12641d8efc74SSean Wang for (i = 0; i < MT7921_DRV_OWN_RETRY_COUNT; i++) { 12651d8efc74SSean Wang mt76_wr(dev, MT_CONN_ON_LPCTL, PCIE_LPCR_HOST_CLR_OWN); 12661d8efc74SSean Wang if (mt76_poll_msec(dev, MT_CONN_ON_LPCTL, 12671d8efc74SSean Wang PCIE_LPCR_HOST_OWN_SYNC, 0, 50)) 12681d8efc74SSean Wang break; 12691d8efc74SSean Wang } 12701d8efc74SSean Wang 12711d8efc74SSean Wang if (i == MT7921_DRV_OWN_RETRY_COUNT) { 12721d8efc74SSean Wang dev_err(dev->mt76.dev, "driver own failed\n"); 1273*0c1ce988SLorenzo Bianconi mt7921_reset(&dev->mt76); 12741d8efc74SSean Wang return -EIO; 12751d8efc74SSean Wang } 12761d8efc74SSean Wang 12771d8efc74SSean Wang out: 12781d8efc74SSean Wang dev->pm.last_activity = jiffies; 12791d8efc74SSean Wang 12801d8efc74SSean Wang return 0; 12811d8efc74SSean Wang } 12821d8efc74SSean Wang 12831d8efc74SSean Wang int mt7921_mcu_fw_pmctrl(struct mt7921_dev *dev) 12841d8efc74SSean Wang { 12851d8efc74SSean Wang struct mt76_phy *mphy = &dev->mt76.phy; 12861d8efc74SSean Wang int i; 12871d8efc74SSean Wang 12881d8efc74SSean Wang if (test_and_set_bit(MT76_STATE_PM, &mphy->state)) 12891d8efc74SSean Wang return 0; 12901d8efc74SSean Wang 12911d8efc74SSean Wang for (i = 0; i < MT7921_DRV_OWN_RETRY_COUNT; i++) { 12921d8efc74SSean Wang mt76_wr(dev, MT_CONN_ON_LPCTL, PCIE_LPCR_HOST_SET_OWN); 12931d8efc74SSean Wang if (mt76_poll_msec(dev, MT_CONN_ON_LPCTL, 12941d8efc74SSean Wang PCIE_LPCR_HOST_OWN_SYNC, 4, 50)) 12951d8efc74SSean Wang break; 12961d8efc74SSean Wang } 12971d8efc74SSean Wang 12981d8efc74SSean Wang if (i == MT7921_DRV_OWN_RETRY_COUNT) { 12991d8efc74SSean Wang dev_err(dev->mt76.dev, "firmware own failed\n"); 1300*0c1ce988SLorenzo Bianconi mt7921_reset(&dev->mt76); 13011d8efc74SSean Wang return -EIO; 13021d8efc74SSean Wang } 13031d8efc74SSean Wang 13041d8efc74SSean Wang return 0; 13051d8efc74SSean Wang } 13061d8efc74SSean Wang 13071d8efc74SSean Wang void 13081d8efc74SSean Wang mt7921_pm_interface_iter(void *priv, u8 *mac, struct ieee80211_vif *vif) 13091d8efc74SSean Wang { 13101d8efc74SSean Wang struct mt7921_phy *phy = priv; 13111d8efc74SSean Wang struct mt7921_dev *dev = phy->dev; 1312159f6dd6SSean Wang int ret; 13131d8efc74SSean Wang 1314159f6dd6SSean Wang if (dev->pm.enable) 1315159f6dd6SSean Wang ret = mt7921_mcu_uni_bss_bcnft(dev, vif, true); 1316159f6dd6SSean Wang else 1317159f6dd6SSean Wang ret = mt7921_mcu_set_bss_pm(dev, vif, false); 1318159f6dd6SSean Wang 1319159f6dd6SSean Wang if (ret) 13201d8efc74SSean Wang return; 13211d8efc74SSean Wang 13221d8efc74SSean Wang if (dev->pm.enable) { 13231d8efc74SSean Wang vif->driver_flags |= IEEE80211_VIF_BEACON_FILTER; 13241d8efc74SSean Wang mt76_set(dev, MT_WF_RFCR(0), MT_WF_RFCR_DROP_OTHER_BEACON); 13251d8efc74SSean Wang } else { 13261d8efc74SSean Wang vif->driver_flags &= ~IEEE80211_VIF_BEACON_FILTER; 13271d8efc74SSean Wang mt76_clear(dev, MT_WF_RFCR(0), MT_WF_RFCR_DROP_OTHER_BEACON); 13281d8efc74SSean Wang } 13291d8efc74SSean Wang } 1330