1 // SPDX-License-Identifier: ISC 2 /* Copyright (C) 2020 MediaTek Inc. */ 3 4 #include <linux/devcoredump.h> 5 #include <linux/etherdevice.h> 6 #include <linux/timekeeping.h> 7 #include "mt7921.h" 8 #include "../dma.h" 9 #include "mac.h" 10 #include "mcu.h" 11 12 #define HE_BITS(f) cpu_to_le16(IEEE80211_RADIOTAP_HE_##f) 13 #define HE_PREP(f, m, v) le16_encode_bits(le32_get_bits(v, MT_CRXV_HE_##m),\ 14 IEEE80211_RADIOTAP_HE_##f) 15 16 static struct mt76_wcid *mt7921_rx_get_wcid(struct mt7921_dev *dev, 17 u16 idx, bool unicast) 18 { 19 struct mt7921_sta *sta; 20 struct mt76_wcid *wcid; 21 22 if (idx >= ARRAY_SIZE(dev->mt76.wcid)) 23 return NULL; 24 25 wcid = rcu_dereference(dev->mt76.wcid[idx]); 26 if (unicast || !wcid) 27 return wcid; 28 29 if (!wcid->sta) 30 return NULL; 31 32 sta = container_of(wcid, struct mt7921_sta, wcid); 33 if (!sta->vif) 34 return NULL; 35 36 return &sta->vif->sta.wcid; 37 } 38 39 void mt7921_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps) 40 { 41 } 42 EXPORT_SYMBOL_GPL(mt7921_sta_ps); 43 44 bool mt7921_mac_wtbl_update(struct mt7921_dev *dev, int idx, u32 mask) 45 { 46 mt76_rmw(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_WLAN_IDX, 47 FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, idx) | mask); 48 49 return mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY, 50 0, 5000); 51 } 52 53 void mt7921_mac_sta_poll(struct mt7921_dev *dev) 54 { 55 static const u8 ac_to_tid[] = { 56 [IEEE80211_AC_BE] = 0, 57 [IEEE80211_AC_BK] = 1, 58 [IEEE80211_AC_VI] = 4, 59 [IEEE80211_AC_VO] = 6 60 }; 61 struct ieee80211_sta *sta; 62 struct mt7921_sta *msta; 63 u32 tx_time[IEEE80211_NUM_ACS], rx_time[IEEE80211_NUM_ACS]; 64 LIST_HEAD(sta_poll_list); 65 struct rate_info *rate; 66 int i; 67 68 spin_lock_bh(&dev->sta_poll_lock); 69 list_splice_init(&dev->sta_poll_list, &sta_poll_list); 70 spin_unlock_bh(&dev->sta_poll_lock); 71 72 while (true) { 73 bool clear = false; 74 u32 addr, val; 75 u16 idx; 76 u8 bw; 77 78 spin_lock_bh(&dev->sta_poll_lock); 79 if (list_empty(&sta_poll_list)) { 80 spin_unlock_bh(&dev->sta_poll_lock); 81 break; 82 } 83 msta = list_first_entry(&sta_poll_list, 84 struct mt7921_sta, poll_list); 85 list_del_init(&msta->poll_list); 86 spin_unlock_bh(&dev->sta_poll_lock); 87 88 idx = msta->wcid.idx; 89 addr = mt7921_mac_wtbl_lmac_addr(idx, MT_WTBL_AC0_CTT_OFFSET); 90 91 for (i = 0; i < IEEE80211_NUM_ACS; i++) { 92 u32 tx_last = msta->airtime_ac[i]; 93 u32 rx_last = msta->airtime_ac[i + 4]; 94 95 msta->airtime_ac[i] = mt76_rr(dev, addr); 96 msta->airtime_ac[i + 4] = mt76_rr(dev, addr + 4); 97 98 tx_time[i] = msta->airtime_ac[i] - tx_last; 99 rx_time[i] = msta->airtime_ac[i + 4] - rx_last; 100 101 if ((tx_last | rx_last) & BIT(30)) 102 clear = true; 103 104 addr += 8; 105 } 106 107 if (clear) { 108 mt7921_mac_wtbl_update(dev, idx, 109 MT_WTBL_UPDATE_ADM_COUNT_CLEAR); 110 memset(msta->airtime_ac, 0, sizeof(msta->airtime_ac)); 111 } 112 113 if (!msta->wcid.sta) 114 continue; 115 116 sta = container_of((void *)msta, struct ieee80211_sta, 117 drv_priv); 118 for (i = 0; i < IEEE80211_NUM_ACS; i++) { 119 u8 q = mt76_connac_lmac_mapping(i); 120 u32 tx_cur = tx_time[q]; 121 u32 rx_cur = rx_time[q]; 122 u8 tid = ac_to_tid[i]; 123 124 if (!tx_cur && !rx_cur) 125 continue; 126 127 ieee80211_sta_register_airtime(sta, tid, tx_cur, 128 rx_cur); 129 } 130 131 /* We don't support reading GI info from txs packets. 132 * For accurate tx status reporting and AQL improvement, 133 * we need to make sure that flags match so polling GI 134 * from per-sta counters directly. 135 */ 136 rate = &msta->wcid.rate; 137 addr = mt7921_mac_wtbl_lmac_addr(idx, 138 MT_WTBL_TXRX_CAP_RATE_OFFSET); 139 val = mt76_rr(dev, addr); 140 141 switch (rate->bw) { 142 case RATE_INFO_BW_160: 143 bw = IEEE80211_STA_RX_BW_160; 144 break; 145 case RATE_INFO_BW_80: 146 bw = IEEE80211_STA_RX_BW_80; 147 break; 148 case RATE_INFO_BW_40: 149 bw = IEEE80211_STA_RX_BW_40; 150 break; 151 default: 152 bw = IEEE80211_STA_RX_BW_20; 153 break; 154 } 155 156 if (rate->flags & RATE_INFO_FLAGS_HE_MCS) { 157 u8 offs = MT_WTBL_TXRX_RATE_G2_HE + 2 * bw; 158 159 rate->he_gi = (val & (0x3 << offs)) >> offs; 160 } else if (rate->flags & 161 (RATE_INFO_FLAGS_VHT_MCS | RATE_INFO_FLAGS_MCS)) { 162 if (val & BIT(MT_WTBL_TXRX_RATE_G2 + bw)) 163 rate->flags |= RATE_INFO_FLAGS_SHORT_GI; 164 else 165 rate->flags &= ~RATE_INFO_FLAGS_SHORT_GI; 166 } 167 } 168 } 169 EXPORT_SYMBOL_GPL(mt7921_mac_sta_poll); 170 171 static void 172 mt7921_mac_decode_he_radiotap_ru(struct mt76_rx_status *status, 173 struct ieee80211_radiotap_he *he, 174 __le32 *rxv) 175 { 176 u32 ru_h, ru_l; 177 u8 ru, offs = 0; 178 179 ru_l = le32_get_bits(rxv[0], MT_PRXV_HE_RU_ALLOC_L); 180 ru_h = le32_get_bits(rxv[1], MT_PRXV_HE_RU_ALLOC_H); 181 ru = (u8)(ru_l | ru_h << 4); 182 183 status->bw = RATE_INFO_BW_HE_RU; 184 185 switch (ru) { 186 case 0 ... 36: 187 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_26; 188 offs = ru; 189 break; 190 case 37 ... 52: 191 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_52; 192 offs = ru - 37; 193 break; 194 case 53 ... 60: 195 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_106; 196 offs = ru - 53; 197 break; 198 case 61 ... 64: 199 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_242; 200 offs = ru - 61; 201 break; 202 case 65 ... 66: 203 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_484; 204 offs = ru - 65; 205 break; 206 case 67: 207 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_996; 208 break; 209 case 68: 210 status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_2x996; 211 break; 212 } 213 214 he->data1 |= HE_BITS(DATA1_BW_RU_ALLOC_KNOWN); 215 he->data2 |= HE_BITS(DATA2_RU_OFFSET_KNOWN) | 216 le16_encode_bits(offs, 217 IEEE80211_RADIOTAP_HE_DATA2_RU_OFFSET); 218 } 219 220 static void 221 mt7921_mac_decode_he_mu_radiotap(struct sk_buff *skb, __le32 *rxv) 222 { 223 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; 224 static const struct ieee80211_radiotap_he_mu mu_known = { 225 .flags1 = HE_BITS(MU_FLAGS1_SIG_B_MCS_KNOWN) | 226 HE_BITS(MU_FLAGS1_SIG_B_DCM_KNOWN) | 227 HE_BITS(MU_FLAGS1_CH1_RU_KNOWN) | 228 HE_BITS(MU_FLAGS1_SIG_B_SYMS_USERS_KNOWN) | 229 HE_BITS(MU_FLAGS1_SIG_B_COMP_KNOWN), 230 .flags2 = HE_BITS(MU_FLAGS2_BW_FROM_SIG_A_BW_KNOWN) | 231 HE_BITS(MU_FLAGS2_PUNC_FROM_SIG_A_BW_KNOWN), 232 }; 233 struct ieee80211_radiotap_he_mu *he_mu; 234 235 status->flag |= RX_FLAG_RADIOTAP_HE_MU; 236 237 he_mu = skb_push(skb, sizeof(mu_known)); 238 memcpy(he_mu, &mu_known, sizeof(mu_known)); 239 240 #define MU_PREP(f, v) le16_encode_bits(v, IEEE80211_RADIOTAP_HE_MU_##f) 241 242 he_mu->flags1 |= MU_PREP(FLAGS1_SIG_B_MCS, status->rate_idx); 243 if (status->he_dcm) 244 he_mu->flags1 |= MU_PREP(FLAGS1_SIG_B_DCM, status->he_dcm); 245 246 he_mu->flags2 |= MU_PREP(FLAGS2_BW_FROM_SIG_A_BW, status->bw) | 247 MU_PREP(FLAGS2_SIG_B_SYMS_USERS, 248 le32_get_bits(rxv[2], MT_CRXV_HE_NUM_USER)); 249 250 he_mu->ru_ch1[0] = le32_get_bits(rxv[3], MT_CRXV_HE_RU0); 251 252 if (status->bw >= RATE_INFO_BW_40) { 253 he_mu->flags1 |= HE_BITS(MU_FLAGS1_CH2_RU_KNOWN); 254 he_mu->ru_ch2[0] = 255 le32_get_bits(rxv[3], MT_CRXV_HE_RU1); 256 } 257 258 if (status->bw >= RATE_INFO_BW_80) { 259 he_mu->ru_ch1[1] = 260 le32_get_bits(rxv[3], MT_CRXV_HE_RU2); 261 he_mu->ru_ch2[1] = 262 le32_get_bits(rxv[3], MT_CRXV_HE_RU3); 263 } 264 } 265 266 static void 267 mt7921_mac_decode_he_radiotap(struct sk_buff *skb, __le32 *rxv, u32 mode) 268 { 269 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; 270 static const struct ieee80211_radiotap_he known = { 271 .data1 = HE_BITS(DATA1_DATA_MCS_KNOWN) | 272 HE_BITS(DATA1_DATA_DCM_KNOWN) | 273 HE_BITS(DATA1_STBC_KNOWN) | 274 HE_BITS(DATA1_CODING_KNOWN) | 275 HE_BITS(DATA1_LDPC_XSYMSEG_KNOWN) | 276 HE_BITS(DATA1_DOPPLER_KNOWN) | 277 HE_BITS(DATA1_SPTL_REUSE_KNOWN) | 278 HE_BITS(DATA1_BSS_COLOR_KNOWN), 279 .data2 = HE_BITS(DATA2_GI_KNOWN) | 280 HE_BITS(DATA2_TXBF_KNOWN) | 281 HE_BITS(DATA2_PE_DISAMBIG_KNOWN) | 282 HE_BITS(DATA2_TXOP_KNOWN), 283 }; 284 struct ieee80211_radiotap_he *he = NULL; 285 u32 ltf_size = le32_get_bits(rxv[2], MT_CRXV_HE_LTF_SIZE) + 1; 286 287 status->flag |= RX_FLAG_RADIOTAP_HE; 288 289 he = skb_push(skb, sizeof(known)); 290 memcpy(he, &known, sizeof(known)); 291 292 he->data3 = HE_PREP(DATA3_BSS_COLOR, BSS_COLOR, rxv[14]) | 293 HE_PREP(DATA3_LDPC_XSYMSEG, LDPC_EXT_SYM, rxv[2]); 294 he->data4 = HE_PREP(DATA4_SU_MU_SPTL_REUSE, SR_MASK, rxv[11]); 295 he->data5 = HE_PREP(DATA5_PE_DISAMBIG, PE_DISAMBIG, rxv[2]) | 296 le16_encode_bits(ltf_size, 297 IEEE80211_RADIOTAP_HE_DATA5_LTF_SIZE); 298 if (le32_to_cpu(rxv[0]) & MT_PRXV_TXBF) 299 he->data5 |= HE_BITS(DATA5_TXBF); 300 he->data6 = HE_PREP(DATA6_TXOP, TXOP_DUR, rxv[14]) | 301 HE_PREP(DATA6_DOPPLER, DOPPLER, rxv[14]); 302 303 switch (mode) { 304 case MT_PHY_TYPE_HE_SU: 305 he->data1 |= HE_BITS(DATA1_FORMAT_SU) | 306 HE_BITS(DATA1_UL_DL_KNOWN) | 307 HE_BITS(DATA1_BEAM_CHANGE_KNOWN) | 308 HE_BITS(DATA1_BW_RU_ALLOC_KNOWN); 309 310 he->data3 |= HE_PREP(DATA3_BEAM_CHANGE, BEAM_CHNG, rxv[14]) | 311 HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]); 312 break; 313 case MT_PHY_TYPE_HE_EXT_SU: 314 he->data1 |= HE_BITS(DATA1_FORMAT_EXT_SU) | 315 HE_BITS(DATA1_UL_DL_KNOWN) | 316 HE_BITS(DATA1_BW_RU_ALLOC_KNOWN); 317 318 he->data3 |= HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]); 319 break; 320 case MT_PHY_TYPE_HE_MU: 321 he->data1 |= HE_BITS(DATA1_FORMAT_MU) | 322 HE_BITS(DATA1_UL_DL_KNOWN); 323 324 he->data3 |= HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]); 325 he->data4 |= HE_PREP(DATA4_MU_STA_ID, MU_AID, rxv[7]); 326 327 mt7921_mac_decode_he_radiotap_ru(status, he, rxv); 328 mt7921_mac_decode_he_mu_radiotap(skb, rxv); 329 break; 330 case MT_PHY_TYPE_HE_TB: 331 he->data1 |= HE_BITS(DATA1_FORMAT_TRIG) | 332 HE_BITS(DATA1_SPTL_REUSE2_KNOWN) | 333 HE_BITS(DATA1_SPTL_REUSE3_KNOWN) | 334 HE_BITS(DATA1_SPTL_REUSE4_KNOWN); 335 336 he->data4 |= HE_PREP(DATA4_TB_SPTL_REUSE1, SR_MASK, rxv[11]) | 337 HE_PREP(DATA4_TB_SPTL_REUSE2, SR1_MASK, rxv[11]) | 338 HE_PREP(DATA4_TB_SPTL_REUSE3, SR2_MASK, rxv[11]) | 339 HE_PREP(DATA4_TB_SPTL_REUSE4, SR3_MASK, rxv[11]); 340 341 mt7921_mac_decode_he_radiotap_ru(status, he, rxv); 342 break; 343 default: 344 break; 345 } 346 } 347 348 static void 349 mt7921_get_status_freq_info(struct mt7921_dev *dev, struct mt76_phy *mphy, 350 struct mt76_rx_status *status, u8 chfreq) 351 { 352 if (!test_bit(MT76_HW_SCANNING, &mphy->state) && 353 !test_bit(MT76_HW_SCHED_SCANNING, &mphy->state) && 354 !test_bit(MT76_STATE_ROC, &mphy->state)) { 355 status->freq = mphy->chandef.chan->center_freq; 356 status->band = mphy->chandef.chan->band; 357 return; 358 } 359 360 if (chfreq > 180) { 361 status->band = NL80211_BAND_6GHZ; 362 chfreq = (chfreq - 181) * 4 + 1; 363 } else if (chfreq > 14) { 364 status->band = NL80211_BAND_5GHZ; 365 } else { 366 status->band = NL80211_BAND_2GHZ; 367 } 368 status->freq = ieee80211_channel_to_frequency(chfreq, status->band); 369 } 370 371 static void 372 mt7921_mac_rssi_iter(void *priv, u8 *mac, struct ieee80211_vif *vif) 373 { 374 struct sk_buff *skb = priv; 375 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; 376 struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; 377 struct ieee80211_hdr *hdr = mt76_skb_get_hdr(skb); 378 379 if (status->signal > 0) 380 return; 381 382 if (!ether_addr_equal(vif->addr, hdr->addr1)) 383 return; 384 385 ewma_rssi_add(&mvif->rssi, -status->signal); 386 } 387 388 static void 389 mt7921_mac_assoc_rssi(struct mt7921_dev *dev, struct sk_buff *skb) 390 { 391 struct ieee80211_hdr *hdr = mt76_skb_get_hdr(skb); 392 393 if (!ieee80211_is_assoc_resp(hdr->frame_control) && 394 !ieee80211_is_auth(hdr->frame_control)) 395 return; 396 397 ieee80211_iterate_active_interfaces_atomic(mt76_hw(dev), 398 IEEE80211_IFACE_ITER_RESUME_ALL, 399 mt7921_mac_rssi_iter, skb); 400 } 401 402 /* The HW does not translate the mac header to 802.3 for mesh point */ 403 static int mt7921_reverse_frag0_hdr_trans(struct sk_buff *skb, u16 hdr_gap) 404 { 405 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; 406 struct ethhdr *eth_hdr = (struct ethhdr *)(skb->data + hdr_gap); 407 struct mt7921_sta *msta = (struct mt7921_sta *)status->wcid; 408 __le32 *rxd = (__le32 *)skb->data; 409 struct ieee80211_sta *sta; 410 struct ieee80211_vif *vif; 411 struct ieee80211_hdr hdr; 412 u16 frame_control; 413 414 if (le32_get_bits(rxd[3], MT_RXD3_NORMAL_ADDR_TYPE) != 415 MT_RXD3_NORMAL_U2M) 416 return -EINVAL; 417 418 if (!(le32_to_cpu(rxd[1]) & MT_RXD1_NORMAL_GROUP_4)) 419 return -EINVAL; 420 421 if (!msta || !msta->vif) 422 return -EINVAL; 423 424 sta = container_of((void *)msta, struct ieee80211_sta, drv_priv); 425 vif = container_of((void *)msta->vif, struct ieee80211_vif, drv_priv); 426 427 /* store the info from RXD and ethhdr to avoid being overridden */ 428 frame_control = le32_get_bits(rxd[6], MT_RXD6_FRAME_CONTROL); 429 hdr.frame_control = cpu_to_le16(frame_control); 430 hdr.seq_ctrl = cpu_to_le16(le32_get_bits(rxd[8], MT_RXD8_SEQ_CTRL)); 431 hdr.duration_id = 0; 432 433 ether_addr_copy(hdr.addr1, vif->addr); 434 ether_addr_copy(hdr.addr2, sta->addr); 435 switch (frame_control & (IEEE80211_FCTL_TODS | 436 IEEE80211_FCTL_FROMDS)) { 437 case 0: 438 ether_addr_copy(hdr.addr3, vif->bss_conf.bssid); 439 break; 440 case IEEE80211_FCTL_FROMDS: 441 ether_addr_copy(hdr.addr3, eth_hdr->h_source); 442 break; 443 case IEEE80211_FCTL_TODS: 444 ether_addr_copy(hdr.addr3, eth_hdr->h_dest); 445 break; 446 case IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS: 447 ether_addr_copy(hdr.addr3, eth_hdr->h_dest); 448 ether_addr_copy(hdr.addr4, eth_hdr->h_source); 449 break; 450 default: 451 break; 452 } 453 454 skb_pull(skb, hdr_gap + sizeof(struct ethhdr) - 2); 455 if (eth_hdr->h_proto == cpu_to_be16(ETH_P_AARP) || 456 eth_hdr->h_proto == cpu_to_be16(ETH_P_IPX)) 457 ether_addr_copy(skb_push(skb, ETH_ALEN), bridge_tunnel_header); 458 else if (be16_to_cpu(eth_hdr->h_proto) >= ETH_P_802_3_MIN) 459 ether_addr_copy(skb_push(skb, ETH_ALEN), rfc1042_header); 460 else 461 skb_pull(skb, 2); 462 463 if (ieee80211_has_order(hdr.frame_control)) 464 memcpy(skb_push(skb, IEEE80211_HT_CTL_LEN), &rxd[9], 465 IEEE80211_HT_CTL_LEN); 466 if (ieee80211_is_data_qos(hdr.frame_control)) { 467 __le16 qos_ctrl; 468 469 qos_ctrl = cpu_to_le16(le32_get_bits(rxd[8], MT_RXD8_QOS_CTL)); 470 memcpy(skb_push(skb, IEEE80211_QOS_CTL_LEN), &qos_ctrl, 471 IEEE80211_QOS_CTL_LEN); 472 } 473 474 if (ieee80211_has_a4(hdr.frame_control)) 475 memcpy(skb_push(skb, sizeof(hdr)), &hdr, sizeof(hdr)); 476 else 477 memcpy(skb_push(skb, sizeof(hdr) - 6), &hdr, sizeof(hdr) - 6); 478 479 return 0; 480 } 481 482 static int 483 mt7921_mac_fill_rx(struct mt7921_dev *dev, struct sk_buff *skb) 484 { 485 u32 csum_mask = MT_RXD0_NORMAL_IP_SUM | MT_RXD0_NORMAL_UDP_TCP_SUM; 486 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; 487 bool hdr_trans, unicast, insert_ccmp_hdr = false; 488 u8 chfreq, qos_ctl = 0, remove_pad, amsdu_info; 489 u16 hdr_gap; 490 __le32 *rxv = NULL, *rxd = (__le32 *)skb->data; 491 struct mt76_phy *mphy = &dev->mt76.phy; 492 struct mt7921_phy *phy = &dev->phy; 493 struct ieee80211_supported_band *sband; 494 u32 rxd0 = le32_to_cpu(rxd[0]); 495 u32 rxd1 = le32_to_cpu(rxd[1]); 496 u32 rxd2 = le32_to_cpu(rxd[2]); 497 u32 rxd3 = le32_to_cpu(rxd[3]); 498 u32 rxd4 = le32_to_cpu(rxd[4]); 499 u16 seq_ctrl = 0; 500 __le16 fc = 0; 501 u32 mode = 0; 502 int i, idx; 503 504 memset(status, 0, sizeof(*status)); 505 506 if (rxd1 & MT_RXD1_NORMAL_BAND_IDX) 507 return -EINVAL; 508 509 if (!test_bit(MT76_STATE_RUNNING, &mphy->state)) 510 return -EINVAL; 511 512 if (rxd2 & MT_RXD2_NORMAL_AMSDU_ERR) 513 return -EINVAL; 514 515 hdr_trans = rxd2 & MT_RXD2_NORMAL_HDR_TRANS; 516 if (hdr_trans && (rxd1 & MT_RXD1_NORMAL_CM)) 517 return -EINVAL; 518 519 /* ICV error or CCMP/BIP/WPI MIC error */ 520 if (rxd1 & MT_RXD1_NORMAL_ICV_ERR) 521 status->flag |= RX_FLAG_ONLY_MONITOR; 522 523 chfreq = FIELD_GET(MT_RXD3_NORMAL_CH_FREQ, rxd3); 524 unicast = FIELD_GET(MT_RXD3_NORMAL_ADDR_TYPE, rxd3) == MT_RXD3_NORMAL_U2M; 525 idx = FIELD_GET(MT_RXD1_NORMAL_WLAN_IDX, rxd1); 526 status->wcid = mt7921_rx_get_wcid(dev, idx, unicast); 527 528 if (status->wcid) { 529 struct mt7921_sta *msta; 530 531 msta = container_of(status->wcid, struct mt7921_sta, wcid); 532 spin_lock_bh(&dev->sta_poll_lock); 533 if (list_empty(&msta->poll_list)) 534 list_add_tail(&msta->poll_list, &dev->sta_poll_list); 535 spin_unlock_bh(&dev->sta_poll_lock); 536 } 537 538 mt7921_get_status_freq_info(dev, mphy, status, chfreq); 539 540 switch (status->band) { 541 case NL80211_BAND_5GHZ: 542 sband = &mphy->sband_5g.sband; 543 break; 544 case NL80211_BAND_6GHZ: 545 sband = &mphy->sband_6g.sband; 546 break; 547 default: 548 sband = &mphy->sband_2g.sband; 549 break; 550 } 551 552 if (!sband->channels) 553 return -EINVAL; 554 555 if ((rxd0 & csum_mask) == csum_mask) 556 skb->ip_summed = CHECKSUM_UNNECESSARY; 557 558 if (rxd1 & MT_RXD1_NORMAL_FCS_ERR) 559 status->flag |= RX_FLAG_FAILED_FCS_CRC; 560 561 if (rxd1 & MT_RXD1_NORMAL_TKIP_MIC_ERR) 562 status->flag |= RX_FLAG_MMIC_ERROR; 563 564 if (FIELD_GET(MT_RXD1_NORMAL_SEC_MODE, rxd1) != 0 && 565 !(rxd1 & (MT_RXD1_NORMAL_CLM | MT_RXD1_NORMAL_CM))) { 566 status->flag |= RX_FLAG_DECRYPTED; 567 status->flag |= RX_FLAG_IV_STRIPPED; 568 status->flag |= RX_FLAG_MMIC_STRIPPED | RX_FLAG_MIC_STRIPPED; 569 } 570 571 remove_pad = FIELD_GET(MT_RXD2_NORMAL_HDR_OFFSET, rxd2); 572 573 if (rxd2 & MT_RXD2_NORMAL_MAX_LEN_ERROR) 574 return -EINVAL; 575 576 rxd += 6; 577 if (rxd1 & MT_RXD1_NORMAL_GROUP_4) { 578 u32 v0 = le32_to_cpu(rxd[0]); 579 u32 v2 = le32_to_cpu(rxd[2]); 580 581 fc = cpu_to_le16(FIELD_GET(MT_RXD6_FRAME_CONTROL, v0)); 582 seq_ctrl = FIELD_GET(MT_RXD8_SEQ_CTRL, v2); 583 qos_ctl = FIELD_GET(MT_RXD8_QOS_CTL, v2); 584 585 rxd += 4; 586 if ((u8 *)rxd - skb->data >= skb->len) 587 return -EINVAL; 588 } 589 590 if (rxd1 & MT_RXD1_NORMAL_GROUP_1) { 591 u8 *data = (u8 *)rxd; 592 593 if (status->flag & RX_FLAG_DECRYPTED) { 594 switch (FIELD_GET(MT_RXD1_NORMAL_SEC_MODE, rxd1)) { 595 case MT_CIPHER_AES_CCMP: 596 case MT_CIPHER_CCMP_CCX: 597 case MT_CIPHER_CCMP_256: 598 insert_ccmp_hdr = 599 FIELD_GET(MT_RXD2_NORMAL_FRAG, rxd2); 600 fallthrough; 601 case MT_CIPHER_TKIP: 602 case MT_CIPHER_TKIP_NO_MIC: 603 case MT_CIPHER_GCMP: 604 case MT_CIPHER_GCMP_256: 605 status->iv[0] = data[5]; 606 status->iv[1] = data[4]; 607 status->iv[2] = data[3]; 608 status->iv[3] = data[2]; 609 status->iv[4] = data[1]; 610 status->iv[5] = data[0]; 611 break; 612 default: 613 break; 614 } 615 } 616 rxd += 4; 617 if ((u8 *)rxd - skb->data >= skb->len) 618 return -EINVAL; 619 } 620 621 if (rxd1 & MT_RXD1_NORMAL_GROUP_2) { 622 status->timestamp = le32_to_cpu(rxd[0]); 623 status->flag |= RX_FLAG_MACTIME_START; 624 625 if (!(rxd2 & MT_RXD2_NORMAL_NON_AMPDU)) { 626 status->flag |= RX_FLAG_AMPDU_DETAILS; 627 628 /* all subframes of an A-MPDU have the same timestamp */ 629 if (phy->rx_ampdu_ts != status->timestamp) { 630 if (!++phy->ampdu_ref) 631 phy->ampdu_ref++; 632 } 633 phy->rx_ampdu_ts = status->timestamp; 634 635 status->ampdu_ref = phy->ampdu_ref; 636 } 637 638 rxd += 2; 639 if ((u8 *)rxd - skb->data >= skb->len) 640 return -EINVAL; 641 } 642 643 /* RXD Group 3 - P-RXV */ 644 if (rxd1 & MT_RXD1_NORMAL_GROUP_3) { 645 u8 stbc, gi; 646 u32 v0, v1; 647 bool cck; 648 649 rxv = rxd; 650 rxd += 2; 651 if ((u8 *)rxd - skb->data >= skb->len) 652 return -EINVAL; 653 654 v0 = le32_to_cpu(rxv[0]); 655 v1 = le32_to_cpu(rxv[1]); 656 657 if (v0 & MT_PRXV_HT_AD_CODE) 658 status->enc_flags |= RX_ENC_FLAG_LDPC; 659 660 status->chains = mphy->antenna_mask; 661 status->chain_signal[0] = to_rssi(MT_PRXV_RCPI0, v1); 662 status->chain_signal[1] = to_rssi(MT_PRXV_RCPI1, v1); 663 status->chain_signal[2] = to_rssi(MT_PRXV_RCPI2, v1); 664 status->chain_signal[3] = to_rssi(MT_PRXV_RCPI3, v1); 665 status->signal = -128; 666 for (i = 0; i < hweight8(mphy->antenna_mask); i++) { 667 if (!(status->chains & BIT(i)) || 668 status->chain_signal[i] >= 0) 669 continue; 670 671 status->signal = max(status->signal, 672 status->chain_signal[i]); 673 } 674 675 stbc = FIELD_GET(MT_PRXV_STBC, v0); 676 gi = FIELD_GET(MT_PRXV_SGI, v0); 677 cck = false; 678 679 idx = i = FIELD_GET(MT_PRXV_TX_RATE, v0); 680 mode = FIELD_GET(MT_PRXV_TX_MODE, v0); 681 682 switch (mode) { 683 case MT_PHY_TYPE_CCK: 684 cck = true; 685 fallthrough; 686 case MT_PHY_TYPE_OFDM: 687 i = mt76_get_rate(&dev->mt76, sband, i, cck); 688 break; 689 case MT_PHY_TYPE_HT_GF: 690 case MT_PHY_TYPE_HT: 691 status->encoding = RX_ENC_HT; 692 if (i > 31) 693 return -EINVAL; 694 break; 695 case MT_PHY_TYPE_VHT: 696 status->nss = 697 FIELD_GET(MT_PRXV_NSTS, v0) + 1; 698 status->encoding = RX_ENC_VHT; 699 if (i > 11) 700 return -EINVAL; 701 break; 702 case MT_PHY_TYPE_HE_MU: 703 case MT_PHY_TYPE_HE_SU: 704 case MT_PHY_TYPE_HE_EXT_SU: 705 case MT_PHY_TYPE_HE_TB: 706 status->nss = 707 FIELD_GET(MT_PRXV_NSTS, v0) + 1; 708 status->encoding = RX_ENC_HE; 709 i &= GENMASK(3, 0); 710 711 if (gi <= NL80211_RATE_INFO_HE_GI_3_2) 712 status->he_gi = gi; 713 714 status->he_dcm = !!(idx & MT_PRXV_TX_DCM); 715 break; 716 default: 717 return -EINVAL; 718 } 719 720 status->rate_idx = i; 721 722 switch (FIELD_GET(MT_PRXV_FRAME_MODE, v0)) { 723 case IEEE80211_STA_RX_BW_20: 724 break; 725 case IEEE80211_STA_RX_BW_40: 726 if (mode & MT_PHY_TYPE_HE_EXT_SU && 727 (idx & MT_PRXV_TX_ER_SU_106T)) { 728 status->bw = RATE_INFO_BW_HE_RU; 729 status->he_ru = 730 NL80211_RATE_INFO_HE_RU_ALLOC_106; 731 } else { 732 status->bw = RATE_INFO_BW_40; 733 } 734 break; 735 case IEEE80211_STA_RX_BW_80: 736 status->bw = RATE_INFO_BW_80; 737 break; 738 case IEEE80211_STA_RX_BW_160: 739 status->bw = RATE_INFO_BW_160; 740 break; 741 default: 742 return -EINVAL; 743 } 744 745 status->enc_flags |= RX_ENC_FLAG_STBC_MASK * stbc; 746 if (mode < MT_PHY_TYPE_HE_SU && gi) 747 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 748 749 if (rxd1 & MT_RXD1_NORMAL_GROUP_5) { 750 rxd += 18; 751 if ((u8 *)rxd - skb->data >= skb->len) 752 return -EINVAL; 753 } 754 } 755 756 amsdu_info = FIELD_GET(MT_RXD4_NORMAL_PAYLOAD_FORMAT, rxd4); 757 status->amsdu = !!amsdu_info; 758 if (status->amsdu) { 759 status->first_amsdu = amsdu_info == MT_RXD4_FIRST_AMSDU_FRAME; 760 status->last_amsdu = amsdu_info == MT_RXD4_LAST_AMSDU_FRAME; 761 } 762 763 hdr_gap = (u8 *)rxd - skb->data + 2 * remove_pad; 764 if (hdr_trans && ieee80211_has_morefrags(fc)) { 765 if (mt7921_reverse_frag0_hdr_trans(skb, hdr_gap)) 766 return -EINVAL; 767 hdr_trans = false; 768 } else { 769 skb_pull(skb, hdr_gap); 770 if (!hdr_trans && status->amsdu) { 771 memmove(skb->data + 2, skb->data, 772 ieee80211_get_hdrlen_from_skb(skb)); 773 skb_pull(skb, 2); 774 } 775 } 776 777 if (!hdr_trans) { 778 struct ieee80211_hdr *hdr; 779 780 if (insert_ccmp_hdr) { 781 u8 key_id = FIELD_GET(MT_RXD1_NORMAL_KEY_ID, rxd1); 782 783 mt76_insert_ccmp_hdr(skb, key_id); 784 } 785 786 hdr = mt76_skb_get_hdr(skb); 787 fc = hdr->frame_control; 788 if (ieee80211_is_data_qos(fc)) { 789 seq_ctrl = le16_to_cpu(hdr->seq_ctrl); 790 qos_ctl = *ieee80211_get_qos_ctl(hdr); 791 } 792 } else { 793 status->flag |= RX_FLAG_8023; 794 } 795 796 mt7921_mac_assoc_rssi(dev, skb); 797 798 if (rxv && mode >= MT_PHY_TYPE_HE_SU && !(status->flag & RX_FLAG_8023)) 799 mt7921_mac_decode_he_radiotap(skb, rxv, mode); 800 801 if (!status->wcid || !ieee80211_is_data_qos(fc)) 802 return 0; 803 804 status->aggr = unicast && !ieee80211_is_qos_nullfunc(fc); 805 status->seqno = IEEE80211_SEQ_TO_SN(seq_ctrl); 806 status->qos_ctl = qos_ctl; 807 808 return 0; 809 } 810 811 static void 812 mt7921_mac_write_txwi_8023(struct mt7921_dev *dev, __le32 *txwi, 813 struct sk_buff *skb, struct mt76_wcid *wcid) 814 { 815 u8 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK; 816 u8 fc_type, fc_stype; 817 u16 ethertype; 818 bool wmm = false; 819 u32 val; 820 821 if (wcid->sta) { 822 struct ieee80211_sta *sta; 823 824 sta = container_of((void *)wcid, struct ieee80211_sta, drv_priv); 825 wmm = sta->wme; 826 } 827 828 val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_3) | 829 FIELD_PREP(MT_TXD1_TID, tid); 830 831 ethertype = get_unaligned_be16(&skb->data[12]); 832 if (ethertype >= ETH_P_802_3_MIN) 833 val |= MT_TXD1_ETH_802_3; 834 835 txwi[1] |= cpu_to_le32(val); 836 837 fc_type = IEEE80211_FTYPE_DATA >> 2; 838 fc_stype = wmm ? IEEE80211_STYPE_QOS_DATA >> 4 : 0; 839 840 val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) | 841 FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype); 842 843 txwi[2] |= cpu_to_le32(val); 844 845 val = FIELD_PREP(MT_TXD7_TYPE, fc_type) | 846 FIELD_PREP(MT_TXD7_SUB_TYPE, fc_stype); 847 txwi[7] |= cpu_to_le32(val); 848 } 849 850 static void 851 mt7921_mac_write_txwi_80211(struct mt7921_dev *dev, __le32 *txwi, 852 struct sk_buff *skb, struct ieee80211_key_conf *key) 853 { 854 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 855 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data; 856 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 857 bool multicast = is_multicast_ether_addr(hdr->addr1); 858 u8 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK; 859 __le16 fc = hdr->frame_control; 860 u8 fc_type, fc_stype; 861 u32 val; 862 863 if (ieee80211_is_action(fc) && 864 mgmt->u.action.category == WLAN_CATEGORY_BACK && 865 mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ) { 866 u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab); 867 868 txwi[5] |= cpu_to_le32(MT_TXD5_ADD_BA); 869 tid = (capab >> 2) & IEEE80211_QOS_CTL_TID_MASK; 870 } else if (ieee80211_is_back_req(hdr->frame_control)) { 871 struct ieee80211_bar *bar = (struct ieee80211_bar *)hdr; 872 u16 control = le16_to_cpu(bar->control); 873 874 tid = FIELD_GET(IEEE80211_BAR_CTRL_TID_INFO_MASK, control); 875 } 876 877 val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_11) | 878 FIELD_PREP(MT_TXD1_HDR_INFO, 879 ieee80211_get_hdrlen_from_skb(skb) / 2) | 880 FIELD_PREP(MT_TXD1_TID, tid); 881 txwi[1] |= cpu_to_le32(val); 882 883 fc_type = (le16_to_cpu(fc) & IEEE80211_FCTL_FTYPE) >> 2; 884 fc_stype = (le16_to_cpu(fc) & IEEE80211_FCTL_STYPE) >> 4; 885 886 val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) | 887 FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype) | 888 FIELD_PREP(MT_TXD2_MULTICAST, multicast); 889 890 if (key && multicast && ieee80211_is_robust_mgmt_frame(skb) && 891 key->cipher == WLAN_CIPHER_SUITE_AES_CMAC) { 892 val |= MT_TXD2_BIP; 893 txwi[3] &= ~cpu_to_le32(MT_TXD3_PROTECT_FRAME); 894 } 895 896 if (!ieee80211_is_data(fc) || multicast || 897 info->flags & IEEE80211_TX_CTL_USE_MINRATE) 898 val |= MT_TXD2_FIX_RATE; 899 900 txwi[2] |= cpu_to_le32(val); 901 902 if (ieee80211_is_beacon(fc)) { 903 txwi[3] &= ~cpu_to_le32(MT_TXD3_SW_POWER_MGMT); 904 txwi[3] |= cpu_to_le32(MT_TXD3_REM_TX_COUNT); 905 } 906 907 if (info->flags & IEEE80211_TX_CTL_INJECTED) { 908 u16 seqno = le16_to_cpu(hdr->seq_ctrl); 909 910 if (ieee80211_is_back_req(hdr->frame_control)) { 911 struct ieee80211_bar *bar; 912 913 bar = (struct ieee80211_bar *)skb->data; 914 seqno = le16_to_cpu(bar->start_seq_num); 915 } 916 917 val = MT_TXD3_SN_VALID | 918 FIELD_PREP(MT_TXD3_SEQ, IEEE80211_SEQ_TO_SN(seqno)); 919 txwi[3] |= cpu_to_le32(val); 920 txwi[7] &= ~cpu_to_le32(MT_TXD7_HW_AMSDU); 921 } 922 923 if (mt76_is_mmio(&dev->mt76)) { 924 val = FIELD_PREP(MT_TXD7_TYPE, fc_type) | 925 FIELD_PREP(MT_TXD7_SUB_TYPE, fc_stype); 926 txwi[7] |= cpu_to_le32(val); 927 } else { 928 val = FIELD_PREP(MT_TXD8_L_TYPE, fc_type) | 929 FIELD_PREP(MT_TXD8_L_SUB_TYPE, fc_stype); 930 txwi[8] |= cpu_to_le32(val); 931 } 932 } 933 934 void mt7921_mac_write_txwi(struct mt7921_dev *dev, __le32 *txwi, 935 struct sk_buff *skb, struct mt76_wcid *wcid, 936 struct ieee80211_key_conf *key, int pid, 937 bool beacon) 938 { 939 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 940 struct ieee80211_vif *vif = info->control.vif; 941 struct mt76_phy *mphy = &dev->mphy; 942 u8 p_fmt, q_idx, omac_idx = 0, wmm_idx = 0; 943 bool is_mmio = mt76_is_mmio(&dev->mt76); 944 u32 sz_txd = is_mmio ? MT_TXD_SIZE : MT_SDIO_TXD_SIZE; 945 bool is_8023 = info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP; 946 u16 tx_count = 15; 947 u32 val; 948 949 if (vif) { 950 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; 951 952 omac_idx = mvif->omac_idx; 953 wmm_idx = mvif->wmm_idx; 954 } 955 956 if (beacon) { 957 p_fmt = MT_TX_TYPE_FW; 958 q_idx = MT_LMAC_BCN0; 959 } else if (skb_get_queue_mapping(skb) >= MT_TXQ_PSD) { 960 p_fmt = is_mmio ? MT_TX_TYPE_CT : MT_TX_TYPE_SF; 961 q_idx = MT_LMAC_ALTX0; 962 } else { 963 p_fmt = is_mmio ? MT_TX_TYPE_CT : MT_TX_TYPE_SF; 964 q_idx = wmm_idx * MT7921_MAX_WMM_SETS + 965 mt76_connac_lmac_mapping(skb_get_queue_mapping(skb)); 966 } 967 968 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len + sz_txd) | 969 FIELD_PREP(MT_TXD0_PKT_FMT, p_fmt) | 970 FIELD_PREP(MT_TXD0_Q_IDX, q_idx); 971 txwi[0] = cpu_to_le32(val); 972 973 val = MT_TXD1_LONG_FORMAT | 974 FIELD_PREP(MT_TXD1_WLAN_IDX, wcid->idx) | 975 FIELD_PREP(MT_TXD1_OWN_MAC, omac_idx); 976 977 txwi[1] = cpu_to_le32(val); 978 txwi[2] = 0; 979 980 val = FIELD_PREP(MT_TXD3_REM_TX_COUNT, tx_count); 981 if (key) 982 val |= MT_TXD3_PROTECT_FRAME; 983 if (info->flags & IEEE80211_TX_CTL_NO_ACK) 984 val |= MT_TXD3_NO_ACK; 985 986 txwi[3] = cpu_to_le32(val); 987 txwi[4] = 0; 988 989 val = FIELD_PREP(MT_TXD5_PID, pid); 990 if (pid >= MT_PACKET_ID_FIRST) 991 val |= MT_TXD5_TX_STATUS_HOST; 992 txwi[5] = cpu_to_le32(val); 993 994 txwi[6] = 0; 995 txwi[7] = wcid->amsdu ? cpu_to_le32(MT_TXD7_HW_AMSDU) : 0; 996 997 if (is_8023) 998 mt7921_mac_write_txwi_8023(dev, txwi, skb, wcid); 999 else 1000 mt7921_mac_write_txwi_80211(dev, txwi, skb, key); 1001 1002 if (txwi[2] & cpu_to_le32(MT_TXD2_FIX_RATE)) { 1003 int rateidx = vif ? ffs(vif->bss_conf.basic_rates) - 1 : 0; 1004 u16 rate, mode; 1005 1006 /* hardware won't add HTC for mgmt/ctrl frame */ 1007 txwi[2] |= cpu_to_le32(MT_TXD2_HTC_VLD); 1008 1009 rate = mt76_calculate_default_rate(mphy, rateidx); 1010 mode = rate >> 8; 1011 rate &= GENMASK(7, 0); 1012 rate |= FIELD_PREP(MT_TX_RATE_MODE, mode); 1013 1014 val = MT_TXD6_FIXED_BW | 1015 FIELD_PREP(MT_TXD6_TX_RATE, rate); 1016 txwi[6] |= cpu_to_le32(val); 1017 txwi[3] |= cpu_to_le32(MT_TXD3_BA_DISABLE); 1018 } 1019 } 1020 EXPORT_SYMBOL_GPL(mt7921_mac_write_txwi); 1021 1022 void mt7921_tx_check_aggr(struct ieee80211_sta *sta, __le32 *txwi) 1023 { 1024 struct mt7921_sta *msta; 1025 u16 fc, tid; 1026 u32 val; 1027 1028 if (!sta || !(sta->deflink.ht_cap.ht_supported || sta->deflink.he_cap.has_he)) 1029 return; 1030 1031 tid = le32_get_bits(txwi[1], MT_TXD1_TID); 1032 if (tid >= 6) /* skip VO queue */ 1033 return; 1034 1035 val = le32_to_cpu(txwi[2]); 1036 fc = FIELD_GET(MT_TXD2_FRAME_TYPE, val) << 2 | 1037 FIELD_GET(MT_TXD2_SUB_TYPE, val) << 4; 1038 if (unlikely(fc != (IEEE80211_FTYPE_DATA | IEEE80211_STYPE_QOS_DATA))) 1039 return; 1040 1041 msta = (struct mt7921_sta *)sta->drv_priv; 1042 if (!test_and_set_bit(tid, &msta->ampdu_state)) 1043 ieee80211_start_tx_ba_session(sta, tid, 0); 1044 } 1045 EXPORT_SYMBOL_GPL(mt7921_tx_check_aggr); 1046 1047 static bool 1048 mt7921_mac_add_txs_skb(struct mt7921_dev *dev, struct mt76_wcid *wcid, int pid, 1049 __le32 *txs_data) 1050 { 1051 struct mt7921_sta *msta = container_of(wcid, struct mt7921_sta, wcid); 1052 struct mt76_sta_stats *stats = &msta->stats; 1053 struct ieee80211_supported_band *sband; 1054 struct mt76_dev *mdev = &dev->mt76; 1055 struct ieee80211_tx_info *info; 1056 struct rate_info rate = {}; 1057 struct sk_buff_head list; 1058 u32 txrate, txs, mode; 1059 struct sk_buff *skb; 1060 bool cck = false; 1061 1062 mt76_tx_status_lock(mdev, &list); 1063 skb = mt76_tx_status_skb_get(mdev, wcid, pid, &list); 1064 if (!skb) 1065 goto out; 1066 1067 info = IEEE80211_SKB_CB(skb); 1068 txs = le32_to_cpu(txs_data[0]); 1069 if (!(txs & MT_TXS0_ACK_ERROR_MASK)) 1070 info->flags |= IEEE80211_TX_STAT_ACK; 1071 1072 info->status.ampdu_len = 1; 1073 info->status.ampdu_ack_len = !!(info->flags & 1074 IEEE80211_TX_STAT_ACK); 1075 1076 info->status.rates[0].idx = -1; 1077 1078 if (!wcid->sta) 1079 goto out; 1080 1081 txrate = FIELD_GET(MT_TXS0_TX_RATE, txs); 1082 1083 rate.mcs = FIELD_GET(MT_TX_RATE_IDX, txrate); 1084 rate.nss = FIELD_GET(MT_TX_RATE_NSS, txrate) + 1; 1085 1086 if (rate.nss - 1 < ARRAY_SIZE(stats->tx_nss)) 1087 stats->tx_nss[rate.nss - 1]++; 1088 if (rate.mcs < ARRAY_SIZE(stats->tx_mcs)) 1089 stats->tx_mcs[rate.mcs]++; 1090 1091 mode = FIELD_GET(MT_TX_RATE_MODE, txrate); 1092 switch (mode) { 1093 case MT_PHY_TYPE_CCK: 1094 cck = true; 1095 fallthrough; 1096 case MT_PHY_TYPE_OFDM: 1097 if (dev->mphy.chandef.chan->band == NL80211_BAND_5GHZ) 1098 sband = &dev->mphy.sband_5g.sband; 1099 else 1100 sband = &dev->mphy.sband_2g.sband; 1101 1102 rate.mcs = mt76_get_rate(dev->mphy.dev, sband, rate.mcs, cck); 1103 rate.legacy = sband->bitrates[rate.mcs].bitrate; 1104 break; 1105 case MT_PHY_TYPE_HT: 1106 case MT_PHY_TYPE_HT_GF: 1107 if (rate.mcs > 31) 1108 goto out; 1109 1110 rate.flags = RATE_INFO_FLAGS_MCS; 1111 if (wcid->rate.flags & RATE_INFO_FLAGS_SHORT_GI) 1112 rate.flags |= RATE_INFO_FLAGS_SHORT_GI; 1113 break; 1114 case MT_PHY_TYPE_VHT: 1115 if (rate.mcs > 9) 1116 goto out; 1117 1118 rate.flags = RATE_INFO_FLAGS_VHT_MCS; 1119 break; 1120 case MT_PHY_TYPE_HE_SU: 1121 case MT_PHY_TYPE_HE_EXT_SU: 1122 case MT_PHY_TYPE_HE_TB: 1123 case MT_PHY_TYPE_HE_MU: 1124 if (rate.mcs > 11) 1125 goto out; 1126 1127 rate.he_gi = wcid->rate.he_gi; 1128 rate.he_dcm = FIELD_GET(MT_TX_RATE_DCM, txrate); 1129 rate.flags = RATE_INFO_FLAGS_HE_MCS; 1130 break; 1131 default: 1132 goto out; 1133 } 1134 stats->tx_mode[mode]++; 1135 1136 switch (FIELD_GET(MT_TXS0_BW, txs)) { 1137 case IEEE80211_STA_RX_BW_160: 1138 rate.bw = RATE_INFO_BW_160; 1139 stats->tx_bw[3]++; 1140 break; 1141 case IEEE80211_STA_RX_BW_80: 1142 rate.bw = RATE_INFO_BW_80; 1143 stats->tx_bw[2]++; 1144 break; 1145 case IEEE80211_STA_RX_BW_40: 1146 rate.bw = RATE_INFO_BW_40; 1147 stats->tx_bw[1]++; 1148 break; 1149 default: 1150 rate.bw = RATE_INFO_BW_20; 1151 stats->tx_bw[0]++; 1152 break; 1153 } 1154 wcid->rate = rate; 1155 1156 out: 1157 if (skb) 1158 mt76_tx_status_skb_done(mdev, skb, &list); 1159 mt76_tx_status_unlock(mdev, &list); 1160 1161 return !!skb; 1162 } 1163 1164 void mt7921_mac_add_txs(struct mt7921_dev *dev, void *data) 1165 { 1166 struct mt7921_sta *msta = NULL; 1167 struct mt76_wcid *wcid; 1168 __le32 *txs_data = data; 1169 u16 wcidx; 1170 u8 pid; 1171 1172 if (le32_get_bits(txs_data[0], MT_TXS0_TXS_FORMAT) > 1) 1173 return; 1174 1175 wcidx = le32_get_bits(txs_data[2], MT_TXS2_WCID); 1176 pid = le32_get_bits(txs_data[3], MT_TXS3_PID); 1177 1178 if (pid < MT_PACKET_ID_FIRST) 1179 return; 1180 1181 if (wcidx >= MT7921_WTBL_SIZE) 1182 return; 1183 1184 rcu_read_lock(); 1185 1186 wcid = rcu_dereference(dev->mt76.wcid[wcidx]); 1187 if (!wcid) 1188 goto out; 1189 1190 mt7921_mac_add_txs_skb(dev, wcid, pid, txs_data); 1191 1192 if (!wcid->sta) 1193 goto out; 1194 1195 msta = container_of(wcid, struct mt7921_sta, wcid); 1196 spin_lock_bh(&dev->sta_poll_lock); 1197 if (list_empty(&msta->poll_list)) 1198 list_add_tail(&msta->poll_list, &dev->sta_poll_list); 1199 spin_unlock_bh(&dev->sta_poll_lock); 1200 1201 out: 1202 rcu_read_unlock(); 1203 } 1204 EXPORT_SYMBOL_GPL(mt7921_mac_add_txs); 1205 1206 void mt7921_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, 1207 struct sk_buff *skb) 1208 { 1209 struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); 1210 __le32 *rxd = (__le32 *)skb->data; 1211 __le32 *end = (__le32 *)&skb->data[skb->len]; 1212 enum rx_pkt_type type; 1213 u16 flag; 1214 1215 type = le32_get_bits(rxd[0], MT_RXD0_PKT_TYPE); 1216 flag = le32_get_bits(rxd[0], MT_RXD0_PKT_FLAG); 1217 1218 if (type == PKT_TYPE_RX_EVENT && flag == 0x1) 1219 type = PKT_TYPE_NORMAL_MCU; 1220 1221 switch (type) { 1222 case PKT_TYPE_RX_EVENT: 1223 mt7921_mcu_rx_event(dev, skb); 1224 break; 1225 case PKT_TYPE_TXS: 1226 for (rxd += 2; rxd + 8 <= end; rxd += 8) 1227 mt7921_mac_add_txs(dev, rxd); 1228 dev_kfree_skb(skb); 1229 break; 1230 case PKT_TYPE_NORMAL_MCU: 1231 case PKT_TYPE_NORMAL: 1232 if (!mt7921_mac_fill_rx(dev, skb)) { 1233 mt76_rx(&dev->mt76, q, skb); 1234 return; 1235 } 1236 fallthrough; 1237 default: 1238 dev_kfree_skb(skb); 1239 break; 1240 } 1241 } 1242 EXPORT_SYMBOL_GPL(mt7921_queue_rx_skb); 1243 1244 void mt7921_mac_reset_counters(struct mt7921_phy *phy) 1245 { 1246 struct mt7921_dev *dev = phy->dev; 1247 int i; 1248 1249 for (i = 0; i < 4; i++) { 1250 mt76_rr(dev, MT_TX_AGG_CNT(0, i)); 1251 mt76_rr(dev, MT_TX_AGG_CNT2(0, i)); 1252 } 1253 1254 dev->mt76.phy.survey_time = ktime_get_boottime(); 1255 memset(&dev->mt76.aggr_stats[0], 0, sizeof(dev->mt76.aggr_stats) / 2); 1256 1257 /* reset airtime counters */ 1258 mt76_rr(dev, MT_MIB_SDR9(0)); 1259 mt76_rr(dev, MT_MIB_SDR36(0)); 1260 mt76_rr(dev, MT_MIB_SDR37(0)); 1261 1262 mt76_set(dev, MT_WF_RMAC_MIB_TIME0(0), MT_WF_RMAC_MIB_RXTIME_CLR); 1263 mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0(0), MT_WF_RMAC_MIB_RXTIME_CLR); 1264 } 1265 1266 void mt7921_mac_set_timing(struct mt7921_phy *phy) 1267 { 1268 s16 coverage_class = phy->coverage_class; 1269 struct mt7921_dev *dev = phy->dev; 1270 u32 val, reg_offset; 1271 u32 cck = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 231) | 1272 FIELD_PREP(MT_TIMEOUT_VAL_CCA, 48); 1273 u32 ofdm = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 60) | 1274 FIELD_PREP(MT_TIMEOUT_VAL_CCA, 28); 1275 bool is_2ghz = phy->mt76->chandef.chan->band == NL80211_BAND_2GHZ; 1276 int sifs = is_2ghz ? 10 : 16, offset; 1277 1278 if (!test_bit(MT76_STATE_RUNNING, &phy->mt76->state)) 1279 return; 1280 1281 mt76_set(dev, MT_ARB_SCR(0), 1282 MT_ARB_SCR_TX_DISABLE | MT_ARB_SCR_RX_DISABLE); 1283 udelay(1); 1284 1285 offset = 3 * coverage_class; 1286 reg_offset = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, offset) | 1287 FIELD_PREP(MT_TIMEOUT_VAL_CCA, offset); 1288 1289 mt76_wr(dev, MT_TMAC_CDTR(0), cck + reg_offset); 1290 mt76_wr(dev, MT_TMAC_ODTR(0), ofdm + reg_offset); 1291 mt76_wr(dev, MT_TMAC_ICR0(0), 1292 FIELD_PREP(MT_IFS_EIFS, 360) | 1293 FIELD_PREP(MT_IFS_RIFS, 2) | 1294 FIELD_PREP(MT_IFS_SIFS, sifs) | 1295 FIELD_PREP(MT_IFS_SLOT, phy->slottime)); 1296 1297 if (phy->slottime < 20 || !is_2ghz) 1298 val = MT7921_CFEND_RATE_DEFAULT; 1299 else 1300 val = MT7921_CFEND_RATE_11B; 1301 1302 mt76_rmw_field(dev, MT_AGG_ACR0(0), MT_AGG_ACR_CFEND_RATE, val); 1303 mt76_clear(dev, MT_ARB_SCR(0), 1304 MT_ARB_SCR_TX_DISABLE | MT_ARB_SCR_RX_DISABLE); 1305 } 1306 1307 static u8 1308 mt7921_phy_get_nf(struct mt7921_phy *phy, int idx) 1309 { 1310 return 0; 1311 } 1312 1313 static void 1314 mt7921_phy_update_channel(struct mt76_phy *mphy, int idx) 1315 { 1316 struct mt7921_dev *dev = container_of(mphy->dev, struct mt7921_dev, mt76); 1317 struct mt7921_phy *phy = (struct mt7921_phy *)mphy->priv; 1318 struct mt76_channel_state *state; 1319 u64 busy_time, tx_time, rx_time, obss_time; 1320 int nf; 1321 1322 busy_time = mt76_get_field(dev, MT_MIB_SDR9(idx), 1323 MT_MIB_SDR9_BUSY_MASK); 1324 tx_time = mt76_get_field(dev, MT_MIB_SDR36(idx), 1325 MT_MIB_SDR36_TXTIME_MASK); 1326 rx_time = mt76_get_field(dev, MT_MIB_SDR37(idx), 1327 MT_MIB_SDR37_RXTIME_MASK); 1328 obss_time = mt76_get_field(dev, MT_WF_RMAC_MIB_AIRTIME14(idx), 1329 MT_MIB_OBSSTIME_MASK); 1330 1331 nf = mt7921_phy_get_nf(phy, idx); 1332 if (!phy->noise) 1333 phy->noise = nf << 4; 1334 else if (nf) 1335 phy->noise += nf - (phy->noise >> 4); 1336 1337 state = mphy->chan_state; 1338 state->cc_busy += busy_time; 1339 state->cc_tx += tx_time; 1340 state->cc_rx += rx_time + obss_time; 1341 state->cc_bss_rx += rx_time; 1342 state->noise = -(phy->noise >> 4); 1343 } 1344 1345 void mt7921_update_channel(struct mt76_phy *mphy) 1346 { 1347 struct mt7921_dev *dev = container_of(mphy->dev, struct mt7921_dev, mt76); 1348 1349 if (mt76_connac_pm_wake(mphy, &dev->pm)) 1350 return; 1351 1352 mt7921_phy_update_channel(mphy, 0); 1353 /* reset obss airtime */ 1354 mt76_set(dev, MT_WF_RMAC_MIB_TIME0(0), MT_WF_RMAC_MIB_RXTIME_CLR); 1355 1356 mt76_connac_power_save_sched(mphy, &dev->pm); 1357 } 1358 EXPORT_SYMBOL_GPL(mt7921_update_channel); 1359 1360 static void 1361 mt7921_vif_connect_iter(void *priv, u8 *mac, 1362 struct ieee80211_vif *vif) 1363 { 1364 struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; 1365 struct mt7921_dev *dev = mvif->phy->dev; 1366 struct ieee80211_hw *hw = mt76_hw(dev); 1367 1368 if (vif->type == NL80211_IFTYPE_STATION) 1369 ieee80211_disconnect(vif, true); 1370 1371 mt76_connac_mcu_uni_add_dev(&dev->mphy, vif, &mvif->sta.wcid, true); 1372 mt7921_mcu_set_tx(dev, vif); 1373 1374 if (vif->type == NL80211_IFTYPE_AP) { 1375 mt76_connac_mcu_uni_add_bss(dev->phy.mt76, vif, &mvif->sta.wcid, 1376 true); 1377 mt7921_mcu_sta_update(dev, NULL, vif, true, 1378 MT76_STA_INFO_STATE_NONE); 1379 mt7921_mcu_uni_add_beacon_offload(dev, hw, vif, true); 1380 } 1381 } 1382 1383 /* system error recovery */ 1384 void mt7921_mac_reset_work(struct work_struct *work) 1385 { 1386 struct mt7921_dev *dev = container_of(work, struct mt7921_dev, 1387 reset_work); 1388 struct ieee80211_hw *hw = mt76_hw(dev); 1389 struct mt76_connac_pm *pm = &dev->pm; 1390 int i; 1391 1392 dev_err(dev->mt76.dev, "chip reset\n"); 1393 dev->hw_full_reset = true; 1394 ieee80211_stop_queues(hw); 1395 1396 cancel_delayed_work_sync(&dev->mphy.mac_work); 1397 cancel_delayed_work_sync(&pm->ps_work); 1398 cancel_work_sync(&pm->wake_work); 1399 1400 mutex_lock(&dev->mt76.mutex); 1401 for (i = 0; i < 10; i++) 1402 if (!mt7921_dev_reset(dev)) 1403 break; 1404 mutex_unlock(&dev->mt76.mutex); 1405 1406 if (i == 10) 1407 dev_err(dev->mt76.dev, "chip reset failed\n"); 1408 1409 if (test_and_clear_bit(MT76_HW_SCANNING, &dev->mphy.state)) { 1410 struct cfg80211_scan_info info = { 1411 .aborted = true, 1412 }; 1413 1414 ieee80211_scan_completed(dev->mphy.hw, &info); 1415 } 1416 1417 dev->hw_full_reset = false; 1418 pm->suspended = false; 1419 ieee80211_wake_queues(hw); 1420 ieee80211_iterate_active_interfaces(hw, 1421 IEEE80211_IFACE_ITER_RESUME_ALL, 1422 mt7921_vif_connect_iter, NULL); 1423 mt76_connac_power_save_sched(&dev->mt76.phy, pm); 1424 } 1425 1426 void mt7921_reset(struct mt76_dev *mdev) 1427 { 1428 struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); 1429 1430 if (!dev->hw_init_done) 1431 return; 1432 1433 if (dev->hw_full_reset) 1434 return; 1435 1436 queue_work(dev->mt76.wq, &dev->reset_work); 1437 } 1438 1439 void mt7921_mac_update_mib_stats(struct mt7921_phy *phy) 1440 { 1441 struct mt7921_dev *dev = phy->dev; 1442 struct mib_stats *mib = &phy->mib; 1443 int i, aggr0 = 0, aggr1; 1444 u32 val; 1445 1446 mib->fcs_err_cnt += mt76_get_field(dev, MT_MIB_SDR3(0), 1447 MT_MIB_SDR3_FCS_ERR_MASK); 1448 mib->ack_fail_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR3(0), 1449 MT_MIB_ACK_FAIL_COUNT_MASK); 1450 mib->ba_miss_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR2(0), 1451 MT_MIB_BA_FAIL_COUNT_MASK); 1452 mib->rts_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR0(0), 1453 MT_MIB_RTS_COUNT_MASK); 1454 mib->rts_retries_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR1(0), 1455 MT_MIB_RTS_FAIL_COUNT_MASK); 1456 1457 mib->tx_ampdu_cnt += mt76_rr(dev, MT_MIB_SDR12(0)); 1458 mib->tx_mpdu_attempts_cnt += mt76_rr(dev, MT_MIB_SDR14(0)); 1459 mib->tx_mpdu_success_cnt += mt76_rr(dev, MT_MIB_SDR15(0)); 1460 1461 val = mt76_rr(dev, MT_MIB_SDR32(0)); 1462 mib->tx_pkt_ebf_cnt += FIELD_GET(MT_MIB_SDR9_EBF_CNT_MASK, val); 1463 mib->tx_pkt_ibf_cnt += FIELD_GET(MT_MIB_SDR9_IBF_CNT_MASK, val); 1464 1465 val = mt76_rr(dev, MT_ETBF_TX_APP_CNT(0)); 1466 mib->tx_bf_ibf_ppdu_cnt += FIELD_GET(MT_ETBF_TX_IBF_CNT, val); 1467 mib->tx_bf_ebf_ppdu_cnt += FIELD_GET(MT_ETBF_TX_EBF_CNT, val); 1468 1469 val = mt76_rr(dev, MT_ETBF_RX_FB_CNT(0)); 1470 mib->tx_bf_rx_fb_all_cnt += FIELD_GET(MT_ETBF_RX_FB_ALL, val); 1471 mib->tx_bf_rx_fb_he_cnt += FIELD_GET(MT_ETBF_RX_FB_HE, val); 1472 mib->tx_bf_rx_fb_vht_cnt += FIELD_GET(MT_ETBF_RX_FB_VHT, val); 1473 mib->tx_bf_rx_fb_ht_cnt += FIELD_GET(MT_ETBF_RX_FB_HT, val); 1474 1475 mib->rx_mpdu_cnt += mt76_rr(dev, MT_MIB_SDR5(0)); 1476 mib->rx_ampdu_cnt += mt76_rr(dev, MT_MIB_SDR22(0)); 1477 mib->rx_ampdu_bytes_cnt += mt76_rr(dev, MT_MIB_SDR23(0)); 1478 mib->rx_ba_cnt += mt76_rr(dev, MT_MIB_SDR31(0)); 1479 1480 for (i = 0; i < ARRAY_SIZE(mib->tx_amsdu); i++) { 1481 val = mt76_rr(dev, MT_PLE_AMSDU_PACK_MSDU_CNT(i)); 1482 mib->tx_amsdu[i] += val; 1483 mib->tx_amsdu_cnt += val; 1484 } 1485 1486 for (i = 0, aggr1 = aggr0 + 4; i < 4; i++) { 1487 u32 val2; 1488 1489 val = mt76_rr(dev, MT_TX_AGG_CNT(0, i)); 1490 val2 = mt76_rr(dev, MT_TX_AGG_CNT2(0, i)); 1491 1492 dev->mt76.aggr_stats[aggr0++] += val & 0xffff; 1493 dev->mt76.aggr_stats[aggr0++] += val >> 16; 1494 dev->mt76.aggr_stats[aggr1++] += val2 & 0xffff; 1495 dev->mt76.aggr_stats[aggr1++] += val2 >> 16; 1496 } 1497 } 1498 1499 void mt7921_mac_work(struct work_struct *work) 1500 { 1501 struct mt7921_phy *phy; 1502 struct mt76_phy *mphy; 1503 1504 mphy = (struct mt76_phy *)container_of(work, struct mt76_phy, 1505 mac_work.work); 1506 phy = mphy->priv; 1507 1508 mt7921_mutex_acquire(phy->dev); 1509 1510 mt76_update_survey(mphy); 1511 if (++mphy->mac_work_count == 2) { 1512 mphy->mac_work_count = 0; 1513 1514 mt7921_mac_update_mib_stats(phy); 1515 } 1516 1517 mt7921_mutex_release(phy->dev); 1518 1519 mt76_tx_status_check(mphy->dev, false); 1520 ieee80211_queue_delayed_work(phy->mt76->hw, &mphy->mac_work, 1521 MT7921_WATCHDOG_TIME); 1522 } 1523 1524 void mt7921_pm_wake_work(struct work_struct *work) 1525 { 1526 struct mt7921_dev *dev; 1527 struct mt76_phy *mphy; 1528 1529 dev = (struct mt7921_dev *)container_of(work, struct mt7921_dev, 1530 pm.wake_work); 1531 mphy = dev->phy.mt76; 1532 1533 if (!mt7921_mcu_drv_pmctrl(dev)) { 1534 struct mt76_dev *mdev = &dev->mt76; 1535 int i; 1536 1537 if (mt76_is_sdio(mdev)) { 1538 mt76_connac_pm_dequeue_skbs(mphy, &dev->pm); 1539 mt76_worker_schedule(&mdev->sdio.txrx_worker); 1540 } else { 1541 mt76_for_each_q_rx(mdev, i) 1542 napi_schedule(&mdev->napi[i]); 1543 mt76_connac_pm_dequeue_skbs(mphy, &dev->pm); 1544 mt7921_mcu_tx_cleanup(dev); 1545 } 1546 if (test_bit(MT76_STATE_RUNNING, &mphy->state)) 1547 ieee80211_queue_delayed_work(mphy->hw, &mphy->mac_work, 1548 MT7921_WATCHDOG_TIME); 1549 } 1550 1551 ieee80211_wake_queues(mphy->hw); 1552 wake_up(&dev->pm.wait); 1553 } 1554 1555 void mt7921_pm_power_save_work(struct work_struct *work) 1556 { 1557 struct mt7921_dev *dev; 1558 unsigned long delta; 1559 struct mt76_phy *mphy; 1560 1561 dev = (struct mt7921_dev *)container_of(work, struct mt7921_dev, 1562 pm.ps_work.work); 1563 mphy = dev->phy.mt76; 1564 1565 delta = dev->pm.idle_timeout; 1566 if (test_bit(MT76_HW_SCANNING, &mphy->state) || 1567 test_bit(MT76_HW_SCHED_SCANNING, &mphy->state) || 1568 dev->fw_assert) 1569 goto out; 1570 1571 if (mutex_is_locked(&dev->mt76.mutex)) 1572 /* if mt76 mutex is held we should not put the device 1573 * to sleep since we are currently accessing device 1574 * register map. We need to wait for the next power_save 1575 * trigger. 1576 */ 1577 goto out; 1578 1579 if (time_is_after_jiffies(dev->pm.last_activity + delta)) { 1580 delta = dev->pm.last_activity + delta - jiffies; 1581 goto out; 1582 } 1583 1584 if (!mt7921_mcu_fw_pmctrl(dev)) { 1585 cancel_delayed_work_sync(&mphy->mac_work); 1586 return; 1587 } 1588 out: 1589 queue_delayed_work(dev->mt76.wq, &dev->pm.ps_work, delta); 1590 } 1591 1592 void mt7921_coredump_work(struct work_struct *work) 1593 { 1594 struct mt7921_dev *dev; 1595 char *dump, *data; 1596 1597 dev = (struct mt7921_dev *)container_of(work, struct mt7921_dev, 1598 coredump.work.work); 1599 1600 if (time_is_after_jiffies(dev->coredump.last_activity + 1601 4 * MT76_CONNAC_COREDUMP_TIMEOUT)) { 1602 queue_delayed_work(dev->mt76.wq, &dev->coredump.work, 1603 MT76_CONNAC_COREDUMP_TIMEOUT); 1604 return; 1605 } 1606 1607 dump = vzalloc(MT76_CONNAC_COREDUMP_SZ); 1608 data = dump; 1609 1610 while (true) { 1611 struct sk_buff *skb; 1612 1613 spin_lock_bh(&dev->mt76.lock); 1614 skb = __skb_dequeue(&dev->coredump.msg_list); 1615 spin_unlock_bh(&dev->mt76.lock); 1616 1617 if (!skb) 1618 break; 1619 1620 skb_pull(skb, sizeof(struct mt7921_mcu_rxd)); 1621 if (!dump || data + skb->len - dump > MT76_CONNAC_COREDUMP_SZ) { 1622 dev_kfree_skb(skb); 1623 continue; 1624 } 1625 1626 memcpy(data, skb->data, skb->len); 1627 data += skb->len; 1628 1629 dev_kfree_skb(skb); 1630 } 1631 1632 if (dump) 1633 dev_coredumpv(dev->mt76.dev, dump, MT76_CONNAC_COREDUMP_SZ, 1634 GFP_KERNEL); 1635 1636 mt7921_reset(&dev->mt76); 1637 } 1638 1639 /* usb_sdio */ 1640 static void 1641 mt7921_usb_sdio_write_txwi(struct mt7921_dev *dev, struct mt76_wcid *wcid, 1642 enum mt76_txq_id qid, struct ieee80211_sta *sta, 1643 struct ieee80211_key_conf *key, int pid, 1644 struct sk_buff *skb) 1645 { 1646 __le32 *txwi = (__le32 *)(skb->data - MT_SDIO_TXD_SIZE); 1647 1648 memset(txwi, 0, MT_SDIO_TXD_SIZE); 1649 mt7921_mac_write_txwi(dev, txwi, skb, wcid, key, pid, false); 1650 skb_push(skb, MT_SDIO_TXD_SIZE); 1651 } 1652 1653 int mt7921_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, 1654 enum mt76_txq_id qid, struct mt76_wcid *wcid, 1655 struct ieee80211_sta *sta, 1656 struct mt76_tx_info *tx_info) 1657 { 1658 struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); 1659 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb); 1660 struct ieee80211_key_conf *key = info->control.hw_key; 1661 struct sk_buff *skb = tx_info->skb; 1662 int err, pad, pktid, type; 1663 1664 if (unlikely(tx_info->skb->len <= ETH_HLEN)) 1665 return -EINVAL; 1666 1667 if (!wcid) 1668 wcid = &dev->mt76.global_wcid; 1669 1670 if (sta) { 1671 struct mt7921_sta *msta = (struct mt7921_sta *)sta->drv_priv; 1672 1673 if (time_after(jiffies, msta->last_txs + HZ / 4)) { 1674 info->flags |= IEEE80211_TX_CTL_REQ_TX_STATUS; 1675 msta->last_txs = jiffies; 1676 } 1677 } 1678 1679 pktid = mt76_tx_status_skb_add(&dev->mt76, wcid, skb); 1680 mt7921_usb_sdio_write_txwi(dev, wcid, qid, sta, key, pktid, skb); 1681 1682 type = mt76_is_sdio(mdev) ? MT7921_SDIO_DATA : 0; 1683 mt7921_skb_add_usb_sdio_hdr(dev, skb, type); 1684 pad = round_up(skb->len, 4) - skb->len; 1685 if (mt76_is_usb(mdev)) 1686 pad += 4; 1687 1688 err = mt76_skb_adjust_pad(skb, pad); 1689 if (err) 1690 /* Release pktid in case of error. */ 1691 idr_remove(&wcid->pktid, pktid); 1692 1693 return err; 1694 } 1695 EXPORT_SYMBOL_GPL(mt7921_usb_sdio_tx_prepare_skb); 1696 1697 void mt7921_usb_sdio_tx_complete_skb(struct mt76_dev *mdev, 1698 struct mt76_queue_entry *e) 1699 { 1700 __le32 *txwi = (__le32 *)(e->skb->data + MT_SDIO_HDR_SIZE); 1701 unsigned int headroom = MT_SDIO_TXD_SIZE + MT_SDIO_HDR_SIZE; 1702 struct ieee80211_sta *sta; 1703 struct mt76_wcid *wcid; 1704 u16 idx; 1705 1706 idx = le32_get_bits(txwi[1], MT_TXD1_WLAN_IDX); 1707 wcid = rcu_dereference(mdev->wcid[idx]); 1708 sta = wcid_to_sta(wcid); 1709 1710 if (sta && likely(e->skb->protocol != cpu_to_be16(ETH_P_PAE))) 1711 mt7921_tx_check_aggr(sta, txwi); 1712 1713 skb_pull(e->skb, headroom); 1714 mt76_tx_complete_skb(mdev, e->wcid, e->skb); 1715 } 1716 EXPORT_SYMBOL_GPL(mt7921_usb_sdio_tx_complete_skb); 1717 1718 bool mt7921_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update) 1719 { 1720 struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); 1721 1722 mt7921_mutex_acquire(dev); 1723 mt7921_mac_sta_poll(dev); 1724 mt7921_mutex_release(dev); 1725 1726 return false; 1727 } 1728 EXPORT_SYMBOL_GPL(mt7921_usb_sdio_tx_status_data); 1729 1730 #if IS_ENABLED(CONFIG_IPV6) 1731 void mt7921_set_ipv6_ns_work(struct work_struct *work) 1732 { 1733 struct mt7921_dev *dev = container_of(work, struct mt7921_dev, 1734 ipv6_ns_work); 1735 struct sk_buff *skb; 1736 int ret = 0; 1737 1738 do { 1739 skb = skb_dequeue(&dev->ipv6_ns_list); 1740 1741 if (!skb) 1742 break; 1743 1744 mt7921_mutex_acquire(dev); 1745 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, 1746 MCU_UNI_CMD(OFFLOAD), true); 1747 mt7921_mutex_release(dev); 1748 1749 } while (!ret); 1750 1751 if (ret) 1752 skb_queue_purge(&dev->ipv6_ns_list); 1753 } 1754 #endif 1755