1 // SPDX-License-Identifier: ISC 2 /* Copyright (C) 2020 MediaTek Inc. 3 * 4 * Author: Ryder Lee <ryder.lee@mediatek.com> 5 */ 6 7 #include <linux/kernel.h> 8 #include <linux/module.h> 9 #include <linux/pci.h> 10 11 #include "mt7915.h" 12 #include "mac.h" 13 #include "../trace.h" 14 15 static const struct pci_device_id mt7915_pci_device_table[] = { 16 { PCI_DEVICE(0x14c3, 0x7915) }, 17 { }, 18 }; 19 20 static void 21 mt7915_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q) 22 { 23 struct mt7915_dev *dev = container_of(mdev, struct mt7915_dev, mt76); 24 static const u32 rx_irq_mask[] = { 25 [MT_RXQ_MAIN] = MT_INT_RX_DONE_DATA0, 26 [MT_RXQ_EXT] = MT_INT_RX_DONE_DATA1, 27 [MT_RXQ_MCU] = MT_INT_RX_DONE_WM, 28 [MT_RXQ_MCU_WA] = MT_INT_RX_DONE_WA, 29 }; 30 31 mt7915_irq_enable(dev, rx_irq_mask[q]); 32 } 33 34 /* TODO: support 2/4/6/8 MSI-X vectors */ 35 static irqreturn_t mt7915_irq_handler(int irq, void *dev_instance) 36 { 37 struct mt7915_dev *dev = dev_instance; 38 u32 intr, mask; 39 40 intr = mt76_rr(dev, MT_INT_SOURCE_CSR); 41 intr &= dev->mt76.mmio.irqmask; 42 mt76_wr(dev, MT_INT_SOURCE_CSR, intr); 43 44 if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state)) 45 return IRQ_NONE; 46 47 trace_dev_irq(&dev->mt76, intr, dev->mt76.mmio.irqmask); 48 49 mask = intr & MT_INT_RX_DONE_ALL; 50 if (intr & MT_INT_TX_DONE_MCU) 51 mask |= MT_INT_TX_DONE_MCU; 52 53 mt7915_irq_disable(dev, mask); 54 55 if (intr & MT_INT_TX_DONE_MCU) 56 napi_schedule(&dev->mt76.tx_napi); 57 58 if (intr & MT_INT_RX_DONE_DATA0) 59 napi_schedule(&dev->mt76.napi[MT_RXQ_MAIN]); 60 61 if (intr & MT_INT_RX_DONE_DATA1) 62 napi_schedule(&dev->mt76.napi[MT_RXQ_EXT]); 63 64 if (intr & MT_INT_RX_DONE_WM) 65 napi_schedule(&dev->mt76.napi[MT_RXQ_MCU]); 66 67 if (intr & MT_INT_RX_DONE_WA) 68 napi_schedule(&dev->mt76.napi[MT_RXQ_MCU_WA]); 69 70 if (intr & MT_INT_MCU_CMD) { 71 u32 val = mt76_rr(dev, MT_MCU_CMD); 72 73 mt76_wr(dev, MT_MCU_CMD, val); 74 if (val & MT_MCU_CMD_ERROR_MASK) { 75 dev->reset_state = val; 76 ieee80211_queue_work(mt76_hw(dev), &dev->reset_work); 77 wake_up(&dev->reset_wait); 78 } 79 } 80 81 return IRQ_HANDLED; 82 } 83 84 static int 85 mt7915_alloc_device(struct pci_dev *pdev, struct mt7915_dev *dev) 86 { 87 #define NUM_BANDS 2 88 int i; 89 s8 **sku; 90 91 sku = devm_kzalloc(&pdev->dev, NUM_BANDS * sizeof(*sku), GFP_KERNEL); 92 if (!sku) 93 return -ENOMEM; 94 95 for (i = 0; i < NUM_BANDS; i++) { 96 sku[i] = devm_kzalloc(&pdev->dev, MT7915_SKU_TABLE_SIZE * 97 sizeof(**sku), GFP_KERNEL); 98 if (!sku[i]) 99 return -ENOMEM; 100 } 101 dev->rate_power = sku; 102 103 return 0; 104 } 105 106 static int mt7915_pci_probe(struct pci_dev *pdev, 107 const struct pci_device_id *id) 108 { 109 static const struct mt76_driver_ops drv_ops = { 110 /* txwi_size = txd size + txp size */ 111 .txwi_size = MT_TXD_SIZE + sizeof(struct mt7915_txp), 112 .drv_flags = MT_DRV_TXWI_NO_FREE | MT_DRV_HW_MGMT_TXQ | 113 MT_DRV_AMSDU_OFFLOAD, 114 .survey_flags = SURVEY_INFO_TIME_TX | 115 SURVEY_INFO_TIME_RX | 116 SURVEY_INFO_TIME_BSS_RX, 117 .tx_prepare_skb = mt7915_tx_prepare_skb, 118 .tx_complete_skb = mt7915_tx_complete_skb, 119 .rx_skb = mt7915_queue_rx_skb, 120 .rx_poll_complete = mt7915_rx_poll_complete, 121 .sta_ps = mt7915_sta_ps, 122 .sta_add = mt7915_mac_sta_add, 123 .sta_remove = mt7915_mac_sta_remove, 124 .update_survey = mt7915_update_channel, 125 }; 126 struct mt7915_dev *dev; 127 struct mt76_dev *mdev; 128 int ret; 129 130 ret = pcim_enable_device(pdev); 131 if (ret) 132 return ret; 133 134 ret = pcim_iomap_regions(pdev, BIT(0), pci_name(pdev)); 135 if (ret) 136 return ret; 137 138 pci_set_master(pdev); 139 140 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 141 if (ret) 142 return ret; 143 144 mdev = mt76_alloc_device(&pdev->dev, sizeof(*dev), &mt7915_ops, 145 &drv_ops); 146 if (!mdev) 147 return -ENOMEM; 148 149 dev = container_of(mdev, struct mt7915_dev, mt76); 150 ret = mt7915_alloc_device(pdev, dev); 151 if (ret) 152 goto error; 153 154 mt76_mmio_init(&dev->mt76, pcim_iomap_table(pdev)[0]); 155 mdev->rev = (mt7915_l1_rr(dev, MT_HW_CHIPID) << 16) | 156 (mt7915_l1_rr(dev, MT_HW_REV) & 0xff); 157 dev_dbg(mdev->dev, "ASIC revision: %04x\n", mdev->rev); 158 159 mt76_wr(dev, MT_INT_MASK_CSR, 0); 160 161 /* master switch of PCIe tnterrupt enable */ 162 mt7915_l1_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff); 163 164 ret = devm_request_irq(mdev->dev, pdev->irq, mt7915_irq_handler, 165 IRQF_SHARED, KBUILD_MODNAME, dev); 166 if (ret) 167 goto error; 168 169 ret = mt7915_register_device(dev); 170 if (ret) 171 goto error; 172 173 return 0; 174 error: 175 mt76_free_device(&dev->mt76); 176 177 return ret; 178 } 179 180 static void mt7915_pci_remove(struct pci_dev *pdev) 181 { 182 struct mt76_dev *mdev = pci_get_drvdata(pdev); 183 struct mt7915_dev *dev = container_of(mdev, struct mt7915_dev, mt76); 184 185 mt7915_unregister_device(dev); 186 } 187 188 struct pci_driver mt7915_pci_driver = { 189 .name = KBUILD_MODNAME, 190 .id_table = mt7915_pci_device_table, 191 .probe = mt7915_pci_probe, 192 .remove = mt7915_pci_remove, 193 }; 194 195 module_pci_driver(mt7915_pci_driver); 196 197 MODULE_DEVICE_TABLE(pci, mt7915_pci_device_table); 198 MODULE_FIRMWARE(MT7915_FIRMWARE_WA); 199 MODULE_FIRMWARE(MT7915_FIRMWARE_WM); 200 MODULE_FIRMWARE(MT7915_ROM_PATCH); 201 MODULE_LICENSE("Dual BSD/GPL"); 202